CONTROL CODE DEVICE FUNCTION CONNECTOR * SEE …€¦ · 2 2 6 jumper table 4 7 5 a 3 date approved...
19
PG3 ADRV9009+ULTRASCALE SOM CONNECTOR2 PG5 DISPLAY PORT, USB3 C.GOGA A 31OCT18 31OCT18 PG12 POWER PG11 POWER C.GOGA INITIAL RELEASE AS PER ECR-085796 C M. B. 31OCT18 PG7 SFP+, QSFP+ PG6 AUDIO CODEC PG4 FMC HPC 31OCT18 14JUN19 PG8 10/100/1000 SGMII ETHERNET PG2 ADRV9009+ULTRASCALE SOM CONNECTOR1 31OCT18 31OCT18 PG11 UART, FAN, SD CARD, PMOD PG10 JTAG,PUSHBUTTONS, SLIDE SWITCHES, LEDS PG9 HMC7044 B AS PER ECR-091617 18FEB20 1 19 : Pitch-pitch StyleVendor Style PACKAGE : N/A-lead N/A N/A-family : NA Product(s): ADRV9009 HW TYPE : Customer Evaluation Z no_template C CodeID 1:1 02_048950 TBD N/A R.MACDONALD N/A J.PACAMARRA A.CAUILAN-AGENA C.GOGA N/A K.JABATAN N/A N/A REV 2 REVISIONS 1 OWNED OR CONTROLLED BY ANALOG DEVICES. THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS PURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES. JP# USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER 8 CONNECTOR FUNCTION CODE DEVICE 2 2 6 JUMPER TABLE 4 7 5 A 3 DATE APPROVED D B DESCRIPTION 3 4 OFF ON 5 5 7 OEM PART# HANDLER 6 C B 8 SOCKET OEM BK/BD SPEC. P.O SPEC. A 1 RELAY CONTROL CHART 3 1 4 C NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, OR THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS CHECKER DESIGNER PTD ENGINEER TEST ENGINEER DECIMALS X.XXX +-0.005 X.XX +-0.010 MASTER PROJECT TEMPLATE TOLERANCES +-1/32 FRACTIONS +-2 SIZE D D SCHEMATIC DRAWING NO. SCALE CODE ID NO. SHEET OF REV. D A A E N VC LG S E O DATE ANGLES UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES TESTER TEMPLATE TEMPLATE ENGINEER HARDWARE SERVICES HARDWARE SYSTEMS COMPONENT ENGINEER TEST PROCESS HARDWARE RELEASE * SEE ASSEMBLY INSTRUCTIONS CONTROL D
Transcript of CONTROL CODE DEVICE FUNCTION CONNECTOR * SEE …€¦ · 2 2 6 jumper table 4 7 5 a 3 date approved...
PG3 ADRV9009+ULTRASCALE SOM CONNECTOR2
PG5 DISPLAY PORT, USB3
C.GOGAA
31OCT18
31OCT18
PG12 POWER
PG11 POWER
C.GOGA
INITIAL RELEASE
AS PER ECR-085796
C M. B.
31OCT18
PG7 SFP+, QSFP+
PG6 AUDIO CODEC
PG4 FMC HPC
31OCT18
14JUN19
PG8 10/100/1000 SGMII ETHERNET
PG2 ADRV9009+ULTRASCALE SOM CONNECTOR1
31OCT18
31OCT18
PG11 UART, FAN, SD CARD, PMOD
PG10 JTAG,PUSHBUTTONS, SLIDE SWITCHES, LEDS
PG9 HMC7044
B
AS PER ECR-091617 18FEB20
1 19
: Pitch-pitch StyleVendor StylePACKAGE : N/A-lead N/A N/A-family
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
no_template
CCodeID1:1
02_048950TBD
N/A
R.MACDONALD
N/A
J.PACAMARRA
A.CAUILAN-AGENA
C.GOGA
N/A
K.JABATAN
N/A
N/A
REV
2REVISIONS
1
OWNED OR CONTROLLED BY ANALOG DEVICES.THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTSPURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES. JP#USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER
8
CONNECTORFUNCTIONCODE DEVICE
2
2
6JUMPER TABLE
4
7
5
A
3
DATE APPROVED
D
B
DESCRIPTION
34
OFFON
5
57
OEM PART# HANDLER
6
C
B
8
SOCKET OEMBK/BD SPEC.P.O SPEC.
A
1
RELAY CONTROL CHART
3 14
C
NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, ORTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS
CHECKER
DESIGNER
PTD ENGINEER
TEST ENGINEER
DECIMALS
X.XXX +-0.005X.XX +-0.010
MASTER PROJECT TEMPLATE
TOLERANCES
+-1/32FRACTIONS
+-2SIZE
DDDD
SCHEMATIC
DRAWING NO.
SCALE CODE ID NO.SHEET OF
REV.
DA A
ENV C
L GSE
ODATE
ANGLES
UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES
TESTER TEMPLATE
TEMPLATE ENGINEER
HARDWARE SERVICES
HARDWARE SYSTEMS
COMPONENT ENGINEER
TEST PROCESS
HARDWARE RELEASE
* SEE ASSEMBLY INSTRUCTIONS
CONTROL
D
I2C PROGRAMMING INTERFACE
I2C1
VCCO_89 - 1V8_SOM IS LOOPED BACK FROM THE SOM 1V8
CROSSOVER
PL HD PINS EXPANSION, 1V8 IOS
ACTIVE HIGH
VIN12V0 PG_ALL
PROVIDED BY SOM
REFERENCE RESISTOR FOR DCI
REFERENCE RESISTOR FOR DCI
VREF65
SE ONLY
SE ONLY
SE ONLY
SE ONLY
SE ONLY
SE ONLY
VCCO_65 - 1V8_SOM IS LOOPED BACK FROM THE SOM 1V8
VREF68
3V3 FROM SOM
SOM CONNECTOR 1 FMC MALE CONNECTORBANK 67, 68 - FMC
PL
I2C0
DEBUG USB
PS
VCCO89
PHY BACKPLANE
BANK 65 - OTHER PERIPHERALS: SFP, QSFP, PCIE
REFERENCE RESISTOR FOR DCIINTERNAL TERMINATION CALIB
SE ONLYVCCO65
PROVIDED BY CARRIER
VREF67VCCO67
PROVIDED BY SOM
JUMPER TO OVERWRITE PG_ALLJUMPER TO OVERWRITE PG_SOM
DP RX N/A
VCCO68PROVIDED BY CARRIER
PHY BACKPLANE
PG_SOMCARRIER -----> SOM -----> CARRIER -----> SOM
POWER_GOOD NEGOTIATION
2 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.949.9
ASP-134488-01ASP-134488-01ASP-134488-01
499
ASP-134488-01
ASP-134488-01
ASP-134488-01 ASP-134488-01
100100
ASP-134488-01
ASP-134488-01
ASP-134488-01240
240
240
1MEG
DNI
10K
1MEG
10K
SSM-110-S-DV-LC
49.9
49.9
R268R262
R267R261
R266R260
R265R259
R264R258
R263R257
R272R270
R256
R271R269
R255
R254
R253
P25
P12
R292
P19
R293
P12 P12 P12
P12 P12 P12P12 P12 P12
P18 P20
GPIO_0_EXP_PGPIO_1_EXP_N
GPIO_4_EXP_NGPIO_4_EXP_P
USB3_GTR_TX_N
USB3_GTR_RX_N
GPIO_5_EXP_NGPIO_5_EXP_P
GPIO_3_EXP_NGPIO_3_EXP_P
GPIO_2_EXP_PGPIO_2_EXP_N
GPIO_1_EXP_P
1V8_SOM
GPIO_0_EXP_N
SGMII0_GTR_RX_NSGMII0_GTR_RX_P
FMC_HPC_LA33_N
FMC_HPC_LA25_N
FMC_HPC_LA23_N
VDDA3P8_SNS_NVDDA3P8_SNS_P
DP1_GTR_TX_N
ETH0_MDC
FMC_HPC_LA26_P
GPIO_5_EXP_PGPIO_5_EXP_N
FMC_HPC_LA06_NFMC_HPC_LA06_P
GPIO_4_EXP_PGPIO_4_EXP_N
FMC_HPC_LA08_N
GPIO_3_EXP_NGPIO_3_EXP_P
LED_GPIO_1
SFP/QSFP_REC_CLK_NSFP/QSFP_REC_CLK_P
FMC_HPC_LA00_P_CC
GPIO_0_EXP_PGPIO_0_EXP_N
GPIO_1_EXP_PGPIO_1_EXP_N
GPIO_2_EXP_NGPIO_2_EXP_P
FMC_HPC_LA14_PFMC_HPC_LA13_N
FMC_HPC_LA23_PFMC_HPC_LA19_P
FMC_HPC_CLK0_M2C_N
DP1_GTR_TX_P
SDA_ADM1266_3V3SCL_ADM1266_3V3
FMC_HPC_LA28_P
FMC_HPC_LA11_P
FMC_HPC_LA16_P
PMOD0_D7
PMOD0_D4
FMC_HPC_LA05_N
FMC_HPC_LA10_PFMC_HPC_LA10_N
FMC_HPC_LA08_P
FMC_HPC_LA28_N
FMC_HPC_CLK1_M2C_NFMC_HPC_CLK1_M2C_P
FMC_HPC_LA01_P_CC
PMOD0_D6
REFCLK_AD9545_P
FMC_HPC_LA00_N_CC
FMC_HPC_LA24_PFMC_HPC_LA24_N
FMC_HPC_LA32_P
FMC_HPC_LA25_P
FMC_HPC_LA27_P
DIP_GPIO_3DIP_GPIO_2
FMC_HPC_LA05_P
FMC_HPC_LA09_PFMC_HPC_LA09_N
FMC_HPC_LA17_N_CC
FMC_HPC_LA04_P
FMC_HPC_LA02_NFMC_HPC_LA02_P
FMC_HPC_CLK0_M2C_P
FMC_HPC_LA04_N
FAN_TACHFAN_PWM
QSFP_MODPRSL
REFCLK_AD9545_N
FMC_HPC_LA29_P
FMC_HPC_LA31_P
USB3_GTR_RX_P
FMC_HPC_LA32_N
DPAUX_HPDDPAUX_DATA_OE
I2C1_SCL
DPAUX_DATA_OUT
I2C1_SDA
DPAUX_DATA_IN
ETH_MD2_P
ETH0_RESET_B
PS_SRST_BPS_PROG_B
QSFP_RESETLQSFP_LPMODE
PCIE_PERST
PMOD0_D5
FMC_VREFA_M2CFMC_VADJ
FMC_HPC_LA22_PFMC_HPC_LA22_N
FMC_HPC_LA29_N
FMC_HPC_LA12_N LED_GPIO_0
LED_GPIO_2LED_GPIO_3
FMC_HPC_LA33_P
FMC_HPC_LA20_PFMC_HPC_LA20_N
FMC_HPC_LA16_N
FMC_HPC_LA07_NFMC_HPC_LA07_P
I2S_LRCLK
I2S_SDATA_INI2S_SDATA_OUT
PG_ALLPG_SOM
DP0_GTR_TX_NDP0_GTR_TX_P
USB_OTG_N
USB_IDUSB_VBUS_OTG
USB_OTG_P
ETH_PHY_LED0
ETH_MD3_P
USB3_GTR_TX_P
ETH_MD3_N
ETH_MD1_NETH_MD1_P
ETH_MD2_N
VCC_PSBATT
JTAG_TMS
PS_INIT_B
3V3_SNS_N
ETH_MD4_PETH_MD4_N
5V0_SNS_P5V0_SNS_N
3V3_SNS_P
1V8_SOM
SDIO_CARRIER_CD
SDIO_CARRIER_CMDSDIO_CARRIER_DAT3
USB_UART_RXD
SDIO_CARRIER_DAT2
JTAG_TCK
PCIE_WAKE_B
PS_ERROR_STATUS
ETH_PHY_LED1PS_ERROR_OUT
FMC_HPC_LA17_P_CC
PMOD0_D1PB_GPIO_0PB_GPIO_1
PB_GPIO_3
FMC_HPC_LA26_NFMC_HPC_LA21_P
FMC_HPC_LA19_N
QSFP_INTL
SGMII0_GTR_TX_PSGMII0_GTR_TX_N
USB_OTG_CPENPS_MODE0_503PS_MODE1_503PS_MODE2_503PS_MODE3_503
SDIO_CARRIER_DAT0SDIO_CARRIER_DAT1
PB_GPIO_2
SDIO_SEL
JTAG_FPGA_TDO
PS_DONE
FMC_HPC_LA21_N
FMC_HPC_LA11_N
FMC_HPC_LA15_NFMC_HPC_LA15_P
FMC_VREFA_M2C
1V8_SOMSFP+_TX_DISABLE
I2S_BCLKI2S_MCLK
FMC_HPC_LA03_N
FMC_HPC_LA31_NFMC_VADJ
PMOD0_D0
FMC_HPC_LA03_P
FMC_HPC_LA30_NFMC_HPC_LA30_P
FMC_HPC_LA13_P
FMC_HPC_LA18_P_CCFMC_HPC_LA18_N_CC
FMC_HPC_LA01_N_CC
FMC_HPC_LA27_N
DIP_GPIO_1DIP_GPIO_0
FMC_HPC_LA14_N
PMOD0_D2
FMC_HPC_LA12_P
SCL_ADM1266_3V3
VADJ_SNS_NVADJ_SNS_P
1V8_SOMUSB3_CH2_SET2USB3_CH2_SET1USB3_CH1_SET2USB3_CH1_SET1
PMOD0_D3
PG_CARRIER
1V8_SOMVREG_ADP5054
PG_SOM
PG_ALLEN_PWR_CAR
SDA_ADM1266_3V3
SDIO_CARRIER_CLK
ETH0_MDIOI2C_EXP_RESETB
USB_UART_TXD
PS_MIO26_501_ID
PS_MIO34_501_CPEN
VIN_12V0
1V8_SOM
JTAG_FPGA_TDI
PS_MIO23_INTB_PTN5150
B10
B3
16A14
19
13A11
6
32
A28
14
1211
D22
G40
A15
C5
B13
C21
D27
A13
A5
A20
A27
G11
J40
C12
G29
G32
J36K37
K19
K34
A19
B14
1
J23
K21
K28
J26
G23
H20
F22
F14
F20
E15
E18F18F19
G20
K22
E19
E17F16
G14
H16
J19
K24
B4
H14
K25
K23
J12
F28J29
D38
D40
D33D32
D19D18
D16D15D14D13
D11
D9D8
H3
H11
H18
G16G15
H34J35
G30
H38H37
J16
K7
H17
K11
K8
K4K3K2K1
B37B38B39B40
B31
B28B27
B9
B16
B20B21B22
B11
B17
C23
C13
B7B6
C1
C39
C31C30C29
C37
C14
C35
A17
C9
B5
C27C26
C40
B34B33
A24
C2 B2
A4
C34
C10C11
C15
B8
B12
A6
D3
C6
C4
K33
C3
C22
D34
D5
H29
D7
B15
B24
B26
B29B30
B36
C32
C24
C8
C25
D6
K38
D4
B23
E28
F40
F34F33
G2
G5G6
H25H24
E25E24E23E22
F25F24
F21
F17
H33G34
E30E31
E26
E20
E16
E32
E14
E21
E37E38E39E40
E36E35E34E33
E29
E13E12E11E10E9E8E7
E4E3
E5
E2E1
F31
F27
F35
F39G38G39
G36
G33
G31
G28
G21
G19
G8
G3
G1
H32H31
H28
J39
K26
K29
B35
B32
J28
D1
B25
A3
A9
A16
A26
A29
A38A39A40
A30
A1
A35A36A37
A31
A33A32
A34
A10
D2
K31
J15
G9
E6
J13
D30
D10
J38
H36H35
H19G18
K15
K36
K32
K35
K18
K40K39
K16
K20
K30
K27
K14
G25G26
H27H26
K10K9
B1
B18B19
K12
J1
K13
J2J3J4
H30
G24
F26
F36
A8
D39
D25
C28
J11J10J9J8J7
C7
J5
J17J18
J32
J37
H15
H13
J33
J30J31
K17
F32
F37
J34G35
H22H21
F1F2F3
G37
F30
H23
H39
H10H9
H7
F38
F29
H8
H12
G4 F4F5
F8F9
F12F13
F15
G13
K5K6
J14
J27
J20J21J22
J24J25
H40
E27
F23G22
G10
G17
G7
F10
G12F11
F7F6
H1H2
H4
H6H5
D26
D20
D24
D35
A2
A23
A12
J6
G27
A21A22
321 1
23
A18
1
17
20
18
3
78
10
4
2
15
A7
A25
5
C19
C33
C38
D17
D23
D12
D21
D28
C36
D31
D29
D37D36
C16C17C18
C20
9
GND
GNDGND
GND
GND
GND
GND
GND
GND
GNDGNDGNDGND
GND
GND
GNDGND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
SOM CONNECTOR 2 FMC MALE CONNECTOR
3 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
ASP-134488-01
ASP-134488-01ASP-134488-01
ASP-134488-01ASP-134488-01
ASP-134488-01 ASP-134488-01 ASP-134488-01ASP-134488-01
ASP-134488-01
P14 P14
P14 P14P14P14P14P14
P14 P14
FMC_HPC_DP1_C2M_NFMC_HPC_DP1_C2M_P
FMC_HPC_GBTCLK0_M2C_P
PCIE_RX0_N
QSFP_TX1_N
PCIE_RX1_PPCIE_RX1_N
PCIE_RX4_PPCIE_RX4_N
PCIE_RX0_P
QSFP_RX3_P
PCIE_RX3_PPCIE_RX3_N
PCIE_RX6_PPCIE_RX6_N
PCIE_TX2_P
ETH_REFCLK2_P
QSFP_TX4_P
PCIE_TX2_N
PCIE_TX5_P
FMC_HPC_DP7_M2C_N
FMC_HPC_DP4_C2M_P
PCIE_TX5_N
PCIE_RX7_PPCIE_RX7_N
PCIE_RX2_PPCIE_RX2_N
QSFP_RX1_N
PCIE_RX5_PPCIE_RX5_N
PCIE_TX1_P
ETH_REFCLK1_N
PCIE_TX1_N
QSFP_TX2_NQSFP_TX2_P
PCIE_TX4_PPCIE_TX4_N
PCIE_TX7_PPCIE_TX7_N
PCIE_TX0_PPCIE_TX0_N
QSFP_TX3_P
PCIE_TX3_PPCIE_TX3_N
PCIE_TX6_PPCIE_TX6_N
PCIE_CLK_QO_PPCIE_CLK_QO_N
GPIO_18_B
GPIO_18_A
GPIO_3P3_7_A
GPIO_3P3_10_BGPIO_3P3_9_B
GPIO_3P3_6_B
GPIO_0_B
GPIO_3P3_5_AGPIO_3P3_4_A
RX2_ENABLE_B
TX2_ENABLE_B
GPIO_12_A
AUX_SYNTH_OUT_A
GPIO_17_ARX1_ENABLE_A
GPIO_15_A
GPIO_13_A
RX2_ENABLE_AGPIO_4_A
REFCLK_OUT2_N
FMC_HPC_DP6_M2C_PFMC_HPC_DP5_M2C_P
FMC_HPC_DP3_C2M_N
GPIO_3P3_3_B
FMC_HPC_DP9_M2C_NFMC_HPC_DP9_M2C_P
SFP+_TX_N
QSFP_RX4_P
FMC_HPC_DP2_C2M_N
PWR_FAULT1
REFCLK_OUT2_P
GPIO_3P3_8_BGPIO_3P3_7_B
GPIO_4_HMC7044_CAR
GPIO_3P3_6_A
GPIO_7_B
QSFP_REFCLK_P
QSFP_RX3_NQSFP_RX4_N
QSFP_TX4_N
QSFP_RX1_P
FMC_HPC_GBTCLK1_M2C_N
FMC_HPC_DP2_C2M_P
FMC_HPC_DP7_M2C_P
FMC_HPC_DP3_C2M_PFMC_HPC_DP4_C2M_N
FMC_HPC_DP4_M2C_PFMC_HPC_DP4_M2C_N
FMC_HPC_DP1_M2C_N
FMC_HPC_DP0_M2C_PFMC_HPC_DP0_M2C_N
QSFP_RX2_PQSFP_RX2_N
FMC_HPC_DP0_C2M_N
FMC_HPC_DP8_M2C_NFMC_HPC_DP8_M2C_P
SFP+_RX_NSFP+_TX_P
1V8_SOM
FMC_HPC_GBTCLK0_M2C_NSFP+_RX_P
GPIO_3P3_2_B
RF_SYNTH_VTUNE_AAUXADC_0_A
AUXADC_3_A
AUXADC_1_AAUXADC_2_A
GPIO_3P3_10_AGPIO_3P3_11_A
GPIO_3P3_9_AGPIO_3P3_8_A
GPIO_3P3_11_B
GPIO_0_A
GPIO_11_A
GPIO_3P3_4_BGPIO_3P3_5_B
GPIO_10_A
GPIO_8_A
GPIO_6_A
GPIO_3_AGPIO_2_AGPIO_1_A
GPIO_3P3_0_B
AUXADC_0_BAUXADC_1_B
AUXADC_2_B
GPIO_3P3_1_A
GPIO_9_A
GPIO_14_A
GPIO_16_A
SYNC_OUT1
GPIO_3P3_0_A
GPIO_3P3_3_A
GPIO_7_A
FMC_HPC_DP5_M2C_N
AUX_SYNTH_VTUNE_B
AUXADC_3_B
FMC_HPC_DP9_C2M_NFMC_HPC_DP9_C2M_P
QSFP_TX3_N
FMC_HPC_DP5_C2M_PFMC_HPC_DP5_C2M_N
REFCLK_OUT1_P
FMC_HPC_DP8_C2M_PFMC_HPC_DP8_C2M_N
FMC_HPC_DP7_C2M_N
FMC_HPC_DP0_C2M_P
ETH_REFCLK1_P
FMC_HPC_DP7_C2M_P
ETH_REFCLK2_N
FMC_HPC_DP3_M2C_P
FMC_HPC_DP1_M2C_PQSFP_REFCLK_N
FMC_HPC_DP3_M2C_N
SFP_REFCLK_NSFP_REFCLK_P
FMC_HPC_DP2_M2C_NFMC_HPC_DP2_M2C_P
FMC_HPC_DP6_C2M_NFMC_HPC_DP6_C2M_P
GPIO_3P3_2_A
GPIO_3P3_1_B
TCXO_CLK_SOM_NTCXO_CLK_SOM_P
REFCLK_OUT1_N
RF_SYNTH_VTUNE_B
PWR_FAULT2 GPIO_1_BGPIO_2_BGPIO_3_BGPIO_4_BGPIO_5_BGPIO_6_B
GPIO_8_BGPIO_9_BGPIO_10_BGPIO_11_BGPIO_12_BGPIO_13_BGPIO_14_BGPIO_15_BGPIO_16_BGPIO_17_BRX1_ENABLE_B
TX1_ENABLE_B
TX2_ENABLE_A
I2C1_SCLI2C1_SDA
RESETB_AD9545RESET_HMC7044_CARGPIO_1_HMC7044_CARGPIO_2_HMC7044_CARGPIO_3_HMC7044_CAR
SPI_CSN_HMC7044_CARSPI_MOSISPI_MISOSPI_CLK
1V8_SOM
TX1_ENABLE_A
QSFP_TX1_P
FMC_HPC_DP6_M2C_N
AUX_SYNTH_VTUNE_A
GPIO_5_A
AUX_SYNTH_OUT_B
FMC_HPC_GBTCLK1_M2C_P
F22
G13
E29
G14
G6
H28
K18
K21K20K19
K4
K39
B9
B1
A18A19
B34
B40
F30F31
H35
H31
J29K28K29
D5
A8A9A10A11
C9
B4B5B6
B10
F13
H15J14
H16
J21J22
K31K32
D10
C4
B8
A5
J9J10J11
H13
H9
H7
G9
F15
E13E12
E9E8
F18
F10
F7
G4G5
G7G8
G11
G15G16
H12
H5
J8
E11E10
E17E16F16
F12
F6
G1F2G2F3
E4
G19
G3J4J3
J5
J2K3
H4
H6
H3H2
K12
K8K9
J13J12
J6
E39
E21
E25
F40
K11
H37
G18
E15
K23
K13
F23
F1
J30
G17
G12
K6K5
K1
G39
F24
G40
F25
E30
J1K2
C40
C3
B12
B20
B22
B24
B33
B37
B39
C7
C33C34C35C36
C38
D25
D32
D37D38D39D40
E1E2E3
E5E6E7
E14
E18E19
E22E23E24
E27E28
E32E33
E40
F26F27
K24
B38
G30
H8K7
K16
J7
H11H10
J15H14
H17H18
F19
F14
F5F4
F9F8
F11
K33
K37K38
K25
J28
J17J16
J18
J27
H22
H25
H29H30
H34
F29
F35
J26
D28
D30
H40
G34 F34 E34E35E36
E31
F33
G38
H33J33
K27
D36
D33
B19
D35D34
H38
K10
F37F36
J39J38J37
J34
J25J24J23
K36
H23
H21
F39H39
H32
F28
E38E37
F38
G24G23G22G21G20
G31G32
K35
K14
D12
D9
C1
B13
B30
C2
C5
B32B31C31
B14
E20
B18
B23
G28
G26
J20
H24
E26
C39
C37
B11
B7
B3
B21
B36
B25
C6
B2
C8
B29
B17
K40
D17
B28
B35
B16B15
D14
D20D19
D11
D18
D21D22
B26B27
C10C11
C13C14C15C16
C23C24C25C26C27C28C29C30
C20
H36
C22C21
D3
K34
J32J31
K22
K17
D16D15
C17
G35
J40
J35J36
J19
H26
H20H19
G36
H27
G37
G25
G27
G29
G33
K30
K26
K15
D7D8
D2D1
D6
D31
C12D13
D4
A39A40
A31A30
A25A26
A24
A22
A3A4
A2
A20
A17
A12
A7
A1
A29
A23
A38A37A36A35A34A33A32
A6
A21
A27
A13A14A15A16
A28
F17
F20F21
F32
G10
H1
D29
C19C18
D24
D27
D23
D26
C32
GNDGNDGNDGNDGNDGND
GND GND GND GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
FMC HA/HB CONNECTIONS
4 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
0
00
0
00
000
00
000
00
0
00
0000
00
00000
0
0000
000
00
0000000
0
00
00000000000000000000
000
000
0
0
00
000
0
JP84
JP77JP30JP76JP75JP74JP73
JP83
JP72JP71JP70JP69JP68
JP66JP67
JP65JP64JP63
JP82
JP62JP61JP60JP59JP58JP57JP56JP55
JP81JP80JP79
JP41JP42
JP36JP37JP38JP39JP40
JP31JP32
JP78
JP33JP34JP35
JP53JP54
JP48JP49JP50JP51JP52
JP91
JP47JP46JP45JP44JP43
JP89JP88JP87
JP85JP86
JP90
JP9JP10
JP13
JP8
JP11
JP29JP28
JP26JP27
JP23JP24JP25
JP21JP22
JP18JP19JP20
JP16JP17
JP15JP14
JP12
GPIO_0_B_FMC
GPIO_4_A
GPIO_0_A
GPIO_3_A_FMCGPIO_4_A_FMCGPIO_5_A_FMCGPIO_6_A_FMCGPIO_7_A_FMCGPIO_8_A_FMCGPIO_9_A_FMC
GPIO_2_AGPIO_1_A
RF_SYNTH_VTUNE_A_FMC
TX2_ENABLE_A TX2_ENABLE_A_FMCTX1_ENABLE_A TX1_ENABLE_A_FMC
GPIO_18_A GPIO_18_A_FMC
RX1_ENABLE_A RX1_ENABLE_A_FMCRX2_ENABLE_A RX2_ENABLE_A_FMC
GPIO_15_A GPIO_15_A_FMCGPIO_16_A GPIO_16_A_FMCGPIO_17_A GPIO_17_A_FMC
GPIO_13_A GPIO_13_A_FMCGPIO_14_A GPIO_14_A_FMC
GPIO_10_A GPIO_10_A_FMCGPIO_11_A GPIO_11_A_FMCGPIO_12_A GPIO_12_A_FMC
GPIO_8_AGPIO_9_A
GPIO_7_A
GPIO_5_AGPIO_6_A
GPIO_3_AGPIO_2_A_FMCGPIO_1_A_FMCGPIO_0_A_FMC
GPIO_3P3_10_B GPIO_3P3_10_B_FMCGPIO_3P3_11_B GPIO_3P3_11_B_FMC
GPIO_3P3_5_B GPIO_3P3_5_B_FMCGPIO_3P3_6_B GPIO_3P3_6_B_FMCGPIO_3P3_7_B GPIO_3P3_7_B_FMCGPIO_3P3_8_B GPIO_3P3_8_B_FMCGPIO_3P3_9_B GPIO_3P3_9_B_FMC
GPIO_3P3_4_B GPIO_3P3_4_B_FMC
GPIO_3P3_0_B GPIO_3P3_0_B_FMCGPIO_3P3_1_B GPIO_3P3_1_B_FMCGPIO_3P3_2_B GPIO_3P3_2_B_FMCGPIO_3P3_3_B GPIO_3P3_3_B_FMC
GPIO_3P3_11_A GPIO_3P3_11_A_FMCGPIO_3P3_10_A GPIO_3P3_10_A_FMCGPIO_3P3_9_A GPIO_3P3_9_A_FMC
GPIO_3P3_7_A GPIO_3P3_7_A_FMCGPIO_3P3_8_A GPIO_3P3_8_A_FMC
GPIO_3P3_6_A GPIO_3P3_6_A_FMCGPIO_3P3_5_A GPIO_3P3_5_A_FMCGPIO_3P3_4_A GPIO_3P3_4_A_FMCGPIO_3P3_3_A GPIO_3P3_3_A_FMCGPIO_3P3_2_A GPIO_3P3_2_A_FMCGPIO_3P3_1_A GPIO_3P3_1_A_FMCGPIO_3P3_0_A GPIO_3P3_0_A_FMC
GPIO_18_B GPIO_18_B_FMC
TX1_ENABLE_B TX1_ENABLE_B_FMCTX2_ENABLE_B TX2_ENABLE_B_FMC
RX2_ENABLE_B RX2_ENABLE_B_FMCRX1_ENABLE_B RX1_ENABLE_B_FMCGPIO_17_B GPIO_17_B_FMCGPIO_16_B GPIO_16_B_FMCGPIO_15_B GPIO_15_B_FMCGPIO_14_B GPIO_14_B_FMCGPIO_13_B GPIO_13_B_FMCGPIO_12_B GPIO_12_B_FMCGPIO_11_B GPIO_11_B_FMCGPIO_10_B GPIO_10_B_FMCGPIO_9_B GPIO_9_B_FMCGPIO_8_B GPIO_8_B_FMCGPIO_7_B GPIO_7_B_FMCGPIO_6_B GPIO_6_B_FMCGPIO_5_B GPIO_5_B_FMCGPIO_4_B GPIO_4_B_FMCGPIO_3_B GPIO_3_B_FMCGPIO_2_B GPIO_2_B_FMCGPIO_1_B GPIO_1_B_FMCGPIO_0_B
RF_SYNTH_VTUNE_B RF_SYNTH_VTUNE_B_FMCAUX_SYNTH_VTUNE_B AUX_SYNTH_VTUNE_B_FMCAUX_SYNTH_OUT_B AUX_SYNTH_OUT_B_FMC
AUXADC_1_B AUXADC_1_B_FMCAUXADC_2_B AUXADC_2_B_FMCAUXADC_3_B AUXADC_3_B_FMC
AUXADC_0_B AUXADC_0_B_FMC
RF_SYNTH_VTUNE_A
AUX_SYNTH_OUT_A AUX_SYNTH_OUT_A_FMCAUX_SYNTH_VTUNE_A AUX_SYNTH_VTUNE_A_FMC
AUXADC_1_A AUXADC_1_A_FMCAUXADC_2_A AUXADC_2_A_FMCAUXADC_3_A AUXADC_3_A_FMC
AUXADC_0_A AUXADC_0_A_FMC
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
UG571 PG22NOT USED ON ZCU102
TBDENABLE JTAG MUX
- PG_M2C IS NOT USED ON XILINX BOARDS (ONLY PULL-UP TO 3V3)
- FOR SYNC_OUT2 REMOVE AC COUPLING CAPS (PAG 12) - FOR SYNC_OUT2 REMOVE R14 (PAG 12)
- TALISE GPIOS CONNECTED TO FMC HA/HB
- GA0 AND GA1 ARE HARDCODED 0
THAT'S USING THESE SIGNALS FOR OTHER PURPOSES
GA1=0NC
FEMALE CONNECTOR
HIGH WHEN:FMC_VADJ, FMC_12V0, FMC_3V3
LPC
ARE OK
GA0=0
LPC
NC
LPC
NC
TBD
JTAG
- REMOVE THE SOLDER JUMPERS (PAG 5) IF ATTACHING A MEZZANINE CARD
LPC
FMC HPC
5 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
ASP-134486-01ASP-134486-01 ASP-134486-01 ASP-134486-01
ASP-134486-01ASP-134486-01 ASP-134486-01 ASP-134486-01ASP-134486-01
0
10K
4.7K1K
ASP-134486-01
R118
R117
R116
R119P1 P1
P1
P1
P1
P1 P1P1
P1 P1
RF_SYNTH_VTUNE_B_FMC
AUX_SYNTH_VTUNE_B_FMCAUX_SYNTH_OUT_B_FMC
AUXADC_3_B_FMCAUXADC_2_B_FMC
AUXADC_1_B_FMCAUXADC_0_B_FMC
GPIO_6_B_FMC
GPIO_5_B_FMCGPIO_4_B_FMC
GPIO_3_B_FMCGPIO_2_B_FMC
GPIO_1_B_FMCGPIO_0_B_FMC
GPIO_7_B_FMC
FMC_HPC_LA01_N_CCFMC_HPC_LA01_P_CC
FMC_HPC_DP0_M2C_P
GPIO_18_A_FMC
GPIO_11_B_FMC GPIO_18_B_FMC
VIN_12V0
GPIO_3P3_9_B_FMC
GPIO_3P3_4_B_FMC
GPIO_3P3_3_B_FMCGPIO_3P3_2_B_FMC
GPIO_3P3_1_B_FMCGPIO_3P3_0_B_FMC
TX1_ENABLE_B_FMC
FMC_HPC_LA19_P
TX2_ENABLE_A_FMC
RX2_ENABLE_A_FMC
TX1_ENABLE_A_FMC
GPIO_14_A_FMC
RX1_ENABLE_A_FMC
GPIO_17_A_FMC
GPIO_13_A_FMCGPIO_12_A_FMC
GPIO_3P3_0_A_FMC
GPIO_3P3_4_A_FMC
GPIO_3P3_3_A_FMC
GPIO_3P3_8_A_FMC
GPIO_7_A_FMC
GPIO_4_A_FMCGPIO_5_A_FMC
GPIO_6_A_FMC
GPIO_9_A_FMCGPIO_8_A_FMC
REFCLK_OUT3_N
REFCLK_OUT4_NREFCLK_OUT4_P
FMC_HPC_LA06_N
FMC_HPC_LA27_NFMC_HPC_LA27_P
FMC_HPC_DP1_C2M_N
FMC_HPC_LA14_P
FMC_HPC_LA17_N_CC
FMC_HPC_DP7_C2M_N
FMC_3V3
FMC_VADJ
GPIO_3P3_6_B_FMCGPIO_3P3_7_B_FMC
GPIO_3P3_5_B_FMC
GPIO_14_B_FMC
RX1_ENABLE_B_FMC
FMC_VADJ
FMC_HPC_DP8_C2M_N
FMC_HPC_LA02_P
GPIO_3P3_10_A_FMCGPIO_3P3_11_A_FMC
FMC_HPC_LA24_P
FMC_HPC_LA11_P
FMC_HPC_LA10_N
FMC_3V3
RX2_ENABLE_B_FMC
GPIO_12_B_FMC
GPIO_15_B_FMC
GPIO_17_B_FMCGPIO_16_B_FMC
GPIO_13_B_FMC
FMC_VADJ
FMC_3V3
FMC_HPC_DP3_M2C_N
FMC_HPC_DP2_C2M_P
FMC_HPC_DP4_M2C_N
FMC_HPC_DP2_M2C_N
FMC_HPC_DP5_M2C_NFMC_HPC_DP5_M2C_P
FMC_HPC_DP1_M2C_PFMC_HPC_DP1_M2C_N
FMC_HPC_DP4_M2C_P
FMC_HPC_DP3_M2C_P
FMC_HPC_DP6_C2M_P
FMC_HPC_DP0_M2C_N
FMC_HPC_LA06_P
FMC_HPC_LA14_N
FMC_HPC_LA09_N
FMC_HPC_LA08_P
FMC_HPC_LA12_N
FMC_HPC_LA20_N
FMC_HPC_LA29_PFMC_HPC_LA29_N
FMC_HPC_LA31_PFMC_HPC_LA31_N
FMC_HPC_LA33_N
FMC_HPC_CLK1_M2C_P
FMC_HPC_LA22_N
FMC_HPC_LA08_N
FMC_HPC_LA12_P
FMC_HPC_LA16_NFMC_HPC_LA16_P
FMC_HPC_LA25_N
FMC_HPC_LA33_P
FMC_HPC_LA03_NFMC_HPC_LA03_P
FMC_HPC_LA21_P
FMC_HPC_LA24_N
FMC_HPC_LA30_PFMC_HPC_LA30_N
FMC_HPC_LA19_N
FMC_HPC_LA15_N
FMC_HPC_LA07_PFMC_HPC_LA07_N
FMC_HPC_LA15_P
FMC_VADJ
FMC_HPC_LA21_N
FMC_HPC_CLK1_M2C_N
FMC_HPC_LA00_P_CCFMC_HPC_LA00_N_CC
FMC_HPC_LA20_P
FMC_HPC_LA22_P
FMC_HPC_LA25_P
FMC_HPC_LA28_PFMC_HPC_LA28_N
FMC_HPC_LA13_P
FMC_HPC_LA11_N
FMC_HPC_DP6_C2M_N
FMC_HPC_DP5_C2M_NFMC_HPC_DP5_C2M_P
FMC_HPC_LA32_NFMC_HPC_LA32_P
3V3
FMC_HPC_LA18_N_CC
FMC_HPC_DP0_C2M_P
FMC_HPC_GBTCLK0_M2C_PFMC_HPC_GBTCLK0_M2C_N
FMC_HPC_LA04_NFMC_HPC_LA04_P
FMC_HPC_LA02_N
FMC_HPC_CLK0_M2C_N
FMC_12V0
FMC_3V3
FMC_HPC_SDAFMC_HPC_SCL
FMC_HPC_DP6_M2C_NFMC_HPC_DP6_M2C_P
FMC_HPC_LA10_PFMC_HPC_DP7_M2C_N
FMC_HPC_GBTCLK1_M2C_PFMC_HPC_GBTCLK1_M2C_N
FMC_HPC_DP9_C2M_P
FMC_HPC_DP7_C2M_P
FMC_HPC_DP8_C2M_P
FMC_HPC_DP7_M2C_P
FMC_HPC_DP9_M2C_PFMC_HPC_DP9_M2C_N
FMC_HPC_DP8_M2C_PFMC_HPC_DP8_M2C_N
FMC_HPC_DP2_M2C_P
FMC_HPC_DP1_C2M_P
FMC_HPC_CLK0_M2C_P
FMC_HPC_DP9_C2M_N
FMC_12V0
FMC_HPC_LA09_P
FMC_HPC_LA18_P_CC
FMC_HPC_LA05_NFMC_HPC_LA05_P
FMC_HPC_LA13_N
3V3
FMC_HPC_DP0_C2M_N
FMC_TMS
FMC_TCK
FMC_HPC_LA26_PFMC_HPC_LA26_N
FMC_TDIFMC_TDO
GPIO_3P3_8_B_FMC
FMC_HPC_LA23_PFMC_HPC_LA23_N
SYNC_OUT2
FMC_HPC_LA17_P_CC
TX2_ENABLE_B_FMC
GPIO_3P3_11_B_FMCGPIO_3P3_10_B_FMC
GPIO_3P3_6_A_FMC
GPIO_10_A_FMCGPIO_11_A_FMC
AUXADC_0_A_FMCAUXADC_1_A_FMC
AUXADC_2_A_FMCAUXADC_3_A_FMC
AUX_SYNTH_OUT_A_FMCAUX_SYNTH_VTUNE_A_FMC
RF_SYNTH_VTUNE_A_FMC
GPIO_10_B_FMC
GPIO_9_B_FMCGPIO_8_B_FMC
FMC_PG_C2M
FMC_HPC_PRSNT_M2C_L
FMC_VREFA_M2C
GPIO_0_A_FMCGPIO_1_A_FMC
GPIO_2_A_FMCGPIO_3_A_FMC
FMC_HPC_DP4_C2M_NFMC_HPC_DP4_C2M_P
FMC_HPC_DP3_C2M_NFMC_HPC_DP3_C2M_P
FMC_HPC_DP2_C2M_N
GPIO_3P3_9_A_FMC
GPIO_3P3_7_A_FMC
GPIO_3P3_5_A_FMC
GPIO_3P3_1_A_FMC
GPIO_15_A_FMC
GPIO_16_A_FMC
REFCLK_OUT3_P
GPIO_3P3_2_A_FMC
E26
E21
C7
K22K21K20K19
E20
D6
D4
E18
E16
E14F15
K23
K35
K26
K10
K14
J9
B26
C34
E38E37
D29
A16
A28
F39
J37
J16
J34
K5
F19
F4E4
F21
F9
J36
H33
H35
H37H38
G34G33
G31G30
G26
G23
G21G20
G9
H21
G16
B11
A25
C3
C6
C9
D16
D7
F10
B33
C37
H34
F22
F25
F32F33F34F35
F40
F37F36
E7
F17
K2
J35
H19
D38
G39
G37G38
H32
J14
J30
F26
J11
H9
B2
A13
B37
G24G25
H20
G22
K1
H8
J13
F1
F7
F3
H26
A39 C39
A32
B22
G17
H31
F38
J19
H30
G32
A8
A5
G40
G12G13
G19
G35
H24
A27A26
C15C16
C18
C12
C14D15
D13D14
D23
D27
G7
G10
B34A35A34A33
G36
H29
H27
C17
D12
D17
G29G28G27
H18
H14H13H12
D8
D10
E5
D18D19
D21
A1 B1
A14
B4
B13
B23
B36B35
B5
C8
C5
C2C1
B6
B9
B16
B18C19
A10A9
A7 B7B8
B14
D20
B15
B17
G6
C29
C20
D9
H7
G1
H6
G4G5
G18
G11
B39A40
F13
D36
D40
A11
A23A22
A6
A4
A21
A18A17
A20A19
A24
A37A36
A3
B20
A15
B12
B24
B27
A2
C4
B25
B38
C10C11
C21C22
C24C23
D22
D39
C25
C28C27
D25
J7
H17
G15
H40
H23
J21
H39
D1
H36
G8
A29A30A31
C13
H22
H10
H3
G14
G3
D26
H2
J5J6
C35
C38
D33
C26
D30
D32
C30
D28
D3D2
F24
F2
F8
D5
H16H15
C36
C31C32C33
C40
B10
B3
A12
B32B31B30B29B28
B19
F16
D37
E3
F20
J12
E8
E1
E40
E36
E30E29E28E27
E23E24
E22
E19
E13
E15
E12E11E10
J18
J1
H25
K4
K8
K6K7
K9
K15
K32
K37
K39
K13
B21
J27
K25
J28
J40
K36
H28K27
K33
H11
J17
J23
J39
J26J25J24
K30
K38
E39
K31
J38
J33
E32
D24
F27
F31F30F29F28
F23
K16
J2J3
J8
J20
K24
K17
K12K11
J10
E9
D11
G2
E6
E2
E17
F14
F11
F5
F12
F18
E25
F6
D31
D35D34
K3
E31
E35E34E33
J4
K34
J32
J22
J29
J31
B40
H1
H5H4
A38
K40
K18
J15
K28K29
GNDVIO_B_M2CGNDHB18_NHB18_PGNDHB15_NHB15_PGNDHB11_NHB11_PGNDHB07_NHB07_PGNDHB01_NHB01_PGNDHA22_NHA22_PGNDHA18_NHA18_PGNDHA14_NHA14_PGNDHA11_NHA11_PGNDHA07_NHA07_PGNDHA03_NHA03_PGNDGNDCLK3_BIDIR_NCLK3_BIDIR_PGND
VADJGNDLA32_NLA32_PGNDLA30_NLA30_PGNDLA28_NLA28_PGNDLA24_NLA24_PGNDLA21_NLA21_PGNDLA19_NLA19_PGNDLA15_NLA15_PGNDLA11_NLA11_PGNDLA07_NLA07_PGNDLA04_NLA04_PGNDLA02_NLA02_PGNDCLK0_M2C_NCLK0_M2C_PGNDPRSNT_M2C_LVREF_A_M2C
GNDVADJGNDLA33_NLA33_PGNDLA31_NLA31_PGNDLA29_NLA29_PGNDLA25_NLA25_PGNDLA22_NLA22_PGNDLA20_NLA20_PGNDLA16_NLA16_PGNDLA12_NLA12_PGNDLA08_NLA08_PGNDLA03_NLA03_PGNDLA00_N_CCLA00_P_CCGNDGNDCLK1_M2C_NCLK1_M2C_PGND
VADJGNDHB20_NHB20_PGNDHB16_NHB16_PGNDHB12_NHB12_PGNDHB08_NHB08_PGNDHB04_NHB04_PGNDHB02_NHB02_PGNDHA19_NHA19_PGNDHA15_NHA15_PGNDHA12_NHA12_PGNDHA08_NHA08_PGNDHA04_NHA04_PGNDHA00_N_CCHA00_P_CCGNDGNDPG_M2C
GNDVADJGNDHB21_NHB21_PGNDHB19_NHB19_PGNDHB13_NHB13_PGNDHB09_NHB09_PGNDHB05_NHB05_PGNDHB03_NHB03_PGNDHA20_NHA20_PGNDHA16_NHA16_PGNDHA13_NHA13_PGNDHA09_NHA09_PGNDHA05_NHA05_PGNDGNDHA01_N_CCHA01_P_CCGND
3P3VGND3P3VGND3P3VGA1TRST_LTMS3P3VAUXTDOTDITCKGNDLA26_NLA26_PGNDLA23_NLA23_PGNDLA17_N_CCLA17_P_CCGNDLA13_NLA13_PGNDLA09_NLA09_PGNDLA05_NLA05_PGNDLA01_N_CCLA01_P_CCGNDGNDGBTCLK0_M2C_NGBTCLK0_M2C_PGNDGNDPG_C2M
GND3P3VGND12P0VGND12P0VGA0GNDGNDSDASCLGNDGNDLA27_NLA27_PGNDGNDLA18_N_CCLA18_P_CCGNDGNDLA14_NLA14_PGNDGNDLA10_NLA10_PGNDGNDLA06_NLA06_PGNDGNDDP0_M2C_NDP0_M2C_PGNDGNDDP0_C2M_NDP0_C2M_PGND
GND
GNDGND
GND
RES0GNDGNDDP6_C2M_NDP6_C2M_PGNDGNDDP7_C2M_NDP7_C2M_PGNDGNDDP8_C2M_NDP8_C2M_PGNDGNDDP9_C2M_NDP9_C2M_PGNDGNDGBTCLK1_M2C_NGBTCLK1_M2C_PGNDGNDDP6_M2C_NDP6_M2C_PGNDGNDDP7_M2C_NDP7_M2C_PGNDGNDDP8_M2C_NDP8_M2C_PGNDGNDDP9_M2C_NDP9_M2C_PGNDGNDCLK_DIR
GND
GNDGNDGNDGNDGND
GND
VIO_B_M2CGNDHB17_N_CCHB17_P_CCGNDHB14_NHB14_PGNDHB10_NHB10_PGNDHB06_N_CCHB06_P_CCGNDHB00_N_CCHB00_P_CCGNDHA23_NHA23_PGNDHA21_NHA21_PGNDHA17_N_CCHA17_P_CCGNDHA10_NHA10_PGNDHA06_NHA06_PGNDHA02_NHA02_PGNDCLK2_BIDIR_NCLK2_BIDIR_PGNDGNDVREF_B_M2C
GNDDP5_C2M_NDP5_C2M_PGNDGNDDP4_C2M_NDP4_C2M_PGNDGNDDP3_C2M_NDP3_C2M_PGNDGNDDP2_C2M_NDP2_C2M_PGNDGNDDP1_C2M_NDP1_C2M_PGNDGNDDP5_M2C_NDP5_M2C_PGNDGNDDP4_M2C_NDP4_M2C_PGNDGNDDP3_M2C_NDP3_M2C_PGNDGNDDP2_M2C_NDP2_M2C_PGNDGNDDP1_M2C_NDP1_M2C_PGND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
100OHM DIFFERENTIAL LINES. SEE UG583 (ULTASCALE PCB GUIDELINES, PAGE 176
DISPLAYPORT
VOLTAGE TRANSLATORS
SD CARD
DPAUX GENERATOR
SDIO_SEL = GND FOR CARRIER SDSDIO_SEL = OPEN FOR SOM SD
CARRIER -> SOMSOM -> CARRIER
6 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
1.5K
0.1UF
0.1UF
R0402L
100K
10
R0402L
0
0.1UF
0.1UF
0.1UF
C0201L
0.1UF
C0201L
0.1UF
R0402L 4.7K 4.7K
4.7K
DNI
49.9
49.9
10K
2.49K
100K
100K
1MEG
1MEG
0.001UF
DNI
NLSV4T244MUTAG
SD-RSMT-2-MQ
1.1A
47272-0001
0
ADN4691EBRZ
RCLAMP7534P.TNT
CL-SB-12B-02T
RCLAMP7534P.TNT
0.1UF
0.1UF
0.1UF0.1UF0.1UF
NLSV4T244MUTAG
R125
R122
R133
R134
R135
R121
R131
R130
R124
R128
R129
R126
R127
R132
R123
R120
C241C114
C32
C29
C31
C28
C36
C35
C34
P15
F1
U22
P2
U9
D1
S9
D2
U21
C33
C30
C243C242
FAN_PWM
DPAUX_DATA_OUT_3V3
PCIE_WAKE_BDPAUX_DATA_OUTDPAUX_DATA_OE
FMC_TDO
PCIE_WAKE_B_3V3
DP1_GTR_TX_P
DP1_GTR_TX_N
DPAUX_C_N
DPAUX_C_P
DPAUX_HPD_3V3
3V3
FMC_TDO_1V8DPAUX_DATA_INDPAUX_HPDPCIE_PERST
SDIO_CARRIER_CLK
3V3
SDIO_CARRIER_DAT1SDIO_CARRIER_DAT2
SDIO_CARRIER_DAT0
SDIO_CARRIER_DAT3
DP0_GTR_TX_P
DPAUX_C_N
3V3
DP0_GTR_TX_N
1V8_SOM
3V3
3V3
3V3
DPAUX_DATA_OUT_3V3
DPAUX_DATA_IN_3V3DPAUX_DATA_OE_3V3
1V8_SOM1V8_SOM
DPAUX_C_P
SDIO_SELSDIO_CARRIER_CMD
SDIO_CARRIER_CD
DPAUX_DATA_OE_3V3
3V31V8_SOM
PCIE_PERST_3V3
DPAUX_DATA_IN_3V3DPAUX_HPD_3V3
FAN_PWM_3V3
432
4
1
6
3
321
54
2
5
11
3
7
1
4
6
PAD2PAD1
1098
5
2
1615
SH3
20
12
18
14
1
87
19
13
SH4
17
5
SH1
9
SH2
1011
GND
GND
GND
SHLD
OE_N
B1B2B3B4
A4A3A2A1
VCCBVCCA
GND
GND
GND
GND
GND
GNDGND
GND
OE_N
B1B2B3B4
A4A3A2A1
VCCBVCCA
GND
GND
GND
GND
GND
GND
VCC
BA
GNDDIDE
RE_NRO
GNDGND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
1-2 :CPEN FROM MIO34
USB 3.1
DLW21HN900SQ2L
USB 3.0 - 100 OHMS DIFFERENTIAL IMPEDANCEUSB 2.0 - 90 OHMS DIFFERENTIAL IMPEDANCE
MAX STUB LENGHT ON D+/D_ 2.5MM
POWER + DATA USB
USB3.1 MUX
USB 3.0 AC COUPLING FOR TX
INPUT ONLY
2-3 :CPEN FROM USB3320C PHY1A CURRENT LIMIT
I2C MODE ADR 0X3A
OUT2 OUT1DEFAULT MODE DRP
1 1 DEFAULT CURRENT MODE 1 0 MEDIUM CURRENT MODE 0 0 HIGH CURRENT MODE
7 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
4.7K
2.7K 2.7K R0402L
R0402L0
0
4.7K
PTN5150AHXMP10K
0
TSW-103-08-G-S
2.2UF
53.6K
0.1UF
1K
0.1UF
RCLAMP7534P.TNT
90OHMS AT 100MEGHZ
12401598E4#2A
0
DNI
0.001UFRCLAMP7534P.TNT
TCA9548ARGER
4.7K
4.7K4.7K
4.7K4.7K4.7K
4.7K4.7K
4.7K4.7K
4.7K
0.1UF
DNI4.7K
DNI4.7K4.7K
DNI
4.7K4.7K4.7K
PTN36043BXY
0.1UF
C0201L
0.1UF
C0201L
C0201L
0.1UF
C0201L
0.1UFC0201L
0.1UF
0.1UF
C0201L
C0201L
0.01UF0.1UF1UF
C0402L
0.1UF
C0201L0.1UF
C0201L
10K
10K
DNI
0
R0402LDNI
0
DNI
10K
10K
0.1UF
PCA9517DP,118
10K
0.1UF
10K
TSW-103-08-G-S
TSW-103-08-G-S
DNIADP198ACBZ-11
DNI
NX5P3090UK
4.7UF
R320 R321
R175
R176
R177
R183
R197
TP26
TP37
R212
R304
C319
TP1 C281
C313
R302
P22
TP28TP27
D9
L6
M3
R186C200
D8
U19
R187
R190R189
R184R182R181
R188R185
R179R178
R180
C199
R173R171R169
R174R172R170
U8
C209
C210
C211
C206
C207
C208
C204C203C201
C315C314
TP24
R191
TP22
R192
TP23
R194
R196
R193
R195
C202
U7
TP25
U26 P24TP41R303
C316
P23
U20
C205
U28
R3171V8_SOM
1V8_SOM
I2C_EXP_RESETB
I2C1_SDA
I2C1_SCL
USB_C_SEL_MUX
PS_MIO23_INTB_PTN5150
1V8_SOM
3V3
1V8_SOM
USB_C_CC2USB_C_CC1
I2C1_SDA_PTN5150I2C1_SCL_PTN5150
USB_PTN5150_ID
5V0USB_OTG_CPEN
5V0
SFP+_I2C_SCL_3V3QSFP_I2C_SCL_3V3
FMC_HPC_SCL
1V8_SOM
I2C1_SDA_PTN5150
USB_OTG_P
USB_OTG_N
VBUS
USB_C_TX1_PUSB_C_TX1_N
USB_SHIELD
USB_C_RX2_N
USB_C_TX2_P
USB_C_RX2_P
USB_C_TX2_N
USB_C_RX1_PUSB_C_RX1_N
USB_C_CC1
USB_C_CC2
1V8_SOM
3V31V8_SOM
I2C1_SCL_PTN5150
3V3
I2C1_SCL_AUDIOI2C1_SCL_AD9545
1V8_SOM
1V8_SOM
FMC_3V3
FMC_3V3
1V8_SOM
USB3_CH1_SET1
USB_C_RX1_PUSB_C_RX1_N
USB3_CH1_SET2
USB_C_RX2_PUSB_C_RX2_N
USB3_CH2_SET2USB3_CH2_SET1
USB_C_SEL_MUX
USB_C_TX1_P
USB_C_TX2_P
USB3_GTR_RX_N
USB_C_TX1_N
USB_C_TX2_N
USB3_GTR_RX_P
USB3_GTR_TX_NUSB3_GTR_TX_P
USB_PTN5150_ID
1V8_SOM
3V3
VBUS
3V3
PS_MIO26_501_ID
3V3
I2C1_SDA_AUDIOI2C1_SDA_AD9545
QSFP_I2C_SDA_3V3
USB_ID
3V3
VBUSPS_MIO34_501_CPEN
USB_VBUS_OTG
SFP+_I2C_SDA_3V3FMC_HPC_SDA
78
10
C3
C1
A3
D3
2
12
543
A11
B8
B3
SH3SH4
B2
A10
B1
A2A3
SH2
A12
A8A9
A4
A6A7
B9
B4
B11
B7B6B5
B10
A5
SH1
A1
B12
12345
1817
2
5
76
1
10
PAD
3
4
1112
13
16
98
1514
113
594
1212
6
3
1
3
12
A2A1
2
B1
1
3
B2
D2D1C2
B3
B2B1
A2A1
GND
GND GND
GND
GND
TX_CON_2-TX_CON_2+TX_AP_-
TX_AP_+
SEL
RX_AP_-RX_AP_+
GND
CH2_SET1CH2_SET2
RX_CON_2-RX_CON_2+
TX_CON_1-TX_CON_1+
VDD1V8
CH1_SET2
RX_CON_1-RX_CON_1+
CH1_SET1
GND
GND
GND
GND
SH4SH3SH2SH1
GNDTX2+TX2-VBUSCC2D+D-
SBU2VBUSRX1-RX1+GND
GNDRX2+RX2-VBUSSBU1
D-D+
CC1VBUSTX1-TX1+GND
GND
VDD
EXT_SEL
CC1VBUS_DET
SDA/OUT1
GND
SCL/OUT2
ID
INTB/OUT3
ADR/CON_DET
PORT
CC2
GND
GND
GND
GND
GND
GND ENGND
VOUTVIN
GND
VBUSVBUS
GND
VBUS
VINT
GND
VINTVINT
ILIMFAULT_N
EN
GND
GNDVCCBVCCA
GND
SCLB
SDAB
EN
SCLA
SDAA
GND
GND
GND
GNDGND
GND
PAD
RESET_N
A1A0
VCC
SDASCL
A2SC7
SD7
SC6
SD6
SC5
SD5
SC4
SD4
GND
SC3
SD3
SC2
SD2
SC1
SD1
SC0
SD0
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
STEREO SINGLE-ENDED INPUT
I2C MODE ADR 0X70
AUDIO CODEC
HEADPHONE OUTPUT
DIFFERENTIAL INPUT
STEREO SINGLE-ENDED OUTPUT
8 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
2K
R0402L
R0402L
2K 69157-102
C0402L
C0402L C0402L
C0402L
C0402LC0402L
C0402LC0402L
C0402L
C0402L
1UF
0.1UF
0.1UF
0.1UFDNI
0.1UFDNI
0.1UFDNI
0.1UFDNI
0.1UF
0.1UF0.1UF
0.1UF
R0402L
R0402L
R0402L
0
1K 1K
10K 10K
20K
49.9K
20K
49.9K
100
100
49.9
1K
1K
0
0
0DNI
0 DNI
0DNI
C0603L
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
10UF
ADAU1761BCPZ
25K
120OHM
220UF
220UFSTX-4235-3/3-N
STX-4235-3/3-N
STX-4235-3/3-N
STX-4235-3/3-N
R48
R49 JP1
C37
C45
C55
C52 C58
C51 C57
C44
C42C41
C40
R58
R37 R38
R43 R47
R42
R41
R45
R44
R54
R55
R40
R52
R53
R50
R51
R57
R56
R46
C54
C47
C48
C49
C50
C53
C43
C38
C46
C39
R39
U2
E3
C59
C56
P5
P5
P6
P6
I2S_SDATA_INI2S_MCLK
RAUXRINN
LINN
LAUX
LHP1V8_SOM
ROUTPRHPMONOOUT
LOUTP
1V8_SOM
I2S_LRCLKI2S_SDATA_OUT
I2C1_SDA_AUDIO
RINN
I2S_BCLK
I2C1_SCL_AUDIO
ROUTP
LINN
LAUX
RAUX
LOUTP
MICBIAS
AUD_1V8
VDDA1P8
AUD_1V8
1V8_SOM
MONOOUT
RHP
LHP
MICBIAS
1 2
1314
32
283
11
1912
15
1810
7
31
29
17
4
2021
8 23
16
30
24 1
27
25
26
6
9
5
PAD22
2
NP
NP
5A
2A
1A
1B
2B
5B
1A
2A
5A
1B
2B
5B
GNDGND
GNDGND
PAD
SCL/CCLK
SDA/COUT
ADDR1/CDATALRCLK/GPIO3
BCLK/GPIO2
DAC_SDATA/GPIO0
ADC_SDATA/GPIO1
DGND
DVDD
OUT
MONOOUTLHP
RHP
LOUTPLOUTN
ROUTNROUTPRAUX
RINNRINPLINNLINP
AGND
AVDD
CM
LAUX
MICBIAS
JACKDET/MICIN
ADDR0/CLATCH_N
MCLK
IOVD
D
GND
GND
GND
GNDGND
GND
GND
GND
GNDGNDGND
GNDGNDGND
GND
GND
GNDGND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
SFP+, QSFP+
LOAD JUMPER TO ENABLE SFP+
SFP+ CAGE
DEFAULT HIGH-POWER MODE
PULL-UP IN MODULE
MODSELL = '0' I2C ALWAYS ENABLED
PULL-UP IN MODULE
9 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
BSS138-7-F
0.1UF
0.1UF0.1UF
0.1UF
0.1UF
0.1UF
0.1UF0.1UF
10K4.7K
DNI
DNI
4.7K
DNI
4.7K
4.7K
DNI
4.7K 4.7K 4.7K 4.7K
4.7K
DNI
DNI
4.7K
4.7K4.7K
10K
4.7UH
1UH
22UF
74LVC2G07GV,125
22UF 22UF22UF
74LVC2G07GV,125
22UF
22UF
4.7UH
1888247-1
1UH
1UH
FS1-R38-20A2-10
2007194-1
Q2
R136
R139
R140
R138R137
R144R142
R143R141
R146
R149
R150R148R147
P13
C245
C251C250
C253
C252
C249
C257C256C254 C255
L11
U23
C246 C247 C248
TP38
C244
M4
U24
L9
L8
L7
L10
TP40
TP39
P4
P3
SFP+_TX_DISABLE_3V3
SFP+_TX_DISABLE
QSFP_MODPRSLSFP+_TX_FAULT_3V3
SFP+_LOS_3V3
SFP+_MOD_DETECT_3V3SFP+_I2C_SCL_3V3
SFP+_LOS_3V3
3V3_SFP_RX
3V3_SFP_RX
SFP+_TX_DISABLE_3V3SFP+_I2C_SDA_3V3
SFP+_RS0_3V3
SFP+_RS1_3V3
SFP+_RX_NSFP+_RX_P
3V3_SFP_TX
SFP+_TX_N
SFP+_RS1_3V3
SFP+_MOD_DETECT_3V3
SFP+_RS0_3V3
SFP+_TX_FAULT_3V3
QSFP_INTL
QSFP_RESETL
QSFP_RESETL_3V3
QSFP_LPMODE_3V3
1V8_SOM
QSFP_TX4_PQSFP_TX4_N
PG_ALL
QSFP_I2C_SDA_3V3QSFP_I2C_SCL_3V3
3V3_QSFP_RX
3V3_QSFP
1V8_SOM
QSFP_RESETL_3V3
3V3_QSFP_RX
3V3_QSFPQSFP_LPMODE_3V3
QSFP_RX4_NQSFP_RX4_P
QSFP_RX2_NQSFP_RX2_P
QSFP_RX1_PQSFP_RX1_N
QSFP_TX2_NQSFP_TX2_P
3V3
3V3
QSFP_TX3_P
QSFP_TX1_N
3V3
3V3_SFP_TX
SFP+_TX_P
3V3
3V3_QSFP_TX3V3
3V3
QSFP_LPMODE
1V8_SOM
QSFP_RX3_N
QSFP_INTLQSFP_MODPRSL
QSFP_RX3_P
3V3_QSFP_TX
QSFP_TX3_N
QSFP_TX1_P
3
2
1
1
10
1
2
19
16
7
18
14
11
5
12
10
24
26
32
23
11
9
15
33
22
73
17
9
6
4
2
20
15
8
13
16
38
27
29
8
5
1
32
4
1718
31
343536
GND
6
121314
21
30
20
37
25
28
19
GND1GND2GND3GND4GND5
GND
6G
ND7
GND
8G
ND9
GND
10
GND11GND12GND13GND14GND15
GND
16G
ND17
GND
18G
ND19
GND
20
GND
CGND
CGND
CGND
CGND
CGND
CGNDCGNDCGNDCGNDCGND
CGND
CGND
CGND
CGND
CGND
CGNDCGNDCGNDCGNDCGND
GND
1YVCC
2Y2AGND
1A
GND
GND
GND
1YVCC
2Y2AGND
1A
GND
GND
GND
GND
GND
GND
GND
GND
GND
G
S
D
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
ETHERNET
PASSIVE CONN
PHY1
10 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
1UF
1UF
1UF
0.1UF 0.1UF 0.1UF
0.1UF
0.1UF 0.1UF
0.1UF
0.1UF
0.1UF 0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UFC0201L
0.1UF
4.7K
DNI
1K
1K
DNI
0
4.99K
220
220
0
10K
10K
0.1UF
46
46
0.1UF
0.1UF
460.1UF
46
0.1UF
0.1UF
0.1UF
0.1UF
27PF
27PF
4.7UF
51
4.7UF
51
4.7UF
4.7UF
10UF4.7UF
88E1512-A0-NNP2I000
BSS138LT1G
BSS138LT1G
BSS138LT1G
BSS138LT1G
25MEGHZ
L0805
L0805
100OHM
L829-1J1T-43
100OHM
NC7SZ08FHX
1K
1K
L829-1J1T-43
L0805
100OHM
41
R209
C95
C82
C80
C83 C86 C89
C72
C73 C79
C70
C85
C84 C87
C88
C90
C91
C71
C98
C76
C75
C77
C78
R75
R82
R81
R78
R83
R84
R76
R79
R80
C103
C102
C101
C100
C107
C106
C105
C104
C99
C97
C74
C81 C94
C92
C93C96
U11
Q8
Y1
U10
Q7
Q9
Q10
R85
E5
M1
M2
E6
E4
R86
PHY1_VDD_3V3
PHY1_LED_0PHY1_LED_1
ETH0_MDCPHY1_DVDD_1V0
PHY1_AVDD_1V8
ETH0_PHY_LED0
PHY1_AVDD_1V8_OUT
PHY1_VDD_3V3
PHY1_VDD_3V3
PHY1_LED_0
ETH_PHY_LED1
ETH_MD4_N
3V3
ETH_MD3_PETH_MD2_N
ETH_MD1_P
3V3
ETH_PHY_LED0
ETH0_PHY_LED1
3V3
ETH0_MD4_N
ETH0_MD2_N
ETH0_MD2_P
ETH0_PHY_LED0
ETH0_PHY_LED1
PHY1_VDD_3V3
PHY1_LED_1
PHY1_AVDD_1V8
PHY1_DVDD_1V0
PHY1_AVDD_3V3
PHY1_1V81V8_SOM
ETH0_MD1_PETH0_MD1_N
ETH0_MD4_N
SGMII0_GTR_RX_N
1V8_SOM
PHY1_AVDD_1V8PHY1_AVDD_1V8_OUT
PHY1_AVDD_3V3
PHY1_1V8
PHY1_AVDD_1V8
PHY1_AVDD_3V3PHY1_DVDD_1V0
PHY1_VDD_3V3
PHY1_1V8
ETH0_MD2_PETH0_MD2_N
SGMII0_GTR_RX_P
SGMII0_GTR_TX_P
SGMII0_GTR_TX_N
PG_ALLETH0_RESET_B
1V8_SOM
ETH0_MD3_NETH0_MD4_P
ETH0_MD3_P
ETH0_MD1_N
ETH0_MD1_P
ETH_MD4_PETH_MD3_N
PHY1_1V8
ETH_MD1_NETH_MD2_P
ETH0_MD3_N
ETH0_MD3_P
3V3
ETH0_MDIO
ETH0_MD4_P
3V3
123456789
1011121314
15 16 17 18 19 20 21 22 23 24 25 26 27 28
2930313233343536373839404142
4344454647484950515253545556PAD
17
1
14
13
SH2
15
9
35
6
1
1 2
2
14
7
16
15
10
12
1
1 2
12
SH2SH1
7
16
4
3
2
17
SH1
1
11
4
28
13
6
11
104
53
28
9
PINSPARE
PINSPARE
PINSPARE
GND
GND
VCC
NC
Y
GNDBA
GND
RJ45
1000pF 2kV
4 X 75OHMS
1CT:1CT
1CT:1CT
1CT:1CT
1CT:1CT
TRP4-(8)
TRP4+(7)
TRP3-(5)
TRP3+(4)
TRP2-(6)
TRP2+(3)
TRP1-(2)
TRP1+(1)
LED2
SHIELDSHIELD
LED1
TRCT1
TRD4-
TRD+
TRD2+TRD1-
TRD2-TRD3+
TRD4+TRD3-
TRCT4
TRCT2
TRCT3
RJ45
1000pF 2kV
4 X 75OHMS
1CT:1CT
1CT:1CT
1CT:1CT
1CT:1CT
TRP4-(8)
TRP4+(7)
TRP3-(5)
TRP3+(4)
TRP2-(6)
TRP2+(3)
TRP1-(2)
TRP1+(1)
LED2
SHIELDSHIELD
LED1
TRCT1
TRD4-
TRD+
TRD2+TRD1-
TRD2-TRD3+
TRD4+TRD3-
TRCT4
TRCT2
TRCT3
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
GND
GND
GND
PAD
TX_C
TRL
TXD(
3)TX
D(2)
TX_C
LKVD
DOTX
D(1)
TXD(
0)VD
DORX
D(3)
RXD(
2)RX
_CLK
RXD(
1)RX
D(0)
RX_C
TRL
DVDDREGCAP2
DVDD_OUTAVDD18_OUT
AVDD18REGCAP1
REG_INAVDDC18XTAL_IN
XTAL_OUTHSDACPHSDACN
RSETTSTPT
MDI
P(0)
MDI
N(0)
AVDD
18AV
DD33
MDI
P(1)
MDI
N(1)
MDI
P(2)
MDI
N(2)
AVDD
33AV
DD18
MDI
P(3)
MDI
N(3)
RESE
TNCO
NFIG
LED(0)LED(1)LED(2)/INTNVDDOVDDO_SELCLK125MDIOMDCDVDDS_OUTNS_OUTPAVDD18S_INNS_INP
PINSPARE
GND
GND
GNDGND
GND
PINSPARE
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
PCIE
11 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
C0201L
0.1UF
0.01UF0.01UF
NCFINGER_2X49_PCIENCFINGER_2X49_PCIE
SPC20500
15
DNI
DNI
DNI
R0402L
R0402LR314
R313
R312
R311
C275C266
C274C265
C273C264
C269
C268C259
C272C263
C271C262
C270C261
C260
C258C267
P17P17
P16
PCIE_PRSNT_X4
PCIE_PRSNT_X8
PCIE_PRSNT_X1
PCIE_PRSNT_B
3V3
PCIE_WAKE_B_3V3
PCIE_PRSNT_X4
PCIE_PRSNT_X8
PCIE_PRSNT_X1
PCIE_RX3_P
PCIE_RX4_N
PCIE_RX5_P
PCIE_RX6_N
PCIE_RX7_NPCIE_RX7_P
PCIE_RX6_P
PCIE_RX5_N
PCIE_RX4_P
PCIE_RX3_N
PCIE_RX2_P
PCIE_RX1_N
PCIE_RX0_N
PCIE_RX2_N
PCIE_PERST_3V3
PCIE_CLK_QO_PPCIE_CLK_QO_N
PCIE_RX0_P
PCIE_RX1_P
PCIE_TX1_P
PCIE_TX2_PPCIE_TX2_N
PCIE_TX3_PPCIE_TX3_N
PCIE_TX4_PPCIE_TX4_N
PCIE_TX0_PPCIE_TX0_N
PCIE_TX1_N
PCIE_TX5_PPCIE_TX5_N
PCIE_TX6_PPCIE_TX6_N
PCIE_TX7_PPCIE_TX7_N
PCIE_PRSNT_B
A49A48
A46A45A44A43A42A41
A39A38A37A36A35A34A33A32A31A30
A27
A25
A22A21A20
A16A15
A12
A7
A5A4A3
A23
A10A11
A28
A24
A26
A14
B49B48
B46B45B44B43B42B41B40B39B38B37B36B35B34B33B32B31B30
B27
B25B24B23
B14
B9
B7B6B5B4
B17
B10
B13
B15B16
B22
B26
B28B29
5
A47
4
A2A1
A9
A6
A19A18A17
A13
A8
1
B21B20B19
B11B12
B3
B1
B47
B2
B8
B18
A40
A29
3
6
2
GNDGND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
PLACE NEAR CONNECTOR
PLACE NEAR OSCILLATOR
LAYOUT NOTES:PLACE SERIES RESISTORS NEAR HMC7044LENGTH MAYCH SYNC_OUT1 AND SYNC_OUT2
TALISE FMC CARD
LAYOUT NOTES:PLACE DECOUPLING CPAS CLOSE TO HMC7044LENGTH MATCH REFCLK_OUT1_P/N, REFCLK_OUT2_P/N, REFCLK_OUT3_P/N, REFCLK_OUT4_P/N
HMC7044
SOM
LAYOUT NOTES:PLACE DECOUPLING CPAS CLOSE TO HMC7044
SOM
LVPECL
LVPECL
TALISE FMC CARD
12 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
38.4MEGHZ
DNI
49.9
120OHM
142-0701-201
1UF
49.9
0.1UF
0.1UF
0.1UF
0.01UF
0
R0402L0
R0402L
0
R0402L
R0402L
0
142-0701-201
142-0701-201
430
49.9 49.9
DNI0.1UF
0
R0402L
DNI DNI
DNI
49.949.9R0402L
R0402L
0
0
0142-0701-201
0.1UF
100PF
49.9
DNIR0402L
DNI
0.1UF
DNI
DNI
R0402L
DNI
0.1UF
4.7UF
0.1UF 2200PF 100PF 82PF
49.9
0.1UF
0.1UF
R0402L
49.9
0.1UF
0
R0402L
DNI
0.1UF
49.9
0.1UF
DNI
49.9
0.01UF
DNI
49.9
DNI
DNI
DNI
19.2MEGHZ
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.01UF
0.01UF
1UF
1UF
4700PF
DNI
2.2UF1UF
DNI
4700PF
DNI
0.1UF
0.1UF
0.1UF
0.1UF
DNI
0.1UF
DNI
24
0
49.9
DNI DNI
R0402L
R0402L
DNI
R0402L
R0402L
R0402L
4.7K4.7K
10K
10K
DNI
49.9
0
DNI
0
0
0
0
0
0
DNI
11K
0
DNI
0
49.9
10UF
4.7UF4.7UF4.7UF4.7UF
100
100
100
100100
100
100
HMC7044LP10BE
120OHM
CVHD-950X-122.880122.88MEGHZ
120OHM
160PF
142-0701-201
Y4
R14
R20
C276
R319
R318
R316
R315
C278C277
J3
R11
E18
C283
R23
R1
C282
R25
R28
R36
R27
R34
C291
R77
R110
R26
R32
R111
C293
R112
C280
R114
C23
R35
R30
R31
C289
C290
R22
R21
R24
R29 R33
R113
C284
C240
C236
C18
C19
C292
C10
C5
C4
C3
C285
C286
C287
C288
C7
C11 C15C13
C20C14
C279
C294
C26
C21
C22
C27C25C24
R230
J1
R10R9
R12
R19
R18
R17
R16
R15
R13
C9C8C6C2C1
R5
J6
R6
R8
R3
R2R7
U1
Y5
TP2
C12
TP3
J2
J5
TP4
Y2
E2
E1
R4
VCCXO_GND
TCXO_VDD
VCCXO_GND
GPIO_2_HMC7044_CARGPIO_3_HMC7044_CARGPIO_4_HMC7044_CAR
TCXO_CLK_P
RESET_HMC7044_CAR
VDDA3P3_VCXO
VCCXO_GND
VCCXO_GND
SPI_CSN_HMC7044_CAR
TCXO_CLK_N
SFP_REFCLK_P
REFCLK_OUT4_N
REFCLK_OUT4_P
REFCLK_OUT2_N
SYNC_OUT1
REFCLK_OUT1_N
REFCLK_OUT1_P
REFCLK_OUT2_P
VCC5_PLL1
1PPS_SYNC_CK_P
1PPS_SYNC_CK/RFSYNC_P
SFP/QSFP_REC_CLK_P
SFP/QSFP_REC_CLK_N
OSCIN_EXT
1PPS_SYNC_CK/RFSYNC_N
REFCLK_OUT3_N
VCC5_PLL1
1PPS_SYNC_CK_NREFCLK_OUT3_P
TCXO_VDD
TCXO_CLK_SOM_P
SFP_REFCLK_N
QSFP_REFCLK_N
QSFP_REFCLK_P
REFCLK_IN_P
VCC5_PLL1
REFCLK_IN_N
1PPS_SYNC_CK/RFSYNC_N1PPS_SYNC_CK/RFSYNC_P
TCXO_CLK_SOM_N
1V8_SOM
GPIO_1_HMC7044_CAR
SPI_CLKSPI_MOSI
TCXO_CLK_NTCXO_CLK_P
VCC1_VCO
VCC2_OUT
VCC3_SYSREF
VCC4_OUT
VCC9_OUT
VCC8_OUT
VCC7_PLL2
VCC6_OSCOUT
CPOUT1
REFCLK_IN_N
REFCLK_IN_P
VCCXO_GND
VCCXO_GND
OSCIN_EXTCPOUT1
SYNC_OUT2
VDDA3P3_VCXO
55
3152
56
16
60
13
22
21
33
18
20
42
38 57 68
34
43
41
1
25
23
14
39
15
4
48
32
49
PAD
5
19
63
6
35
17 5110
7
67
46
1112
9 27
6226
65
24
45
50
64
44
8
40
3637
47
66
58
61
59
3
30
2829
5354
2
SUP_VOLT
GND GNDOUTPUT
GND
GND
GND
GND
GND
GND
GNDGND
GND
PADVC
C9_O
UT
CLKOUT12_NCLKOUT12
SCLKOUT13_NSCLKOUT13
GPIO4GPIO3 SCLKOUT11_N
SCLKOUT11CLKOUT10_N
CLKOUT10
VCC8
_OUT
CLKOUT8_NCLKOUT8
SCLKOUT9_NSCLKOUT9
GPIO2
VCC7
_PLL
2
CPOUT2
LDOBYP7
OSCIN_NOSCIN
LDOBYP6
OSCOUT1_N
OSCOUT1
CLKIN2_N/OSCOUT0_NCLKIN2/OSCOUT0
VCC6
_OSC
OUT
CLKIN0_N/RFSYNCIN_NCLKIN0/RFSYNCIN
VCC5
_PLL
1
CLKIN1_N/FIN_NCLKIN1/FIN
RSV
CLKIN3_NCLKIN3
CPOUT1
GPIO1
SCLKOUT7_NSCLKOUT7
CLKOUT6_NCLKOUT6
VCC4
_OUT
CLKOUT4_NCLKOUT4
SCLKOUT5_NSCLKOUT5
VCC3
_SYS
REF
SDATASCLKSLEN
VCC2
_OUT
CLKOUT2_NCLKOUT2
SCLKOUT3_NSCLKOUT3
LDOBYP5LDOBYP4
VCC1
_VCO
LDOBYP3LDOBYP2
BGABYP1
SYNCRESET
SCLKOUT1_NSCLKOUT1
CLKOUT0_NCLKOUT0
GND/NCOUT
VDD
GND
GNDGND
GND
GND
GND
VDDOUTCONTROL
GND
GNDGND
GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
DECOUPLING HMC7044
13 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
1UF
1UF
1000PF 0.1UF
1000PF 0.1UF
1000PF 0.1UF
1000PF 0.1UF
1000PF 0.1UF
0.01UF 0.1UF
1000PF 0.1UF
1000PF 0.1UF
1000PF 0.1UF4.7UF
4.7UF
4.7UF
4.7UF
4.7UF
4.7UF
4.7UF
120OHM
120OHM
120OHM
120OHM
120OHM
120OHM
120OHM
120OHM
C229
C224
C217 C223
C216 C222
C215 C221
C214 C220
C213 C219
C212 C218
C232 C235
C231 C234
C230 C233C225
C239
C238
C237
C228
C227
C226
E10
E11
E12
TP34
TP35
E14
E15
TP36E16
TP33
TP29
TP30
TP31
TP32
E9
E13
VDDA3P3_VCO
VCC6_OSCOUT
VDDA3P3_CLKVDDA3P3_CLK
VCC8_OUT
VCC4_OUT
VCC3_SYSREF
VCC9_OUT
VCC2_OUT
VCC7_PLL2
VCC5_PLL1
VCC1_VCO
GND
GND
GND
GND
GND
GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
CML OUTPUT MODE
CML OUTPUT MODE
1PPS SYNCHRONIZATION
CML OUTPUT MODE
I2C
ADDRESS 0X50 - 0X57
ADDRESS 0X4A
M3 = HIGH - LOAD FROM EEPROM
14 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
49.152MEGHZ
100
DNI
4.7K4.7K
0.1UF
100K
AD9545BCPZ
15PFNC7SZ126M5X
15PF
0.22UF0.22UF
49.9
4.7K4.7K
R0402L
49.9
10UF120OHM
142-0701-201
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
100K100K
10K
R0402L
R0402L
R0402L
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF 0.1UF0.1UF
0.1UF
0.1UF0.1UF0.1UF0.1UF 1UF 1UF 1UF
3900PF
0.1UFR0402L
00
4.7K
4.7K
3900PF
24AA16-I/SN
0.1UF
DNI
R168 R291
R297R295R294
U18
R289
C184
Y3
C300C183
R290
C299
U25
C186C177
R308
R307
R306
R310
R305
R301
R309
R287 R288
U6
R300
R298
R299
C312
C178
C179 C185
C195
J4
E8
R165
R163
R161
R164
C181
C180
C182
C303
C304
C301
C302
C306
C305
C190 C192C191
C198
C197C189C188C187 C193 C194 C196
R160
1V8_VDDIOB
1V8_VDDIOB
1V8_AD95451V8_AD9545
REFCLK_AD9545_P
1V8_VDDIOB
1V8_AD9545
1V8_AD9545
1V8_AD9545
1V8_AD9545
1V8_VDDIOB
REFCLK_AD9545_N
1V8_AD9545
OUT1_A_P
OUT0_A_P
1V8_AD9545
1V8_AD9545
OUT1_B_N
1V8_AD9545
1V8_AD9545
1V8_SOM
1V8_SOM
ETH_REFCLK1_N
ETH_REFCLK2_N
ETH_REFCLK2_P
ETH_REFCLK1_P
OUT1_A_N
OUT0_A_N
OUT1_B_P
1V8_VDDIOA
OUT1_A_P
1V8_SOM
1PPS_SYNC_CK_N
1PPS_SYNC_CK_P
OUT0_A_N
OUT0_A_P
3V3
RESETB_AD9545
1V8_AD9545
I2C1_SDA_AD9545I2C1_SCL_AD9545
1V8_VDDIOB
1V8_SOMVDDA1P8
1V8_AD9545
OUT1_B_P
OUT1_B_N
1V8_AD9545
1V8_VDDIOAI2C_MASTER_SDA
I2C_MASTER_SDAI2C_MASTER_SCL
OUT1_A_N
I2C_MASTER_SCL
1V8_AD9545
3635
384827
404144454647 39
31
2928
25
222116 171413
121110987654321
24
26
37
18
42
231915
43PAD
20
30
323334
GND
GND
GND
GND
VSS
VCCWP
A2A1A0
SCLSDA
GND
GND
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
GNDGND
GNDGND
YA
OEVCC
GND
PAD
RESE
TBRE
FARE
FAA
VDD NC VDD
XOB
XOA
VDD
REFB
BRE
FB M4
M3M2
VDDIOBM1M0
VDDLDO1
LF1VDDVDD
OUT1ANOUT1AP
VDD
OUT
1BN
OUT
1BP
NCVDD
NC VDD
OUT
0CN
OUT
0CP
OUT
0BN
OUT
0BP
VDD
OUT0ANOUT0APVDDVDDLF0LDO0VDDCSB/M6SDIO/SDAVDDIOASCLK/SCLSDO/M5
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
BEFORE LOADING R289, R291, UNLOAD R127, R129 ON THE SOM
ULTRASCALE CONFIGURATION LEDS
JTAG HDR
TDI
TDO
TDI
TDO
JTAG,ULTRASCALE CONFIGURATION LEDS,PUSH BUTTONS
TDOTDI
FMC LPC
TDO
FPGA
TDI
2 X 10
TDO
TDI
RED_SWITCHRED_SWITCH
ULTRASCALE MODE SWITCHES
ULTRASCALE RESET BUTTONS
15 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
BSS138LT1G
APT1608SURCK
BSS138LT1G
APT1608SURCK
BSS138LT1G
APT1608SURCK
BSS138LT1G
PTS645SK43SMTR92LFS
R0402L
DNI10K
BSS138LT1G
BSS138LT1G
APT1608SURCK
330
499
R0402L
499
R0402L
PTS645SK43SMTR92LFS
0.1UF 0.1UF
0.1UF
R0402L
330330330
499
499499499499
330
499
330
1MEG 1MEG
BSS138LT1G BSS138LT1G
BAT54JFILM
APT1608SURCKAPT1608SURCK
CL-SB-12B-02T
CL-SB-12B-02T
CL-SB-12B-02T
CL-SB-12B-02T
NLSV4T244MUTAG
ADG719BRTZ
APT1608SURCK
87832-1420
DNI10K
APT1608SURCK
1.2K 1.2K
DS12
Q20Q19
DS10DS7
S13
C68 C309
C69
U3
Q6Q14Q13
Q12
D3
DS9DS8
P7
S11
DS6
S10
S14
S15
S16
DS11
A1
DS13
R156 R159 R166 R198
R154 R167
R205 R206
R203
R152 R155
R207
Q4Q3
R202R200
R201R199
R158R153
R204 R208
PS_ERROR_STATUS
VIN_12V0
VIN_12V0
JTAG_FPGA_TDOPG_ALL
VIN_12V0
VIN_12V0
3V3
PS_ERROR_OUT
PS_PROG_B
JTAG_TDOJTAG_TDO
PS_DONE
PS_SRST_B
3V3
PG_ALL EN_PWR_CAR
1V8_SOM
3V3
3V33V33V3
PS_MODE0_503
PS_MODE1_503
PS_MODE2_503
PS_MODE3_503
3V3
PS_INIT_B
JTAG_TMS
FMC_3V3
FMC_TMSFMC_TCK
1V8_SOM
FMC_TDIFMC_PG_C2M
JTAG_TCK
JTAG_TCK
JTAG_FPGA_TDO
FMC_TDO_1V8
FMC_HPC_PRSNT_M2C_L
JTAG_TMS
JTAG_FPGA_TDI
PWR_FAULT2PWR_FAULT1
1
3
1
22
3
1
2
3
C
A
21
3
13
54
6
14
78
101112
9
GND GND GND GND
GND
S2D
VDD
GND
S1
IN
GND
GND
SPAREPIN
SPAREPIN
GND
OE_N
B1B2B3B4
A4A3A2A1
VCCBVCCA
GND
GNDGND
GND
GND
GND
GND
GNDGNDGNDGND
GND
N4N3N1
N2N4N3N1
N2
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
USER LEDS
USER SLIDE SWITCHES
UART, PMOD, USER LEDS, PUSH BUTTONS, SLIDE SWITCHES
MISCELLANEOUS
BLACK_SWITCHBLACK_SWITCH
PMOD 1
BLACK_SWITCHBLACK_SWITCH
USER PUSH BUTTONS
PMOD 1 TRANSLATOR
16 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
4.7K
PTS645SH50SMTR92LFS
1K
PTS645SH50SMTR92LFS
BSS138LT1G BSS138LT1GBSS138LT1G
C0402L C0402LC0402L C0402L
C0402LC0402L C0402L C0402L
0.1UF0.1UF0.1UF 0.1UF
0.1UF0.1UF0.1UF0.1UF
C0402L
0.1UF
C0402L
0.1UF
R0402L
R0402L
R0402L
R0402L
R0402L
R0402L
R0402LR0402L
R0402L
R0402L
R0402L
R0402L
R0402LR0402L
R0402LR0402L
1K1K
1K
330330
330 330
10K 10K10K
10K
10K10K10K10K
10K10K10K10K
3333
3333
33
33
33
33
3333
33
33
33
33
33
33
PPPC062LJBN-RC
FXLA108BQX
EG1218
BSS138LT1G
EG1218
APT1608LZGCK
PTS645SH50SMTR92LFS
EG1218EG1218
PTS645SH50SMTR92LFS
499
APT1608LZGCK
APT1
608S
URCK
0.1UF
C0402LC0402L
C0402L
DNI
FXL2TD245L10X
APT1608LZGCK
C0402L
499
APT1
608S
URCK
0.1UF
2.2UF
APT1608LZGCK
C0402L
8.2K
FT232RQ
0.1UF
0.1UF0.1UF
C0402L
1K
47590-0001
SESD
0201
X1UN
-002
0-09
SESD
0201
X1UN
-002
0-09
SESD
0201
X1UN
-002
0-09
R210
Q15
DS3
C67C65C61 C63
C66C60C64C62
C113C112
R62 R66 R69R73
R145 R151 R157 R162
R59 R63R67
R71
R74R70R65R61
R72R68R64R60
R94R106
R102R98
R107
R108
R103
R104
R105R109
R99
R100
R101
R95
R96
R97
U12
S4S3S1
Q18
S2
P10
S5 S6 S7S8
DS2 DS4
Q17Q16
DS1
D5
P8
D4
DS14DS5
C111
C108
R296
C110
R87
U27
C318
R90
C109
U4
C317
R88
D6
USB_UART_RXD
DIP_GPIO_0
VBUS_MICRO
3V33V3
LED_GPIO_3LED_GPIO_2
1V8_SOM
DIP_GPIO_2
1V8_SOM
PMOD0_D7_3V3
PMOD0_D4_3V3
PMOD0_D5_3V3
PMOD0_D3_3V3
3V31V8_SOM
PMOD0_D1_3V3PMOD0_D0_3V3
PMOD0_D6
PMOD0_D4
PMOD0_D2
PMOD0_D5
PMOD0_D3
PMOD0_D7_3V3PMOD0_D6_3V3
PMOD0_D4_3V3
PMOD0_D2_3V3PMOD0_D1PMOD0_D0
PMOD0_D6_3V3
3V3
1V8_SOM
1V8_SOM
DIP_GPIO_3
1V8_SOM1V8_SOM
1V8_SOM
DIP_GPIO_1
3V3
PMOD0_D1_3V3PMOD0_D0_3V3
PMOD0_D5_3V3
PB_GPIO_1PB_GPIO_3
1V8_SOM
PMOD0_D3_3V3
3V3
PB_GPIO_2
LED_GPIO_0
PB_GPIO_0
USB_MICRO_PUSB_MICRO_N
VBUS_MICRO
VBUS_MICRO
LED_GPIO_1
USB_UART_TXDUSB_UART_TXD_FT232
PMOD0_D7
PMOD0_D2_3V3
1V8_SOM
3V3
USB_UART_RXD_FT232
USB_UART_RXD_FT232
USB_MICRO_NUSB_MICRO_P
USB_UART_TXD_FT232
VBUS_MICRO3V3_FT232R
3V3_FT232R
3V3_FT232R
3V3_FT232R
1923456789
15141312
1 20
10 PAD
161718
11
121
1
126
10987
432
115
431 2
3 314 31
2 1 12 332 33
2 4 22 4
1
C
A
21
SH3SH2SH1
543
AA
C
6
10
C
A
1
938
5
21
28
1
76
5
3
14
19
10
27
8
32
22
11
25
9
2913 23242017
26
124
PAD
15
18 16
312
724
30
C
GND
GNDGND
GND
VCCB
B0
B1
OE_N
T/R1GND
T/R0
A1
A0
VCCA
GND
VCCVCCIO
CBUS4CBUS3CBUS2CBUS1CBUS0
RTS#DTR#
TXDOSCO
3V3OUT
NCEP AGNDGND
USBDPUSBDM
CTS#DCD#DSR#RI#RXDOSCITESTRESET#
GND
GND
GND
GNDGND
GND GND GND GND
GNDGND
GND GND
GND
N4N3N1
N2
GND
N4N3N1
N2
GND
N4N3N1
N2
GND
N4N3N1
N2
GND
GND GND
GND
GNDGNDGND
GND
GNDGND
GND GND
VCCGNDP10
P9P8P7
VCCGNDP4P3P2P1
GND
PAD
VCCB
OE_NB0B1B2B3B4B5B6B7
GND
A7A6A5A4A3A2A1A0
VCCA
GND
GND GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
12V 10A
FAN CONNECTOR
RESISTIVE DIVIDER TO TRANSLATE TO 1.8V LOGIC INPUT
POWER INPUT, FANPOWER ENTRY
17 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
BAT54JFILM
39-30-1060
1101M2S3CQE2
ZXMS6004DGTA
MMSD4148T1G
47053-1000
TS621E-FL11E
1UF
10K
1K
4.7K
10K
2.7K
R0402L
0.1UF
DMP3007SFG-7BNX016-01
10UF10K
1K
R213
R211
Q5 TP5P11
BT1
D10
S12
P9
D7
Q1
FL1
R92
R89
R115
R91
R93
C115
C117
C116
1V8_SOM
VCC_PSBATT
VIN_12V0
FAN_TACH
VIN_12V0
FAN_PWM_3V3
21
43
6
31 2
3
4
3
12
4
1
2
A
C
5
8
7
6
54
3
2
1
GND
GND
GND
D DIN
S
GND
GND
GND
GND
D
G
S
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
PARALLEL OPERATION
5V, 1.5A
3.3V, 12A
SAME SCHEMATIC AS SOM
3.8V, 2.5A
WITH LDOS31.6K 38.3K R138
WITHOUT LDOS
18 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
0.1UF
C1206L_H71
DNI
C0402L
20K
10UF
63.4K
20K93.1K
R0402L 0.1UF
C0402LC1206L_H71
22UF
C1206L_H71
0.1UF
C0402L31.6K
100K
R0402L
C0402L
200K
C1206L_H71
10UF
C0402L
22K
C0402L
0.1UF
0.1UF
1UF
16.2K
13.3K
499K
DNI
0.82NF
0.68NF
1.2UH
DMG6898LSD-13
37.4K
39PF
22K
13.3K
C0402L
C0402L C0402L
C0402L
0.001UF
0.001UF0.001UF
0.001UF
1UF
0.1UF
22PF
0.0033UF
0.01UF
R0402L
R0402L
R0402L
R0402L
R0402L
R0402L
R0402L
R0402L
R0402L
1K
R0402L
10K
R0402L
1K
1K
R0402L
R0402L
1K
825
5.1K
3K
3K
750
750
41.2K
0
DNI
38.3K
0
69.8K
0
20K
20K
0
1K
499
47UF
1.2UH
47UF
DMG6898LSD-13
0.1
470OHM AT 100MEGHZ
47UF
47UF
L0603L
DNI
100UF 100UF
100UF
47UF
22UH
47UF
100UF
ADP5054ACPZ
6.8UH
22UF
R252
R248
R245
R251
R249
R246
R247
R236
R237
R233
R239
R250
R232
R228
R229
R231
R217
R235
R244
R242
R218
R224
R225
R219
R243
R241
R234
R221
R226
R223
R216
R220R215
R222R214
R240
R227 R238
Q11Q11
C310
C311
TP6
TP7
C119
C130
C122
C125
C129
C123
C131
C120
C298
C297C296
C295
C126
C127
C128
C133
C124
C132
P21
TP8
TP11
C143
L4
C140 C141
C142
E7
C137
C135
TP9
C121
C118L1
L3
C138
U13
TP10
TP12
C134
C136 C139
L2
VREG_ADP5054
VDDA3P8
VREG_ADP5054
5V0
EN_PWR_CAR
5V0_SNS_N
5V0_SNS_P
VADJ_SNS_P
VADJ_SNS_NVDDA3P8_SNS_N
VDDA3P8_SNS_P
3V3_SNS_N
3V3_SNS_P
VADJ_P
3V3_N
VADJ_N
5V0_P
VDDA3P8_N
VDDA3P8_P
3V3_N
5V0
3V3
VIN_12V0
VDDA3P8
5V0_N
3V3_P
VREG_ADP5054
VDDA3P8_N
3V3_P
VDDA3P8_P
5V0_N
PG_CARRIER
5V0_P
1
7
2
83
5
4
6
21
3
GND
GNDGNDGND
GND
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
GD
S
GD
S
EPAD
EN3
COMP3
FB3
VREG SYNC/MODE
VDD RT
FB1
COMP1
EN1
PVIN1PVIN1PVIN1
SW1SW1SW1
BST1
DL1
PGND
DL2
BST2
SW2SW2SW2
PVIN2PVIN2PVIN2
EN2
COMP2
FB2
CFG12
PWRGD
FB4COMP4
EN4
CFG34
BST4
PGND4PGND4
SW4SW4
PVIN4
PVIN3
SW3SW3
PGND3PGND3
BST3
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
3.3V, 2A
ANALOG SUPPLIES
1.8V DEFAULT, 3A
1.8V, 0.4A
1V2
1V8
1V5
500KHZ
3.3V, 0.4A
3.3V, 0.4A
FMC VADJ
19 19
<DESIGN_VIEW>
: NAProduct(s): ADRV9009HW TYPE : Customer Evaluation Z
1:1
C02_048950
C.GOGA
22UF
ADP7158ACPZ-3.3-R71UF 01UF 0.1UF
ADM7154ACPZ-3.3
10UF
0.1UF
100UF
ADP2386ACPZN
10UF
100UF
3.3UH
()
22UF
ADM7154ACPZ-1.8
ADM7154ACPZ-3.3
10UF
10UF
10UF
10UF
10UF
10UF10UF
10UF10UF
C0603LC0603L
C0603LC0603L
C0603L
C0603L
C0603L
DNI
DNI
DNI
DNI
23.2K
23.2K
46.4K
34.8K
7.68K
124K
00
0
R0402L
R0402L
R0402L
R0402L
R0402L
0.1UF0.1UF
0.1UF
C0402L
1200PF
C0402L10PF
C0402L
1UF
DNI
1UF
1UF
1UF
1UF
1UF
1UF
1UF
C0402L
R281R280
R275
R276
R282
R279
R285
R283
R284
R286R278
R277
R273
R274
TP18
C154
C149C146C144 C147
C150
U15
C157
C151
C174
C163
U14
C152
TP15
C164
L5
JP7
JP6
JP5
TP17
JP3
JP4
U5
JP2
TP20
TP21
U17
TP16
TP13
TP14
TP19
C158
U16C156
C171
C170
C166
C172
C169
C145C165
C173
C153
C162
C161
C160
C155
C159
C148
C175
C167
C176
C168
FMC_VADJ
VIN_12V0
EN_PWR_CAR
VADJ_P
PG_CARRIER
VDDA1P8
VADJ_N
SW_ADP2386
SW_ADP2386
VDDA3P3_CLK
VDDA3P3_VCXO
VDDA3P8
VDDA3P8
VDDA3P8
VDDA3P3_VCO
VDDA3P8
VDDA3P3_VCXO
VDDA3P8
VDDA3P8
VDDA3P8
VDDA3P3_CLK
VDDA3P3_VCO
12
3
4
5
67
8
910
PAD
15
PAD1
14PAD2
18
23
12
21
2019
8
765
4
3
2
1
22
17
9 10 11 13
16
24
EP
VINVIN
VREG
REFREF_SENSE
EN
BYP
VOUT_SENSE
VOUTVOUT
GNDGND
GNDGND
GND
GND
GND
GND
GND
GND
GND
GNDGND
EP
VINEN
REFREF_SENSE
GND
BYP VOUTVREG
GND
GND
GND
GND
GND
EP
VINEN
REFREF_SENSE
GND
BYP VOUTVREG
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDGND
GND
EP
VINEN
REFREF_SENSE
GND
BYP VOUTVREG
SW
GND
SSSYNCRT
PGOOD
ENPVINPVINPVINPVINBST
SW
PGND
PGND
PGND
PGND
PGND
PGND
SWSWSW
GND
VREG
FB
COMP
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
