Contributions of DOE Weapons Labs and NIST to Semiconductor … · 2018. 4. 29. · 2 DRAM s~nds...

Contributions of DOE Weapons Labs andNIST to Semiconductor Technology

September 1993

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Recommended Citation:U.S. Congress, Office of Technology Assessment, Contributions of DOEWeapons Labs and NIST to Semiconductor Technology, OTA-ITE-585(Washington, DC: U.S. Government Printing Office, September 1993).

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Foreword

T he federal laboratories of the United States are a diverse lot. For those whoseprimary function was advancing military technologies, the end of the Cold Warhas meant reexamination of missions, abilities, and resources on a scale granderthan anything that has occurred in decades. In particular, the Department of

Energy’s nuclear weapons laboratories (Lawrence Livermore, Los Alamos, and SandiaNational Laboratories) are under close examination. Throughout their existence, theweapons labs’ primary missions have involved nuclear weapons. One of the most impor-tant is nuclear weapons development, and that function has diminished considerably as aresult of the end of the Cold War. While other weapons-related missions remain impor-tant, a consensus has emerged that the labs are, in a sense, larger than their remainingmissions warrant. But the issue is much larger than simply how much to cut and how tomanage the reduction.

National security is still the issue, but defined more broadly than in the past,when it was confined to military security. The concept of national security is nowexpanding to include industrial competitiveness, and there is lively interest in examininghow all the labs in the federal system could contribute to advancing science and precom-mercial technology. The debate over whether and how to expand the missions of theDOE labs has also raised questions of how to coordinate these new activities with thoseof labs and agencies that already have responsibility for civilian technology policy—principally the National Institute of Standards and Technology of the Department ofCommerce. NIST has emerged in the last few years as one of the federal government’smajor players in civilian technology advancement through, for example, management ofthe new and well-regarded Advanced Technology Program.

This Report examines how NIST and DOE weapons laboratories could con-

tribute to advances in semiconductor technology aimed specifically at civilian applica-tions. Semiconductor technology was chosen as an example of a technology focus for acivilian technology initiative, primarily because the industry had already developed a setof comprehensive technology roadmaps and the federal labs had substantial expertise inthe area. The Report was requested as a follow-on assessment to OTA’s work on theimplications for the U.S. civilian economy of the end of the Cold War. That work con-sists of two Reports: After the Cold War: Living With Lower Defense Spending, andDefense Conversion: Redirecting R&D. The former considered the effects on defenseworkers, defense-dependent communities, and defense companies, and suggested policyoptions to ease transitions for those affected by cutbacks. The latter examined how theR&D institutions whose primary missions were defense-related could contribute tonational well-being under a broader concept of national security.

Roger C. Herdman, Director

,..ill

Laboratory Review Panel

A.S. OberaiChairmanConsultant

Graham AlcottIntel Corporation

Charles FowlerU.S. Department of Energy

Sam HarrellSEMATECH

William C. HoltonSemiconductor Research

Corporation

John F. HoltzrichterLawrence Livermore National

Laboratory

Paul M. HornIBM T.J. Watson Research Center

Ross A. LemonsLos Alamos National Laboratory

Zachary LemniosAdvanced Research Projects

Agency

Paul S. PeercySandia National Laboratories

Robert 1. ScaceNational Institute of Standards&

Technology

David WatkinsLos Alamos National Laboratory

Owen P. WilliamsMotorola, Incorporated

Edward D. WolfCornell University

NOTE: OTA appreciates and is grateful for the valuable assistance and thoughtful critiques provided by the laboratory review

panel, The panel does not, however, necessarily approve, disapprove, or endorse this report. OTA assumes full responsibility

for the report and the accuracy of its contents.

iv

Project Staff

Peter D. Blair, Assistant Director, OTAIndustry, Commerce, and International Security Division

Audrey B. Buyrn, Program ManagerIndustry, Technology, and Employment Program

Julie Fox Gorte, Project Director

Jerry Sheehan

Sean Headrick*

C O N T R I B U T O R S

Avtar S. Oberai, Contractor

Elizabeth Sheley, Editor

ADMINISTRATIVE STAFF

Carol A. Bock, Office Administrator

Diane D. White, Administrative Secretary

PUBLISHING STAFF

Mary Lou Higgs, Manager, Publishing Services

Dorinda Edmondson, Typographer

Susan Hoffmeyer, Graphic Design

*On detail from the U.S. Department of Energy.

workshop Participants

Graham AlcottIntel Corporation

Richard BurkeInstitute for Defense Analyses

Glen T. CheneySEMI/SEMATECH

Charles FowlerU.S. Department of Energy

Thomas F. GannonDigital Equipment Corporation

Sam HarrellSEMATECH

Mark Hartney

Office of Science& TechnologyPolicy

William C. HoltonSemiconductor Research

Corporation

John F. HoltzrichterLawrence Livermore National

Laboratory

Paul M. HornIBM T.J. Watson Research Center

Dragan IlicHewlett-Packard Company

Ashok KapoorLSI Logic Corp.

C. Mark Melliar-SmithAT&T Bell Laboratories

A.S. OberaiConsultant

Paul S. PeercySandia National Laboratories

Daniel J. RadakScience Applications International

Corporation

Robert 1. ScaceNational Institute of Standards &

Technology

David WatkinsLos Alamos National Laboratory

Robert M. WhiteCarnegie Mellon University

Owen P. WilliamsMotorola, Incorporated

Edward D. WolfCornell University

NOTE: OTA appreciates and is grateful for the valuable assistance and thoughtful critiques provided by the workshop partici-pants. The workshop participants do not, however, necessarily approve, disapprove, or endorse this report. OTA assumes fullresponsibility for the report and the accuracy of its contents.

vi

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contents

Summary and Policy Discussion 1Background of this Report 7Policy Issues 8

Laboratory Capabilities 24Laboratory/Industry Collaboration 25Semiconductor Programs at the Four Labs 30Coordination of Lab Activities 48

The Semiconductor Industry 52A Strategic Industry 53Competitive History of the U.S. Semiconductor

Industry 56Future Challenges to the U.S. Semiconductor

Industry 68Alternatives for Future R&D 77

INDEX 80

vii

Summaryand

PolicyDiscussion 1

T he federal laboratories possess resources, technologies,and talents that could contribute to the development ofsemiconductor product and production technologies.Whether they will be able to is uncertain. In particular,

the three Department of Energy (DOE) weapons laboratoriesand the National Institute of Standards and Technology (NIST)are well positioned to contribute to advancing technologies; allfour currently participate in R&D partnerships with industry.While the extent of that participation varies greatly among thelaboratories, it is clear from OTA’s evaluation that there is roomfor all four labs to expand these partnerships without treading onthe toes of other laboratories (private or public), but only if theeffort is managed properly.

However, there are several issues that must be resolved if thosecontributions are to be made in effective, efficient, and synergis-tic ways. It is quite unlikely that the labs’ most effectivecontributions will happen automatically, notwithstanding theinterest among both lab and industry representatives regardingcurrent R&D partnerships. The thorniest issues are:

~ developing an effective means of managing the disparateefforts of labs and industry so as to make the greatest possiblecontribution to commercial technology development, whilethe labs continue to work on microelectronics in connectionwith public missions;

1 For the purposes of this report, these are Livermore, Los Alamos, and Sandia NationalLaboratories. The Y-12 plant at Oak Ridge National Laboratory is included as a weaponslaboratory in DOE accounts, but it is not comparable to the other weapons laboratoriesin size or scope of work. Readers not familiar with the semiconductor industry shouldstart this report by reading chapter 3.

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I Contributions of DOE Weapons Labs and NIST to Semiconductor Technology

focusing the labs’ efforts on the areas in whichtheir contributions are most needed and theirtalents most suited; andassuring a private-sector presence and commit-ment sufficient to take the hand-off of publiclyfunded technologies.

In addition, there is some concern over how tominimize competition or redundancy among lab-oratories and agencies if lab-based microelectron-ics R&D is expanded. Other policy issues includefunding and development of performance criteriafor labs’ efforts devoted to civilian semiconductortechnology. If these issues are not resolved, muchof the promise of ongoing R&D agreementsbetween industry and the labs—particularly theDOE labs—may never be realized, and theenthusiasm of both lab and industry representa-tives for cooperative work could die.

Ten years ago, this loss would have matteredless; private funding for R&D was more abun-dant, and labs’ technologies were perhaps lessrelevant to commercial needs. Today, however,cooperative technology development betweengovernment and industry is more important thanat any other time in the postwar period, especiallyin industries like microelectronics, where R&Dcosts are escalating more rapidly than revenues(figure l-l). Many feel that industry’s capacity tosupport escalating costs of technology develop-ment is strained; one member of an OTA work-shop convened for this assessment asserted that itis becoming difficult for companies to fund thedevelopment of the next generation of technologyfrom revenues made on the current generation.The pressure is compounded by rapidly risingplant and equipment costs. Generational changesin semiconductor technology are swift—the Semi-

conductor Industry Association (S IA) technologyroadmaps assume that generational changes willoccur every three years, on average, and each newgeneration entails rapidly escalating expenditureson plant and equipment. Estimates of the cost ofwafer fabrication facilities (fabs) stretch to abillion dollars even for the next generation ofsemiconductors (equivalent to a 64-Megabit DRAM?fab), expected to come on line around 1995.3 Ifthe costs of new wafer fabs are any predictor offuture costs, SIA expects semiconductor revenuesto be inadequate to support construction of newfabs beyond 2001.4 In short, it is becomingincreasingly difficult for the industry to find thefunds to support both ballooning capital expendi-tures and rapidly rising R&D costs; cooperativearrangements have been burgeoning as a result.

In the United States, most of the existingcooperative R&D enterprises are private. Semi-conductor companies are linked to other compa-nies via an expanding web of technology develop-ment and production agreements, many of whichspan national borders. A few have governmentsupport, most notably the industry consortiumSEMATECH, which receives half its fundingfrom the Department of Defense (DoD). Theimpetus for SEMATECH’s formation, however,came from the industry itself, as did the Semicon-ductor Research Corporation (SRC), which wascreated by the SIA members in 1981. This is acontrast with other semiconductor-producing na-tions, where government support for commercialsemiconductor technology and industrial devel-opment has been far more extensive and, in somecases, stretches back more than two decades.5

Government support of SEMATECH, origi-nally planned for five years starting in 1987, has

2 DRAM s~nds for dynamic random access memory.3 Semiconductor Industry Association Semiconductor Technology: Workshop Conclusions (San Jose, CA: Semiconductor Industry

Association 1993), pp. 6 and 18; and Electronic Engineen”ng Times, ‘‘IEDM Eyes Economics,” sept. 21, 1$)92.4 Ibid.

s U.S. support for semiconductor technology development goes back even farther, to the immediate post-World War II years, when theDepartment of Defense played a key role in the industry’s development and growth. However, support for commercial semiconductortechnologies has rarely been considered in the United States, and did not become a reality until the mid- 1980s.

$3

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Chapter l–Summary and Policy

Figure l-l—Sales Revenues and R&D Expenditures in theU.S. Semiconductor Industry, 1978-1991

billion 0/0 sales revenue

Discussion 3

20

15

I 10

0’ ‘ 51978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991

SOURCE: Semiconductor Industry Association, Annual Databook: Global and U.S. Semiconductor CompetitiveTrends-1978-1991 (San Jose, CA: Semiconductor Industry Association, 1992), p. 41.

been extended at $100 million in FY 1993 (thesame as in earlier years), in addition to ARPA’s(the Advanced Research Projects Agency ofDoD) funding of approximately $300 millionworth of R&D on microelectronics.6 Governmenthas also supported a few projects in otherconsortia, including SRC and the Microelectron-ics and Computer Technology Corporation, al-though most of the resources of these consortiaare private.

The major purpose of government support andfunding for semiconductor technology develop-ment has been for the military, and most of thatcame from the Department of Defense. While afew DoD labs have pursued microelectronicstechnology R&D, the largest share of militaryspending on microelectronics has been in theform of research funding in private companies.Both DOE and the Department of Commerce(DOC) have laboratories, and DOE’s in particularare large and well-equipped. Until the end of theCold War, DOE’s work in semiconductor and

microelectronics technologies was mostly relatedto nuclear weapons, and not very much of it wasaimed at or available to commercial integratedcircuit manufacturers. Now, however, the DOElabs are being encouraged to work with industryin cooperative R&D programs, and as industryand lab researchers become more familiar witheach other’s resources and abilities, enthusiasmfor joint projects has permeated the workinglevels as well.

A new form of cooperative arrangement is nowemerging. In this new arrangement, which oftentakes the form of a cooperative research anddevelopment agreement (CRADA), researchersat government labs and in private industry worktogether to solve problems of mutual interest,usually without any money changing hands. DOElabs gained authority to execute CRADAs in late1989, and since then the CRADA has become theprimary vehicle for cooperative R&D with indus-try.7 NIST, with longer-standing ties to industrialtechnologies, has had CRADA authority since

6 Not ~1 ~~ ~one. goes t. projw~ tit benefit Commercial semiconductor production as ARPA must look titer DoD’s sPeci~ ne~s for

semiconductor technology. However, ARPA’s mission is also strongly dual-use, and many of ARPA’s projects help advance commercialtechnologies as well.

7 For a more complete discussion of DOE CRADA activities, opportunities, and problems, see U.S. Congress, Office of TechnologyAssessment, Defense Conversion: Redirecting R&D, OTA-ITE-552 (Washington DC: U.S. Goverment Printing Office, May 1993).

4 I Contributions of DOE Weapons Labs and NIST to Semiconductor Technology

1986, in addition to nine decades’ experience inworking on problems of a commercial nature.8

NIST’s labs are a national repository of metrol-ogy9 technologies, and they have had productiveinteractions (using many mechanisms, not justCRADAs) with the semiconductor industry stretch-ing back more than three decades.

All four labs have CRADAs with industry inmicroelectronics. The DOE labs report that thevalue of DOE finds committed to CRADAs withthe U.S. semiconductor industry, as of summer1993, is over $110 million. The underpinningg ofthese efforts is approximately $100 million worthof existing program efforts in microelectronics atthe three DOE laboratories,10 and $9.5 million ininternal funds and $7.8 million in AdvancedTechnology Program funds at NIST1l In thecourse of pursuing its mission, each laboratoryhas developed some competencies that semicon-ductor industry representatives believe couldcontribute to technological advance, in directsupport of the SIA technology roadmaps, ifproperly managed (see ch. 2 for a discussion ofcore competencies, and box 1-A for a discussionof the SIA roadmaps).

In addition, several interagency and consortia/agency efforts have begun. Sandia and NIST havea memorandum of agreement (MOA) governingthe two labs’ collaborative efforts in a number oftechnology areas.

12 SRC, which manages re-

search for a consortium of semiconductor compa-nies, is trying to initiate CRADAs with all threeDOE weapons laboratories; Los Alamos is anSRC member.13 Defense Programs, at DOEheadquarters, recently began to explore the feasi-bility of SRC coordinating the various coopera-tive research projects at all the DOE weapons labson soft x-ray projection lithography, a technologythat, if it proves viable and cost-effective, couldbe ready for commercial use by 2007.14 SEMA-TECH has had a cooperative research agreementwith Sandia for several years, and initiated anew,$100-million, five-year agreement in early 1993.At the end of August 1993, the agreement includedover 20 projects, such as tool benchmarking andcharacterization, materials and manufacturingprocess modeling and development, metrology,and contamination-free manufacturing.

Unfortunately, CRADAs have proven time-consuming and troublesome to initiate at DOE(NEST’S CRADA process is much swifter andmore predictable, in part because the legislationgoverning CRADA authority at NIST makes theprocess simpler than DOE’s CRADA authority).Most DOE CRADAs, particularly those withweapons labs, still take over eight months to startafter submission of a work proposal, which itselfmay take many months for industry researchers toprepare. Some of the reasons for this are the faultof the agency or the labs, though some are not

8 Most of NIST’S work is and has been commercial, but the NIST labs have had substantially greater military funding in the past. In bothWorld Wars, NIST’S work was heavily oriented to military work. See Nelson Robert Kellogg, Gauging the Nation: Samuel Wesley Srrartonand the Invention ofrhe Nafiond Bureau of Standards, Ph.D. Dissertation The Johns Hopkins University, 1992.

P Me@oloW is the SClenCe of m~~ement.

10 AVW S. obe~, ‘ ‘The OTA Report on Federal Labs and the Semiconductor ~dustry, ” Contractor report for the Offkx of TechnologyAssessmen4 June 1993, p. 60.

I I me Advanced Technology ROW (ATP) is a program of mostly private resea.rc~ of which about Mf is funded by ~S~ MST holdscompetitions for ATP funding, and selects from among proposals made by private, university, and occasionally government researchers in avariety of fields. ATP projects do not involve NIST research or onsite research at NIST.

12 These arMS include development of advanced packaging technology, procedures and standards for C-cttikg M.hgmphy tooktechniques for model verificatio~ and methods to improve integrated circuit performan I% yield, and reliability. Source: ‘‘Memorandu ofAgreement between the National Institute for Standards and Technology and Sandia National Laboratories,” March 16, 1993, rnirneo.

13 Sandia ~s been a member in the pas~ but is no IOnger.

14 person~ co-u~cation ~i~ willim c. HOltO~ vice ~esiden~ ReS~h op~ations, semiconductor Research Corporation, Jdy 14,

1993.

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Chapter 1-Summary and Policy Discussion 5

Box 1-A–The SIA Roadmaps

Over the past decade and a half, the Semiconductor Industry Association (SIA) has played anincreasingly important role in supporting the industry’s competitiveness. The very formation of theassociation was at least partly a response to the rise of Japanese competition; so was SIA’s initiationof SRC in t he early 1980s and SEMATECH a few years later. Some of the competitive problems of the1980s have been solved, and SRC and SEMATECH played important roles in many of the solutions.A new set of technical challenges confronts the industry in the 1990s. SIA’s response was to convenea group of experts-mostly from the semiconductor industry and its customers, with several academ ics,government experts, and representatives from national laboratories--in late 1992 to “create a commonvision of the course of semiconductor technology over the next 15 years.”1

The group, through the course of several meetings and much off-line work, was able to create sucha vision, specifying the characteristics of cutting-edge semiconductor technology in 2007, shown intable 3-5. Working groups assembled roadmaps of what efforts would be needed in 11 areas to assurethat these technological advances could be made. The 11 areas are chip design and test, processintegration, lithography, interconnects, materials and bulk processes, environmental safety and health,manufacturing systems, manufacturing facilities, process/device/structure computer-aided design(CAD), packaging, and equipment design and modeling. The roadmap lays out what performance mustbe achieved in each area, and what inquiries should be conducted, in order to meet broadersemiconductor performance specifications.

The efforts that culminated in the roadmap date back several years. In the late 1980s, the NationalAdvisory Committee on Semiconductors (NACS) examined future technological challenges to thesemiconductor industry. This effort was followed by the MicroTech 2000 workshop, which focused onthe requirements needed to accelerate technology development by one generation, producing a1-gigabit static random access memory (SRAM) by the year 2000.2 Construction of the roadmap wasan outgrowth of MicroTech 2000.

SIA plans periodic updates of the roadmap as work underway in industry, academia, andgovernment begins to narrow choices between technology options. Technology forecasts arenotoriously unreliable past the short term, and updates and revisions will be needed to keep on trackwith both planned and unexpected developments in the industry.

~ semiconductor Industry Association, Sernkxmobctor 7iino/ogy: M&kshop Conclusions (San Jose, CA:Semiconductor Industry Association, 1993) pp. iii-iv.

2 MiCrO 7iich 2000 IMXkShOp Report: A Report to the National AcMsory Co/??/Mtee on Sen?iconducfomAugust 1991.

(box l-B). While industry’s appetite for joint of the SIA roadmaps, creation of a special meansresearch with the DOE labs has been unexpect- of managing cooperative R&D might be neces-edly vigorous in the four years that the labs have sary. For instance, the Superconductivity Pilothad authority to enter CRADAs, the difficulty and Center Agreement (SPCA) is a means of arrang-trouble it takes to establish one is frustrating to ing for cooperative R&D between companies ormany industry participants.

15 If Congress or DOE universities and the DOE labs that maintaininitiates a formal program of R&D aimed at areas Superconductivity Pilot Centers, and they appear

IS scc LJ. S, Congress, Office of Technology Assessment, op. cit., chapters 1, 2, and 4, for a discussion of the CRADA process at DOE.


Box 1-B–The DOE CRADA1

The cooperative research and development agreement (CRADA) became an accepted way forgovernment, industry, and academic researchers to engage in shared research in the 1980s. Mostgovernment laboratories got the authority to initiate CRADAs in 1986, with the passage of the FederalTechnology Transfer Act (FTTA). FTTA authorized government-owned, government-operated (GOGO)labs to sign CRADAs with any outside organization, including businesses, nonprofits, and state andlocal government organizations. Federal Order 12591 of April 1987 authorized the directors of GOGOlabs to negotiate the division of funds, services, property, and people with outside organizations inCRADAs, subject to the requirement that labs could contribute in-kind services, but not funds. UnderFTTA, NIST labs could initiate CRADAs, and the Federal Order gave lab directors at NIST broadauthority to approve agreements. NIST already had many ways of dealing with industry, and maintainsmany mechanisms still, but the CRADA became an important instrument over the next few years.

DOE’s labs are nearly all government-owned, contractor-operated (GOCO) labs, and FTTA did notgive them CRADA authority. That authority was granted in 1989, with the passage of the NationalCompetitiveness Technology Transfer Act (NCTTA), and the powers of laboratory directors to enter intoCRADAs were substantially different under NCTTA than under FTTA. NCTTA requires GOCOlaboratories to gain approval from their departments of both the CRADA (which is a legal document) anda statement of work before initiating a CRADA; GOGOs do not face this requirement. Partly as a resultof this requirement, and partly due to unfam iliarity with the process, DOE’s CRADA process has provedfrustratingly slow to many in industry. Most of the attention has focused on CRADAs with the weaponslaboratories, partly because of their large size and resultant visibility, and partly because the lion’s shareof CRADA money comes through Defense Programs (DP) in DOE, which manages the weapons labs.As of mid-1 993, it still took eight months or more to initiate a CRADA with a DOE weapons laboratory,beginning with the submission of a proposal. About half the time typically has been taken for review andranking of proposals, a process that involves teams from the labs ranking proposals and forwardingprioritized lists to DP for headquarters selection. The other half has been used to negotiate the CRADA

1 The information in this box is drawn from U.S. Congress, Office of Technology Assessment, DefenseConversion: Redirecting R&D, op. oit., pp. 98-120.

to be working more smoothly than the CRADA volume of CRADA activity. But that is not a goodprocess. l6

Government/private cooperative work to strengthensemiconductor product and process technologieshas been helpful in the past and is even morepromising today, but several measures could helpassure that the program results are timely, useful,and efficient. Industry and lab researchers areinterested in cooperative work, and both see thatthey have much to gain through working together.This enthusiasm is most readily measured by the

measure of the overall success of cooperativeR&D, which will depend on finding the rightmanagement structure, selecting and using appro-priate evaluation criteria, taking steps to improvebusiness plans and industrial strength as well asR&D in weak parts of the industry, selectingappropriate roles and projects for governmentlabs, and providing for adequate funding of thefederal part of the effort.

16 For a more complete discussion of SPCAS, see U.S. Congress, Office of Technolo~ Assessment, op. cit., pp. 101-102

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Chapter l--Summary and Policy Discussion ! 7

itself. The labs take the lead in the negotiations, subject to guidance and review by DOE field offices and,in some cases, headquarters.

It has become common for critics of the DOE CRADA process to compare it with NIST's swifter,simpler one. This comparison is bot h misleading and unfair, partly due to the differences in authorit y ofGOGO and GOCO labs. There are several other reasons for the difference. One is simply that DOE labs’authority to enter into CRADAs coincided with the National Technology Initiative (NTI), a special federalprogram of the Bush administration to stimulate cooperative technology development betweengovernment labs and industry, which generated an unexpectedly large industry interest in CRADAs ata time when DOE and its labs were trying to learn how to manage their new authority. Another factoris magnitude: t he three weapons laboratories are the largest federal laboratories in the country, with acombined budget of $3.4 billion in 1993. NIST's lab budget, in contrast, was $599 million in FY 1993(including the Advanced Technology Program). As of mid-1993, the average DOE CRADA involvedmore than $800,000 in funding; the average NIST CRADA, $200,000. By the end of FY 1993, the valueof DOE’s CRADAs probably will come to around $400 m ill ion, and t he agency has asked for $198 m iIlionin operating funds for DP technology transfer (most of which is expected to go toward CRADAs), asizable program by any accounting. Considering t hat the DOE CRADA program is barely four years old,it is not surprising t hat the agency and labs have had t heir hands full trying to devise adequate oversightand management mechanisms, and that those mechanisms are not yet streamlined.

However, understanding the reasons for the time involved in initiating an agreement with a DOElab and being willing to put up with them are hardly the same. Industry CRADA partners quickly grewfrustrated with what they perceived as a slow, unpredictable process that required a great deal of effortup front and little confidence that any request for joint work would be funded. Bills in both houses ofCongress in mid-1993 aim at streamlining and shortening CRADA approval and negotiation, and theagency and labs continue to try to do so on their own. However, it may still be some time before theprocess can be brought down to DP’s target of four months (if indeed it is done at all), from proposalsubmission tot he beginning of work, even if this Congress does pass a national laboratories bill. As longas t he process remains as lengthy and, from the standpoint of bidders, unpredictable as it is, companiesmay become increasingly disenchanted with working with the DOE labs at all, even with tighter R&Dbudgets.

BACKGROUND OF THIS REPORTOTA was asked by Senator Hollings, in his

capacity as chairman of the Senate CommerceCommittee and subcommittee chairman of theSenate Committee on Appropriations, to examinehow national laboratories could contribute tocommercial competitiveness. The primary focusof the request was on two sets of institutions:laboratories that would be closed or downsized asa result of declining defense budgets, and labora-tories that already are responsible for supporting

commercial competitiveness. At the time, OTAwas working on its assessment Defense Conver-sion: Redirecting R&D,17 which focused mainlyon potential cutbacks and new roles for theDepartment of Energy’s nuclear weapons labora-tories. Both houses of Congress were consideringnew roles for the DOE labs, and there was someconcern that expanding their missions couldcreate redundancies with other laboratories, par-ticularly those of NIST.


OTA agreed to examine these issues in aselected technology area following the release ofDefense Conversion. OTA selected semiconduc-tor technology and hired a contractor, Dr. A.S.Oberai, to assemble a team of industry, labora-tory, and academic experts to assess the work andpotential contributions of the three weapons labs(Livermore, Los Alamos, and Sandia NationalLaboratories) and NIST. This panel toured andtalked with researchers in all four labs18 andprepared draft sections of a report summarizingtheir findings.19 OTA used that report, along withits own evaluations and investigations, to preparethis document.

POLICY ISSUESCongress had two main concerns in requesting

this work. One was that all federal laboratoriesposition themselves to make more effectivecontributions to civilian technology developmentand competitiveness. Another was that unneces-sary overlaps between the work of the DOEweapons labs, which are pursuing civilian tech-nology development more enthusiastically thanin the past, and NIST, which also is managingrapidly expanding missions, be identified andeliminated. In evaluating these questions, OTAidentified several other policy issues that underliethe original two.

I Management StructureIn a CRADA that involves both a company and

a lab doing research and no money changinghands,20 the private company manages its portionof the research, and the public lab manages itsshare. This is the case with most CRADAsunderway at the DOE weapons laboratories andNIST. In the case of DOE, the agency shares withthe lab managers (who are not civil servants)responsibility for overseeing the work of theweapons laboratories. This kind of managementis appropriate for individual projects, but, for alarger, multi-institutional program aimed at a setof objectives as broad and challenging as the SIAroadmap, probably is not adequate to assure themost effective contributions on the part of anyparticipant. Even within the private sector, broad-scale R&D efforts involving many companies—such as the work of SEMATECH or SRC—havemanagement structures that supersede those ofindividual companies. R&D programs that in-clude both government and private researchers injoint projects are rare (more typical is federalfunding of R&D performed by private sector oruniversity researchers), and there are few exam-ples of an effective management structure forsuch an effort. If Congress wishes to allocateadditional resources at the labs21 specifically topursue civilian semiconductor technology devel-opment, it could be well worth the effort to devisea new management structure.

18 Ropaly sp~g, MST is not one laboratory, but eight. Most of the work relevant to microelectronics and semiconductor tec~ology

is carried on in NIST’S labs in Gaithersburg, Maryland, and the panel convened in Gaithersburg to hear about and discuss all NEST’Smicroelectronics work. For the purposes of this report, NIST is refereed to as one lab.

19 o~r~, Op. cit. me draft and fti reports of the panel were assembled and written by Dr. Oberai, using sections tit Were, in some c~es,written by panel members. Neither Dr. Oberai nor OTA represents this contractor report as a complete consensus; there were manydisagreements among panel members, and while most were worked OU6 a few remain.

m Nei~erDOEnor NIST can pay for outside research through aCRADA, Some CRADAS involve industry, or another outside entity, Wrifiga check for R&D done in a lab, but most DOE CRADAS and many of NIST’S involve no exchange of money, The outside partner contributesin-kind R&D, and so does the lab.

21 ~S wo~d include not only the DOE weapons labs and NfST, but possibly other government labs as well. This study could not includeevaluations of all the public or government-owntxi, contractor-operated (GOCO) labs that might contribute to the SIA roadmap, but there areother promising candidates. In 1992, the Army Research Lab’s Electronics and Power Sources Directorate signed 21 CRADAS with totatfunding of nearly $4.4 millio~ some of this work maybe pertinent or adaptable to a government-wide effort to support civitian microelectronicstechnology development. So, too, is some of the work of MIT’s Lincoln Laboratories, which has projects underway in advanced semiconductortechnologies, mostly funded by the Air Force.

Chapter 1--Summary and Policy Discussion ! 9

There is a range of opinion and options on whatsuch a management structure should look like. Atone end of the spectrum is the industry advisorypanel approach, a model with which many ingovernment are comfortable if not wholly satis-fied. Advisory panels are common throughout thefederal government, and they have the advantageof being a relatively quick way of gettingfeedback and advice on the conduct of federalprograms from affected groups. However, few inthe private sector care for this model, and some ingovernment are growing more disenchanted withit. According to critics, advisory panel member-ship is unduly constrained by conflict of interestand financial disclosure regulations that oftenprevent those most interested from serving asadvisors over a reasonable span of time. Anothersource of dissatisfaction, particularly as it appliesin this case, is that advisory panels are just that:advisory. Agencies are free to disregard advicethey don’t agree with or would have a hard timecarrying out, and while that may be appropriate inmany instances, it is an unpromising approach formanaging an extensive, government- and industry-wide effort to advance civilian technologies in thenational laboratories.

Nonetheless, advisory panels have some attrac-tions. More federal programs now aim at further-ing private-sector goals, at least implicitly; with-out input and feedback from company representatives,it is hard for agencies to execute such responsibil-ities effectively. Where advisory bodies workwell, agencies take seriously the counsel of thepanels and yet are not unduly constrained by thewishes of the members, many of whom under-stand the public missions of the agencies imper-fectly, just as federal managers often have a poor

understanding of the exigencies of life in theprivate sector.

A somewhat different approach is being devel-oped in the fall of 1993. Many in both thelegislative and executive branches are interestedin supporting semiconductor technology develop-ment that are broader than SEMATECH or otherpast programs, and better coordinated than previ-ous federal-private technology development. Thedefense authorization bill under consideration inthe Senate in summer of 1993 contains provisionsfor the expansion of the Semiconductor Technol-ogy Council, intended to foster precompetitivecooperation in technology development amonggovernment, industry, and academia, redirectexisting federal semiconductor R&D, and evalu-ate opportunities for new R&D efforts. TheCouncil’s functions include:

advising SEMATECH and the Secretary ofDefense on appropriate technology goals forSEMATECH;exploring opportunities for improved coordina-tion among industry, government, and acade-mia;opening a dialogue on new technology chal-lenges;identifying gaps or redundancies in existingpublic and private R&D programs;assessing the progress of existing R&D interms of the goals of the technology roadmap,and helping to update and implement theroadmap; andmaking recommendations regarding the con-tent and scope of federal semiconductor tech-nology development.

Public officials22 and representatives of indus-try and academia23 would serve on the Council.

22 l%ese would include the Under Secretary of Defense for Acquisition (co-chairman), the Under Secretary of Energy responsible for Scienaand technology matters (a posii[~n that could be created in a couple of different ways in separate legislation), the Under Secretary of Commercefor Technology, the Director of the Office of Science and Technology Policy, the Assistant to the President for Economic Policy, and theDirector of the National Science Foundation.

23 There would be four members prominent in the semiconductor device industry, one of whom would serve, With the Under Swre- ofDefense for Acquisition as co-chairman; two members prominent in semiconductor equipment and materials industries; one member from thesemiconductor user sector, and one member representing an acaduuic institution.


While its role is nominally advisory, the serious-ness with which both Congress and the adminis-tration are taking the effort to create it wouldlikely give the group more power than a govern-ment advisory panel ordinarily has.

That power could evaporate, however, in anadministration with a different outlook and goals.While there have been few precedents, the experi-ence of the National Advisory Committee onSemiconductors (NACS) is instructive. Congressestablished NACS in 1988 24 “to devise andpromulgate a national semiconductor strategy. ’Its powers were confined to evaluation andrecommendation of actions on the part of Con-gress and the President, and like the proposedSemiconductor Technology Council, it had noother control over expenditures or policies. Likethe Council, NACS drew membership fromindustry and government. NACS’ policy recom-mendations were considerably broader than thoseenvisioned for the Council. NACS addressedfinancial, educational, and trade policies as wellas technology development, and it made recom-mendations regarding intellectual property pro-tection and antitrust law and enforcement. NACS,in the succeeding four years, published severalreports, many with strong recommendations foraction, which were mostly ignored. In some cases,not acting on the recommendations turned out tohave been prudent, or at least fortuitous;26 inothers, it might be that the industry would now bebetter off had NACS’ options been enacted. Thelesson is that advisory bodies with no othermanagerial power rely on goodwill and policycompatibility for their effectiveness, and thesechange.

Another management option would thereforebe to construct some kind of public/privatemanagerial body with greater power to affect the

plans, programs, and fiscal commitments of anycooperative efforts to advance semiconductortechnology aimed specifically at following theSIA roadmaps. SEMATECH was set up largely atthe urging of the semiconductor industry, andwhile its funding was half public (through ARPA),the managerial control of the program has beenlargely in the hands of private-sector managers,though ARPA’s influence has always beenstrong. ARPA has an order in place, in the formof a grant, that references and authorizes SEMA-TECH’S annual plan of work. ARPA has someinput to the annual plan, both through SEMA-TECH’S six Focus Technical Advisory Boards(FTABs), which oversee various technology areas,and through a heavy schedule of meetings be-tween SEMATECH and ARPA managers. At theworking level, there is little tension betweenARPA managers and SEMATECH representatives,but, according to one ARPA representative, therecan be tension at the FTAB level, where ARPAsometimes views industry managers as having anexcessively short-term outlook, while industryFTAB representatives have the converse view ofARPA managers.

Nevertheless, the process works, though notperfectly; compromises are forged and generallyadhered to; moreover, SEMATECH itself hasproven effective in helping the U.S. semiconduc-tor industry regain some lost market share andimprove the quality and competitiveness in sev-eral equipment sectors. Over its frost five years,SEMATECH grew to have closer relationshipswith ARPA managers, and ARPA representativesfrequently attended meetings of SEMATECH’svarious technical advisory boards (figure 1-2).ARPA is not represented on these boards, butSEMATECH and ARPA planners meet exten-sively to develop technical plans for SEMA-

U Its Orgafic act was tie Natio@ Advisory Committee on Semiconductor Research and Development Act of 1988 (Public Law 100-410.

25 National AdviSo~ commi~ee on semiconductors, A Strategic fndust~ At Risk: A Report to the President and Congress From theNational Advisory Cow”ttee on Semiconductors (Washington DC: November 1989), p, vii.

26 For exmple, NACS r~ommend~ aggr~sively pursuing synchrotrons x-ray lithography technology in 1989. In the succeeding few IWW

other forms of advanced lithography have shown as much or more promise.

Chapter 1--Summary and Policy Discussion I 11

Figure 1-2—Management and Coordination Structure for SEMATECH

F

SEMATECHs Mission

Board of Directors~ Policyn Funding

( 1

YExecutwe D Technical strategyTechnical Advisory B Priorities

Board

II

■ Program management

Focus Technical Advisory Boards

SOURCE: Avtar S. Oberai, “The OTA Report on Federal Labs and the Semiconductor Industry: Partners inTechnology,” contractor report prepared for OTA, June 1993, p. 67.

TECH’s operation. ARPA’s opinions are re-spected at SEMATECH, though its wishes are notalways implemented. A prime concern of ARPA,for instance, has been what the agency views asSEMATECH’s myopic concentration on near-term technologies; through years of interaction,ARPA and SEMATECH were able to agree that,beginning in 1994, SEMATECH would devote20 percent of its funding27 to longer-term strate-gic projects with new thrusts (design, test, pack-aging, and materials).

Using SEMATECH’s management structureas a blueprint for management of a public/privateresearch effort aimed at the SIA roadmap proba-bly is both infeasible and impractical. The pointof such a research effort is, after all, to developtechniques and technologies that, if they provefeasible, cost-effective, and robust, could beinserted in 5 to 10 years. SEMATECH’s concernsare more immediate, and while nearly everyoneagrees that SEMATECH is the best vehicle fordisseminating technologies that are ready forcommercialization, it may not be the best man-

ager for longer-term projects. Moreover, it is veryrare for private-sector managers to have as muchcontrol over as much public money as SEMA-TECH’S management has had, though the excep-tion has been accepted in SEMATECH’s case.For example, one factor that sets SEMATECHapart from a lab-based public/private program isthat unlike DOE and NIST, ARPA funds but doesnot conduct research internally. Whatever themanagement structure of a civilian semiconduc-tor technology development program, it is un-likely that a wholly or mostly private structurelike SEMATECH’s would prove acceptable tomanagers of federal laboratories, or to theiragencies. Finally, R&D in the four labs isdesigned to fulfill both public and private mis-sions. NIST is chartered to do projects aimedfrankly at civilian industrial concerns, but evenso, there are public missions that NIST mustsatisfy as well. The DOE weapons labs, incontrast, have until recently aimed almost all theirmicroelectronics work at satisfying defense needs,and while some of it is clearly adaptable to

27 ~cor~g t. a ~pre5en~tive of SEMATECH, this m~~ 20 percent of the consortium’s toti b@w4 Or W rnil~on.


civilian concerns, some is not. The end of theCold War does not mean the end of the DOE labs’responsibilities for defense, and the agency andlabs must continue to work on defense electron-ics. It is unrealistic to expect that DOE, or anyother agency whose work could be used in bothmilitary and civilian applications, would bewilling to turn over significant management ofdual-use work to a private-sector team.

The same is true of MST. While NIST has amuch longer history of serving civilian needs,some of NIST’s work is fundamental science,intended to support the U.S. metrology infrastruc-ture on a time scale beyond industry’s immediateneeds. NIST managers, along with others in thescientific community, feel strongly the need toprotect the agency’s freedom to engage in workdeemed technically valuable, even if it has nonear-term commercial application.

Nevertheless, some private-sector involvementconsisting of more than just advice for efforts thatare primarily aimed at meeting commercial needsis desirable in this case. Many options arepossible, but would mostly be a departure fromcurrent practice. If Congress does allocate part ofthe effort of federal laboratories to cooperativework on the roadmaps as a public mission, someattention to devising such a management struc-ture would be worthwhile. One option is, ofcourse, to channel some responsibility for labs’work pertaining only to the roadmaps throughSEMATECH. For example, it might be possibleto invest SEMATECH with handling the handoffsof technology from labs (or lab/industry coopera-tive R&D) to industry when proofs of concepthave been established, and the primary need iscommercialization. If SEMATECH is to havebroader managerial responsibilities, strengthen-ing the influence and power of the federalagencies 28 in the program with SEMATECHmight be desirable (though many in SEMATECH

would oppose this). Another would be to put themanagement of such an effort under the guidanceof the STC, or make one of the Council’s dutiesthe construction of an appropriate managementstructure. An intermediate option would be todevise new mechanisms whereby public or com-pany managers could have stronger influenceover program planning and funding for thecooperative efforts. Perhaps a public/private/labmanagement council could be created with a setof duties much like those of the Council, butgreater power to influence funding or direction ofresearch programs by voting, after carefullyevaluating projects. That, in turn, depends onhaving a reasonable set of evaluation criteriaestablished in advance, along with appropriatemonitoring.

I Focusing the Efforts of the LaboratoriesOTA’s panel of experts concurred that there is

knowledge and technology in all four labs thatcould be (and often is) exploited or adapted by thecivilian semiconductor industry. What is harderto agree on is how large an effort this should be,or how much of the potential trove of technologyto attempt to develop specifically for the needs ofthe industry. To some extent, the question willanswer itself, considering that any company hasaccess to the labs’ technologies through severalavenues, including contract research, CRADAs,interactions among researchers, site visits, andpublications. But that kind of access will not havethe same results as a program targeting a fewproblems that the labs have the best shot atsolving. Moreover, the possibilities of redundantprojects arising at several labs are greater withoutan overall strategic focus.

Already, SIA has identified NIST as theprimary developer of metrology technologies,and although many other labs can play supporting

28 ~S would include M agencies with labs involved in an initiative spedfkally designed to advance civilian semiconductor technology.

For the purpose of this repo~ those agencies include the Department of Commerce (or at least NISI”) and DOE.


roles,29 the choice of NIST as lead metrology labis undisputed. However, there is little consensusnow on which of the other laboratories shouldassume lead roles in other technologies, or evenwhat those technologies should be. There is broadagreement that federal laboratories have a nichein research that is longer-term than industrialR&D and probably not as future-oriented as mostacademic R&D (figure 1-3), but within this broadframework we have yet to select the handful ofinitiatives that show the most promise of yieldingcommercializable results. There is a developingconsensus that advanced lithography is an appro-priate technology for DOE and other labs topursue, though no lead lab has been named; acritical mass of opinion is also forming aroundequipment and manufacturing process modeling,environmentally conscious manufacturing, andcleanup. Again, however, while all the DOEweapons labs are pursuing programs in theseareas, no lead responsibilities have been assigned.

If Congress is interested in authorizing aprogram of shared R&D aimed at furtheringcivilian semiconductor technology, one option isto select only a few key starting technologies fromthe plethora of possibilities and devote seriouseffort to designing appropriate responsibilitiesand management for them. A modest start mightbe frustrating to some, but it will be easier to buildon a smaller, successful approach and the lessonslearned than to make a grand entrance into a newbusiness and risk many failures, always a possi-bility in a new program and a development almostsure to kill promising approaches as well as falsestarts.

Another important step is designating lead andsupporting responsibilities among laboratories.Many of the talents and resources, particularly inthe DOE labs, are complementary, and could be

Figure 1-3-Federal Laboratories’ Role in theTechnology Development Cycle

IIndustry and

ma)>&Qal5yu Federalc laboratories

UniversitiesExo

and SRC

aa

/K 0

00

0 - - - -0

.. . .

/ . .. . .. . . . . . ” ”

0 2 4 6 8 10 12

Years to implementation

SOURCE: Avtar S. Oberai, ‘The OTA Report on Federal Lahs and theSemiconductor Industry: Partners in Technology,” contractor reportprepared for OTA, June 1993, p. 63.

made to work in a synergistic way if managedproperly. DOE headquarters is aware of this, andis trying to formulate appropriate managerialstrategies. For example, in August 1993, DPofficials were negotiating with SRC to coordinatethe labs’ work in advanced lithography. DOE isalso interested in designating lead labs in technol-ogy areas that have garnered a great deal ofoutside interest. Such efforts are a good begin-ning, and encouraging them probably is wise. Inthe absence of higher authorities making sometough decisions about how the labs shouldcoordinate and divide work on civilian technolo-gies, there is a substantial risk that opportunitiesto capture synergies, or to focus the attention ofthe labs on the problems they are best able tosolve, could be missed. There is competitionamong the labs, mostly among DOE weaponslabs (and sometimes other multiprogram DOE

~s Sandia and NIST are already working together on semiconductor issues under a 1993 Memorandum of Agreement (MOA). Under tieMOA, NIST has agreed to develop supporting metrology and associated technology for advanced semiconductor manufacturing tools, assurepurity and assess the composition of materials, and assure manufacturing process reliability, Sandia will develop technologies to eliminatecontamination, work on developing lithography tools, assist with modeling the next generation of semiconductor products, and provide accessto the Center for Microelec@onics Technologies (CMT) to serve as a testbed.


labs), but labs affiliated with other agencies are insome cases vying for “their” share of preciousbudget dollars. Some competition is healthy, but,especially in today’s tight fiscal environment, thedangers of unchecked competition probably out-weigh the merits.

I Evaluation CriteriaIncreasing competition for R&D funding, fed-

eral and private, has bolstered the case fordevelopment of good performance criteria. R&Dis notoriously difficult to evaluate properly. Inputmeasures--e.g. dollars or FTEs30--are often themost readily available measures, but they fail tocapture the quality or usefulness of the R&D.Output measures, often including data or esti-mates of the commercial impact of technologies,or return-on-investment calculations, are unalter-ably judgmental, and are therefore subject tomanipulation or bias. Frankly judgmental ap-proaches, such as Delphi techniques, compensatepartly by relying on many evaluators, and pre-sumably some of these cancel out; however,research and development communities are stillsubject to penchants and fashions, despite thereverence of scientists for objectivity. None ofthis means that thorough, rigorous evaluation ofR&D can be avoided; it means that evaluationcriteria must be developed carefully, appliedrationally, and amended as necessary.

The OTA review panel devised two sets ofcriteria-one for DOE labs, one for NIST--to usein evaluating whatever R&D programs wereundertaken (box l-C). The panel envisioned aphased approach to the DOE labs’ studies aimedat the roadmap. Phase 1 projects include conceptor exploratory work, usually averaging $1 millionto $3 million in size, and aimed at producingtechnologies whose commercialization could begin6 or more years in the future. The panel envi-sioned these as designed to be synergistic withuniversity-based research efforts managed by

SRC, to the extent feasible. Examples mightinclude laser doping, nanometer stage investiga-tion, and low-damage etch processes.

Phase 2 projects would examine technical andcommercial feasibility. These projects wouldaverage $3 million to $10 million, and aim atproducing technologies for commercializationthree to six years out. Phase 2 projects would beexpected to have industry participation (both inconducting and funding the studies), perhapsthrough SEMATECH. The result of a typicalPhase 2 project would be a preproduction proto-type technology, such as a lithography tool, acontamination-free manufacturing system, or TCAD(technology computer-aided design) software.The third phase, insertion and implementation,would involve industry much more than labs,both in terms of time and expenditure (see figure1-4). Phase 3 projects would develop applicationsof generic skills or capacities to solve identifiedproblems on an as-needed basis. Some of the keyevaluation criteria, which the panel called ‘returnon investment, ” address how many projectsprogress from Phase 1 through 3.

These two sets of criteria were apparentlyacceptable to OTA’s panel, and might serve asinterim measures. In OTA’s view, however, thetwo sets of evaluation criteria are mismatchedenough that further effort to develop a moreconsistent set might be warranted. As the listsstand now, DOE’s criteria are mainly output- orprocess-oriented, while NIST’s resemble goal ormission statements more than evaluation criteria,with little obvious avenue for feedback other thanthat provided by MST’s ongoing advisory com-mittees. The lack of more explicit measures ofperformance could be a concern, especially underan expanded, interagency program of cooperativeR&D. Conversely, the criteria as written for NISTgive it a very tough assignment, one that mightnot be manageable within the agency’s budget ina time of tight fiscal discipline.

30 Full.~e equivalents, a measure of Staff time.

..———

Chapter 1--Summary and Policy Discussion 15

Box l-C—Evaluation Criteria for National Laboratories

Criteria for DOE Laboratories

● Industry is involved with the labs and vice-versa. Measures could include:—Number of companies providing resources to the lab programs.-Companies contribute dues (>$10,000) to acknowledge access to the labs’ consulting

capability.—Reasonable attendance (>70%) at quarterly update meetings.—More than three companies provide significant resources per program.-Co-principal investigators from the industry.—Significant fraction (>30%) of the work done at industry sites.

. Positive return on investment. Measures could include:—>20% of Phase 1 programs move to Phase 2.—>25% of Phase 2 programs are commercialized.—Principal investigators are measured on executing and transfer of technology.

. Mechanisms are established to ensure that programs can be killed if industry doesn’t want thetechnology.-Multi-year programs are projected in one-year stages for easy reset.—Industrial partners are signed up within three years.

Criteria for NIST

● Measurement techniques are provided for all key steps of future semiconductor processing(examples: gate oxide thickness, photolithography critical dimensions and overlay, contamina-tion levels, device profiles).

● Standards and services are provided so that industry can calibrate their measurements withNIST.

. Data are supplied for characterization and validation of the various process, device, andpackage technology needed to implement the national roadmaps.

. Where appropriate, NIST provides services to allow the laboratories and industry to domeasurements that would allow participants to compare their performance to that of otherparticipants.

● Program plans reflect the needs and timing of the national roadmap and are kept up to date.

While many of the specific measures suggested ily measured financially), and mechanisms tofor the DOE labs may not be appropriate for insure program termination if the technologyNIST, the generalized criteria-significant con- turns out to be useless to industry--are appropri-tact among lab and industry researchers in proj- ate as a starting point in developing a moreects, positive return on investment (not necessar- consistent list.31 It would also be useful to

SI ~~Y lab ~eprescnfatil,cs me, however, concerned about the last criterion (measures to teITnlIWe programs when indust~ is ‘ot interested

in the technology). Most argue that this provision must be strongly tempered by the labs having flexibility to pursue public missions (includingadvancement of basic sciences, national defense, energy conservation, and the like) even when industry does not foresee commercialapplications. Also, NIST reviewers point out that many of the criteria suggested for DOE labs are already used at NIST, de facto if not formally,There is, according to NIST, already extensive contact between lab and industry scientists and engineers; many NIST projects have beenevaluated in terms of return on investment; and mechanisms are in place to assure termination of unuseful programs.

16 I Contributions of DOE Weapons Labs and NIST

Figure 1-4—Roles of Universities, FederalLaboratories, and Industry in Development

of New Technologies

Distribution of effort

SOURCE: Avtar S. Oberai, “The OTA Report on Federal Labs and theSemiconductor Industry: Partners in Technology,” contractor reportprepared for OTA, June 1993, p. 59.

consider adding standards for project selection, aswell as process and output measures. The task ofdeveloping appropriate criteria for anew programof public/private R&D, unusual as such undertak-ings are, could be daunting, and could requirespecial effort. Several organizations could bedirected to look into the matter broadly (e.g.,developing criteria for all publicly funded R&Daimed at commercial applications) or narrowly(developing criteria for any special programdedicated to advancing commercial semiconduc-tor technologies). Possibilities include the Na-tional Academy of Sciences, creation of a specialcommission or blue-ribbon panel for the purpose,or (narrowly construed) the Council.

I Assuring Effective Hand-offsThe success of the whole public-private coop-

erative R&D effort depends on there being

to Semiconductor Technology

strength on both sides of the relationship. Re-searchers from labs, industry, and universitiesmust have frequent and close contact, and allparties must work to accommodate everyone’sconcerns and objectives in program planning andexecution. This is less likely to happen if one ofthe partners is weak.

The American semiconductor industry and thematerials and equipment industries that support ithave had a turbulent decade. Still consideredglobally dominant in the late 1970s, the industrylost share rapidly in the 1980s in most marketsegments, mostly to Japanese manufacturers.Since the late 1980s, the industry has revived tosome extent, mostly due to private-sector effortsbut also due to a couple of government programs,including ARPA’s funding half of SEMATECHand (though some would dispute this) the Semi-conductor Trade Agreement with Japan (see ch.3). The improvement can be measured in suchterms as the U.S. global share of merchantsemiconductor production,32 which turned up in1990. Similar upturns occurred in several equip-ment sectors as well. All analysts caution thatsome of the upturn in market shares of U.S .-basedproducers is attributable to the fact that theJapanese market, which Japan-based producersheavily dominate, has undergone a deeper andmore protracted recession than the United Statesin the 1990s. However, there is also a broadconsensus that the industry’s revival is also due tomore sustainable bases, like better technologyand greater control and understanding of manu-facturing processes.

Several areas remain weak, however. One ofthe key weaknesses is in lithography equip-ment.33 Lithography, according to SIA, is ‘‘boththe dominant cost factor in wafer processing andthe driving technology for increasing chip func-tionality and, hence, is the primary pacing tech-

JZ Semiconductor s~es we COmrnOnIy measured in terms of merchant and captive sales. Merchant producers are those who sellsemiconductors or devices to users, often systems makers; captive production is intrafirm production in vertically integrated companies.

33 Li~ography is the process by which a pattern is formed in a photosensitive coating that covers a substrate. (SW 1993, Op. cit.) Insemiconductor production it is used to pattern the lines comecdng various devices on a chip.


nology for industry progress."34 Yet the U.S.lithography equipment industry has grown weakerover the past decade, going from a 90 percentglobal market share in 1981 to 10 percent in1991.35 Concern for maintaining a domesticindustry mounted recently as one of the three U.S.companies in the business, GCA, was offered forsale by its parent firm (General Signal) and, whenno buyer made an acceptable offer, dissolved.SEMATECH had, for several years, investedmillions of dollars in GCA, and SEMATECHexperts worked with the company to improve itsequipment. Many agree that these efforts met withtechnical success; GCA’s machine, by 1992, wastechnically comparable to or slightly better thanits competition. However, the company stillfailed.36 While many in the industry attribute atleast some of the failure to management problemsat GCA or its parent company, General Signal, itis also true that lithography equipment is a veryhard business to stay in, even for a well-managedcompany. It demands millions of dollars’ worth ofR&D every year, has a limited market, and issubject to exceptionally fast technological obso-lescence. The two Japanese companies that domi-nate the business, Nikon and Canon, are large,37

horizontally diversified, and vertically integrated,which means that they can cross-subsidize investment-hungry segments like lithography with the profitsfrom less-demanding segments. Added to that isthe fact that, for several decades, capital costshave been lower and investors more patient inJapan than in the United States. Considering toothe technical excellence of the Japanese compa-

nies, it is easy to see why the lithographyequipment business has been so tough for Ameri-can companies.

There are two left: SVGL (Silicon ValleyGroup Lithography) and Ultratech Stepper.38

Ultratech has carved out a market niche in thel-micron range, which is not state-of-the-art inline width resolution but satisfies the require-ments for most of the 25-30 lithography stepscurrently required in most semiconductor produc-tion. The only American company that still is aplayer on the cutting edge of line-width technol-ogy in lithography is SVGL. SVGL resulted fromthe Silicon Valley Group’s purchase of thelithography business of Perkin Elmer, once aprominent manufacturer of lithography equip-ment. SVGL’s new technology, Micrascan, isreportedly very good, and may hold promise forthe next generation of semiconductor technol-ogy. 39 But SVGL is a small company competingagainst larger, better-established businesses withdeserved reputations for technical excellence andoutstanding service. If Micrascan technologydoes not sell adequately in the next couple ofyears, SVGL could go the way of Perkin-Elmerand GCA, leaving the world with three steppercompanies (Nikon, Canon, and the Europeancompany ASM), barring new entrants. SVGL hasalso received funding and assistance from SEMA-TECH and its members, and the effort, along withSVGL’s own expertise, has apparently yieldedgood interim technical results. But SVGL is in themidst of licensing MicraScan technology to Canon,reportedly in return for licensing fees and some

34 SIA, op. cit., p. 8.

~~ Scmlconductor ~dustry Association, Semiconductor Technology: Workshop Worhing Group Reports (Sm Jose, CA: 1993) P. ~~.

36 In 1993, here was some interest in Congress and the Executive branchin mounting a rescue effort for GCA. BY this wfi~g, in fall 1993,the company remains defunc~ and the passage of time will only increase the diftlcuhy of revival.

IT one company official compued Canon and Nikon to their American competition by sawg, ‘‘The R&D budget of Nikon is bigger thanthe annual sales of [the American companies]. ”

N fierc ,Ve also several companies explofig advanc~ fi~omphy, but SVGL and ~~at~h Me tie o~y producers of optical lithography

equipment in the United States.39 fie ~unent ~encration of ]eading.~ge li~o~aphy tec~olo~ m~es l~e-~dths as sm~l as ().35 Mcrons; the next generation, expected

to come on Iinc in the late 1990s, is expected to be 0.25 microns.


help from Canon with manufacturing technol-ogy.40 With the disparity in the size, marketpower, and experience of the two fins, manyknowledgeable observers are concerned that SVGLmay not survive more than a few years.

In many equipment industries-for example,many segments of the textile equipment industry—loss of domestic suppliers has not proven much ofa competitive handicap for American firms. Inothers, the loss of competence and market sharein equipment has cost downstream manufacturersdearly. Semiconductor equipment is probably oneof the latter. Semiconductor technologies changerapidly, and close relationships with equipmentmanufacturers are important considering that afew months’ lead in installing, debugging, andproducing using new equipment can mean asignificant edge in market share. Many Americanequipment suppliers once maintained close rela-tionship with semiconductor and systems produc-ers, relying on customer feedback to help designnew equipment and develop new technologies,but as competitive pressures took a toll, many ofthese ties were frayed. SEMATECH, and its closepartnership with the equipment suppliers associa-tion (SEMI), helped to restore the productive tiesof equipment and chip manufacturers, even inlithography equipment. But unlike in other seg-ments, the efforts in lithography missed the mark.Many reasons for that miss have been advanced;some say that GCA’s machines were too late,becoming available later than promised and aftermajor semiconductor manufacturers had madepurchasing commitments for the current genera-tion of technology. Some regard GCA’s businessplans as weak and the fact that CGA’s newmachines failed to find enough buyers is attributa-ble to a lack of confidence in the company’slongevity (if true, of course, this amounted to aself-fulfilling prophecy). Canon and Nikon, in

contrast, are regarded as reliable, competentcompanies. Whatever the reason, GCA’s failureand SVGL’s modest position in the market meanthat the American stepper industry is still weak,even after a great deal of public and private efforthas been devoted to strengthen it.

There is, as usual, a wide range of opinion onwhat to do. Some would do nothing, assumingthat foreign suppliers will go on being as compe-tent and reliable as they have been. But to others,the issue of relying heavily (perhaps exclusively,depending on ASM’s performance in the next fewyears) on two suppliers, and Japanese suppliers inparticular, is worrisome. While European semi-conductor manufacture has struggled for years togain a larger toehold on global markets, Japanesecompetition in semiconductors has improved atan impressive pace. Japanese merchant semicon-ductor manufacturers held a larger share of theglobal market than American merchant producersuntil 1992, and the gap has been narrow in the lastcouple of years. Canon and Nikon are oftenreported to have closer relationships with theirJapanese customers than with most of theirAmerican customers, for obvious historic, geo-graphic, and cultural reasons. Some openly doubtthat American firms get equipment as early, orcan command the responsiveness to technicaladjustments, that their Japanese customers getfrom Nikon and Canon. Mostly because of theuniquely interconnected networks of businessesthat characterize much of Japan’s economy, someworry that dependence on Japanese suppliers inparticular, and especially in so important a sectoras lithography equipment, could be a significantcompetitive disadvantage.

Public policy has seldom dealt with such issuesparticularly well. No government department canwield the kind of influence over ongoing businessplans and decisions that Japan’s Ministry of

@ me llcem~g a~=ment be~een Canon and SVGL is under review at SEMATECH, and not publicly available as ~s report is betig

written. The terms of the agreement as written above arc what many knowledgeable observers believe to be contained in the agreement.According to one source, not only Micrascan technology but the 193-mnometer process, which has even freer resolution and was origimllydeveloped at Lincoln Laboratories, is also part of the agreement.

Chapter 1--Summary and Policy Discussion 19

International Trade and Industry (MITI) couldwhen the Japanese semiconductor industry and itsattendant equipment sectors were weak. Even if itwere possible, differences in situation and envi-ronment between the United States now andJapan in the 1960s and 1970s probably make theactual public policy decisions of Japan a poorguide. If, as much of the industry’s own analysisindicates, lithography equipment is a key sector inwhich to maintain strength, it would be prudent toconsider all the steps necessary to build thatstrength. Technology policy is almost neverenough, by itself. Though it is not the purpose ofthis report to examine all the policy choices withrespect to key, but weak, sectors, this considera-tion should be prominent in decisions regardinghow the labs can contribute to lithography, andother sectors like it. In short, Congress might wishto consider creating a commission of expertsdrawn from academia, industry, and government,to analyze key factors that account for the declineof the stepper manufacturing sector in the UnitedStates, and to list attendant policy recommenda-tions. This option becomes even more importantif the United States continues to support develop-ment of advanced lithography technologies, as ithas done for many years,

Several agencies have lithography R&D effortsunderway. ARPA has supported advanced lithog-raphy to the tune of $75 million in earmarkedfunds in FY 1993, plus SEMATECH’s expendi-tures on lithography; DOE weapons labs haveR&D efforts underway to support their ownmissions, and NIST has programs designed topermit the domestic semiconductor industry touse lithographic equipment effectively. Whilemost of the work done in the past was in opticallithography, SIA expects some radical shifts inlithography over the next decade or so; examiningnew approaches to lithography will certainlyrequire tens of millions of dollars (and maybemore) annually for several years, Some of the

needed R&D in advanced lithography will becarried on by industry,41 but exploration of newconcepts in lithography (advanced optical, pro-jection and proximity x-ray, e-beam, ion projec-tion, and massively parallel direct write) will notbe supported by the private sector at a levelsufficient to have any assurance of strength inlithography by the turn of the century.

There is keen interest, both in the labs and inthe private sector, in continuing governmentfunding of advanced lithography research. Manyapproaches are being explored; most are far fromeven being in the development phase. Research isneeded to bring one or more to the proof-of-concept stage, or to the point where industry iswilling or able to invest more heavily in technol-ogy development and commercialization (underthe assumption that we are unwilling to riskdependence on foreign stepper suppliers). Tosupport exploratory work in lithography alone, ata level sufficient to give a reasonable chance ofhaving alternatives available as semiconductorline-widths narrow below 0.2 microns, will re-quire tens of millions of dollars of public fundingover the next several years, in addition to what isalready being spent on lithography. An examina-tion of the scope, purpose, and performance oflithography research being done by governmentagencies would also be in order; the investment ofnew money might be smaller if some existingwork could be adapted (without compromisingpublic missions) to better meet the needs ofcommercial stepper technology development. Ex-plicit coordination mechanisms for a multiagencyprogram might also be in order, including DOE,DoD, and NIST at a minimum. Finally, it is worthremembering that even if adequate funding andcoordination are established to advance lithogra-phy technology, these may not be enough toassure that American companies are representedin the stepper business, or that American consum-ers of steppers can reap the benefits of public

~1 For example, four companies—Jamar, Ul@atech Stepper, Intel, and AT& T/Sandia-have CRADAS with Livermore wortig on soft =raY

Il[hography,


funding of advanced lithography research. Explo-ration of additional policy approaches to rebuild-ing a domestic industry might be warranted,especially if public resources devoted to lithogra- ●

phy research are significantly expanded.

I Funding42

None of the four labs being considered in thisreport has adequate funding, under current cir-cumstances, to handle the new responsibilitiespossible in a public/private program to advancecommercial semiconductor technology. In orderto devote resources sufficient to make much of adifference, all of the four would have to eitherhave new money or redirect ongoing research.Some redirection may be possible, especially atthe DOE labs, where missions are changing as aresult of the end of the Cold War and cuts inmilitary programs. Even there, however, thedividend available from cutbacks in nuclearweapons programs is commonly overestimated(barring a revision and reorganization of the labs’defense responsibilities more extensive than any-thing yet done or underway). A close examinationof whether redirecting existing research in thefour labs, or even government-wide, could servecommercial needs adequately without compro-mising public missions could be valuable, butthere is a strong possibility that the answer will beno.

All four labs have many interests and projectscompeting for available resources. NIST has hadsome appropriated funding for semiconductormetrology R&D, but the combination of increas-ing demand for metrology support across a rangeof emerging technologies and federal budgetary

constraints have made it impossible to fully fundthe lab’s requested budget during the last twoadministrations. DOE’s CRADA program, whileit is not the only or the best answer to cooperativeR&D, serves as a useful example of fundingbottlenecks. DOE’s CRADA program has grownvery rapidly for a new program, from $1 millionin 1990 to probably more than $200 million in FY1993. 43 The rapid expansion, along with theprogram’s high visibility,44 made the new activi-ties difficult to manage. DOE’s DP, whichcontrols the largest share of CRADA funds, hasalso devised a proposal screening and selectionprocess that, though aimed at worthy objectiveslike minimizing redundancy and reinforcement ofthe core competencies of various labs, has provedcumbersome and opaque. Equally frustrating tomany companies interested in CRADAs is theamount of time it takes to negotiate an agreementafter the approval is granted. Throughout 1992and 1993, it has taken about four months for DPto approve proposals, and another four months tonegotiate a CRADA (a process in which the labtakes lead responsibility, guided by DOE fieldoffices). One reason for the lengthy selectionprocess is that DOE has been peppered withproposals, so that even with the relatively gener-ous funds available, the agency probably fundsmany fewer than one in ten proposals. At thebeginning of 1993, about half the money avail-able for CRADAs in DP ($71 million) wasalready committed to ongoing projects, andproposals approved in early November (whichhad been submitted in the previous fiscal year, inthe June 1992 call for proposals) accounted forapproximately $40 million more. That left only

42 For ~ expmded discussion of funding issues associated with cooperative R&D at the DOE labs, see U.S. Congress, Offke of ‘TWhnology

Assessment, Defense Conversion: Redirecting R&D, op. cit., pp. 110111.

43 Defe~e pro-s at DOE, which hM more money for CRADAS than any other divisioq has a $141 milhOn appropriation set aside for

cooperative R&D at the weapons laboratories. One other division+ Energy Research also has a setaside for CRADAS; other divisions fundcooperative R&D from program funds.

u me proWm~s “isibfli~ w= the ~sult of many things. One was the National Technology Initiative, a I@ Wency ProW 1a~ched ~

1992 to acquaint potential cooperators (universities and industry) with the opportunities for technology transfer and joint R&D at federallaboratories. Another was the fact that DOE’s weapons laboratories are, by substantial margins, the nation’s larges$ and up until recently, leastknown. Their nuclear weapons missions makes anything they do controversial.

Chapter 1--Summary and Policy Discussion ] 21

about $30 million for proposals submitted in late1993 and approved in spring of 1994. There wasvery little or no set-aside money for CRADAs leftin DP after spring. In fact, there has been verylittle flexibility for DP to fund CRADAs withset-aside money throughout FY 1993, consider-ing that the last call for proposals (which used upall but the dregs of the $141 million) was in late1992. Several semiconductor manufacturers andsemiconductor equipment manufacturers werealready working with the weapons labs, or hadnegotiations underway, but interest in sharedresearch was also burgeoning in spring of 1993,just when funding was drying up. Even at NIST,where CRADA executions are straightforwardand swift, trying to initiate significant amounts ofnew work in one industry area might proveproblematic, given the amount of cooperativework NIST researchers already maintain (NISTreports that it has one CRADA for every fourfull-time researchers).

The above illustration is not meant to implythat CRADAs are the only, or even the best,avenue for the labs to contribute to technologydevelopment. The time and trouble that it hastaken to begin a DOE CRADA has soured manyindustry representatives on the whole process,and many would prefer to use other mechanismsif a new semiconductor technology initiative werebegun. However, unless additional money ismade available (through appropriation or inter-nally, with agency program funds) for coopera-tive R&D and earmarked for semiconductorwork, funding will remain an obstacle.

# OverlapCurrently, there is little concern about redun-

dancy among the four laboratories’ work inmicroelectronics. In some cases, the labs’ corecompetencies are described in similar terms, buton closer evaluation the specifics of the work aresufficiently different that overlap problems havenot arisen. Some of this is due to differences in labmissions--NIST’s primary function is to providemetrology, and its major target audience iscivilian industry, while the DOE weapons labs’missions have concentrated on a variety of othersciences and engineering, primarily for militaryapplications and secondarily to meet the nation’senergy goals. Livermore and Los Alamos wereoriginally designed to compete and to comple-ment each other’s work in physics and nuclearscience, but even there, the differences in whatthey have done and can do best to advancesemiconductor roadmaps are more striking thanthe similarities.

If the labs’ semiconductor work were signifi-cantly expanded, redundancy could become moreof a problem, however. The most expeditious wayto avoid redundancy would be to create, alongwith expanded authority to pursue civilian micro-electronics R&D, the kind of management struc-ture described above. Frequent communicationamong labs, companies, and universities cooper-ating in such an effort can be an effective way ofassuring that needless overlap (some overlap isgood) is avoided.

Laboratory

TCapabilities; 2

he Department of Energy’s weapons labs (SandiaNational Laboratories, Lawrence Livermore NationalLaboratory, and Los Alamos National Laboratory) andthe Department of Commerce’s National Institute of

Standards and Technology (NIST) offer potential for improvingthe competitiveness of U.S. semiconductor manufacturers andtheir suppliers. All four labs have developed strong competenciesin areas the Semiconductor Industry Association (SIA) hasidentified as critical to the future success of the U.S. semiconduc-tor industry, such as lithography, modeling and simulation,environmental safety and health, and equipment design. In 1993,the four labs devoted resourcesmillion to cooperative research(CRADAs) with the commercial

At present, the labs’ workconsisting of numerous small

valued at approximately $115and development agreementssemiconductor industry.with industry is fragmented,projects that build upon the

capabilities of individual researchers or research groups. How-ever, each of the labs appears to have strong capabilities inparticular subjects that could become focal points of their effortsto support the commercial semiconductor industry. NIST isclearly the leader in most areas of metrology; Sandia hasparticular capabilities in equipment modeling and design, as wellas in contamination-free manufacturing; Los Alamos is strong inboth the modeling of semiconductor devices, manufacturingprocesses, and complete factories, and in environmental safetyand health; Lawrence Livermore has particular expertise in softx-ray lithography and materials processing. Already, the labs arebeginning to pursue leadership roles in some areas and coordi-nate their research with the other labs, industry, and universities.

Integrating the labs more closely with industry will not beeasy, though. DOE labs are new to commercial missions and do

24


not operate with the same cost considerations ortime horizons as commercial companies. Suchcultural differences are likely to cause frustrationin joint R&D programs between industry and thelabs. Industry has already found negotiatingCRADAs with DOE labs slow and laborious. Inaddition, the labs have only limited experiencewith the most advanced commercial practices formanufacturing integrated circuits (ICs). WhileSandia has manufactured ICs for defense applica-tions and NIST has provided support in metrology(the science of measurement) to the commercialIC industry for several decades, the labs as awhole have not been operating on the leadingedge of commercial IC production. Los Alamosand Lawrence Livermore boast strong capa-bilities in simulation and modeling, but do nothave extensive experience applying thesestrengths to commercial semiconductor processesand factories. It may therefore take some timebefore their contributions to commercial industrybecome evident in the marketplace.

LABORATORY/lNDUSTRYCOLLABORATION

Both the DOE weapons labs and NIST offersignificant, and complementary, capabilities toaid the U.S. commercial semiconductor industry,While these are not the only federal laboratorieswith capabilities of interest to the semiconductorindustry, they are, for several reasons, the labsmost likely to contribute to commercial missionsin the near term. First, with the decline in nuclearweapons work, the DOE labs may be given newmissions to assist commercial industry throughtechnology transfer and cooperative research anddevelopment, l They are already being encour-aged to work more closely with industry throughCRADAs. Second, NIST has a long history ofworking with industry to develop and disseminate

new standards and measurement methods. In thelast decade, NIST has been given new responsi-bilities to support manufacturing extension pro-grams and commercial technology development.

U DOE LabsThe Department of Energy Defense Program

Laboratories (or weapons labs) were created todevelop nuclear weapons technology. In fulfillingthis mission, the weapons labs developed diversescience and engineering capabilities for produc-ing, testing, and ensuring the safety of the nation’snuclear deterrent. These capabilities, which in-clude specific competencies in physics, chemis-try, materials science, engineering, and computerscience (box 2-A), now form the basis of the DOElabs’ ability to help improve U.S. industrialcompetitiveness in the semiconductor industry.

The weapons labs have experience in nearly allstages of technology development, with thenotable exception of full-scale commercial pro-duction. The labs invented a complete design andmanufacturing process, beginning with detailednuclear and atomic physics and extendingthrough systems integration, for both the nuclearand non-nuclear components of the weaponssystems. Each of the labs played a specific role inthe process. Los Alamos and Lawrence Liver-more were chartered to understand the physics ofnuclear devices and to develop materials technol-ogy in support of the weapons program. SandiaNational Labs was directed to develop the scienceand engineering skills required for the non-nuclear portion of nuclear weapons systems,including custom and radiation-hardened ICs andother electronics.

The weapons labs may be best-suited toaddress research problems that are in the middleof the development cycle-between basic re-search and product development—and that com-

1 Two bills currently under consideration in Congress, H.R. 1432 and S.473, direct the DOE labs to work more closely with industry. TheHouse bill restricts DOE to missions in nuclear weapons, defense, energy, and environmental remediatio~ but encourages greater technologytransfer and cooperative R&D. Tbe Senate bill includes a broader mission statement that explicitly charters the labs to conduct programs ofindustrial R&D.

-,—— .—_——. —— —_

Chapter 2–Laboratory Capabilities 26

Box 2-A—Core Competencies of DOE Weapons Laboratories

Lawrence LivermoreApplied physics, chemistry, and materials science

Plasma, solid-state, and atomic physics andchemistry

Synthesis and processing of metal and alloys,ceramics, and organics

Surface science and processing, adhesion andbonding, microstructural science

Chemical kinetics and synthesisSuperconductivity, materials and mechanismsNuclear chemistryMaterials characterization via synchrotrons radiation,

accelerator mass spectrometry, electron andscanning microscopy, positron spectroscopy, etc.

Measurements and diagnosticsPlasma and high-temperature diagnosticsSurface diagnosticsSensors and detectorsData capture, analysis, fusion, and controlProcess monitoring and controlX-ray micro- and macro-tomography

Computational science and engineeringModeling of solids, fluids, atomic structure at micro and

macro scales, under normal and extreme conditionsConstitutive models for complex materials processingQuantum chemistry, lubrication and bio-molecules on

surfacesEM circuit and electro-optic device designElectricity and magnetism in 3-dimensional Maxwell’s

equations solvers with complex boundary conditionsScientific visualizationImaging and signal processing

Microelectronics and photonlcsHigh-density, high-performance chip packaging

(multichip modules)High-speed electrical and optical data transmissionMaterials and systems reliabilityBand-gap engineering and verificationGas immersion laser doping (GILD)Display technologiesHigh-speed electromagnetic and optical circuit

modeling, test, and diagnostics

Lasers, optics, electro-opticsSoft x-ray lithography systems: x-ray sources, optics,

and materialsHigh-power/high-radiance solid-state lasersHigh-power semiconductor laser arraysOptoelectronics design and development

High-power optical fiber transportLaser processing of materials

ManufacturingPrecision engineeringMetrologyAdvanced design and process engineeringComputed tomography and ultrasoundNon-destructive evacuation

Engineered materials and processesModellng, production, and metrology of multi-layer and

epitaxial materialsAdvanced low- and high-dielectric materialsAtomic, ionic, particle, and photon beam materials

processing and modelingPlasma processing-modeling and validation of

processing methodsAerogels, zerogels, and solgelsMicrostructure: microchannel coolers, actuators,

sensors, and micro instrumentsMolecular dynamic modeling of machined and

deposited microstructure

Atmospheric and geosciencesSeismology and imagingGeochemistryGlobal climate and transport modelingTransport measurements, atmospheric chemistry

Defense sciencesNuclear system designScientific computing of massive problems with

disparate time and distance scalesEnergetic materials and conventional munitionsNuclear measurements and design validation under

extreme conditions

Blosclence/BiotechnologyGenomicsPhysical biologyAnalytical cytologySynthetic and natural biomaterials sciencesMicro-instruments and sensors

Environmental science and technologyU.S. and California compliance and remediation

expertiseMeasurements and sensorsRemediation technologiesProcess developmentsBio, chemical, and radiation dosimetry

(continued on next page)


Box 2-A–Core Competencies of DOE Weapons Laboratories-Continued

SandiaMicroelectronics and photonlcs Physical simulation and engineering sciences

IC design, fabrication, and test Combustion sciencesAdvanced lithography Geological sciencesReliability physics and engineering Experimental mechanicsAdvanced packaging Solid and structural mechanicsCompound semiconductor and strained-layer Radiation transport and above-ground radiation

semiconductor technology testingOptoelectronics and photonics Diagnostics and instrumentationLasers, laser arrays, and associated technology Fluid and thermal sciencesCompound Semiconductor Research Laboratory Nondestructive evaluation

Engineered materials and processesEnvironmental testing and engineering

Synthesis and processing of metals, ceramics, and Research reactor engineering and experimentation

organics Computational simulation and high-performanceCharacterization and analytical technique computing

development Massively parallel computingTheory, simulation and modeling of materials and High-performance scientific computing

processes Quantum chemistry and electronic structureMelting, casting, and joining Computational hydrodynamics, mechanics, andChemical vapor deposition and plasma deposition dynamicsion beam processing and analysis Digital communications and networking

Pulsed power information surety

intense particle beam physicsDevelopment and application of intelligent machines

High-speed switching Signal processing

Intense x-ray physicsRadiation effects simulationPlasma and electromagnetic theory and application

plement the R&D capabilities of industry and ployed almost 25,000 people in 1993. Theiruniversities. The labs have the capabilities and the technical staffs employ more than 11,500 work-facilities necessary to conduct applied research ers, over one-third of whom hold Ph.D. in fieldsprograms and to develop prototypes of new such as physics, chemistry, engineering, mathe-systems for demonstration/validation purposes. matics, and computer science (figure 2-l).This is a mission that industry has slowly Furthermore, the weapons labs are gainingretreated nom, universities have not yet ventured experience in working with industry. Since 1989,into, and government rarely supports, all DOE labs have begun programs of cooperative

Each of the labs has managed and executed R&D with industry. Though implementation oflarge-scale programs requiring large facilities, CRADAs has been slow and frustrating, the threehigh levels of funding, and multidisciplinary weapons labs had signed 179 CRADAs as of Mayscientific expertise. Together, the labs managed 1993, totaling over $235 million of in-kindan operational budget of $3.4 billion and em- laboratory contributions .2 Many of these agree-

2 U.S. Congress, Office of Technology Assessment, Defense Conversion: Redirecting R&D, OTA-ITE-552 (Washington, DC: U.S.

Government Printing Office, May 1993), pp. 104-105.


Box 2-A—Core Competencies of DOE Weapons Laboratories-Continued

Los AlamosNuclear technologies Advanced materials and processing

Nuclear weapons design Plutonium processingReactor design and safety analysis Manufacturing process analysisNuclear medicine Materials modeling (material by design)Nuclear measurements Polymers

High-performance computing and modeling Ceramics

Global environment (climate change, etc.)Metallics

Computational test bed for industry Composites

Massively parallel processing Beam technologiesHigh data rate communication Accelerator transmission of wasteTraffic modeling Laser diagnosticsVisualization Materials characterization

Dynamic experimentation and diagnostics Photonics

Arms control/verificationPhotolithography (x-ray sources)

Global environmentNeutron beam chemistry and physics

Neutron scattering Systems engineering and rapid prototypingMeasurement of explosive phenomena Transportation systemsLight detection and ranging for atmospheric Environmental and energy systems analysis

measurements Lasers manufacturing

Theory and complex systems Accelerator systems

Human genomeTraffic simulationNeural networksNon-linear phenomena

SOURCE: Lawrence Livermore National Laboratory, Uvermore, CA; Los Aiamos Nationai Laboratory, ims Aiamos,NM; Sandia Nationai Laboratories, Albuquerque, NM.

ments cover R&D in fields related to semiconduc- labs’ combined operating budgets remained con-tor technology.

With declining defense budgets, the labs maybe able to dedicate more of their resources tonondefense problems. Already, the portion oftheir budgets directed to defense has fallen. In1993, defense activities at Los Alamos comprised71 percent of its total operating budget, comparedwith 78 percent in 1987; at Lawrence Livermore,defense activities dropped to 67 percent, downfrom 76 percent in 1988; and at Sandia, defenseactivities have declined from 87 percent to 78percent since 1989. Despite these changes, the

stant (in real dollars) during this period,3

9 NISTOriginally founded in 1901 as the National

Bureau of Standards, NIST is the national custo-dian of the fundamental units of measurement.Measurements developed at NIST rest on themost secure metrological foundation possible inthe United States and, in many cases, anywhere inthe world. NIST is legally designated to functionas the lead national laboratory for providing themeasurements, calibration, and quality assurance

3 Ibid, p. 83.


Figure 2-l—Professional Staff of DOE Weapons Labs and NIST by Degree

Masters

6i!iiD868

Bachelors709

None71

Los Alamos

PhD1473

1106

/<---’.

1066

w1400

512

Lawrence LivermoreNational Laboratory National Laboratory

2035

/ - - – ’ ’ . . ,332

411

@

742

95

w

589 1365

404

National Institute Sandiaof Standards and Technology National Laboratories

SOURCE: Avtar S. Oberai, “The OTA Report on Federal Labs and the Semiconductor Industry: Partners inTechnology,” contractor report prepared for OTA, June 1993, p. 27.

techniques that underpin U.S. commerce. Amongother activities, NIST represents the United Statesin international affairs having to do with weightsand measures, provides technical advice andconsultation to other parts of the government, andcooperates with the private sector in the develop-ment of voluntary standards. NIST has developedor improved a large fraction of the measurementmethods used daily by the semiconductor indus-

V .NIST’s mission was expanded in the Omnibus

Trade and Competitiveness Act of 1988 to give ita greater role in stimulating U.S. industrialcompetitiveness. NIST now operates a growingnumber of manufacturing extension centers (nineas of 1993) that bring best-practice manufacturingmethods to small and medium-sized business.MST also manages the Advanced TechnologyProgram, which provides cost-shared R&D grantsto companies and other institutions developingcritical commercial technologies. These extramu-

ral programs have grown from $6 million in 1988to $86 million in 1993.

NIST is smaller than the DOE weapons labs,with a total staff of about 3,200, approximately1,600 of whom are on the technical staff and 800of whom hold Ph.D. degrees. NIST had a totalbudget of $599 million in 1993 (figure 2-2).Congress appropriated two-thirds of this total:$295 million to support MST’s intramural re-search program and construction of new facilities,and $86 million to support ATP and the manufac-turing extension centers. The remainder of NIST’sbudget came from outside sources: other federalagencies that support research at MST; in-kindcontributions of staff and equipment from compa-nies conducting joint research with NIST; andfees from companies using agency facilities orpurchasing standard reference materials.

NIST’s operating budget is likely to growsignificantly in the next four years. The Clintonadministration plans to shift federal R&D priori-

.—


Figure 2-2—NIST Funding By Source, 1993

Illtles

ATP$68

$68Manufac- Fees

turing $39extension

S18

SOURCE: National Institute of Standards and Technology, “GeneralInformation About NIST,” briefing to OTA, March 15, 1993.

ties away from defense and toward commercialproblems. NIST has been targeted as a key playerin a larger civilian effort; its budget may grow bya factor of four, to $1.7 billion, by 1997, ATPwould receive the largest proportional increase,growing from $68 million in 1993 to $730 millionby 1997.

Unlike the DOE weapons labs, which haveonly recently been chartered to collaborate withand support commercial industry, NIST has longhad an industrial mission. In its work with thesemiconductor industry, NIST not only supportsperformance specifications and operation of ad-vanced manufacturing tools, but also provides thestandards and metrology required to assure thepurity and composition of materials used inmanufacturing.

NIST’s intramural research occupies a uniqueniche in the nation’s infrastructure. Most compa-nies do only enough measurement work to solvespecific problems. Academic attention to meas-

urement problems is limited. Many measurementproblems cannot be broken down into smallenough pieces for a student to solve in the courseof a graduate program. Furthermore, in the UnitedStates, there is little perceived professional glam-our in most metrological issues, so professorsusually pursue other topics.

NIST has earned a worldwide reputation forimpartiality and technical excellence. Its compe-tencies in metrology span a number of disciplines(table 2-l). The efficiency of solving a measure-ment problem once at NIST and then disseminat-ing the results throughout the whole industry,rather than each company performing the jobindependently for itself, provides outstandingleverage for NIST’s metrological development.Examples studied in the semiconductor field havebeen estimated to have benefit-to-cost ratiosranging from 5:1 to over 100: 1.4

NIST produces measurement systems and pro-totype instruments as a byproduct of its work andinitiates few projects to develop measurementhardware. Metrological programs are not likesystem development projects in which the endproducts are often the only useful results. MostNIST projects are conducted in cooperation withoutside companies or laboratories, and the contin-uing interaction between the staffs of NIST and itscollaborators transfers useful technology steadilyas the work progresses. Information--not hard-ware-is the usual product. Project objective,organization, and size, staff operating techniques,and the types of deliverables are qualitativelydifferent from those at DOE labs.

SEMICONDUCTOR PROGRAMS ATTHE FOUR LABS

The DOE weapons labs and NIST currentlysupport several programs that address the needs

4 U.S. Department of Commeree, National Bureau of Standards, Natiomd Engineering Laboratory, ‘ ‘Benefits and Costs of ImprovedMeasurements: The Case of Integrated-Circuit Photomask Linewidths, ” NBSIR 82-2458, March 1982; U.S. Department of Commerce,National Bureau of Standards, Planning Office, “Productivity Impacts of NBS R&D: A Case Study of the NBS Semiconductor TezhnologProgram, ” June 1981; Judson C. French, National Bureau of Standards, Electron Devices Sectio~ ‘‘Improvement in the Precision ofMeasurement of Elecrncal Resistivity of Single Crystal Silicon: A Benefit-Cost Analysis, ” report no. 807, Sept. 20, 1967,

31 ! Contributions of DOE Weapons Labs and NIST to Semiconductor Technology

Table 2-1—NISTsS Core Competencies

Measurement servicesCalibrationsReference data and materials

Electronics and electrical engineeringElectronic instrumentationSuperconducting materialsElectric power systemsMagneticsMicrowave components and systemsOptical communicationSemiconductor devicesSemiconductor materialsSemiconductor packagingSemiconductor processesSuperconducting electronics

Manufacturing engineeringFactory automationMechanical sensorsMicroelectronics dimensionsPrecision engineeringRobotics

Chemical science and technologyAnalytical methodsBiotechnologyChemical kinetics and transportFluid flowNuclear chemistryProcess sensingThermodynamics

PhysicsAtomic and molecular physicsChemical physicsMolecular dynamics and theoryPhoton, far UV, and electron physicsRadiation metrology and dosimetryRadiometric physicsTime and frequency standardsX-ray spectroscopy

Computer scienceComputer securityImage recognitionNetworking architecture and protocolsSoftware standards and validationSpeech recognition

Computing and applied mathematicsMathematical softwareNumerical optimizationStatistical engineering

Building and fire researchBuilding fire physicsBuilding systemsEarthquake engineeringFire safety engineeringFire hazard analysisStructural evaluationThermal machinery

SOURCE: Avtar S. Oberai, “The OTA Report on Federal Labs and the Semiconductor Industry,” contractor reportprepared for the Office of Technology Assessment, June 1993, p. 45.

of the U.S. semiconductor industry.5 All threeDOE labs have strengths in high-performancecomputing-originally developed to design andpredict the effects of nuclear weapons—that canalso be applied to device modeling, processchamber modeling, and factory modeling in thesemiconductor industry. Lawrence Livermore’swork in lasers and x-ray optics can help developnext-generation lithography equipment. Sandia,responsible for technologies such as microelectronics-driven guidance and control systems, operates a

state-of-the-art research line that can producesubmicron linewidths on 6-inch wafers. Theselabs can undertake large projects to developsemiconductor technologies and manufacturingequipment, and have expressed a desire to do so.

NIST offers strong capabilities in metrology,including measurements needed to produce moreadvanced semiconductors. NIST has maintaineda program of work in semiconductor manufactur-ing since the late 1950s. The lab has severalefforts underway to support the semiconductor

s This section of the report discusses major semiconductor programs at the labs. For a more complete discussion of lab projects applicableto semiconductor technology, see Avtar S. Oberai, “The OIX Report on Federal Labs and the Semiconductor Industry,” contractor reportprepared for the Office of Technology Assessment, June 1993.

——-. .—. .


industry-for example, new techniques for meas-uring surface characteristics of silicon wafers andthe thickness of thin films deposited on them, anddevelopment of standard reference materials forindustry to use in calibrating its systems. WhileNIST has been named as the lead lab in metrologyissues applicable to the Semiconductor IndustryAssociation (SIA) technology roadmaps, it doesnot have—nor is it likely to be appropriated-theresources to address all requirements. NIST willtherefore need to coordinate with industry andother government agencies capable of conductingcomplementary research, as it has recently donewith Sandia.

If properly coordinated, research efforts atNIST and the DOE labs could complement bothindustry and university R&D efforts. In recentyears, industry has displayed an increasing reluc-tance to invest in new enabling technologiesbecause the R&D is too expensive, too risky, haslengthy payback periods, and requires strengthsin many separate disciplines. This is the area inwhich the labs offer the strongest capabilities.These labs may be most effective as part oflong-term, industry-led efforts that require large,multidisciplinary resources and facilities.

9 Sandia National LaboratoriesSandia National Laboratories operates the larg-

est semiconductor program of the three DOEweapons labs. In 1993, Sandia’s expenditures formicroelectronics-related programs totaled $106million, much of which supported collaborativework with commercial industry. Sandia’s missionhas required the lab to design and manufacturemicroelectronics and photonics components thatwithstand harsh operating environments, such ashigh temperatures and high levels of radiation,and to incorporate them into operational systems.Sandia has also conducted extensive test andevaluation exercises to qualify these componentsfor use in nuclear weapons and to ensure theirreliability in an adverse environment over the lifeof the systems.

As a result, Sandia has considerable experiencein the fabrication of semiconductors and ICs.Sandia was one of the early leaders in CMOS(complementary metal oxide semiconductor) tech-nology, the current standard for commercialdevices, and helped develop the laminar- f l o wclean room, which is now used in most commer-cial manufacturing facilities. In the process,Sandia developed partnerships with defense semi-conductor manufacturers, who often producedICs designed by Sandia and returned them to thelab for final testing and acceptance.

Most of Sandia’s work, however, has beendirected toward the design and manufacture ofICs for defense purposes--ICs not commerciallyavailable. Most of Sandia’s products are thereforeeither radiation-hardened circuits, high-temper-ature circuits, or custom ICs that industry couldnot efficiently produce in small volumes. TheseICs are often about two generations behindcommercial chips in critical parameters such asminimum linewidth, level of integration, andmaximum operating speed; Sandia’s most sophis-ticated ICs are typically those it takes fromindustry and radiation hardens. In addition, be-cause it supplies primarily defense needs, San-dia’s manufacturing processes have not beenrequired to achieve the high levels of productionroutine among competitive commercial semicon-ductor manufacturers.

Nevertheless, Sandia is unique among the DOEweapons labs in that it supports several facilitiesfor R&D and production of semiconductor de-vices. The largest of these is the MicroelectronicsDevelopment Laboratory (MDL). The 74,000-square-foot lab includes 37,500 square feet of clean-roomspace with 12,500 square feet of state-of-the-art,Class 1 clean space in 22 separate clean roomsthat can support individual projects. This designprovides maximum flexibility for new processingequipment and device technologies. The capabili-ties of the MDL were expanded in 1993 by amajor donation of equipment and technologyfrom IBM. MDL now houses a state-of-the-artsubmicron silicon R&D line. MDL’s complete


Box 2-B--Sandia’s Facilities for Microelectronics

In performing its defense mission, Sandia has established several facilities for microelectronicsR&D and production that may be of interest to commercial industry. These facilities address a broadspectrum of issues, from near-term to long-term, and provide, at a single facilit y, the capacit y to design,build, and test ICs and other components. This capability is unique within U.S. government facilities.These facilities are described briefly below.

Microelectronics Design Laboratory

To produce custom designs for its customers, Sandia has developed an integrated approach to thedesign of microelectronic components and systems. As part of these activities, Sandia writes customsupport software, which has become the basis for multiple commercial design packages. Sandia’scapabilities reside in a network of over 60 design stations and servers that can support either classifiedor unclassified projects. The software environment supports the complete design cycle, from photomasklayout to systems simulation. Sandia’s software environment combines circuit-level simulators,logic-level simulations, as well as both analog and digital system-level simulators, with completeverification from chip to multi-chip module to printed circuit board. The software package also combineslayout of photomask with schematic vs. layout checking as well as design-rule checking.

Microelectronics Quality and Reliability Center

Sandia has the facilities and equipment to evaluate and verify the electrical and mechanicalproperties of microelectronic materials. This capability is applied at the parts Ievel through Sandia’sMicroelectronics Quality and Reliability Center (MQRC). Sandia’s reliability physics and engineeringefforts draw upon materials science programs that develop a basic understanding of such failuremechanisms as electromigration or stress voiding, defects in insulators and metalizations, and defectsin semiconductors.

Compound Semiconductor Research Laboratory (CSRL)

The CSRL encompasses the full range of activities--theoretlcal and experimental solid-statephysics, materials science, crystal growth, device and circuit design and fabrication-to develop thenext generation of compound semiconductor electronic and optoelectronic devices. Facilities includeMolecularBeam Epitaxy (MBE) and Metal-Organic Chemical Vapor Deposition (MOCVD) crystal growthcapabilities, ion implantation, and electron-beam lithography in a 6,000-square-foot, class-100 cleanroom with state-of-the-art processing equipment.

Process Design Laboratory (PDL)

This facility for advanced prototype manufacturing is housed in a 100,000-sq.ft. facility andhandles hybrid microcircuits, thin film, printed circuits, ceramics, plastics, and rapid prototyping facilities.The PDL coordinates its activities with an integrated manufacturing technology laboratory at Sandia’sLivermore, California facility. The charter of the manufacturing center is to examine reliability and qualityof manufacturing processes. Particular emphasis is given to automation and robotic hardware. Thisfacility also acts as a proving ground and design center for custom sensors. Additional emphasis isplaced on novel approaches to joining and sealing dissimilar materials that have particular relevanceto advanced packaging. Collaborations with the Iaccoca Institute at Lehigh University on Americancompetitiveness allow the PDL to support empirical investigations of manufacturing issues such ascontrol and optimization of material flow and workspace organization.


Figure 2-3—Sandia’s Ongoing Programs in Semiconductor Technology

Basic Required competencies

Roadmap CFM Modeling Sensors Quality Material Software Metro logy

for OTA, June 1993, p. 30.

equipment set supports the total semiconductordevelopment cycle. Other Sandia facilities sup-port work in materials quality and reliability,compound semiconductor materials andand process design (see box 2-B),

Commercial Semiconductor ProgramsMany of Sandia’s ongoing programs

vant to the commercial semiconductor

devices,

are rele-industry

(figure 2-3). Over the past few years, Sandia hasinitiated a number of new programs specificallytargeted at commercial manufacturing. CRADAsare an important part of this process. As of August1993, Sandia had signed 19 CRADAs related to

semiconductor manufacturing (table 2-2), a figurethat represents about one-third of all CRADAsunderway at Sandia. DOE’s total contribution tothese projects over their lifetime is estimated at$220 million; the annual contribution is approxi-mately $63 million.

The largest of Sandia’s CRADAs is a five-yearagreement with SEMATECH. Sandia has beenworking with SEMATECH for about four years inequipment design and modeling and in technol-ogy development. Initially, Sandia’s cooperationwith SEMATECH operated under a work-for-others contract in which all the work was con-ducted by Sandia personnel at the lab and was


Table 2-2—Major Sandia CRADAs in Microelectronics

Project title DOE funding ($K)

Soft X-ray Lithography ToolsMicroelectronics Packaging BenchmarkAdvanced Diffusion Barrier TechnologyReduced Lead Loss in Electronics ManufacturingMaterials Processing at High Temperature/VoltageMicroelectronics Quality/Reliability

Copper-chemical Vapor Deposition for ICs

Printed Wiring Board Interconnects

Application of IRIS to Semiconductor Plasma Processing

Synthetic Diamond for Multichip ModulesFabrication of Microreactors in Silicon

Gold-sulfite Electroplating

SEMATECH Program (integrated)Stable Housing for X-ray LithographyAdvanced Materials for High-performance DigitalAdvanced Intermetal Dielectric TechnologyFerroelectric Read/Write Optical DiskHigh-throughput Rotating Disk ReactorsAdvanced Manufacturing Techniques for Monolithic Multichip Modules

Total

9,286250

1,950570

2,3083,1301,1105,230

4201,250

295447

22,5001,1505,1002,1001,6001,9502,300

$62,946

SOURCE: Charles Fowler, Manager, Technology Transfer, U.S. Department of Energy, personal communication, Aug.10, 1993.

paid for by SEMATECH. Sandia then signed aone-year CRADA with SEMATECH, which wasfollowed in mid-1993 by the larger, multi-yearCRADA. This five-year, $113-million CRADAcontains some 19 individual projects. Sandia’sannual contribution to the CRADA will average$22.5 million.

The bulk of Sandia’s microelectronics workwith industry can be divided into three primaryareas: semiconductor equipment design/improve-ment, contamination-free manufacturing, and pilotline services, most of which are coordinatedthrough the Center for Microelectronics Technol-ogy (CMT). Many of these programs are gearedtoward design and development of semiconductormanufacturing equipment, a task that is suited tothe lab’s technical workforce, over 60 percent ofwhom are engineers. Sandia has long had theresponsibility for integrating new manufacturingtechnologies into DOE’s weapons productionfacilities and may be able to apply such skills tocommercial manufacturing processes as well.

Pilot Line Services-The focus of Sandia’sindustry-related work is the CMT, which DOEestablished to serve as a facility for industry-relevant research and development, includingmaturation of research concepts into manufac-turable technologies. This facility is also designedto develop and test next-generation equipmentand associated processes. CMT is supported by alarge range of semiconductor and microelec-tronics capabilities and projects, and is associatedwith Sandia’s MDL. Through CMT, universityand industry researchers can gain access to thepilot line housed in MDL. This pilot line dupli-cates the equipment and processing capabilitiesfound on an actual IC manufacturing line. Engi-neers can use the line to test and optimize newprocesses before launching into full-scale produc-tion on their own lines

Sandia hopes that the CMT pilot line willreduce the time and money semiconductor manu-facturers must invest in R&D for new generationsof process technology. These burdens have forced


even large semiconductor manufacturers to formstrategic alliances with competitors in order toshare R&D costs.6 The pilot line donated by IBMincludes equipment worth over $20 million andan estimated $60 million of process technology.The line offers state-of-the art processing capabil-ities, such as a GCA I-line stepper capable of0.35-micron minimum feature sizes. Sandia plansto integrate its electron-beam and soft x-raylithography modules into the line and upgrade allof the equipment to 8-inch wafers, giving them aresearch line capable of O. l-micron linewidths onselect features. This equipment coupled withSandia’s current 6-inch wafer, 0.5-micron fabri-cation facility (or fab) will provide a research lineservice not found anywhere else within thegovernment research community.

Equipment Design and Modeling—in August1989 Sandia established the Semiconductor Equip-ment Technology Center (SETEC) to help designand improve semiconductor manufacturing equip-ment. SEMATECH was originally the sole spon-sor of the program, providing $12 million over 30months for ‘‘direct support to U.S. companiesengaged in the design and manufacture of ICmanufacturing equipment and materials. Since1991, SEMATECH and DOE have jointly spon-sored SETEC through a CRADA, each contribut-ing an average of $6 million per year.

SETEC projects are directed toward develop-ment of equipment models to enhance the per-

formance of future-generation equipment, devel-oping design-for-reliability methodologies, andequipment benchmarking. Semiconductor equip-ment costs are increasing at an extremely fast rate.Today’s new semiconductor factory will costover a billion dollars-three-quarters of which isdue to the cost of machinery and equipment.8

According to current projections, future factorieswill not yield an adequate financial return unlesssignificant advances are made in equipmentreliability and design9.

One SETEC project, the Reliability Analysisand Modeling Program (RAMP), which is jointlyconducted with seven equipment manufacturers,developed software for modeling the reliability oftheir equipment, including mean time beforefailure, life cycle cost, and reliability improve-ment. Such analysis allows manufacturers toredesign equipment so as to improve its perform-ance. Since the project was completed in early1992, over 150 copies of the RAMP softwarehave been distributed to a wide range of equip-ment suppliers. Sandia trained 200 people to usethe software.

In another SETEC project, Sandia is modelingplasma etch and deposition equipmentlO. Al-though plasma processing is the method of choicefor most etching and deposition steps, the physi-cal characteristics of plasmas are not well known,making them difficult to predict and control.Understanding the mechanism for transferringions to the silicon wafer requires knowledge of

b For example, in the last few years, IEM, Toshiba, and Siemens have agreed to jointly develop technologies to produce 256M DRAMs,and Intel has teamed up with Sharp to develop flash memontxi using 0.6- and 0.4-rnicron processes.

7 { ‘Sandia Natio~ ~boratories Complete Intitial SETEC Program/Sign New Work Agreement With SEMA~m,” SE~ECH

Communique, MaylJune 1992, p. 68 Semiconductor Industry Association Annual DateBook: Global and US. Semiconductor Competitive Trends, 1978-1991 (San Jose, CA:

Semiconductor Industry Association 1992), p. 389 Semiconductor Industry Associatio& Semiconductor TechnologpWorkshop Working Group Reports (San Jose, CA: Semiconductor

Industry Association, 1993), p. 14.10 A pla5ma 15 an io~zed ga5eous disc~ge in which there is no resultant charge, the number Of Positive and negative io~ ~i~ ~ti.

Plasma processing occurs in a reactor, sometimes called a cell, where a high level of control is exerted over the gas temperature and electricalinputs. Plasmas can be used to etch or remove material from, the patterned surface of a wafer, opening up windows that allow the electrica3properties of the silicon in the patterned areas to be changed in subsequent steps. Plasmas can also be used to deposit layers of material on awafer.


gas chemistry, cell structure and design, and theeffects of temperature. Through SETEC, Sandiais attempting to use a supercomputer to developand verify a basic model of plasma etching, afterwhich it will modify and reduce the code to run onindustry-standard mini computers. If successful,the model will reduce from years to months thetime it takes equipment makers to bring newdesigns to market, while improving the uniform-ity of the etch (or deposition) and machinethroughput.

A third SETEC project aims at developing amagnetically levitated stage for a wafer stepper.This technology would allow manufacturers toimprove the alignment capability of their lithog-raphy equipment. To make complex ICs, patternsmust be aligned to within about one-third of theminimum feature size. As linewidths narrow,overlay requirements tighten accordingly. Forcurrent ICs with 0.5-micron linewidths, patternsmust be aligned to within 150 nanometers (rim);by 2001, the overlay requirement will be 50 to 70nm. ll Current technologies may not be able to

meet such strict requirements, but proof-of-concept versions of the magnetically levitatedstage have demonstrated alignment within 20 nm.Coupled with a new interferometer under devel-opment at Sandia, the stage could achieve 0.5-nmstability.

Contamination-Free Manufacturing--Sandia es-tablished a Center for Contamination-Free Manufac-turing (CFM) through a CRADA with SEMA-TECH in 1992. The center conducts and coordinatesresearch in cost-effective contamination-free man-ufacturing technologies involving feature sizes assmall as 0.2 microns and removal of defects assmall as 0.01 microns (the size of bacteria). TheCFM uses Sandia’s MDL to conduct experimentsthat verify advanced semiconductor manufactur-ing concepts and to develop equipment that

reduces the levels of contamination in integrated-circuit manufacturing. Research focuses on theeffects of electrostatic fields, chemical particu-late, thermal radiation, and electromagnetic radi-ation (including light) on circuit yield and per-formance.

Contamination is a primary cause of reducedyields in semiconductor manufacturing. Impuri-ties can arise out of processing chemicals, waferhandling systems, process chambers, and air inthe factory. As IC feature sizes become smaller,manufacturers must try to simultaneously reducethe density of defects on a wafer and their size. In1993, manufacturers could typically tolerate ap-proximately 30 defects on a 6-inch wafer; by1998, the defect density must be reduced to 20defects per 8-inch wafer; and by 2004, it must bereduced to Just 5 defects per 16-inch wafer.12

Whereas in the early 1990s 1-micron contami-nants were of little concern, current manufactur-ing practices cannot tolerate defects larger than0.1 micron, and defects down to 0.01 micron arequickly becoming a problem. Particles of this sizecannot be seen optically and are otherwisedifficult to locate on a wafer. New techniquesmust be invented to detect them.

CMT currently consists of seven projects,which fall into four categories and are included ina 1993 CRADA between Sandia and SEMA-TECH. In one project, Sandia is developingsensors for detecting contaminants generatedduring wafer processing. These sensors willenable manufacturers to detect contaminants inreal time, allowing for immediate correctiveaction before fabrication is complete. The sensorswill have to be rugged enough to operate in harshprocessing environments and be able to monitorgas and chemical purity for unwanted moistureand other particulate at the few parts-per-billionlevel.

11 ‘rhjs is roughly tie diameter of 150 to 200 atoms. Semiconductor Industry Association, Semiconductor Technology-Workshop workingGroup Reports (San Jose, CA: Semiconductor Industry Association 1993), p. 37.

lz Semiconductor Indus~ Association, Semiconductor TechnologyWork.rhop working Group Reports oP. cit.> P. 3.


Table 2-3—Los Alamos CRADAs in Microelectronics


Supercritical C02 Cleaning of Particulate $1,766

Electromagnetic Simulation: High-frequency Computer Circuit Calculations 454

Conductive Oxide Electrodes for Ferroelectric Memory Development 559

Modeling and Simulation of Electronic Devices 2,770

High-temperature Superconductor Devices 3,875

Diamond Technology for Particle and X-ray Detectors 520

Total $9,944


Another type of sensor is being developed formicroenvironments. Microenvironment are smallplastic containers used to protect and transportwafers between processing steps. Usually thesame container is used to transport the same set of25 wafers from the time they are shipped to thefactory until wafer processing is completed.Microenvironment can be a major source ofcontamination, especially if a film is introducedinto the container or if the plastic walls of thecontainer begin to out-gas. The film and/or gashas the potential of ruining all 25 wafers. Forwafers containing 100 microprocessors valued at$300 each, the loss of just one container costs$750,000.

Sandia engineers are investigating two ways ofmonitoring the microenvironment. The first usesthe wafers themselves as sensors. Silicon wafersdemonstrate a property called total internal reflec-tion. Light directed into a clean crystal will reflectoff the inside walls without any loss of intensity.Thus, the microenvironment can be tested byshining light through a window in the wall. Theother method of testing the environment uses anelectrical vibrating crystal to generate a surfacewave across the wafer. Contaminants will retardthe wave progress along the wafer.

Other CFM projects include an evaluation of ahigh-frequency ultrasonic (or megasonic) clean-ing mechanism for wafers and several modelingprojects that attempt to predict the generation ofcontaminants during wafer processing and find

ways to remove those particles before they reachthe wafer.

1 Los Alamos National LaboratoryLos Alamos does not have a history of IC

fabrication, and its R&D programs in semicon-ductor technologies are more limited than San-dia’s. As a result, Los Alamos has had lessinteraction with industry in developing semicon-ductor technologies. In August 1993, Los Alamoshad six active CRADAs related to microelectron-ics, totaling almost $10 million of in-kind labora-tory contribution (table 2-3). The number ofongoing programs at Los Alamos that are relevantto the SIA roadmaps is small compared withSandia (figure 2-4).

Nevertheless, the lab’s people and facilitiesconstitute several strong core competencies im-portant to semiconductor manufacturing. Thosein which Los Alamos could play a lead roleinclude computer-aided design (CAD) for semi-conductor devices and circuits, the materials fromwhich they are made, and the processes used tomanufacture them; modeling of semiconductorfabrication facilities; and environmental safetyand health (ES&H). Los Alamos’ experience withbeam technologies could also give it a supportingrole in lithography and materials processing.

Modeling and SimulationModeling and simulation based on high per-

formance computing is a particular strength ofLos Alamos, The lab may be able to play a lead

39! Contributions of

Figure

DOE Weapons Labs and NIST to Semiconductor Technology

2-4-Los Alamos’ Ongoing Programs in Semiconductor Technology

Basic Required competenciesRoadmap CFM Modeling Sensors Quality Material Software Metrology

Chip Design& test

Processintegration

Li thography

mal“g Interconnect

~E Materials && bulk processes

&~ E n v i r o n m e n t a l~ safety & healtho

“# Manufacturingn systems=

Process/devicestructure CAD

Packaging

Equipmentdesign & modeling

. .

A.technology [

I I I

j.:.~f] App[iedwronrnental ;:::;:;;;:

Global Environmental

modellng_l’-

sensor . . . . . . . . .)chnologies development Jjj!$”;

I I ,::,. j,,:::,:,.::,:.:,

SOURCE: Avtar S. Oberai, “The OTA Report on Federal Labs and the Semiconductor Industry: Partners in Technology,” contractor report preparedfor OTA, June 1993, p.37.

role in the development of tools for modeling ICwafer fabrication processes, an area called Tech-nology CAD, or TCAD. Los Alamos is alreadyworking with the Semiconductor Research Cor-poration (SRC) to define its role in the develop-ment of TCAD technologies.

Los Alamos performs extensive modeling ofmaterials to atomic detail. This work can contrib-ute to both the device and process modeling needsof the semiconductor industry. The lab is devel-oping detailed three-dimensional simulations fordevices and circuits to account for the interactionof materials, geometry, and packaging. Thesecomputer codes are designed to predict the

performance of advanced devices for whichconventional simulations are inadequate. Thegoal of this work is to provide validated designtools for future generations of devices and cir-cuits.

Los Alamos has specialized modeling andsimulation capabilities that, when used in con-junction with the capabilities of the other labora-tories, can address the needs for process modelingand can contribute to the design of improvedprocess chambers. For example, chemical vapordeposition (CVD) technology is used widely todeposit materials such as oxides and nitrides ofsilicon on wafers in the production of ICs. The


design of CVD chambers can be improvedsubstantially by modeling and simulation, therebyimproving chip yield and cost.

Los Alamos’s modeling capabilities can alsobe applied to the analysis of complete factories.Such models would allow a full semiconductormanufacturing process to be simulated, includingproduct flows, waste generation, and cost. Suchcodes may be important in analyzing the cost offuture semiconductor fabrication facilities. Thecost of building and equipping a new integratedcircuit factory today is projected to be over abillion dollars. Even after production starts, itusually takes six months before yields are highenough to make a profit. In order to gain andmaintain leadership in semiconductor sales, theindustry is striving to offset these costs byimproving productivity, increasing quality, andreducing cycle times13.

Factory modeling has only recently been ap-plied to semiconductor facilities 14. One reason forthis delay is the sheer complexity of the manufac-turing process. Random yields, diverse equip-ment characteristics, unpredictable equipmentdowntime, material flows, and the problemsinherent in using a single facility for bothproduction and research have made modelingdifficult. Moreover, most of the more than 300steps required to produce a single IC require highlevels of precision and process control. Between80 and 100 different machines may be used on atypical production line. Collecting process data ateach of these stations requires large computingresources: approximately 240,000 transactionsoccur each day in a wafer fab.

In support of DOE’s efforts to consolidateweapons production facilities, Los Alamos cre-ated custom simulations for each DOE manufac-turing plant. In addition to performance parame-ters such as throughput and cycle time, thesimulation tracked all material flows, waste

streams, and worker exposures. Though not yettested in the semiconductor industry, these capa-bilities could help semiconductor manufacturersbetter plan their production facilities (box 2-C).

Los Alamos’ modeling capabilities are madepossible by extensive computing facilities. InDecember 1991, DOE named Los Alamos one oftwo national High-Performance Computing Re-search Centers (HPCRC). The HPCRC willattempt to promote technology transfer in ad-vanced computing to industry, academia, andother laboratories through the operation of acomputational laboratory, the Advanced Com-puting Laboratory (ACL). These facilities canmake important contributions to the semiconduc-tor industry in TCAD.

Environmental Safety & HealthLos Alamos currently plays a lead role in

DOE’s program of environmental remediation. In1993, the lab budgeted almost $200 million forenvironmental cleanup. While much of this pro-gram is tailored to clean-up of nuclear wastes, anumber of projects address issues of interest to thesemiconductor industry. For example, Los Alamosis working with the Joint Association for theAdvancement of Supercritical Fluids to findalternatives to solvents used for precision clean-ing in the electronics industry. Through the DOEIndustrial Waste Reduction program, Los Alamosis researching ways to recycle metals from wastestreams. Los Alamos’ Life Cycle Activitiesproject supports work with the Microelectronicsand Computer Technology Corporation (MCC)on recyclable workstations and with Motorola onmaterials return and reuse. The lab is also workingwith the EPA, the American Electronics Associa-tion, and other DOE labs to develop an informa-tion retrieval system to access environmentalinformation of relevance to industry. Finally, thelab is working with the American Electronics

I ~ R. L~zsoy, C, be, L, Martin-Vega, “A Review of Production Planning and Scheduling Models in the Semiconductor Industry, Part I:Systcm Characteristics, Performance Evaluation and Production P1arming,” IIE Transacn”ons, vol. 24, no. 4, Sept. 1992, p, 47.

IJ Ibid.


Box 2-C-Commercial Application of Los Alamos’ Process Modeling Capabilities

Though Los Alamos has not yet applied its factory modeling capabilities to a semiconductor plant,its experience in other portions of the electronics industry demonstrates the efficacy with which codesdeveloped for defense applications can be used to solve commercial problems. One example is LosAlamos’s work with Quatro, a small New Mexico business that manufactures printed wiring boards. Inthe United States alone, the market for printed wiring boards was estimated at $5.5 billion in 1993. Salesby U.S. companies were estimated at $2 billion.

Quatro wanted to build a printed wiring plant that was economically competitive internationality andenvironmentally benign. The company approached both Sandia and Los Alamos in early 1992 torequest help finding a commercially available software package for the factory design. Upon furtherinvestigation it was found that any commercially available package would require an extensive effort tomodify to include environmental considerations and worker exposure. Thus the company turned to LosAlamos for the simulation.

Applying previously developed code, two engineers--one from Los Alamos and one fromQuatro--worked only eight hours to develop a baseline system that accurately portrayed Quatro’sexisting production facility. With the baseline completed, the engineers used the simulation to optim izethe factory’s 120 machine processes. Because of federal and state environmental regulations, pollutionprevention was a primary concern. Employing the tool, the engineers were able to completely eliminatemany hazardous materials from Quatro’s waste stream, including 1,560 pounds of chelated copper, 312pounds of formaldehyde, and 1,200 pounds of tin and lead per year. Through recycling, the new factorywill save on the transportation costs of 63,600 gallons per year of spent etchant, and water use will bereduced to one-third its original level.

The project was completed only 18 months after Quatro decided to undertake the plant study.Without Los Alamos’ assistance and code, the baseline system itself could have taken a full man-yearof effort to design. As it is, the plant simulation, plant design, detailed costing, and blueprints arefinished. The company is currently seeking a combination of private and public funding (about $5 million)to build and initiate operations. Quatro estimates its plant modernization program will substantiallyincrease the number of jobs in the company.

Association to develop alternative manufacturing etching systems that may be of value in thetechnologies for manufacturing printed wiringboards.

Applications of Beam TechnologiesAnother area in which Los Alamos can make a

special contribution is in the application of beamtechnologies (laser beams, electron beams, andion beams) to semiconductor manufacturing. Forexample, Los Alamos is developing intense softx-ray sources based on linear accelerators. Thesesources can generate light with a wavelength of13 nm for use in projection lithography systemscapable of drawing O. l-micron linewidths. LosAlamos is also working on large-scale ion-beam

low-cost manufacture of high-density microelec-tronics packaging (such as multichip modules).These systems potentially offer high levels ofthroughput at low cost.

Other applications of ion beam technologycould allow thin films to be deposited onto siliconor gallium arsenide wafers with greater efficiencythan is possible using commercial laser technol-ogy. Still other work is pursuing an ion implanta-tion technique based on plasma immersion proc-esses that allows shallow doping of large areas ofsilicon. Such processes may become important inthe development of multiple-layer ICs. Thoughstill in the laboratory stage, Los Alamos hopes to


form an industry partnership to build a prototypesystem.

Los Alamos has been working with energeticbeams of neutral (uncharged) particles for etchingand thermal processing. Neutral beams are supe-rior to ion beams for etching feature sizes lessthan 0.5 micron because they cause less structuraldamage to the substrate material.15 Neutral beamscan also grow insulating layers while avoidingmany of the problems associated with thermaletching processes.

16 Los Alamos would like to

team with an industrial partner active in chipprocessing to create prototype production equip-ment using hot neutral sources.

9 Lawrence Livermore National Laboratory(LLNL)

Like Los Alamos, Lawrence Livermore has notmanufactured ICs as part of its mission. The labdoes, however, run several R&D programs insemiconductor technology that contribute to por-tions of the SIA roadmap (figure 2-5), Of LLNL’s$1 billion operating budget in 1993, approxi-mately $80 million supported R&D in areasrelated to semiconductor technology. In addition,LLNL, like the other DOE laboratories, hasexpanded the scope of its cooperative R&D withindustry, By the end of 1992, LLNL was contrib-uting $72 million to 84 cooperative agreementswith industry; over $30 million was for CRADAsin microelectronics (table 2-4)

The areas in which LLNL is most capable ofcontributing to the SIA roadmaps are in x-raylithography, IC packaging, and other applicationsof laser technology. Lawrence Livermore hasdeveloped world-class scientific and technicalexpertise in high-power lasers and electro-optics.The lab has extensive experience in the technol-ogy of laser-generated soft x-rays, soft x-rayoptics and diagnostics, and precision metrology.

LLNL has also worked on applications of lasertechnology to doping semiconductors. Most ofthis work is conducted at the Center for Applica-tions of Laser and Electro-Optic Technologies(CALEOT), which maintains 20,000 square feetof laboratory space for R&D on advanced lithog-raphy and on laser material processing

Soft X-ray Projection LithographyLLNL has a number of programs in soft x-ray

projection lithography that could enable it to takea lead role in a larger, national x-ray lithographyprogram, The appeal of soft x-ray projectionlithography as a lithographic strategy for U.S.industry derives largely from its potential toproject features of 0.1 micron or smaller. Thisreduction in size could provide a 25-fold im-provement in integrated circuit density by the endof this decade.

LLNL, Sandia, Lawrence-Berkeley Lab (LBL,another of DOEs multi-program labs), and indus-trial organizations are building the prototypesystems. AT&T and LLNL devoted about $8million between 1989 and 1992 to develop andcharacterize high-performance coatings for themultilayer mirrors that direct the x-rays from theirsource to the mask. LBL and LLNL have spent $4million on x-ray interferometry systems to meas-ure the characteristics of x-ray optics. GCA-Tropel has submitted a CRADA proposal to thelabs to further pursue this work. LLNL andMicrion Inc. have devoted about $2 million tomask patterning, damage, and repair studies.AMD, DuPont, KLA, and Micrion have submit-ted a CRADA proposal to LLNL to developdefect-free coating technology and inspection andrepair capabilities. Ultratech Stepper and Jamaralso have CRADAs with LLNL in soft x-rayprojection lithography.

15 Ion km Can bre~ down tiin insulating layers of material and build up charge in localind areas, causing deformation of the side wallsetched into the substrate,

16 IR g~hm arsenide devices, for example, thermal processes used to grow a layer of oxide can result in the fOrInatiOn of metallic arseniCand can induce disorder in the lattice structure of the substrate.

43 I Contributions of DOE Weapons Labs and NIST

Figure 2-5—Lawrence Livermore’s Ongoing

to Semiconductor Technology

Programs in Semiconductor Technology


Roadmap CFM Modeling Sensors Quality Material Sof tware Metro logy

%“a Interconnect I

I syslems N l—l

I I I I IY I

I I

SOURCE: Avtar S. Oberai, “The OTA Report on Federal Labs and the Semiconductor Industry: Partners in Technology,” contractor report preparedfor OTA, June 1993, p. 44.

Additional lithography research is being con-ducted by LLNL’s Center for Applications ofLaser and Electro-Optic Technologies (CALEOT).Lasers developed by the lab were to be used byHampshire Instruments to support work in prox-imity x-ray lithography and could supplant ex-cimer lasers used for UV lithography systems.The company folded before the project could becompleted. The solid state glass laser developedby CALEOT is being inserted into a state-of-the-art commercial lithography system.

Laser Applications: Gas ImmersionLaser Doping (GILD)

Lawrence Livermore National Laboratory andStanford University are working together on aninnovative doping process which significantlyreduces the number of steps required to makeintegrated circuits. The process, called Gas Im-mersion Laser Doping (GILD), replaces currentlyion implantation processes and, in practice, canreduce lithographic processing steps (among themost expensive in a fabrication facility) by 46

. .

Chapter 2–Laboratory

Table 2-4—Lawrence Livermore CRADAs in Microelectronics

Capabilities 44


Cost-Effective Machining of Ceramics 1,646Interconnects for Multichip Modules 2,817Computer-Aided Design of Plasma Etch Reactors 4,800

Compact Soft X-ray Exposure System 10,458Fabrication of Non-Planar Devices 1,065

Soft X-ray Projection Lithography 9,800

Total $30,586


percent--cutting costs while improving yield anddevice performance.

GILD uses a relatively simple process todiffuse dopant atoms into a silicon wafer. Asilicon wafer is immersed in an atmosphere ofdopant gas. An excimer laser beam is thendirected through a patterned mask, melting thewafer surface at specific locations and causing thedopant molecules to diffuse into the silicon. Theion implant (conventional) technique directs ahigh-energy stream of dopant ions into the siliconwafer. But before the ion implantation can bedone, the wafer surface must be prepared byapplying a special coating, called a resist, to areasthat must be shielded from the ion stream. Theresist preparation includes a lithographic expo-sure, etching, and a cleaning operation. After theion implantation, the resist must be stripped off,requiring plasma processing and several cleaningoperations. All told, ion implantation takes 13steps compared with GILD’s one (figure 2-6).

GILD not only reduces the number of steps fordoping, it also provides better control over theprocess. Two critical processing factors for anydoping technique are the dopant density at thejunction and the junction depth. GILD controlsthe amount of dopant absorbed by the number oflaser pulses at the junction while the junctiondepth is controlled by adjusting the laser inten-sity. At this time GILD is the only demonstratedtechnology that can produce junction depthsshallow enough to meet the SIA roadmap junctiondepth requirements for the year 2001 and beyond.

SIA specifies a maximum junction depth of 25 nmfor the year 2001. GILD currently producesjunction depths as shallow as 10 nm whereas ionimplantation is at 40 nm. Other benefits overconventional processing include more uniformdopant distribution, the ability to fabricate nar-rower base regions, and the elimination of high-temperature anneals (which complicate multi-layer processing by allowing dopants to migrateinto adjacent layers), and compatibility with 0.2micron and smaller feature sizes,

LLNL is already one year into a three-yearproject that is focused on process developmentand advanced equipment design to demonstratesuitability for manufacturing applications. Theprojection version of the GILD tool is compatiblewith the flexible fab or cluster tool concept beingpursued by DoD’s Advanced Research ProjectsAgency (ARPA) to help reduce the economies ofscale inherent in semiconductor manufacturing.ARPA had provided some early funding to GILDto supplement laboratory funding, but futuresupport is uncertain.

~ National Institute of Standards andTechnology (NIST)

NIST supports semiconductor researchthrough both its intramural and extramural pro-grams. Intramural programs make use of NIST’sown staff and facilities and are oriented almostexclusively toward metrology. Extramural pro-grams are conducted by industry partners and cantherefore explore technical problems outside


Figure 2-6--Processing Steps Required for GILD Versus TraditionalIon Implantation Techniques

Wafer singe

I HMDS surfacetreatment

rResist spin

Resist prebake

Align andexpose

Resist develop

Resist

Jpostbake

Megasonlcclean

Sulfuric clean

Resist ash

Resist harden

Ion implant

SOURCE: Kurt Weiner, Lawrence Livermore National Laboratory, personal communication, Aug. 27, 1993.

NIST’s specific areas of expertise. Together,these programs give NIST the capability tocontribute to many areas of semiconductor tech-nology.

Intramural Programs

NIST’s intramural programs in semiconductortechnology are conducted largely by its Semicon-ductor Electronics Division, which has an operat-ing budget of about $7 million and a staff of 43,about 35 of whom are full-time researchers. Anadditional $2.5 million of work is performed byother NIST divisions responsible for chemistry,physics, computer science, and materials science.The programs conducted by these divisions match

many of the requirements of the SIA roadmap(figure 2-7). Primary thrusts of the current re-search program are on semiconductor materialsmeasurements; selected device properties, theory,and models; process control measurements basedon test structures and supported by machinelearning analytical techniques; and optical andnon-optical critical dimension metrology (see box2-D).

One example of NIST’s work is the ellipsome-ter developed by the Materials Technology group.This device uses polarized light reflected obliquelyoff a silicon wafer to measure the thickness ofdeposited films. NIST used this ellipsometer todevelop standard reference materials, available in

Chip design& test

ProcessIntegration

Lithography

$“g Interconnect

:

c Materials &~ bulk processes

:~ E n v i r o n m e n t a l~ safety & healtho

“; Manufacturlng2 systems

5.-.; M a n u f a c t u r i n gv facilities

Process/dev ice/structure CAD

Packaging

Equipmentdesign & modeIing

SOURCE: Avtar S.


Figure 2-7—NIST’s Ongoing Programs in Semiconductor Technology


Roadmap CFM Model ing Sensors Quality Material Sof tware Metro logy

I I 1 I Test methods,x-ray mask calibrations

std ref matls

Test methods& structures

w I 1 1

f—’] - IProperties

Measurement

std ref matls

“ r’clvl l - - - r Environmentalstd ref matls

I 1

tdata analysis I methods

r1 I > I 1 1

rT1eLnan15rT15nucleation

process& data

1

diagnosticssensors

1

Oberai, ‘The OTA Report on Federal Labs and the Semimnductor Industry: Partners in Technology,” contractor report preparedfor OTA, June 1993, p.46.

50-, 100-, and 200-nm thicknesses and certified toan accuracy of half a nanometer, so that industrycan verify its own measurement systems. NIST’sinitial offering of sets of the standard referencematerials sold out quickly at $1,300 apiece, andthe sets are still in demand.

NIST’s semiconductor technology program isbeing expanded by the Office of MicroelectronicsPrograms as new funding can be obtained to drawon the many other technical resources present atNIST. New work has begun on plasma etchingprocesses to develop the data necessary for thecreation of physically based process models.Additional research is underway to measure the

properties of materials used in semiconductordevice packaging, and on extensions to theexisting work described above. Both the structureof existing work and plans for new work are beingadjusted to address the measurement needs of thenational semiconductor roadmap, which specifi-cally identifies NIST roles in the area of metrol-ogy and reference data.

NIST has also participated in projects spon-sored by SEMATECH. NIST found and correcteda number of sources of errors in the light-intensitymeasurements in a developmental lithographysystem. It had appeared that the lithographysystem was not meeting its light output specifica-


Box 2-D—NISI% Role in Resistivity Measurement

NIST has a long history of helping semiconductor manufacturers and their suppliers measure theresistivity1 of silicon wafers used to manufacture ICs. Before NIST initiated its program in resistivitymeasurement in the early 1970s, difficulties in correlating measurements of resistivity between siliconsuppliers and IC manufacturers resulted in some 7 percent2 of all silicon shipments being rejected bymanufacturers. Comparable losses in terms of today’s silicon market would cost the U.S. semiconductorindustry well over $1803 million a year.

Suppliers custom-make silicon to the buyer’s specifications, the most important of which is theacceptable resistivity range. Resistivity indicates the silicon’s purity, uniformity, and suitability for devicepurposes. Often, inaccurate measurements either caused buyers to accept orders that wereout-of-specification, resulting in low production yields, or caused them to reject orders that could havebeen acceptable. The lack of measurement agreement was so commonplace that silicon vendors beganto keep a log of adjustment factors that helped to compensate for the difference between theirmeasurements and the measurements of their customers.

in 1960, the American Society for Testing and Materials (ASTM) asked NIST (then the NationalBureau of Standards) to take the lead in improving measurement techniques of the resistivity of silicon.Most companies, at the time, used the four-probe method for measuring resistivity. The process usedone pair of probes to send a known amount of current through the wafer; another pair of probesmeasured the voltage drop across a section of the wafer. Resistivity was calculated using a simpleformula relating the current, the voltage, and the spacing of the probes. The process gained muchpopularity because it was non-destructive and efficient. NISTspent several years studying the problemwith the help of over 22 companies. The effort resulted in the development of correction factors and astandardized procedure for making the measurement. The overall accuracy was improved by an orderof magnitude.

The most obvious savings realized from the improvement was a reduction in material rejection or

waste caused by a lack of measurement agreement between the buyer and the seller. In addition,

buyers were able to reduce the previous levels of testing necessary to achieve measurement agreementwith the seller. The most significant benefit, but hardest to quantify, is the gain in manufacturing yieldsresulting from improved production control.

Upon release in 1967, the NIST correction factors and measurement procedure became a worldstandard. Shortly thereafter, NIST began selling a silicon wafer standard reference material (SRM) sothat suppliers and buyers can check and calibrate their measurement instruments. The SRM, too, hasbecome a de facto standard, used throughout the world.

Today NIST is working on improving the resistivity measurement required to take the industry to0.2-micron linewidths. Two atomistic methods are being developed. One essentially sandblasts a holeinto the material using argon ions, The ratio of silicon atoms to dopant atoms coming out of the hole issubsequently measured, Resistivity is based on the ratio. The other method measures resistivity bymapping atoms on an atomic scale. The goal is to reduce t he measurement uncertain y from the current1.6 percent to 0.8 percent.4 The procedures for the new method will be released by 1995.

1 Resjstivity is the resistance that a centhneter cube of a material Offers to the paSSage of electridty.z improvement in the precision of Measurement of Electrical %S~St/tity Of Shgle C%yStal WICm: A

Benefit-Cost Ana/ysh, J. French, National Bureau of Standards, Report Number S07, Sept. 1967.g Seven per~nt of the $s.4 billion market for semiconductor grade silicon in 1993.4 Personal communication, R. S=~, NIST, ~fil 1993.


tions, but the problemmeasurement error. In

was entirely a matter ofanother project, NIST is

conducting a round-robin calibration experimenton mass flow controllers, used universally forcontrolling gas flows in semiconductor manufac-turing equipment, but often found to be inaccu-rate. Errors in these controllers arise from calibra-tion uncertainties, incorrect installation practices,and variations in the composition of gas mixtures.The experiment is aimed at the frost of theseeffects; subsequent work will address the otherissues. These projects have resulted in the estab-lishment of new calibration services at NIST forultraviolet light meters and for mass flow control-lers.

NIST supports a wide range of working rela-tionships, from a single phone call or visit toextended residence of industrial, academic, andgovernment researchers at NIST under severalforms of agreements that include CRADAs. As ofspring 1993, the Semiconductor Electronics Divi-sion had signed about 10 CRADAs with industry,each averaging $200,000 of NIST contribution.These figures correlate to one CRADA active orpending for every four full-time technical em-ployees. In addition, the Semiconductor Electron-ics Division had many guest researchers workingin its facilities.

NIST’s CRADAs tend to be smaller than thoseof the DOE labs, reflecting the smaller scale ofmany metrology projects and the agencys smallerbudget. The DOE labs’ larger budgets enablethem to mobilize many researchers to attack largeproblems requiring extensive facilities; a typicalNIST project may involve only two to threefull-time research personnel.

Extramural ProgramsIn addition to its intramural research program,

NIST also manages extramural semiconductorresearch conducted under the Advanced Technol-ogy Program. Through ATP, NIST providesfunding to individual companies and consortia todevelop precompetitive, generic technologies.ATP is a cost-shared program in which industry

typically provides more than half the total projectfunding and sets research goals and objectives.All projects must pass a technical evaluation anda business plan evaluation to help ensure that theprograms are technically feasible and that theparticipating companies have a viable plan forcommercializing the resulting technology. Thegoal of the program is to help companies applyresearch results to the rapid commercialization ofnew scientific discoveries and to the refinementof manufacturing technologies. The program canassist joint R&D ventures with technical adviceor it can provide start-up funding or a minorityshare of the cost, or lend equipment, facilities, andpeople to the venture.

ATP has supported a number of semiconductorprojects. Out of the 60 grants awarded duringATP’s first three competitions, 18 are related tosemiconductor technology. Participating compa-nies plan to contribute $45 million to these 18projects and requested just under $50 million infunding from ATP, to be spread out over periodsof one to five years. In 1993, ATP provided $7.8million in matching funds for microelectronicstechnology projects. These projects span a broadspectrum from manufacturing equipment to semi-conductor devices to systems. Under one pro-gram, Spire Corp. will develop advanced sensorsfor a metal-organic chemical vapor depositionchamber used to produce diode (semiconductor)lasers. In another program, Nonvolatile Electron-ics, Inc. will develop anew type of random accessmemory (RAM) device that will not lose datawhen turned off.

COORDINATION OF LAB ACTIVITIESTogether, the semiconductor programs

the DOE and NIST labs address manyissues associated with the SIA roadmap,

run byof theOTA’s

industry panel, after reviewing the labs’ capabili-ties, identified several areas in which these labscould work effectively (table 2-5). However, eachindividual cell on the SIA roadmap will requiremany complementary projects to address near-,


Table 2-5—Possible Semiconductor Focus Areas for Federal Labs

Perfect process chambersModeling/verificationScience knowledge baseEnvironmental safety and health (sensors)Environmentally conscious manufacturing

MetrologyCalibration servicesStandards/reference materialsReference dataMeasurement methodsDiagnostic techniques

Wafer handlingContaminationMechanism design for high reliabilityAlgorithmsSoftware assurance

Material systemsChemistriesContamination-free manufacturingPoint-of-use generation/disposal

Lithographyinvention/commercialization gapSoft x-raySources/stages/alignmentElectron beam/ion beam technology

and prototypesMetrology for mask and water analysis

Technology computer aided design (TCAD)Algorithms for design simulationAlgorithms for process synthesisNew computing toolsTCAD framework

Manufacturing systemsFactory design and modelingFlexible scalable factoriesSensorsLarge wafer equipment design/technology

PackagingCoolingThermal analysis budgetsEnergy efficiencyArray bondingStress/thermal/electro-magnetic modelingLow stress, encapsulantsMultichip packaging technology

New materialsAdvanced metallization (i.e., copper) dielectric/

package materialsThin dielectricsCharacterization of materials

Device physicsUse of advanced computing techniques from

process and device to system analysis andsynthesis

Nanotechnology

Contamlnatlon-free manufacturlng researchDefect and contamination modelingDetection, measurement, and analysisWafer cleaning and transportClean gases, liquids, equipment, and processes

New chemistriesNeutron beam for low-damage, high-throughput

etching and depositionEnvironmentally sensitive materialsChemical recycling/re-use

SOURCE: Avtar S. Ober~, “The OTA Report on Federal Labs and the Semiconductor Industry,” contractor reportprepared for the Office of Technology Assessment, June 1993, pp. 51-52.

mid-, and long-term issues. Industry, universities,and the labs will each have roles in any programto address these needs. Proper coordination ofthese organizations will be required to ensureeffective use of the labs’ capabilities.

Coordination with industry will be required tomake sure that laboratory programs meet com-mercial requirements. To date, the DOE weaponslabs have concentrated their technology develop-ment programs on issues of importance to thedefense community; these labs have only limitedexperience working on commercial technologies

or in a commercial environment in which cost is

a primary concern and product generationschange rapidly. Making the transition will requiretime and considerable industry guidance. TheSIA roadmaps represent a first step in thisdirection, in that they express, in a form that iseasy to communicate, industry’s consensus on itstechnology needs for the next fifteen years.Continued industry participation will be needed,however, to ensure that laboratory programs tomeet these needs are properly implemented and

—


properly coordinated with industry and universityR&D efforts.

Additional coordination will be needed toeliminate or prevent unnecessary redundancybetween laboratory programs. At this point,however, the potential for such overlap appearslimited. One reason is that the capabilities of theDOE weapons labs and NIST are, in many ways,complementary. DOE labs have the skill set,expertise, and funding to work on large-scaleR&D programs, especially those that requiremulti-disciplinary teams and large, expensivefacilities. The DOE labs are set up to work on thehigher-risk, longer-duration projects and to de-liver operating prototypes, as well as an underly-ing precommercial knowledge base. NIST is bestsuited to solving measurement problems anddelivering results in a form suitable for use by theindustry. Measurement may be a demandingproblem requiring significant fundamental re-search prior to developing a technique suited forpractical use, or it may require off-the-shelf NISTtechnology.

Furthermore, while several labs may claim acompetency in a particular technology area, theseareas are so broad that planned programs areunlikely to overlap. For example, all three DOElaboratories are strong in numeric simulation andmodeling; however, they use this competency toaccomplish separate mission responsibilities. San-dia’s modeling capabilities are targeted towardplasma modeling and chemical vapor depositionchambers; Los Alamos uses its modeling capabil-ities to simulate factories and develop activecontrol systems for use with real-time sensors;Lawrence Livermore’s modeling capabilities sup-port work in areas such as packaging, structures,and lithography. In addition, both LLNL andNIST have ongoing programs in metrology to

support x-ray lithography, but LLNL’s capabili-ties in forming aspheric mirrors are comple-mented and supported by NIST’s capabilities inmeasuring the precise curvature of the mirror’ssurface. Similarly, all three DOE laboratorieshave established major efforts in environmentalsafety and health for weapons work that may berelevant to semiconductor processing and envi-ronmentally conscious manufacturing. Sandiahas capabilities in sensors and monitoring forquality; Los Alamos supports work in solventsubstitution and clean manufacturing technolo-gies; Lawrence Livermore has research programsin dosimetry and waste management.

In addition, the labs have expressed a commit-ment to achieve the required coordination andhave made several attempts to coordinate theirresearch efforts. Sandia recently signed a Memo-randum of Agreement (MOA) with NIST on theiractivities in metrology. The first industry to beaddressed under the Sandia/NIST MOA is theU.S. semiconductor industry. The intent of thisprogram is to maximize cooperation and mini-mize duplication so that the resources of the twoinstitutions are used most effectively. In addition,the new National Center for Advanced Informa-tion Component Manufacturing (NCAICM) es-tablished by Congress at Sandia will coordinateresearch by the three DOE weapons labs andARPA in the areas of flat panel displays andmicroelectronics, Projects under this programwill be funded through ARPA and performedjointly by industry and the DOE labs. NIST andSandia have also coordinated their efforts in x-raylithography through lab visits and transfers ofpersonnel. Such efforts may prove highly effec-tive in enhancing the ability of the laboratories tocontribute to commercial semiconductor technol-ogy.

—

TheSemiconductor

Industry 3

0 ver the past three decades, semiconductor manufactur-ing has become increasingly vital to the U.S. economy.Not only does the U.S. semiconductor industry gener-ate over $25 billion in annual sales and employ over

200,000 workers, but, as an enabling technology for mostelectronic products, it is essential to the generation of millions ofhigh-wage, high-skill jobs and sales of over $300 billion in suchindustries as computers, telecommunications, and industrialequipment. Products based on semiconductor technology con-tribute in turn to productivity gains in many sectors of the U.S.economy.

Nevertheless, the U.S. semiconductor industry faces severalchallenges that threaten its future competitiveness. Internationalcompetition has eaten away at U.S. market share, in both theworld and domestic markets. Many competitors receive directsupport from national governments that have targeted semicon-ductor technology as a central part of their industrial develop-ment plans and have initiated programs to boost the commercial-ization of semiconductor technology. In addition, the costs ofresearch and development (R&D) and new production facilitiesare growing exponentially, while sources of patient capital arerapidly eroding. With short product cycles, semiconductor firmsare having difficulty supporting the rapid pace of investment andare looking for new sources of financing, often through jointventures with foreign competitors. Materials and equipmentsuppliers are also facing financial difficulties.

To date, most U.S. policy in support of semiconductortechnology has been limited to ensuring fair trade and protecting

52


Figure 3-1 —Share of World SemiconductorProduction by Nation, 1992

$ billion

Japan

Other ,,,--$8.0 /

/

\ ,-’7

United States$25.6

SOURCE: Office of Technology Assessment, 1993; based on datafrom Semiconductor Industry Association, Annual Databook G/oba/and U.S. semiconductor Competitive Trends-1978-1991 (San Jose,CA: Semiconductor Industry Association, 1992), p. 12.

national security. 1 Through the SemiconductorTrade Agreement (STA), the U.S. governmentattempted to open the Japanese market to U.S.producers. Federal funding has concentrated onR&D, the bulk of which has been funded by theU.S. Department of Defense (DoD). Recently,DoD has supported the Semiconductor Manufac-turing Technology consortium, SEMATECH.Concern over flagging competitiveness of semicon-ductor manufacturers in a time of decliningdefense budgets has, however, induced consider-able discussion of means for ensuring the contin-ued success of the U.S. semiconductor industry.It has become increasingly evident that govern-ment policy can enhance many areas of techno-logical competitiveness in the industry, and may

be necessary in order to preserve its strength.Federal laboratories may have a role to play inworking with industry to develop next-generationsemiconductor technologies.

A STRATEGIC INDUSTRYThe semiconductor industry holds a strategic

position within the U.S. and global economies. In1992, sales of semiconductor devices topped $60billion worldwide; U.S. shipments totaled $26billion (figure 3-1).2 These figures include salesof all electronic components based on semicon-ductor technology:3 integrated circuits (ICs) suchas microprocessors and memories; discrete com-ponents such as transistors and diodes; and othersemiconducting devices such as solar cells andphoto diodes. Within the U.S. economy, the mostsignificant of these categories is ICs, whichcomprised 73 percent of total U.S. semiconductorshipments in 1991, a fraction that has remainedfairly constant over the past decade (figure 3-2).4

Beyond their purely financial effects, integratedcircuits, which pack thousands of interconnectedcircuits onto a single chip, also allow the creationof innovative new electronic products unimagina-ble with individual, discrete devices. ICs alsonecessitate the development of sophisticated pro-duction machinery and processes, and have largeeffects on other parts of the U.S. economy.

fl Contributions to the U.S. EconomyThe semiconductor industry contributes dis-

proportionately to job and revenue growth through-out the U.S. economy. Semiconductor manufac-turers employed 220,000 workers in the United

1 Through NEST, the government has supported the basic metrology that industry needs to manufacture competitive products, but thissupport has not been as large or as extensive as that for national security.

2 SEMATECH, 1993 Annual Report, p. 6; and Electronic Industries Association 1993 Edition Electronic Market Data Book (Wash@towDC: Electronic Industries Association% 1993), p. 98.

3 Semiconductor technology refers to an entire class of materials-and the devices made from them-that have conductivity in betweenthat of an insulator and a true conductor such as metal. Semiconductors derive their conducting characteristics from carefully controlled amountsof impurities (or “dopants”), such as phosphorus, boron, or aluminum, which are inserted into crystals of an otherwise nonconducting materialsuch as silicon or gallium arsenide.

4 Electronic Industries Association op. cit., footnote 1, p. 98.

Chapter 3–The Semiconductor Industry 54

Figure 3-2—U.S. Semiconductor SalesDevice Type, 1992 (Estimated)

S million

Integrated c[rcu[ts —..—.—

by

S1 9,087 ,//=’ ‘ -.. ‘,, T rans i s to rs// ’

/

/

\\,

l\\ . . \\\\’:.\ -/@’

“\\- - ------’ Diodes &rectifiers

$703

SOURCE: Office of Technology Assessment, 1993; based on datafrom Electronic Industries Association, 1993 Edition Electronic MarketData Book( Washington, DC: Electronic Industries Association, 1993),p. 98.

States at the beginning of 1993.5 Many of thesejobs are highly knowledge-intensive, reflectingthe large amounts of R&D required to staycompetitive in the industry.6 Only 42 percent ofall semiconductor workers were production work-ers at the beginnin g of 1993, a figure considerablylower than the 68 percent average for all U.S.manufacturing industries. Moreover, many of theproduction jobs in semiconductors require highlevels of skill, involving the operation andmaintenance of highly sophisticated productionequipment; simple assembly jobs have beeneither automated or moved off-shore. As a result,hourly wages for production workers in thesemiconductor industry averaged $14.23, consid-erably higher than manufacturing in general andmost other electronics sectors (table 3-l).

Table 3-l-Comparison of Employment andEarnings in Semiconductors With OtherManufacturing Industries, January 1993

Employees (thousands) HourlyIndustry Total Production wages

Semiconductors 220 93 (42%) $14.23

All manufacturing 17,939 12,185 (68%) $11.61Autos 827 635 (78%) 15.52Aircraft 581 273 (470A) 17.03Chemicals 1,063 557 (52%) 14.69Industrial equipment 1,934 1,167 (60°/0) 12.61Electronic and electrical

equipment 1,538 979 (64%) 11.14

SOURCE: U.S. Department of Labor, Bureau of Labor Statistics,Employment and Earnings, April 1993.

The semiconductor industry supports a wide-ranging base of suppliers who provide semicon-ductor manufacturing equipment (SME), controlsoftware, gases, chemicals, and silicon substrates.The world market for equipment and materialstotaled about $20 million in 1992, with the U.S.market comprising about half of that.7 On theequipment side, U.S. SME vendors earned $5.5billion in sales in 1992, 58 percent of which wasfrom U.S. semiconductor manufacturers. SMEmanufacturers employed over 28,000 workers in1991.8 U.S.-based materials suppliers earned over$1 billion in revenues in 1992, mostly from salesto U.S. companies.

Even larger effects occur in downstream mar-kets. Semiconductor technology is the key tomost modern electronic products: computers,consumer electronics, communications equip-ment, and industrial equipment. Manufacturersare incorporating semiconductors into productssuch as automobiles and aircraft as well9, but

s U.S. Department of Labor, Bureau of Labor Statistics, “Employment and Earnings, ” April 1993, p. 83.

b Despite the globaliimtion of the industry and the fact that some 50 percent of U.S. semiconductor chips are shipped overseas, Americancorporations perform about threequarters of their high value-added wafer fabrication in the United States.

7 National Advisory Committee on Semiconductors, Attaining Preeminence in Semiconductors (Washingto& DC: National AdvisoryCommittee on Semiconductors, February 1992), p. 9.

s Persoml comm~cation from peggy Hagg@y, Vice President, SEIWSEMATECH; data from VLSI Research.

9 Appro~imateIy 3 t. 5 per~nt of the v~ue of new automobiles is electronics; for COmmerCid and ~litary airc~t, 15 to 30 Percent ‘f ‘e

value may be electronics.


Figure 3-3-Worldwide Sales of SemiconductorDevices by Customer, 1992

Table 3-2—U.S. Factory Sales and Employment inElectronics by Industry Group, 1992

$ billion

Computer Automotive

$28.7

Communications $2,8$8.5

Consumer$13.2

SOURCE: Dataquest, Inc.

approximately 45 percent of the worldwide semi-conductor sales in 1992 went for use in computers(figure 3-3). Consumer electronics and communi-cations together purchased another 35 percent ofoutput, while automotive and industrial applica-tions totaled 15 percent of the market. U.S.industries that depend upon semiconductor tech-nology together produced almost $300 billion inmanufactured goods and employed over 1.8million workers in 1992 (table 3-2), makingelectronics the second largest basic industry in theUnited States (behind chemicals) and the largestindustrial employer.10

By 1995, electronics-related industries areexpected to comprise 25 percent of all manufac-turing.11 U.S. employment in semiconductors andthe electronics industry overall is likely to declinemarginally through 2005, as is employment inmanufacturing generally,12 due to rising workerproductivity, slowing rate of growth of the laborsupply as the population ages, and a decline in

Sales EmployeesSector (millions) (thousands)

Communications equipment $68,097 477Computers and peripherals 56,360 395Consumer electronics 9,183 61Industrial and medical electronicsa 33,969 279Semiconductors 27,388 221Other related products/servicesb 55,875 NAElectronic components 36,756 374

Total $287,628 1,807

a l~ludes control and processing equipment, test and measurementequipment, nuclear electronic equipment, medical electronic equip-ment, robots, accessories and components, and other electronicsystems and equipment.

b l~ludes estimates of electronic content of the annual *leS of

industries, such as autos and airmaft, considered partially electronic,as well as computer and software services (but not prepackagedsoftware).

NA - Not applicable.

SOURCE: Electronic Industries Association, 1993 Edition E/ectrunicMarketData Book (Washington, DC: Electronic Industries Association,1993).

defense spending. Nevertheless, increases in pro-ductive output should continue, especially in theareas of computers and semiconductors, whichare projected to grow fastest of all manufacturingareas. Estimates of growth are for 7.6 percentannually in computers and for 5.6 percent annu-ally in semiconductors, both well above the 2.3percent growth anticipated for all manufacturingindustries. 13

1 Contributions to National SecuritySemiconductor technology is vitally important

to national security. Throughout the Cold War,U.S. defense policy was based on the availabilityof superior technology to overcome the numericalsuperiority of Warsaw Pact forces. Integratedcircuits became integral components of nuclearmissiles, precision-guided munitions, early warn-

lo SEMXI’’ECH, 1992 Annual Report, p. 7.

] 1 Ibid., p. 7.12 ~ L. CMeY ~d JmM c. Frati 1‘~dus~ output and Job Grow~ Contiues Slow ~to Nat Cenw, ’ Monthly Labor Review,

November 1991, pp. 45-94.

13 Ibid., pp. 58-59.

ing and surveillance systems, aircraft, and com-munications systems. Concern over the continueddevelopment of advanced microelectronics tech-nologies and over foreign dependence on suchtechnologies 14 led the military to invest heavily in

semiconductor R&D and to develop procurementregulations governing U.S. content.

While procurement budgets may fall in concertwith the declining defense budget, military sup-port of semiconductor R&D is likely to continueat steady or increasing levels. The AdvancedResearch Projects Agency’s (ARPA) funding forelectronics manufacturing technology jumpedfrom $98 million in 1991 to over $330 million in1993. With declining personnel rosters and fewernew starts for major weapons programs, themilitary will probably rely more on improvedsemiconductor technology to maintain nationalsecurity and upgrade existing weapons platforms.

The commercial semiconductor industry is theprobable source of many of these components.Commercial semiconductors are in many waystechnically superior to their defense counterpartsand, due to their larger scales of production, areconsiderably lower in price.

COMPETITIVE HISTORY OF THE U.S.SEMICONDUCTOR INDUSTRY

Because semiconductor manufacturing has sucha strong influence on national economies, manycountries--including European nations and Japan—have launched vigorous campaigns to developindigenous semiconductor industries and gainglobal market share.15 Government polices athome and abroad have altered the competitivedynamics of the industry. Though dominating

.—


early markets, U.S. semiconductor manufacturersare now increasingly challenged by internationalcompetitors.

From the mid-1950s through the early 1980s,the United States was the undisputed leader invirtually all segments of the semiconductor in-dustry. U.S. manufacturers dominated world mar-kets for ICs, manufacturing equipment, andsupplies. They invested more than all othernations in new plant and equipment as well asR&D and pioneered new technologies. Through-out the 1980s, however, foreign rivals increas-ingly challenged U.S. semiconductor manufac-turers and, by 1987, had secured approximately63 percent of the global market for semiconduc-tors. Japanese manufacturers are the primarycompetitors; at their zenith in 1988, they con-trolled some 52 percent of the market. Since 1989,U.S. manufacturers have staged a modest resur-gence, regaining market share from the Japaneseand re-establishing market leadership in 1992with an estimated 43.8 percent share of the worldmarket (versus 43.1 percent for Japan).l6 Thesechanges reflect a combination of industry initia-tive and government policy.

1 Early U.S. DominanceEarly American dominance in

stemmed from the nation’s leadsemiconductorsin entering the

field. Both the transistor and the IC were inventedin the United States. Work on solid-state amplifi-ers began during the 1930s at Bell Laboratoriesafter researchers realized that future switchingwould need to occur through electronic means,and that future markets would be large enough tojustify investment in new technology. These

14 see Institute for Defense ~~yses, Dependence of U,s, Defense system on Foreign Tec~~o~ogies (Washington, ~: Defense Technical

Information Service, December 1990).

15 Japan ~s launch~ a Sefies Oflfitiatives coor~ted by the Ministry of International Trade and~dus~ (~~) to s~~ate development

of semiconductor technology and electronic products. In the 1980S, the European Community initiated the JESSI program to developsemiconductors and the ESPRIT program to promote information technology generally. See Thomas R. Howell, et al., The MicroelectronicsRace: The Impact of Government Policy on International Competition (Boulder, CO: Westview Press, 1988), chapters 3 and 4.

lb Statistics from VLSI Research, Inc., as cited in T. R. Reid, “U.S. Again Leads in Computer Chips, ” Washington Post, Nov. 20, 1992,p. Al.


efforts resulted in the discovery of the transistorby William Shockley, John Bardeen, and WalterH. Brattain in 1947. Jack Kilby at Texas Instru-ments, Inc. patented the first integrated circuit in1959 at about the same time that Robert Noyce atFairchild Camera developed planar processingtechniques, upon which current manufacturing isbased.

Though commercial interests stimulated workin semiconductor technology, government inter-est was largely responsible for large-scale pro-duction of ICs that led to early domination of theindustry by U.S. firms. U.S. industry initiallyexpressed skepticism about ICs. IBM, then thelargest single private-sector customer for semi-conductor devices, used discrete transistors ratherthan ICs in its 360-series computer. In 1962,NASA announced plans to use ICs in the Apolloprogram’s guidance computer, and soon thereaf-ter the Air Force stated its intent to use them in theMinuteman II guidance system. These programsallowed U.S. manufacturers to get the economiesof scale required to make semiconductors afforda-ble for commercial use and to demonstrate andimprove their reliability .17

1 The Japanese ChallengeJapanese companies did not begin producing

semiconductors until the 1960s. For many yearstheir products suffered from low yields and highprices. By the mid-1960s, Japanese manufactur-ers were achieving yields of just 10 percent,compared with 25 percent for their U.S. competi-tors. Prices were often three times those in theUnited States. In 1971 Japanese manufacturerssold at more than 20 percent below cost in orderto compete with U.S. manufacturers, and as late

as 1972, the semiconductor divisions of the majorJapanese producers had failed to turn a profit.18

In the late 1970s, however, several Japanesecompanies rose to worldwide prominence insemiconductor manufacturing, due in part toassistance from the Ministry of InternationalTrade and Industry (MITT). Through MITI, theJapanese government provided financial assist-ance, low-interest loans, accelerated depreciationschedules, and other measures that lowered capi-tal costs and enabled semiconductor manufactur-ers to continue investing in plant and equipmentdespite large losses. In addition, MITI organizedand helped fund several industry-wide R&Dprograms, including the successful VLSI Project(1976 to 1979) that targeted dynamic randomaccess memory (DRAM) chips. Over the nextseveral years, Japanese companies achieved higheryields and productivity and lower costs thanAmerican firms, particularly in memories, driv-ing many U.S. manufacturers out of the market bythe mid-1980s. The U.S. share of the worldmarket for all ICs declined from about 57 percentin 1982 to 39 percent in 1991, reaching its lowpoint of about 37 percent in 1988. Japanesemarket share rose from 33 percent to 47 percentduring the same time (figure 3-4).19

Japanese competition has been most noticeablein markets for commodity chips, such as DRAMs,that are the least dependent on design capabilitiesand the most dependent on manufacturing capa-bilities and quality. Between 1978 and 1992, theU.S. share of the global DRAM market declinedfrom about 75 percent to less than 20 percent;Japanese market share grew from 25 percent to 54percent during the same period (figure 3-5). Inmore design-intensive, higher value-added mar-ket segments, U.S. companies maintained a

17 ~urJ. Ale=nder, The Problem of Declining Defense R&D E~enditures, JEI-14A (Washi.ngtoq DC: Jw~ ~no~c ~timte, AP~16, 1993), p. 11.

18 US, Congess, Offlce of TeclmoIogy Assemmen~ Competing Economies: America, Europe, and the Pacific Rim, O’EA-H98(Washi.ngto% DC: U.S. Government Printing Office, October 1991), p. 249,

19 Semiconductor Industry Assxiation and Dewey Ballantine, Crean”ng Advantage: Semiconductors and Governmentlndwtrial Policy inthe 1990s (San Jose, CA: Semiconductor Industry Association 1992), p. 9,

—. ..- .—

Chapter 3–The Semiconductor Industry ! 58

Figure 3-4-Semiconductor World

0/0 market share

:~-%

Market Shares, 1982-1991

Japan

40I

United States304

20 II Other —— ● – —-— ●

1 0 ; -- – – -–-*-– * ...-~~–—- 4 — --— ● --— ‘ - +–

01982 1983 1984 1985 1986 1987 1988 1989 1990 1991

SOURCE: Semiconductor Industry Association, Creating Advantage: Semiconductors and Government IndustrialPolicy in the 7990s (San Jose, CA: Semiconductor Industry Association, 1992), p. 9.

Figure 3-5—Worldwide DRAM Market Share, 1978-1992

0/0 market share100 r – .

go-l

8 0 ;

1

70

60

50-

4 0 -

3o- United States Other

10l-~<-.

IEurope

■

o’ I1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992


dominant position, but the lead was trimmed clined, from 60 percent in 1984 to about 53significantly. U.S. share of the market for micro- percent in 1992, but the United States remainedcomponents and other types of microcontrollers the market leader (figure 3-7).declined from 75 percent in 1980 to just under 69percent in 1992 (figure 3-6), while Japanese 1 Reasons for Japanese Successmarket share rose from 21 percent to 25 percent. Japan’s success in semiconductors resulted notIn the market for application-specific integrated just from increased funding of R&D. Japan alsocircuits (ASICs), which include custom and used a successful mix of financial, technological,semi-custom chips, U.S. market share also de- and industrial resources to ensure that programs


Figure 3-6-Share of World Market for Microcomponents, 1980-1992

0/0 market share80r

. —m

70+ \

1

United States/

60

50< ‘L~-~--y-’”

1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992


Figure 3-7-Share of World Market for ASICs, 1984-1992

0/0 market share7 0 r— ‘—–-—

6 0 ●

United States

50 ‘ –H-=-=-—–*---4

40

30 JapanI

20 ‘

10

1984 1985 1986 1987 1988 1989 1990 1991 1992


were developed rapidly and efficiently, and werepursued over the long term. At the same time,Japanese firms pursued a strategy of expandingmarket share rather than increasing profitability,often accepting substantial short-term losses inorder to establish their market presence andachieve long-term growth. Other differences be-tween Japanese and U.S. trade practices andindustry structure (outlined below) also contrib-uted to the Japanese success.

Availability y of CapitalSince 1982, Japanese semiconductor manufac-

turers outspent their U.S. competitors on R&Dand capital goods. In 1988, Japanese capitalspending was nearly $2 billion higher than that ofthe United States; by 1990, Japanese semiconduc-tor manufacturers were spending $6 billion oncapital goods versus $3 billion in the UnitedStates. R&D spending by the top five Japaneseproducers also rose from near parity with theUnited States in 1985 to nearly $1 billion more by

Chapter 3-The Semiconductor Industry 60

Figure 3-8-Semiconductor R&D Spending

S billion3 -

2

4

,~Total of top five

Japanese/

/“”

merchant firms

//

Total of top five‘1 U.S. merchant

Ifirms

I

011985 1986 1987 1988 1989 1990


1990. These differences in expenditures occurreddespite the fact that U.S. producers had highersales that the Japanese until 1986 (figures 3-8 and3-9).20

These spending differences reflect significantdifferences in government policy and industrialstructure in the two nations. By designatingmicroelectronics as a priority industry, the Japa-nese government increased its attractiveness toprospective lenders and investors; further, thelending policies of the Japan Development Bank,which makes loans to designated priority sectorsat MITI’s recommendation, have signaled tocommercial banks that the government favorsmicroelectronics companies and has thereby mo-bilized capital for the semiconductor industry .21

Japanese companies also benefited from alower cost of capital during the 1980s. Althoughcapital costs in Japan have approached those inthe United States in recent years, and direct

6

K

4

3

2

1

0

Figure 3-9-Semiconductor Capital Spending

$ billion

firms/

*--

.

All U Sm e r c h a n t

f i r m s

I 985 1986 1987 1988 1989 1 9 9 0


comparisons are difficult to make, Japanese costsappear to have been much lower.22 Keiretsu banksare a primary source of capital for their affiliatedsemiconductor producers. During the 1970s, theJapanese semiconductor producers’ relationshipswith the keiretsu banks enabled them to financeaggressive capital expansion through heavy bor-rowing. While in the 1980s the leading Japaneseproducers reduced their reliance on debt as asource of capital, their special relationship withthe banks remained a critically important asset.23

Combined with lower interest rates, these rela-tionships helped mitigate the risk associated withlarge financial outlays.

The structure of the Japanese semiconductorindustry also supports greater capital expendi-tures. Most semiconductor manufacturers in Japanare part of large, vertically and horizontallyintegrated conglomerates with large assets. Gi-ants like Nippon Electric Corp. (NEC), Hitachi,

Qo Nation~ Adviso~ committee on Semiconductors, Attaining Preeminence in Semiconductors (Wd3hgtOn, m: Natiod AdvisovCommittee on Semiconductors, February 1992), p. 23.

21 ~omm R. Howell, op. cit., footnote 1S, p. 65.

22 Nation~ Adviso~ Committee on Semiconductors, A Strategic Industry at Risk (Mhshingtoq DC: National Advisory committee onSemiconductors, November 1989), p. 17. See also Richard P. Matteone, 4‘A Capital Cost Disadvantage for Japan?’ Morgan Guarantee Trust,Tokyo, Aprd 1992.

23 nom R, Howell, op. cit., footnote 15, p. 65.


and Toshiba are fully integrated; they put theirchips into their own products. Integration allowscloser cooperation between IC suppliers andsystems integrators. More importantly, integra-tion (vertical or horizontal) can make capitalavailable from internal funds outside the ICdivision, provided other divisions are earninghealthy profits. Deep pockets are a particularadvantage during market slowdowns, when pricesdecline. They allow companies to fund long-termR&D and forego immediate returns for long-termgrowth in market share. This capability allowedJapanese firms to continue investing in R&D andexpand capacity during recessions that curtailedU.S. investment. The Japanese then entered themarket first for 64-kilobit (64K) and 256KDRAMs, gaining noteworthy competitive advan-tage.24

The U.S. semiconductor industry is dominatedby ‘merchant’ manufacturers who are independ-ently owned and sell their output on the openmarket. ‘‘Captive” suppliers such as IBM sell thevast majority of their output to their parentcompany and do not compete on a global basis .25The merchant portion of the industry has been thesource of considerable innovation within theUnited States. It has achieved low cost productionby standardizing designs for many customers’needs. Companies such as Intel, AMD, and TI arenot constrained by the capacity of their ownsystems divisions, but can expand supply to meetmarket demand. Owners of captive companiesoften rely on merchant producers to satisfy peaksin their demand.26 However, merchant companieshave often lacked the financial resources tomaintain high levels of investment during generalrecessions.

Trade PracticesDifferences in U.S. and Japanese trade prac-

tices have allowed Japanese semiconductor man-ufacturers to gain a strong foothold in the U.S.market while limiting U.S. participation in theJapanese market. Throughout the early 1980s, inparticular, the United States did little to regulateor control the import of semiconductor productsfrom Japan. U.S. electronics companies pur-chased semiconductors from either U.S. or Japa-nese suppliers, depending on differences in qual-ity or price. But U.S. semiconductor manufacturersalleged that Japanese semiconductor manufactur-ers used unfair trading practices to gain marketshare in the United States. The U.S. InternationalTrade Commission (ITC) found that Japanesemanufacturers’ dumping of 64K DRAMs in theU.S. and other global markets in 1985 inflictedserious damages to U.S. firms.27 A similar con-clusion was reached in the ITC’s investigations ofthe impact of Japanese dumping on U.S. produc-ers of 256K DRAMs and Erasable ProgrammableRead-Only Memories (EPROMs). Between 1981and 1982, and again in 1984 to 1985, Japanesedumping of 64K and 256K memories crippledU.S. competitors. The result was a virtuallycomplete withdrawal by U.S. firms from theDRAM market by the end of 1985. Of 11 U.S.merchant firms that produced 16K DRAMs in1980, only two remained in the market at the256K level, and these companies accounted forless than 10 percent of world sales.28

In contrast, U.S. firms have encountered twotypes of barriers preventing the sale of theirproducts in Japan: restrictions on investment, andtrade barriers. During the 1960s, foreign semicon-ductor companies were prohibited from establish-

W Ibid, p. 62.

25 ~Mrecen~y ~ounced that it will sell ICS on the merchant market. This strategy reflects a co~orate restructuring that will disaggregatethe company into a larger number of profit centers.

26 Natio~ResemchC oUc~, Competitive Status of the US. Electronics lndusoy (Washington DC: National Academy PRM, 1984), P. 45.

27 U.S. htemtioml Trade Commission 64KDynamic Random Access Memory Componenrsfiom Japan, PP. 19-20.

28 Semiconductor Industry Association, Creating Advantage, Op. Cit., p. 105.

—


Figure 3-10--U.S. Trade in Solid State Devices

S million20 ~

= Imports~D;? Exports

15 1 ‘j B a l a n c e

10

5

0

b

i-r

n

11-5 ‘

1983 1984 1985 1986 1987 1988 1989 1990 1991 1992

SOURCE: Electronic Industries Association, 1993 Edition Electronic Market Data Book (Washington, DC: ElectronicIndustries Association, 1993), p. 114.

Table 3-3-Market Sizes and Market Shares byGeographic Base of Headquarters, 1991

Market share by nationality

Size of firm (percent)

Market ($B) U.S. Japan Other

United States $15.4 70 20 10Japan 20.9 12 86 1Europe 10.1 45 15 40Rest of world 8.2 43 34 23

Total $54.6 39°A 47”/. 14%

SOURCE: Office of Technology Assessment, 1993; based on Semi-conductor Industry Association, Annual Databook: Global and U.S.Semiconductor Competitive Trends, 1978-1991 (San Jose, CA: Semi-conductor Industry Association, 1992), p. 12.

ing subsidiaries in Japan without prior approval ofthe Japanese government; consent was usuallywithheld unless companies agreed to form jointventures with Japanese fins. U.S. companies haddifficulty forming ventures with Japan’s majorelectronics companies because MITI favoredalliances between Japanese firms over interna-tional joint ventures. In addition, MITI requiredU.S. firms to transfer technology to their partnersas part of the deal.29

Even with market liberalization between 1974and 1975, U.S. companies could secure onlylimited shares of the Japanese market. Japanesesemiconductor companies are often divisions oflarger conglomerates or of keiretsu that alsoinclude producers of electronic goods. Theseproducers tend to purchase components fromwithin their own group, to the detriment offoreign manufacturers. Japanese companies fur-ther maintain that U.S. semiconductor firms lackthe support and testing facilities of Japanesemanufacturers and that U.S. chips have a higherdefect rate.30

Though dominant in other regional markets,U.S. firms have been unable to penetrate theJapanese semiconductor market and have there-fore lost a large share of the total world market(table 3-3). The trade balance has also shifted.Between 1983 and 1987, the U.S. trade deficit insemiconductors increased from $620 million toalmost $1.4 billion, due mostly to increasingimports from Japan and stagnant export growth(figure 3-10). Though the United States had run atrade deficit in semiconductors prior to this date,

29 US. Congess, Office of Tec~olo~ Asscssmen4 Competing Economies: America, Europe, and the pacific Rim, OP. cit., P. 249.

30 Sheridan Tatsuno, “Japanese Companies Give U.S. Chipmakers A Blunt Opinion of Their Products, ” New Technology Week, Sept. 23,1991, p. 6.


Figure 3-11—U.S. World Market Share inElectronics Production

-- 0/0 market share80

70

60

50

40

30

20

10

0

————

U.S.-ownedproduction

—1985 1990

SOURCE: Ameriean Electronics Association as cited in NationalAdvisory Committee on Semiconductors, Attaining Preeminence inSemiwnductors, E5ird Annual Report to the President and theCongress, (Washington, DC: National Advisory Committee on Semi-conductors, February 1992), p. 21.

it was based mostly on imports from U.S.-ownedassembly facilities overseas. Almost 80 percentof all U.S. semiconductor imports were fromoffshore facilities in 1976.31 But starting in 1978,the United States began running a growing deficitwith Japan. In 1992, the United States imported$4.4 billion in solid-state components from Japan,but exported only $1.5 billion to Japan.32

Shifting Location of Downstream MarketsU.S. inability to penetrate the Japanese semi-

conductor market has been compounded by thetremendous growth of the Japanese market. U.S.semiconductor manufacturers have witnessed agradual migration of their customer base to Asia.Between 1985 and 1990, the percentage of theworld’s electronic systems produced in the United

States declined from 52 percent to 35 percent(figure 3-1 1). This trend is the result of both themovement of U.S. electronics production out ofthe United States in search of lower-wage laborand the development of Asia’s domestic electron-ics industry. Growth in electronics manufacturingin Asia has stimulated local demand for semicon-ductors. As a result, the Japanese market forsemiconductors has grown faster than the U.S.market and is now the largest in the world,totaling $21 billion, or 38 percent of the worldmarket, in 1991 (figure 3-12).

Supplier IndustriesThe success of the semiconductor industry

depends on the success of its suppliers: thesemiconductor manufacturing equipment and thematerials industries. Throughout the 1980s, U.S.materials and equipment suppliers lost marketshare to foreign competitors. Between 1985 and1989, the global market share of U.S. equipmentsuppliers dropped from about 60 percent toalmost 40 percent; Japanese suppliers increasedtheir market share from 35 percent to almost 50percent. In 1980, nine of the top 10 equipmentsuppliers in the world were U.S.-owned. By 1990,Japanese companies held five of the 10 top slots,including the top two (table 3-4).

U.S.-based materials suppliers proved no moresuccessful, maintaining only 23 percent of the$9.2 billion world market in 1990. Suppliers inJapan captured 64 percent of the market and heldthe top four slots in terms of total sales. Moreover,much U.S.-based production is foreign-owned.U.S.-owned firms supplied only 13 percent of thetotal market for materials, and Japanese-owedfirms held a 73 percent share.33 Of the five largest

31 U.S. Dep~ent Of Commerce, International Trade Mti tratiou U.S. Industrial Outlook, 2978 (Washington DC: U.S. GovernmentPrinting OffIce, 1978), p. 308,

32 Ekztronic Industries Association op. cit., foomote 2 p. 114.33 U.S. ~t~mtio~ Tr~e co~ssio~ Global Competitiveness of U.S. Advanced Technology Manufactun”ng Industn’es: Semiconductor

Manufacturing and Test Equipment, USITC publication 2434 (Washington DC: U.S. Intermtional Trade Cornmissiou September 1991), p.4-15.

~ ~ese suppliers were Kyocera, Shin-Etsu Handotai, NTK, and Sumitomo (all Japanese), ~d Huels from Ge~ny.

. -—— -


Figure 3-12-Growth of Regional Semiconductor Markets

~~ ~ billion --cd I

20-

15

10 1

5 4

Japan

m

world

OL1982 1983 1984 1985 1986 1987 1988 1989 1990 1991

SOURCE: Semiconductor Industry Association, Annual Databook: Global and U.S. Semiwntictor CompetitiveTrends-1978-1991 (San Jose, CA: Semiconductor Industry Association, 1992), p. 13.

Table 3-4-Top 10 Semiconductor Equipment Suppliers in Worldwide Sales

1980 Sales 1990 Sales

Company (nationality) ($M) Company (nationality) ($M)

Perkin-Elmer (US) 151 Tokyo Electron (J) 706GCA (US) 116 Nikon (J) 696

Applied Materials (US) 115 Applied Materials (US) 572Fairchild (US) 105 Advantest (J) 423

Varian (US) 90 Canon (J) 421Teradyne (US) 83 Hitachi (J) 304

Eaton (US) 79 General Signal (US) 286General Signal (US) 57 Varian (US) 285

Kulicke and Soffa (US) 47 Teradyne (US) 215Takeda Riken (J) 46 SVG (US) 204

Total $888 Total $4,108

NOTES: US - United States; J - Japan.

SOURCE: SEMATECH, “Strategic Overview,” December 1991, p 1-7; data from VLSI Research.

suppliers in 1990, four were Japanese and the fifthwas German.34

Moreover, the fragmented structure of the U.S.semiconductor industry permeates the supplierindustry as well. Throughout the 1980s, U.S.semiconductor manufacturers maintained arms-length relationships with their primary suppliers.In contrast, Japanese manufacturers maintainedcloser linkages to their suppliers. This enabledJapanese manufacturers to gain early access to

new production equipment and to influence itsdesign.

~ The U.S. ResponseThe loss of U.S. share in the memory market to

Japan triggered alarms throughout industry andgovernment in the United States. Though acommodity good with low profit margins, DRAMswere considered the primary technology driverfor the entire semiconductor industry throughout


the 1980s.35 The design of DRAMs is fairlystraightforward compared with microprocessorsand other logic devices, but in order to achievegreater capacity, transistors must be packed moreclosely together. The design of next-generationDRAMs therefore precipitates advances in lithog-raphy and manufacturing capability for achievinghigher device densities and smaller linewidths.Logic devices typically lagged behind DRAMs inthese areas. In addition, the large volumes charac-teristic of DRAM production allow for greaterevaluation and refinement of production tech-niques. With large production runs, the effects ofprocess changes upon yield can be more easilydetermined and the learning that manufacturersgain can be applied to other types of devicesmanufactured with a similar process. High-volume production also provides manufacturers away of amortizing the cost of new fabricationfacilities (or fabs), which can then be convertedfor use in manufacturing other devices, such aslogic, and for gaining experience with newprocesses.

Faced with the prospect of continuing itsdownward slide in market share, the U.S. semi-conductor industry took serious measures in the1980s to regain its international competitiveness.Central to these efforts have been industry collab-oration and government cooperation. Govern-ment and industry have become partners inreinvigorating an industry that is often considereda strategic national asset. Industry participationhas been coordinated primarily by the Semicon-ductor Industry Association (SIA), an organiza-tion that, since its inception in 1977, has gainedconsiderable political influence and has come to

represent its member companies effectively. SIAhas worked with the federal government tostimulate U.S. research in semiconductor technol-ogy, ameliorate trade frictions, and strengthenlinkages between semiconductor manufacturersand their suppliers. These efforts have resulted inthe formation of the Semiconductor ResearchCorporation (SRC), SEMATECH, and a series ofSemiconductor Trade Agreements (STAs) withJapan.

Semiconductor Research CorporationSRC was founded in 1982 as an industry-led

consortium to coordinate and fund basic univer-sity research in technologies of interest to thesemiconductor industry. Membership in SRC hasgrown rapidly to some 70 organizations in 1992.Most members are individual corporations whocontribute a freed portion of their total revenues,but other members are government agencies andgovernment/industry consortia, such as SEMA-TECH and the Microelectronics and ComputerTechnology Corporation (MCC).36 With a smallstaff in Research Triangle Park, North Carolina,SRC manages an external research budget ofabout $30 million per year. These resources arededicated to three complementary missions: tosupport research in universities bearing on long-range industry needs; to increase the flow ofgraduate students with direct experience relatedto mainstream interests of the semiconductorindustry; and to stimulate interest among univer-sity faculty in silicon-related activities and therebyincrease the demand for government researchsupport in this area.

35 my r=afly b this notion kn ~leng~. LSI Logic, kc. has developed a 0.6-micron process for manufacturing ASICS bt fivdsstat&of-th&artDRAM factories, convincing many analysts that DRAM production is not the only way to drive improvements in manufacturing

F==36 AS of Igg2, SRC hd 26 Ml and 33 affiliate members from industry three associate members from b Ahunos National MbOratory,

the Microelectronics and Computer Technology Corporation and SEMATECH; and seven members from government, including the NationalScience Foundatio~ NISZ the National Security Agency, and other Department of Defense research organizations, who collectively sllpportone full membership for the U.S. government. lb apply for full membership in SRC, companies must manufacture, use, or sell semiconductors.Affiliate and associate members must conduct R&D in support of semiconductor devices within the United States or Canada. AftIliate andassociates members do not have representation on the board of directors.


SRC’s contribution to university research isevident. Between 1982 and 1992, SRC funded$200 million in university research contracts,supporting hundreds of faculty members andthousands of graduate students. This researchgenerated over 8,000 published reports and 41patents, with another 38 patents filed.37 Memberfirms have access to all these research findingsand results. More importantly, SRC finding hashelped create interdisciplinary university researchprograms on silicon-based devices. Though com-prising over 90 percent of industry sales, silicondevices received little attention by universityresearchers a decade ago; the limited semicon-ductor research at universities was aimed atcompound materials (such as gallium arsenide),which have unique electrical properties and are ofparticular interest to DoD, but have fewer com-mercial applications.

38 SRC funding now repre-

sents about half of all U.S. support for siliconsemiconductor research at universities and re-search institutes.

Transferring research results to industry hasnot always been easy. Most research projects needfurther work before they can be commercialized.In addition, finding the appropriate end-user for aspecific technology can be difficult. Neverthe-less, in 1992, SRC created a new TechnologyInsertion Program to help move SRC researchresults into participating companies. These pro-grams are aimed at improving SRC’s transfer oftechnology to industry.

Despite the difficulty with technology transfer,SRC has been highly effective in training person-nel for careers in the semiconductor industry andin stimulating personnel exchanges between in-dustry and universities. Member companies areencouraged to send technical personnel to univer-sity research centers for extended periods of timeto gain exposure to advances in academic re-

search. In addition, members often use theiraccess to students as a means of selecting futureemployees. Over 1,000 of SRC’s graduate stu-dents have been hired by industry, bringing withthem intimate knowledge of new semiconductorprocessing techniques.

As a consortium, SRC has also played a keyrole in helping industry reach consensus on anumber of issues. Through its advisory boards,sponsored workshops, and planning documents(like SRC 2001), SRC has developed earlyindustry roadmaps and research agenda for keytechnologies. These tools have helped SRC raisenational interest in issues of importance to thesemiconductor industry and attract governmentattention to industry problems. Furthermore, bymaintaining management control of industry’suniversity research funding, SRC has not onlyadvanced a close match between university ef-forts and industry needs, but has also reducedduplication of research efforts. Though overlapcan lead to different and useful results, the highcost of research in the semiconductor industrymakes elimination of redundancy a necessity.SRC’s success in these areas is widely creditedwith strengthening the global competitiveness ofthe U.S. semiconductor industry and improvingrelations between government, industry, and aca-demia.

SEMATECHThe federal government has also supported

SEMATECH, a consortium founded by 14 mem-ber companies in 1987 to help U.S. manufacturersrecapture world leadership in the semiconductorindustry. The group, with facilities and staff at itsheadquarters in Austin, Texas, proposed to meetthis goal by developing within five years aprocess for manufacturing chips with 0.35-micron feature size on 8-inch wafers. In Decem-

B1 Semiconductor Research Corporatio~A Decade of Service to the Semiconductor Industry: 1992 Annual Report @~~h Tri@e p~~NC: Semiconductor Research Corporation 1992), p. 2.

38 ~ke~ for cornpo~d s~couductors are growing, however. Gallium arsenide Ics uc MW Widely Used k wkkss COmm~~tioM

systems; compound semiconductors are used as laser sources in telecommunications systems and compact disc (CD) pIayers.


ber 1987, Congress authorized DoD to provideSEMATECH with five years of funding at a levelequal to industry’s contribution, expected to be$100 million per year. DoD assigned ARPAresponsibility for working with SEMATECH inApril 1988.

SEMATECH originally planned to create newproduction processes in-house for manufacturingnext-generation semiconductors, but later de-cided that its primary goal should be to develop astrong base of semiconductor manufacturing equipment suppliers. Without strong suppliers, U.S.semiconductor manufacturers could not keep upwith their Asian competitors, who have closercontacts with Japanese equipment makers andthus have earlier access to the most advancedJapanese semiconductor manufacturing equip-ment. At SEMATECH’s inception, U.S. semi-conductor equipment suppliers were losing mar-ket share at the rate of 3.1 percent per year.39

Semiconductor manufacturers expected to pur-chase less than 40 percent of their submicronequipment from U.S. suppliers.40

SEMATECH established a number of partner-ships with U.S. equipment manufacturers to helpthem develop next-generation production tools. Italso brought the semiconductor industry towardconsensus as to its future requirements, especiallyfor new semiconductor manufacturing equip-ment. As a result, equipment manufacturers havebeen able to produce equipment to one set ofindustry specifications rather than to diversecompany specifications. In addition, SEMA-TECH has standardized methodologies for evaluat-ing candidate manufacturing technologies, both

analytically and experimentally. Perhaps mostimportant, SEMATECH’s Partnership for TotalQuality program has improved communicationsbetween semiconductor manufacturers and theirsuppliers. While some suppliers had previouslymaintained close relationships with preferredcustomers, SEMATECH replaced and repairedthose that had been severed and created a muchbroader set of ties. In this way, information that isnot easily quantified can be exchanged directlybetween users and suppliers of manufacturingequipment.

While critics claim that SEMATECH hasbenefited only its member companies, otherscredit the consortium with contributing to therecent improvement in the health of the entiresemiconductor equipment industry. Since 1990,equipment manufacturers have reversed theirdeclining market share and currently command53 percent of the world market, versus 38 percentfor Japan.

41 U.S. semiconductor manufacturers

now purchase over 70 percent of their equipmentdomestically. Motorola’s new wafer fabricationfacility in Austin, Texas, which was originallyplanned to include 75 percent foreign tools, nowhas an 80 percent U.S. tool set.42 Production yieldsof U.S. semiconductor manufacturers, whichwere 60 percent versus Japan’s 79 percent in1987, have improved to 84 percent versus 93percent in Japan.43 U.S. equipment manufacturershave also increased their market share in Japan,commanding almost 20 percent of the Japaneseequipment market in 1992, up from 15 percent in1990.44

39 peter BUXTOWS, “Bill s~ncm Struggles to Reform SEMATE~” Electronic Business, Ikby 18, 1992, p. 58.

@ SEMATECH, 1991 Annual Report, p. z.4 1 Da~ from WI R~sem~h ~c, ~ cit~ by pew figge~, vice presid~~ public policy ad Adrninistratioq SEh41/SEMATECH,

personal comrnunicatio~ July 20, 1993.

42 SEMATECH, 1991 Annual Report, p. 18

43 Us. &nm~ Accounting OMce, “Federal Research: SEMATECH’S Technological progress and Proposed R&D PrograQ”GAO/RCED-92-223BFq July 1992, p. 10.

44 Dam from WI Re=ch kc, ~ cit~ by pew Haggerty, vice presid~~ public policy ~d Administratio~ SEMI/SEMATECH,

personal communication% July 20, 1993.

— ——— —


Bilateral Trade Agreements

Other than its participation in SRC and SE-MATECH, much of which was justified on thebasis of national security, federal attempts toboost the competitiveness of the civilian semi-conductor industry have been limited almostexclusively to trade considerations. Governmentpolices have been designed to level the playingfield by reducing foreign trade barriers andcurbing unfair trade practices-specially dump-ing—that have injured U.S. semiconductor manu-facturers. Trade frictions have been characteristicof the semiconductor industry since the early1980s, when U.S. manufacturers began complain-ing of difficulties entering the Japanese marketand accusing Japanese firms of dumping productsin the United States.

The federal government frost attempted toredress these grievances through the negotiationof a bilateral agreement with Japan in 1983, afterimports of low-cost 16K and 64K DRAMs fromJapan inflicted heavy losses on U.S. manufactur-ers. While the agreement contained several rec-ommendations to promote U.S. access to theJapanese market and halt dumping, it lackedproper enforcement and by 1985 was defunct, asU.S. market share in Japan plummeted andJapanese companies began dumping 256K DRAMsand EPROMs in the United States.45

A second attempt was made after U.S. manu-facturers and the U.S. Department of Commercefiled antidumping suits against Japanese firms in1985, and the SIA filed a petition for retributionagainst manufacturers who were eventually foundguilty of dumping. Through the SemiconductorTrade Agreement of 1986, the United Statesattempted to sway Japanese producers to sell atcost-based prices and to ensure U.S. manufactur-ers enhanced access to Japanese markets. Aseparate side letter to the STA sought commit-

ments by Japan to encourage its semiconductormanufacturers to increase purchases of U. S.-produced semiconductors, with the goal of in-creasing the foreign share of the Japanese marketto at least 20 percent by the end of 1991.46

Nevertheless, few steps were taken to implementthis requirement, and in April 1987 PresidentReagan announced formal sanctions against Japa-nese electronics producers. This action, coupledwith prospects that Japan might be labeled apriority country under the Super 301 provisions ofthe Omnibus Competitiveness Act of 1988 and besubject to retaliatory actions by the United States,induced significant changes in Japan’s attitudetoward the STA. Efforts were soon undertaken toboost foreign sales, including the formulation ofmarket access plans and specific company prom-ises of increased purchases.

The 20 percent target was not reached by 1991,but given signs of improvement, the SIA and theComputer Systems Policy Project lobbied theU.S. government to negotiate anew semiconduc-tor agreement with Japan. Under this accord,Japan agreed to reach the 20 percent mark by thefourth quarter of 1992. By the fourth quarter of1992, U.S. companies had achieved 20.2 percent,though market share declined the followingquarter. Despite efforts by the Clinton administra-tion to get further firm, numerical commitmentsof market share, many U.S. companies thoughtsuch measures unnecessary because they hadalready become an integral part of Japanesesupply networks.

FUTURE CHALLENGES TO THE U.S.SEMICONDUCTOR INDUSTRY

While the efforts of the U.S. government andindustry have been somewhat successful in en-hancing the competitiveness of U.S. semiconduc-tor industry, additional efforts will undoubtedly

45 ~om~~ Howell, op. cit., foOtnote 15, p. 102.

46 ~cording to tie SL4, the Japanese govemmcnt originally denied the existence of the side letter and later argued tit w~e cornmit~gthem to encouraging Japanese companies to increase foreign purchases, it did not commit them to impose numerical procurement quotas oncompanies.


be necessary. U.S. manufacturers may haveregained market leadership in semiconductorsand equipment, but Japanese competitors willlikely reassert themselves in the near future.Much of the recent slowdown in Japanese semi-conductor production is the result of a seriousrecession that has reduced local demand forsemiconductor products. A resurgence of demandcould boost production and Japanese marketshare once again.

U.S. and Japanese semiconductor manufactur-ers will be faced with a number of additionalchallenges over the next decade. Industry willneed to surmount many technological obstacles inboth semiconductor design and manufacture inorder to meet future requirements for morecomplex, sophisticated integrated circuits. At thesame time, the industry will have to face increas-ing costs for R&D and production that couldthreaten the ability of individual manufacturers to

meet their goals.

9 TechnologyFuture integrated circuits will offer consider-

able advantages over existing ICs. Although thespecific path of technological development can-not be accurately predicted more than a few yearsinto the future, realistic predictions can be madeon the basis of historical trends in IC capability.Since 1959, the number of components per circuitin the most advanced integrated circuits hasdoubled every year, following a trend line re-ferred to as Moore’s Law.47 This trend reflectstwo underlying processes: continued reductionsin the size of individual devices (e.g., transistors)on each chip-which thereby allow more devicesto be packed into each square centimeter of

chip-and the simultaneous increases in the sizeof each die (or chip) .48

As of 1992, state-of-the-art manufacturers couldproduce 4M DRAMs containing over 300,000gates per chip on 132-mm2 chips using 0.5-micron feature sizes. In order to stay on theMoore’s Law curves, by the year 2007 they willhave to produce 16-gigabit (G) DRAMs contain-ing over 20 million gates on 1,000 mm2 chips withO.10-micron feature sizes.49 Future ICs will havegreater power demands and will be able to operateon just 1.5 volts of electricity versus the 3.3 to 5volts required of current portable and desktopsystems. Maximum operating speeds will risefrom 120 megahertz (MHz) to 1,000 MHz,allowing faster computation. Other criteria willalso improve (table 3-5).

Achieving these specifications in the timeframeindicated will require industry to overcome nu-merous technical hurdles. A recent workshopsponsored by the SIA and attended by representa-tives of the semiconductor industry, its suppliers,government, and the national labs, analyzed thetechnological advances necessary to achieve thesegoals, in keeping with the Moore’s Laws projec-tions. The results of this workshop represent aconsensus view on industry needs and require-ments for the next 15 years. The group identified11 major areas in which technical progress will becritical (table 3-6). While each area presents anumber of difficulties, lithography may prove themost critical (box 3-A). Workshop participantsalso identified eight cross-cutting competenciesthat pervade these 11 technology areas. Advancesin these specific competencies, outlined below,will allow further progress in the technologyareas.

47 Moore’s hw is n~ed titer Gordon E. Moore who first noted the trend in 1964 and predicted it would continue. Robert N. Noyce,“Microelectronics,” Scienr.ifk American, September 1977.

da U.S. ConWess, Office of Technolo~ Assessmen~ Miniaturization Technologies, OTA-TCT-514 (Washington, DC: U.S. GovernmentPrinting OflIce, November 1991), p. 13.

49 Semiconductor Indus~ Associatio~ Semiconductor Technology: Workshop Working Group Reports, (San Jose, CA: semiconductorIndustry AssOciatiOQ 1993), p. 3.


Table 3-5—Overall Roadmap Technology Characteristics

Characteristic 1992 1995 1998 2001 2004 2007

Feature size (microns)Gates per chip (millions)

Bits per chipDRAMSRAM

Wafer processing cost ($/cm2)

Chip size (mm2)logicmemory

Wafer diameter (mm)

Defect density (defects/cm2)

Levels of interconnect (for logic)

Maximum power (watts/die)

high performance

portable

Power supply voltagedesktop

portable

Number of 1/0’s

Processing speed (MHz)off chipon chip

0.500.3

16M4M

$4.00

250132

200

0.10

3

103

53.3

500

60120

0.350.8

64M16M

3.90

400200

200

0.05

4-5

154

3.32.2

750

100200

0.252.0

256M64M

3.80

600320

200-400

0.03

5

304

2.22.2

1,500

175

350

0,185.0

1G256M

3.70

800500

200-400

0.01

5-6

404

2.21.5

2,000

250500

0,1210.0

4G1G

3.60

1,000700

200-400

0.004

6

40-1204

1.51.5

3,500

350700

0.1020.0

16G4G

3.50

1,2501,000

200-400

0.002

6-7

40-2004

1.51.5

5,000

5001,000

NOTES: DRAM . Dynamic Random Access Memory; SRAM - Static Random Access Memory; VO - inpu~output.

SOURCE: Semiconductor Industry Association, Semiconductor TAno/ogy Workshop Reports (San Jose, CA:Semiconductor Industry Association, 1993), p. 3.

Materials

There is a critical need for a wide range ofhigh-quality materials for the IC industry, but, todate, industry has undertaken little coordinatedmaterials research. Materials needs include im-provements in all feedstock materials, includingsilicon wafers; wet and dry chemicals used foretching and cleaning; construction materials forequipment and plant; consumables such as resists,masks, ceramics, glasses, metal sputtering tar-gets; packaging materials; and advanced substratematerials (insulators such as glass) on whichgroups of ICs can be produced and intercon-nected. Specific needs for substrate materialsinclude dielectrics that are effective insulators atthicknesses of just 50 angstroms; materials for

storage cells and capacitors; materials that can beintegrated with highly conductive metals forinterconnects; and materials for encapsulatingand protecting bare chips.

New materials can Provide a competitiveadvantage for fabrication equipment. Of particu-lar importance may be surface-treated materialsfor use in construction of etch chambers and othercorrosive environments and special materialssuch as those used in construction of electrostaticchucks.

MetrologyAdvances in the ability to measure the results

of processing operations are essential to maintainthe close production tolerance needed by future


Table 3-6-Technical Areas Identified in SIA Roadmaps

Technical area Required advances

Chip design and test

Lithography

Materials and bulk processes

Manufacturing systems

Process/device/structure CAD

Equipment modeling anddesign

Device/process integration

Interconnect

Environmental safety andhealth

Packaging

Manufacturing facilities

Enhanced computer-aided design tools to help engineers design ICswith more devices and complicated interconnections.

Reductions in the Iinewidth and overlay capabilities to allow smallerdevices to be drawn on a semiconductor (processes other thanphotolithography such as x-rays, electron beams, or ion beams maybe needed); compatible mask and resist technologies.

Improvement in processes used for creating oxides and depositingfilms on the semiconductor wafer; advances in temperature control,mass flow control, materials purity, and modeling of bulk processes.

More robust systems to handle increased volume of data used in lotscheduling and planning, wafer tracking, work-in-process control,failure analysis support, cost accounting, purchasing, and capacityplanning; new software tools for managing flexibility in the factoryconfiguration, including process equipment, product mix, and manu-facturing technology,

New computer-aided design tools to model new processes, circuits,factory equipment, and manufacturing systems; 3-D models tocharacterize processes such as ion implantation and diffusion. Use ofsuch models will help limit the amount of experimentation needed tobring new processes on-line,

Advances in models of manufacturing tools for lithography, plasmaetching, thermal processing, and epitaxy to allow design of new toolsthat can reduce base equipment costs, reduce time-to-marketthrough integrated design tools, and improve predictability of per-formance.

Progress along the Moore’s Law curves will require continuedattention to troth front-end (design) and back-end (assembly and test)issues. Advances in process integration will ensure the compatibilityof progress in these two areas.

Advances in dielectric and metal film formation and etch processes toallow multiple layers and more complex patterns of interconnection,and therefore higher operating speeds and chip densities.

Means to limit the use of chemicals and processes that are harmfulto human health and the environment, or to reduce the risk associatedwith their use.

Advances in the packages that house ICs to ensure the integrity of theelectrical signals and the power provided to the chip.

Advances in wafer handling systems and raw materials systems (forwafers and gases); development of smaller “micro-fabs” that canefficiently produce small batches of wafers, yet be scaled up for massproduction, and the manufacturing tools required to support them.

SOURCE: Office of Technology Assessment, 1993; based on Semiconductor Industry Association, Swnbonductor%chnology Workshop Reports (San Jose, CA: Semiconductor Industry Association, 1993).


Box 3-A–Advances in Lithography

Central to future advances in semi- Table 3-7—Requirements for Lithography Systemsconductor manufacturing will be advancesin lithography. Lithography is the primary 1992 1995 1998 2001 2004 2007

technology driver for boosting the perform- Leading Edge

ance of integrated circuits. Lithography \~~)M ‘ize

16M 6 4 M 2 5 6 M 1 G 4 G 1 6 Gincludes exposure, resist processing, coat-

ing and developing, masks, and their asso- Resolution (rim) 500 350 250 180 120 NA

ciated processing. It is also the dominant Overlay (nm)150 100-200 75-9550-7035-50 NA

cost factor in semiconductor fabrication,NOTES: M = megabits; G = glgabits; nm = nanometers; NA = not

accounting for 35 percent of the processed available.wafer cost, SOURCE: %mioonduotor Industry Association, Semkwr)ductor T6ch-

In order to further reduce the size of nobgy Wkshop Reports (San Jose, CA: Semiconductor Industry

the individual devices on an integrated ‘S-aibn’ 1993)’ ‘“ 37”circuit, continued improvement will be neededin both the resolution and overlay capabilities of lithography systems (table 3-7). Resolution determinesthe width of the smallest line that can be etched into the silicon wafer. Overlay capability refers to theability of the system to properly align subsequent layers of integrated circuit on top of those below it. Bothdepend strongly on the wavelength of light used in the exposure (shorter wavelengths allow higherresolution for narrower linewidths) and on the method used to project the light onto the wafer. Inprojection lithography systems, a mask about five times the size of the desired pattern is placed betweenthe light source and the wafer and is focused by a series of lenses onto the wafer below. In direct overlayor proximity systems, a mask the same size as the desired integrated circuit is placed directly over thesilicon wafer and exposed to the light. Projection systems allow greater resolution and overlay capabilityand are used inmost current systems, but may require sophisticated optics for future, higher-resolutionsystems.

(continued on next page)

IC technology. Lithography process control, for chambers is a major impediment to understandinginstance, requires that lines and spaces be measur-able to within one-third of the minimum dimen-sion. The present realistic capability for wafermeasurements is O.15 micron. Therefore, newmeasurement methods must be developed tocontrol processes with critical dimensions lessthan 0.5 micron to ensure adequate processcontrol.

Measurement capability also limits processcharacterization. For example, surface measure-ments required to evaluate materials growth andetch processes limit modeling and characteriza-tion of these important processes. The inability toaccurately analyze residual gases in process

chemical plasma processes. Similarly, metrologylimits the device structure evaluation; today’smethods for measuring vertical device structurescannot accurately resolve the sharp impuritygradients of the shallow junctions used in 0.25-micron processes.

Advances in metrology are necessary for im-provements in contamination control. Presentmeasurement techniques are capable of detecting109 (one billion) heavy metal contaminant atomsper cm2. Process controls required to achievecompetitive process yields 15 years from nowwill require detection of 107 (ten million) atomsper cm2. Advanced IC fabrication requires meas-


Box 3-A--Advances in Lithography--Continued

Current production-level lithography systems operate at optical wavelengths of light, typicallyeither 436 nanometers (G-line) or 365 nanometers (l-line), generated by mercury vapor lamps. Theyyield a resolution of about 0.5 micron. Smaller Iinewidths will require shorter wavelength light, in the“deep ultraviolet” portion of the spectrum (248 or 193 nanometers), generated by excimer lasers. Thesewavelengths could generate Iinewidths as narrow as 0.18 microns, but difficulties in narrowing the depthof focus and diffraction could limit their applicability y past 0.25 microns. Alternative technologies mayneed to be sought.

One possibility is x-ray lithography, which uses significantly shorter wavelengths of light (about 5nanometers), but otherwise operates much like an ultraviolet system. Proximity x-ray systems havebeen studied for several years, but require a bright source of x-rays such as a synchrotrons and cannotoffer the resolution of projection systems. The latter constraint could limit proximity x-rays from beingused past 0.18 microns. More recently, research has begun to focus on projection x-ray systems, whichcould offer Iinewidths of 0.12 micron or less and rely on less expensive sources of x-rays. Developmentof such systems would require significant advances in the manufacture of the necessary optics, aprocess that requires the creation of multiple-layered films with precisely controlled thickness.

Alternatively, smaller Iinewidths could be achieved with electron beam or ion beam techniques inwhich beams of high-energy electrons or charged particles (ions) are fired at the surface of the wafer.E-beams have demonstrated resolution as small as 2 nanometers in certain materials in a laboratorysetting,1 but are limited in their applicability to full-scale production lines because they can draw linesonly one at a time. Ion beams can generate Iinewidths as small as 100 nm, but, as with e-beams, mustbe scanned across the entire wafer surface one step at a time. Research is being conducted on methodsfor increasing the throughput of such direct-write systems, but is still in the early stages.

1 l.J.S. congress, Office of T~nology Assessment hfh?hdtudzatlon %C/?d0@8S, OTA-TCT-514 -mg-ton, DC: U.S. Government Printing Office, November 1991), p. 37.

urement capabilities consistent with tight process immediately. Sensors are also required to im-controls. Advances in the science of measurement(i.e., metrology) are important to both semicon-ductor producers and equipment suppliers.

Sensors For Process ControlNew low-cost, reliable, and sensitive sensors

are necessary to increase the rate of learning intool development, reduce the time to market forprocess equipment, improve tool and processcontrols, increase process yield, and reduce de-fects.

Greater use of real-time, in situ sensors isdriven by economics. Sensors are the criticalelements in closed-loop process control and arenecessary for detecting process problems whenthey occur, so that corrective actions can be taken

prove frost-pass success when introducing processvariations.

Accurate control of even such commonly usedprocesses as rapid thermal processing (RTP) andplasma deposition and etch requires new sensorapproaches. The technique used to control todaysRTP equipment (called back surface emission),for instance, leads to 50 to 200 degree Celsiustemperature errors. Reliable RTP control requiresnew temperature sensors that are more accurateand more responsive to real-time front surfaceconditions.

Sensors that monitor gas and chemical purityand cleanliness are also of major concern. Gasanalyzers, mass controller calibrators, chemically


selective sensors, and particle detectors are allessential to maintain process cleanliness. Envi-ronmentally conscious manufacturing will re-quire recycling and reuse of chemicals not only tominimize waste, but also to reduce cost. Chemicalgeneration and reuse will require sensors that candetect impurities at a parts per billion level foron-line monitors of chemical purity.

Modeling and SimulationIC technology has developed faster that the

capability for modeling and simulating its variouselements. Cost and complexity of IC fabricationmake the acquisition and application of advancedmodeling and simulation tools an imperative.

Computer-based modeling and simulation havebecome essential in all areas of semiconductortechnology. Models are now used for materials,devices, and processes, as well as for circuits andsystems. In addition, entire fabrication equipmentsystems—from process chambers and wafer han-dling systems to the design and operation ofcomplete factories-require modeling and simu-lation.

The physics base for models is still incomplete.Today’s modeling and simulation tools are unreli-able, incompatible with one another, and unableto cover the entire range of requirements. But,modeling and simulation are critical to the ICindustry because of the need for faster implemen-tation of error-free designs for chips, systems, andfactories. Modeling and simulation have perva-sive applicability and provide the tools necessaryin the design, test, and production of materials,equipment, processes, factories, devices, systems,packages, circuits, and ICs.

The highly complex task of developing suita-ble models requires a vast range of skills, fromphysics and chemistry to electrical/mechanicalengineering and computer science. These skillsare developed in environments such as nationallaboratories, universities, computer systems pro-ducers, and the semiconductor industry.

Reliability and QualityExisting manufacturing methods do not ensure

reliability and quality of complex semiconductorproducts, particularly where the physical limits ofthe materials, processes, and structures are chal-lenged. In submicrometer structures, processesand structures are being pushed to the physicallimits of breakdown voltage, interconnect current-carrying capacity, stress, defect and contamina-tion levels, alignment errors, and noise margins.Shallow junctions, trenches, stacks, capacitors,new device architectures, and ultra-thin intercon-nect lines each introduce new failure possibilities.

Commercial success of semiconductor tech-nology in all applications depends on reliable,long-term performance to specification. Withcurrent technologies, however, the reliability ofsubmicrometer devices cannot be determined inadvance. A systematic approach to reliabilityengineering must be therefore be developed.Standard test environments, based on design rulesand fabrication conditions, must be available tothe entire IC community. Standard tests applied tostandard test structures will simplify the interpre-tation and comparison of the resulting data. Asthey affect reliability, the roles of microstructure,topography, and stress must be determined. Bothempirical and fundamental models must be devel-oped and experimentally confined. Techniquessuch as design-for-reliability and an understand-ing of the relationships between process contami-nation and reliability are essential to a systemsapproach to reliability and quality.

Contamination-Free Manufacturing (CFM)Impurities and particles are unintended con-

taminants in all IC manufacturing steps. Sourcesof contamination, which include processing ma-terials (including chemicals and gases), processchambers, wafer handling systems, and facilities,contribute to reduced IC process yields. Asproducts and process complexity increase, thesize and density of defects or impurities must besubstantially decreased.


IC producers expect to achieve yields close to100 percent to meet cost and reliability goals.This requires processes, materials, equipment,and new fabrication facilities to be defect-free. Aclear understanding of the generation, detection,and elimination technologies for unwanted impu-rities and particulate is critical.

Manufacturing-Critical Software EngineeringIC manufacturing process equipment is in-

creasingly regulated by software-programmedcontrollers. Software failures are a major problemfor today’s fabrication equipment. This problemwill worsen with greater equipment and factoryautomation. Provisions for the creation, upgrade,and maintenance of equipment and factory soft-ware are essential.

Improved software design for reliability andtesting is key to efficient maintenance and re-duced equipment failure rate. Developers ofequipment control architectures must look be-yond immediate applications to include expanda-bility for future applications. Self-testing codes,modular structures to provide flexibility, use ofefficient high-level languages, noise immunity,and interrupt timing standards are all important toimprove software performance and reliability inthe semiconductor factory. Other manufacturing-critical software-related issues include manufac-turing databases, logistics planning, and factoryand equipment control. These factory systemapplications must interact closely with equip-ment.

B costsThe technical challenges outlined above will

not only stretch the scientific and engineeringtalents of U.S. semiconductor manufacturers,they will also stretch their financial resources.R&D and production facilities are becomingmore costly to the semiconductor industry, andwithout a radical change in manufacturing tech-nology will continue to rise on their current trendlines. With product life cycles as short as three or

four years for most semiconductor products, largeinvestments in R&D and capital must be continu-ally maintained. Although costs of capital seem tobe converging in the United States and Japan,U.S. manufacturers may still beat a disadvantagecompared with international rivals who oftenreceive direct government support of commercialtechnology development and whose industrystructure is more tolerant of large investmentswith longer payback periods. In the absence ofother mechanisms, U.S. companies may be forcedto enter into more strategic alliances to poolresources with other companies, both at home andabroad.

R&DIn order to remain competitive, U.S. manufac-

turers will have to maintain high levels ofspending on R&D. The rapid pace of innovationin the semiconductor industry requires suchinvestments to support new product and processdevelopment. As competition has grown, U.S.companies have been forced to increase theirR&D spending. Between 1980 and 1991, annualR&D expenditures by U.S. merchant producersincreased by a factor of five, from $600 million to$2.9 billion. This growth in R&D has far outpacedgains in sales revenues, reflecting the increasingR&D intensity of semiconductor manufacturing.As a result, R&D expenditures as a percent ofsales increased from 7.4 to 13.3 percent since1982 (figure 3-13). The semiconductor industry isnow the most R&D-intensive of all major indus-trial sectors except computer software and serv-ices (figure 3-14).

Production FacilitiesCost for new production facilities are likely to

continue growing over the next decade. Due torising equipment costs and the increasing numberof processes required for each new generation ofsemiconductor chip, the cost of a state-of-the-artwafer fab has risen from $25 million in 1989 toover $500 million in 1992, and is expected to

.


S billion3 j

1

2

1

k

Figure 3-13—Sales Revenues and ExpendituresU.S. Semiconductor Industry

on R&D in the

0/0 sales revenue~ 20

I

15

I 10

0 51978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991

SOURCE: Semiconductor Industry Association, Annual Databaok: G/oba/ and U.S. Semiconductor CompetitiveTrerrds-1978-1991 (San Jose, CA: Semiconductor Industry Association, 1992), p. 41.

Figure 3-14—R&D Expenditures in Key Sectors of U.S. Industry

Electrical products

Business machines

General manufacturingTelecommunications

Aerospace

Automotive

ChemicalsInstrumentsElectronicsComputers

PharmaceuticalsComputer communications

SemiconductorsSoftware & services

0% 2% 4% 6% 8% 10% 1 2 % 14’%0

R&D expenditures as a percent of sales revenue

SOURCE: Semiconductor Industry Association, Annual Databook: Globa/ and U.S. Semiconductor CompetitiveTrends-1978-199f (San Jose, CA: Semiconductor Industry Association, 1992), p. 42.

exceed $1 billion by 199550 (figure 3-15). About of semiconductor manufacturing equipment, each75 percent of this cost is associated with fabrica- of which can cost between $200,000 and $3tion equipment as opposed to land and build- million, and each of which must be maintained inings.

51 Processing a typical wafer now requires a clean environment that allows fewer than oneover 300 steps, conducted on hundreds of pieces O. 15-micron particle per cubic foot.

~ w~em tie dish of silicon on which hundreds of semiconductor chips are simultaneously produced.

51 Semiconductor lndus~ Association, Annua[Databook: Global and U.S. Semiconductor Compefi”tive Trends, 1978-1991 (San Jose, CA:

Semiconductor Indushy Association, 1992), p. 38.


1000900800

700

600

500

400

300

200

100

0

Figure 3-15-Growing Cost of a WaferFabrication Facility

S million

1970 1975 1980 1985 1990 1995

SOURCE: Arati Prabhakar, Advanced Research Projects Agency,“Flexible Intelligent Microelectronics Manufacturing,” &iefing to OTAon June 15, 1993.

Moreover, the rapid pace of technologicalinnovation in the semiconductor industry requirescompanies to make these large investments inplant and equipment on a regular basis. Newfacilities may become outdated after only threeyears of operation. While they may then be usedto produce other types of devices that do not relyon state-of-the-art processes, much of the equip-ment cannot be modified for next-generationchips. The advantages gained by being first tomarket (cost reduction through learning curves,market expansion) pressures companies to bringnew facilities on-line rapidly.

Some alleviation of cost and economy of scaleconsiderations could be achieved with moreflexible manufacturing equipment. ARPA re-cently completed a program entitled Microelec-tronic Manufacturing Science and Technology(MMST) that investigated the economic benefitsof flexible manufacturing systems to semicon-ductor manufacturers and developed rudimentarysystems for flexibly processing small batches ofwafers. Such technologies appear capable ofreducing the economies of scale necessary for anefficient plant, but are applicable primarily tosmall batch manufacturing and will thus remain

outside the purview of mainstream semiconduc-tor manufacturers for some time.

ALTERNATIVES FOR FUTURE R&DThe high costs associated with continued

success in the semiconductor industry are rapidlyexceeding the financial capabilities of individualcompanies. Moreover, the long-term nature of therequired investments exceeds the planning hori-zons of most U.S. corporations. In recent years,many companies have redirected their researchdollars to short-term projects focused on near-term product development. The two U.S. compa-nies that had formerly filled the gap betweenuniversity research and corporate product devel-opment by focusing on initial prototype develop-ment, IBM and AT&T’s Bell Laboratories, haveredirected their R&D dollars to link researchprograms more closely to product developmentactivities.

In order to make up for this growing deficiency,semiconductor companies have entered into stra-tegic alliances with domestic, or more typicallyinternational, partners to pool their resources withother companies and share the risks associatedwith large R&D programs. An alternative sourceof R&D funding would be the federal govern-ment. The end of the Cold War provides anopportunity for the government to redirect itsinvestment in defense technologies to programsmore closely tied to commercial competitiveness.In this realm, federal laboratories may provide akey link in the R&D cycle.

1 Strategic AlliancesMany companies are financing R&D projects

and production facilities in part through strategicalliances with domestic or international partners.While strategic alliances are not new to thesemiconductor industry, their number has in-creased and their character has changed over thepast decade. Throughout the 1970s and into theearly 1980s, alliances between U.S. and Japanesecompanies were few and involved the licensing of


technology from small U.S. companies thatlacked capital and manufacturing facilities tolarger Japanese fins. By the late 1980s, thenumber of publicly announced strategic alliancesannounced each year had risen to about 100, abouthalf of which, in 1990, were joint developmentagreements, joint fabrication agreements, or othertypes of joint ventures (figure 3-16).52

Strategic alliances are also becoming moreprevalent among large U.S. semiconductor manu-facturers such as IBM, Motorola, and Intel asdevelopment and production costs continue torise, straining the financial resources of thesecompanies. For example, IBM, Toshiba, andSiemens A.G. have teamed to develop technologyfor 256-M DRAMs, the cost of which no com-pany could individually afford, given the lowprofit margins associated with memory devices.Similarly, Advanced Micro Devices Inc. andFujitsu Ltd. agreed to establish a $700-millionstate-of-the-art joint fab for producing a new typeof memory device called ‘‘flash memories. ’

These alliances allow companies to pursuetechnologies that might otherwise be too expen-sive to develop alone, and they provide ways oftapping into additional pools of funding. This isof interest not just to U.S. firms, but to Japanesecompanies as well. Overcapacity and a weakeconomy in Japan have pushed Japanese semi-conductor manufacturers’ capital spending levelsdown 29 percent in 1992; spending is expected tofall another 13 percent in 1993. Capital expendi-tures are likely to rise in North America by 13percent in 1993, due in large part to a 25-percentincrease by Intel Corp.

However, alliances raise concern about thepossible transfer of U.S. technology abroad.Alliances are typically structured to team up U.S.technology and strengths in design and innova-tion with Japanese manufacturing capability.While the transfer of the product technology to

Figure 3-1 6-U.S.-Japan Semiconductor Alliances,1984-1990

Number of new alliances’ 4 0 ~— 1

1201

100

8 0

6 0

40

201

01984 1985 1986 1987 1988 1989 1990

SOURCE: Bruce Kogut and Dong4ae Kim, “Strategie Alliances inSemiconductor Firms,” report to Dataquest, January 1991.

Japan can be fairly easily accomplished, thetransfer of manufacturing know-how back to theU.S. is more difficult. With manufacturing takingplace in Japan, U.S. partners have difficultylearning from their Japanese partners. Therefore,such alliances may be more beneficial to Japanesecompanies than to U.S. companies. A recentreport by the National Research Council warnsthat a continuation of strategic alliances of thekind found today in the semiconductor industrymay prevent both the United States and Japanfrom developing the complementary capabilitiesthey seek in their alliances.53

9 Greater Industry/GovernmentCollaboration

An alternative to strategic alliances would be agreater government role in supporting semicon-ductor R&D and/or production. The governmenthas many facilities capable of conducting re-search relevant to the semiconductor industry.With the end of the Cold War, resources that were

sz me ~Uber of ~cm~ alllances may be considerably larger than the number announced, perhaps by a factor of ‘o ‘r ‘ore” ‘atioti

Research Council, U, S.-Japan Strategic Alliances in the Semiconductor Industry (Washingto& DC: National Academy Press, 1992), p. 32.

53 Ibid, pp. 2-3.


formerly devoted to defense missions maybe able ready has a mission to support industry, hasto serve commercial purposes. The Department of developed a series of plans targeted to foster andDefense and the Department of Energy laborato- support technological advances in the semicon-ries could serve as collaborators with industry on ductor industry.new technology development. NIST, which al-

Index

Advanced Computing Laboratory, 40Advanced Micro Devices, Inc., 42,61, 78Advanced Research Projects Agency

electronics manufacturing technology funding, 56flexible manufacturing systems, 77funding sources, 3GILD process, 44lithography funding, 19NCAICM project funding, 50SEMATECH relationship, 10-11, 16,67

Advanced Technology Program, 4,29,48Advisory panels, 9Air Force, use of ICs in Minuteman 11 guidance

system, 57AMD. See Advanced Micro Devices, Inc.American Electronics Association, 40-41Application-specific integrated circuits, 58ARPA, See Advanced Research Projects AgencyAT&T, 42

Bardeen, John, 57Beam technologies, Los Alamos National Laborato-

ries and, 41-42Bell Laboratories, 56, 77Bilateral trade agreements, between U.S. and Japan, 68Brattain, Walter H., 57Bush administration, National Technology

Initiative, 7

CALEOT. See Center for Applications of Laser andElectro-Optic Technologies

Canon, 17-18Capital availability, U.S. and Japan comparison, 59-61

“Captive” suppliers, 61Center for Applications of Laser and E1ectro-Optic

Technologies, 43Center for Contamination-Free Manufacturing, 37-38Center for Microelectronics Technology, 35, 37-38CFM. See Center for Contamination-Free

ManufacturingChemical vapor deposition technology, 39-40,50Clinton administration

NIST budget, 29-30trade commitments from Japan, 68

Closed-loop process control, 73CMOS. See Complementary metal oxide semiconduc-

tor technologyCMT See Center for Microelectronics TechnologyCold War end, 12,20,55-56,77,78-79Competitive history of semiconductor industry

early U.S. dominance, 56-57Japanese industry, 57-64U.S. response to Japanese challenge, 64-68

Complementary metal oxide semiconductortechnology, 32

Compound Semiconductor Research Laboratory, 33Computer-aided design, Los Alamos National Labora-

tories and, 38Computer Systems Policy Project, 68Contamination-free manufacturing, 37-38,74-75Cooperative research and development agreements

description, 3-4laboratory resources devoted to, 24Lawrence Livermore National Laboratory, 42Los Alamos National Laboratories, 38management structure and, 8

81


National Institute of Standards and Technology, 21,48

negotiating with DOE labs, 4-7, 20-21, 25Sandia National Laboratories, 34-35

CRADAs. See Cooperative research and developmentagreements

CVD. See Chemical vapor deposition technology

Defense Conversion: Redirecting R&D, 7, 8Department of Commerce, 3,68Department of Defense

funding for semiconductor projects, 3,53SEMATECH funding, 2

Department of Energy Defense Program laboratories.See DOE Defense Program laboratories

DoD. See Department of DefenseDOE Defense Program laboratories

areas of expertise, 21, 25-28authority to execute CRADAs, 3-4collaboration with industry, 25-28, 79competition among labs for research funding, 13-14coordination of activities, 48-50core competencies, 26-28CRADAs signed, 27-28evaluation criteria for, 14-16functions, 25funding sources, 20funds committed to CRADAs, 4lithography expenditures, 19negotiating CRADAs with, 4-7, 20-21, 25nondefense resource allocation, 28operational budgets, 27, 28semiconductor program description, 30-32

Downstream marketsshifting location of, 63U.S. economy and, 55-56

DRAM chips. See Dynamic random access memorychips

DuPont, 42Dynamic random access memory chips

design of, 65dumping by Japanese manufacturers, 61,68Japanese market share, 57strategic alliances, 78

Ellipsometers, 45-46Environmental Protection Agency, 40Environmental safety and health

Lawrence Livermore National Laboratory programs,50

Los Alamos National Laboratory programs, 40-41,50

Sandia National Laboratories programs, 50EPA. See Environmental Protection AgencyEPROMs. See Erasable programmable read-only

memoriesErasable programmable read-only memories, Japanese

dumping of, 61,68ES&H. See Environmental Safety & HealthEvaluation criteria for national laboratories, 14-16

Fairchild Camera, 57Federal Technology Transfer Act, 6Flash memories, 78Flexible manufacturing systems, 77FTTA. See Federal Technology Transfer ActFujitsu Ltd., 78

Gas immersion laser doping, 43-44GCA, 17-18GCA-Tropel, 42General Signal, 17GILD. See Gas immersion laser dopingGOGOs. See Government-owned, government-

operated labsGovernment-owned, government-operated labs,

CRADAs and, 6-7

Hampshire Instruments, 43Hitachi, 60Hollings, Sen. Ernest, 7

IBMcaptive supplier role, 61pilot line donation, 32,36R&D expenditures, 77strategic alliances, 78use of transistors rather than ICs, 57

ICs. See Integrated circuitsIndustrial Waste Reduction Program, 40Industry/government collaboration, 3,78-79Integrated circuits

costs, 75-77DOE labs and, 25early dominance of industry by U. S., 57invention of, 56-57Japanese market share, 57,58

Index 83

technology challenges, 69-75U.S. market share, 57-58

Intel Corp., 61strategic alliances, 78

ITC. See U.S. International Trade Commission

Jamar, 42Japan

availability of capital, 59-61bilateral trade agreements with U. S., 68challenge to U.S. industry, 57-64dumping of DRAMs, 61,68keiretsu banks, 60market share, 18, 57, 58production yields compared to U. S., 67strategic alliances with U. S., 77-78structure of semiconductor industry, 17, 60-61suppliers’ market share, 63-64trade practices, 61-63U.S. response to challenge, 64-68

Japan Development Bank, 60Joint Association for the Advancement of Supercritical

Fluids, 40

Keiretsu banks, 60Kilby, Jack, 57KLA, 42

Laboratory/industry collaborationDepartment of Energy laboratories, 25-28focus areas for Federal labs, 48-50National Institute of Standards and Technology, 28-30success factors, 6

Laser technology, Lawrence Livermore National Lab-oratory and, 43-44

Lawrence-Berkeley Laboratory, 42Lawrence Livermore National Laboratory

areas of expertise, 21, 24, 25, 31CRADAs in microelectronics, 42,44defense activity budget, 28environmental safety and health programs, 50IC experience, 25laser applications, 4344modeling capabilities, 50operating budget, 42semiconductor programs, 42-44soft x-ray projection lithography, 42-43

Life Cycle Activities project, 40Lithography, 13, 16-20,72-73

LLNL. See Lawrence Livermore National LaboratoryLos Alamos National Laboratory

areas of expertise, 21, 24, 25beam technologies, 41-42defense activity budget, 28environmental safety and health programs, 40-41,50High-Performance Computing Research Center

designation, 40IC experience, 25microelectronics CRADAs, 38modeling and simulation programs, 38-40, 41, 50semiconductor programs, 38-42

Management structure of laboratories, 8-12Materials needs for ICs, 70MDL. See Microelectronics Development LabMemorandum of agreement between NIST and

Sandia, 4,50“Merchant’ manufacturers, 61Metrology, 70, 72-73. See also National Institute of

Standards and TechnologyMicrascan, 17-18Micrion Inc., 42Microelectronic Manufacturing Science and

Technology, 77Microelectronics and Computer Technology

Corporation, 3,40,65Microelectronics Design Laboratory, 33Microelectronics Development Laboratory, 32,35Microelectronics Quality and Reliability Center, 33MicroTech 2000 workshop, 5,66Ministry of International Trade and Industry

alliances between Japanese firms versus interna-tional joint ventures, 62

funding of semiconductor industry, 57influence over businesses, 18-19loan recommendations, 60

MITI. See Ministry of International Trade and IndustryModeling and simulation, 3840,41,50,74Moore’s law, 69Motorola, 40,67

NACS, See National Advisory Committee onSemiconductors

NASA. See National Aeronautics and SpaceAdministration

National Advisory Committee on Semiconductors, 5,10


National Aeronautics and Space Administration, useof ICs in Apollo Program, 57

National Bureau of Standards. See National Institute ofStandards and Technology

National Center for Advanced Information Compo-nent Manufacturing, 50

National Competitiveness Technology Transfer Act, 6National Institute of Standards and Technology

areas of expertise, 24, 31-32collaboration with industry, 25, 28-30, 79coordination of activities, 48-50core competencies, 31CRADA process, 4,7,21CRADAs signed, 48ellipsometer development, 45-46evaluation criteria for, 14-16extramural programs, 44-45,48functions, 28-29funding sources, 20IC experience, 25intramural programs, 30, 44,4546,48lithography expenditures, 19Materials Technology group, 45memorandum of agreement with Sandia, 4, 50metrology and SIA technology roadmaps, 32metrology technologies, 12-13,21,24,28-30,31-32Office of Microelectronics Programs, 46operating budget, 7, 29-30resistivity measurement, 47SEMATECH-sponsored projects, 46,48Semiconductor Electronics Division, 45,48semiconductor programs, 30-32, 44-48

National Research Council, 78National security issues, 55-56National Technology Initiative, 7NCAICM. See National Center for Advanced Informa-

tion Component ManufacturingNCTTA. See National Competitiveness Technology

Transfer ActNikon, 17, 18Nippon Electric Corp., 60NIST. See National Institute of Standards and

TechnologyNonvolatile Electronics, Inc., 48Noyce, Robert, 57

Omnibus Trade and Competitiveness Act of 1988NIST mission, 29

Super 301 provisions, 68Overlap among the four laboratories, 2,21,50

Partnership for Total Quality, 67Perkin-Elmer, 17Policy issues

assuring effective hand-offs, 2, 16-20establishing evaluation criteria, 2, 14-16focusing the efforts of the laboratories, 2, 12-14funding, 2,20-21management structure, 1, 8-12overlap among the four laboratories, 2, 21, 50semiconductor industry support, 52-53

Process Design Laboratory, 33

Rapid thermal processing, 73Reagan, Ronald, sanctions against Japanese electron-

ics producers, 68Reliability Analysis and Modeling Program, 36RTP. See Rapid thermal processing

Sandia National Laboratoriesareas of expertise, 24, 25, 31commercial semiconductor programs, 34-35complement metal oxide semiconductor

technology, 32contamination-free manufacturing, 37-38CRADAs for semiconductor manufacturing, 34-35CRADAs with SEMATECH, 4,34-35, 37defense activity budget, 28environmental safety and health programs, 50equipment design and modeling, 36-37IC experience, 25, 32magnetically levitated stage for wafer steppers

project, 37memorandum of agreement with NIST, 4, 50microelectronics facilities, 32-34mission, 32modeling capabilities, 50pilot line services, 35-36plasma processing project, 36-37reliability modeling project, 36semiconductor programs, 32-38soft x-ray projection lithography, 42

SEMATECHARPA relationships, 10-11, 16,67CRADAs with Sandia, 4,34-35,37description, 66-67Focus Technical Advisory Boards, 10

Index 85

formation of, 65funding sources, 2-3, 10, 16investments in GCA, 17lithography expenditures, 19management structure, 8, 11-12NIST projects sponsor, 46,48partnership with SEMI, 18partnerships with U.S. equipment manufacturers, 67SETEC sponsorship, 36

SEMI, 18Semiconductor Equipment Technology Center, 36-37Semiconductor industry

competitive history of U.S. industry, 56-68future challenges to U.S. industry, 68-77industry/government collaboration, 78-79national security considerations, 55-56production facility costs, 2strategic alliances, 77-78strategic position, 53-56U.S. economy considerations, 53-55U.S. market share, 18U.S. policy support, 52-53

Semiconductor Industry Associationareas critical to success of U.S. industry, 24dumping petition, 68formation of, 65generational change assumption, 2lithography expectations, 19roadmaps, 5, 71

Semiconductor Manufacturing Technology consor-tium. See SEMATECH

Semiconductor Research CorporationCRADAs with DOE labs, 4,39description, 65formation of, 2, 65management structure, 8university research and, 66

Semiconductor Technology Council, 9-10Semiconductor Trade Agreement, 16,53,65,68Senate Commerce Committee, 7Senate Committee on Appropriations, 7Sensors for process control, 73-74SETEC. See Semiconductor Equipment Technology

CenterShockley, William, 57SIA. See Semiconductor Industry Association

Siemens A. G., 78Silicon Valley Group Lithography, 17-18Soft x-ray projection lithography

Lawrence Livermore National Laboratory and, 42-43Sandia National Laboratories and, 42

Software design for ICs, 75Spire Corp., 48SRC. See Semiconductor Research CorporationSTA. See Semiconductor Trade AgreementSteppers, 17-20Strategic alliances, 77-78Superconductivity Pilot Center Agreement, 5-6Suppliers

‘‘captive’ suppliers, 61U.S. and Japan comparison, 63-64

SVGL. See Silicon Valley Group Lithography

TCAD. See Technology CADTechnology CAD, 39Technology challenges to U.S. semiconductor

industrycontamination-free manufacturing, 74-75manufacturing-critical software engineering, 75materials, 70metrology, 70, 72-73modeling and simulation, 74reliability y and quality, 74roadmap technology characteristics, 70sensors for process control, 73-74

Technology Insertion Program, 66Texas Instruments, Inc., 57, 61Toshiba, 61,78Trade practices, U.S. and Japan comparison, 61-63Transistor invention, 56-57

Ultratech Stepper, 17,42University research, 66U.S. economy

downstream markets, 54-55industry employment of U.S. workers, 53-54, 55suppliers and, 54

U.S. International Trade Commission, 61

Wafer fabrication costs, 2,75-76Weapons labs. See DOE Defense Program

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