conga-QAF User's Guide

Qseven® conga-QAFAMD G-Series Processor with AMD A55E Controller Hub

User’s Guide

Revision 1.1

Copyright © 2012 congatec AG QBRAm11 2/78

Revision HistoryRevision Date (yyyy.mm.dd) Author Changes1.0 2012.04.26 GDA • Officialrelease.1.1 2013.04.09 AEM • AddedMicrosoftWindows8supportinsection1.2“SupportedOperatingSystem“.

• Changedmaximumtorqueratingforheatspreaderscrewsinsection3.1“HeatspreaderDimensions”andaddedacautionstatement.• Addedadditionalconga-QAFvariantsin“OptionsInformation”andsection1.1“FeatureList”.• Addedtheinrushandmaximumpeakcurrentvaluesinsection4.15“PowerControl”• Updatedsection9“BIOSSetupDescription”.• Addedsection10.1“SupportedFlashDevices”.Updatedthewholedocument.


PrefaceThisuser’sguideprovidesinformationaboutthecomponents,features,connectorandBIOSSetupmenusavailableontheconga-QAF.ItisoneofthreedocumentsthatshouldbereferredtowhendesigningaQseven®application.Theotherreferencedocumentsthatshouldbeusedincludethefollowing:

Qseven®DesignGuideQseven®Specification

ThelinkstothesedocumentscanbefoundonthecongatecAGwebsiteatwww.congatec.com

Disclaimer

Theinformationcontainedwithinthisuser’sguide,includingbutnotlimitedtoanyproductspecification,issubjecttochangewithoutnotice.

congatecAGprovidesnowarrantywithregardtothisuser’sguideoranyotherinformationcontainedhereinandherebyexpresslydisclaimsany impliedwarrantiesofmerchantabilityorfitness foranyparticularpurposewith regard toanyof the foregoing.congatecAGassumesno liability for anydamages incurreddirectlyor indirectly fromany technical or typographical errorsoromissions containedhereinor fordiscrepanciesbetweentheproductandtheuser’sguide.InnoeventshallcongatecAGbeliableforanyincidental,consequential,special,orexemplarydamages,whetherbasedontort,contractorotherwise,arisingoutoforinconnectionwiththisuser’sguideoranyotherinformationcontainedhereinortheusethereof.

Intended Audience

Thisuser’sguideisintendedfortechnicallyqualifiedpersonnel.Itisnotintendedforgeneralaudiences.


Symbols

Thefollowingsymbolsareusedinthisuser’sguide:

Warning

Warnings indicate conditions that, if not observed, can cause personal injury.

Caution

Cautions warn the user about how to prevent damage to hardware or loss of data.

Note

Notes call attention to important information that should be observed.


TerminologyTerm DescriptionPCIExpress(PCIe) PeripheralComponentInterfaceExpress–next-generationhighspeedSerializedI/ObusPCIExpressLane OnePCIExpressLaneisasetof4signalsthatcontainstwodifferentiallinesfor

TransmitterandtwodifferentiallinesforReceiver.Clockinginformationisembeddedintothedatastream.x1,x2,x4,x8,x16 x1referstoonePCIExpressLaneofbasicbandwidth;x2toacollectionoftwoPCIExpressLanes;etc..Alsoreferredtoasx1,x2,x4,x8,orx16link.ExpressCard APCMCIAstandardbuiltonthelatestUSB2.0andPCIExpressbuses.PCIExpressMiniCard PCIExpressMiniCardadd-incardisasmallsizeuniqueformfactoroptimizedformobilecomputingplatforms.MMCplus MMCpluswasdefinedforfirsttimeinMMCSystemSpecificationv4.0.MMCplusisbackwardcompatiblewithMMC.MMCplushas13pins.SDIOcard SDIO(SecureDigitalInputOutput)isanon-volatilememorycardformatdevelopedforuseinportabledevices.USB UniversalSerialBusSATA SerialATAttachment:serial-interfacestandardforharddisksHDA HighDefinitionAudioS/PDIF S/PDIF(Sony/PhilipsDigitalInterconnectFormat)specifiesaDataLinkLayerprotocolandchoiceofPhysicalLayerspecificationsforcarryingdigitalaudiosignals

betweendevicesandstereocomponents.DDI DigitalDisplayInterface.DDIcanoperateasDisplayPortorHDMIorDVI.DP DisplayPortisanVESA’sopendigitalcommunicationsinterface.HDMI HighDefinitionMultimediaInterface.HDMIsupportsstandard,enhanced,orhigh-definitionvideo,plusmulti-channeldigitalaudioonasinglecable.TMDS TransitionMinimizedDifferentialSignaling.TMDSisasignalinginterfacedefinedbySiliconImagethatisusedforDVIandHDMI.DVI DigitalVisualInterfaceisavideointerfacestandarddevelopedbytheDigitalDisplayWorkingGroup(DDWG).LPC LowPin-Count:alowspeedinterfaceusedforperipheralcircuitssuchasSuperI/Ocontrollers,whichtypicallycombinelegacydevicesupportintoasingleIC.I²CBus Inter-IntegratedCircuitBus:isasimpletwo-wirebuswithasoftware-definedprotocolthatwasdevelopedtoprovidethecommunicationslinkbetweenintegrated

circuitsinasystem.SMBus SystemManagementBus:isapopularderivativeoftheI²C-bus.SPIBus SerialPeripheralInterfaceisasynchronousserialdatalinkstandardnamedbyMotorolathatoperatesinfullduplexmode.CANBus Controller-areanetworkisavehiclebusstandarddesignedtoallowmicrocontrollersanddevicestocommunicatewitheachotherwithinavehiclewithoutahost

computer.GbE GigabitEthernetLVDS Low-VoltageDifferentialSignalingSDVO SerialDigitalVideoOutisaproprietarytechnologyintroducedbyIntel® toaddadditionalvideosignalinginterfacestoasystem.DDC DisplayDataChannelisanI²Cbusinterfacebetweenadisplayandagraphicsadapter.N.C. Not connectedN.A. NotavailableT.B.D. Tobedetermined


Copyright Notice

Copyright©2012,congatecAG.Allrightsreserved.Alltext,picturesandgraphicsareprotectedbycopyrights.NocopyingispermittedwithoutwrittenpermissionfromcongatecAG.

congatecAGhasmadeeveryattempt toensure that the information in thisdocument isaccurateyet the informationcontainedwithin issupplied“as-is”.

Trademarks

Productnames,logos,brands,andothertrademarksfeaturedorreferredtowithinthisuser’sguide,orthecongatecwebsite,arethepropertyoftheirrespectivetrademarkholders.ThesetrademarkholdersarenotaffiliatedwithcongatecAG,ourproducts,orourwebsite.

Warranty

congatecAGmakesnorepresentation,warrantyorguaranty,expressorimpliedregardingtheproductsexceptitsstandardformoflimitedwarranty(“LimitedWarranty”).congatecAGmayinitssolediscretionmodifyitsLimitedWarrantyatanytimeandfromtimetotime.

Beginningonthedateofshipmenttoitsdirectcustomerandcontinuingforthepublishedwarrantyperiod,congatecAGrepresentsthattheproductsarenewandwarrantsthateachproductfailingtofunctionproperlyundernormaluse,duetoadefectinmaterialsorworkmanshiporduetononconformancetotheagreeduponspecifications,willberepairedorexchanged,atcongatecAG’soptionandexpense.

CustomerwillobtainaReturnMaterialAuthorization(“RMA”)numberfromcongatecAGpriortoreturningthenonconformingproductfreightprepaid.congatecAGwillpayfortransportingtherepairedorexchangedproducttothecustomer.

Repaired,replacedorexchangedproductwillbewarrantedfortherepairwarrantyperiodineffectasofthedatetherepaired,exchangedorreplacedproductisshippedbycongatecAG,ortheremainderoftheoriginalwarranty,whicheverislonger.ThisLimitedWarrantyextendstocongatecAG’sdirectcustomeronlyandisnotassignableortransferable.

ExceptassetforthinwritingintheLimitedWarranty,congatecAGmakesnoperformancerepresentations,warranties,orguarantees,eitherexpressorimplied,oralorwritten,withrespecttotheproducts,includingwithoutlimitationanyimpliedwarranty(a)ofmerchantability,(b)offitnessforaparticularpurpose,or(c)arisingfromcourseofperformance,courseofdealing,orusageoftrade.

congatecAGshallinnoeventbeliabletotheenduserforcollateralorconsequentialdamagesofanykind.congatecAGshallnototherwisebeliableforloss,damageorexpensedirectlyorindirectlyarisingfromtheuseoftheproductorfromanyothercause.ThesoleandexclusiveremedyagainstcongatecAG,whetheraclaimsoundincontract,warranty,tortoranyotherlegaltheory,shallberepairorreplacementoftheproductonly


Qseven® Concept

TheQseven®conceptisanoff-the-shelf,multivendor,Single-Board-ComputerthatintegratesallthecorecomponentsofacommonPCandismountedontoanapplicationspecificcarrierboard.Qseven®moduleshaveastandardizedformfactorof70mmx70mmandaspecifiedpinoutbasedonthehighspeedMXMsystemconnector.Thepinoutremainsthesameregardlessofthevendor.TheQseven®moduleprovidesthefunctionalrequirementsforanembeddedapplication.Thesefunctionsinclude,butarenotlimitedto,graphics,sound,massstorage,networkinterfaceandmultipleUSBports.

AsingleruggedizedMXMconnectorprovidesthecarrierboardinterfacetocarryalltheI/OsignalstoandfromtheQseven®module.ThisMXMconnectorisawellknownandprovenhighspeedsignalinterfaceconnectorthatiscommonlyusedforhighspeedPCIExpressgraphicscardsinnotebooks.

CarrierboarddesignerscanuseaslittleorasmanyoftheI/Ointerfacesasdeemednecessary.Thecarrierboardcanthereforeprovidealltheinterfaceconnectorsrequiredtoattachthesystemtotheapplicationspecificperipherals.Thisversatilityallowsthedesignertocreateadenseandoptimizedpackage,whichresultsinamorereliableproductwhilesimplifyingsystemintegration.

TheQseven®evaluationcarrierboardprovidescarrierboarddesignerswithareferencedesignplatformandtheopportunitytotestall theQseven®I/Ointerfacesavailableandthenchoosewhataresuitablefortheirapplication.Qseven®applicationsarescalable,whichmeansonceacarrierboardhasbeencreatedthereistheabilitytodiversifytheproductrangethroughtheuseofdifferentperformanceclassQseven® modules.Simplyunplugonemoduleandreplaceitwithanother,noneedtoredesignthecarrierboard.

ThisdocumentdescribesthefeaturesavailableontheQseven®evaluationcarrierboard.Additionally,theschematicsfortheQseven®evaluationcarrierboardcanbefoundonthecongatecwebsite.

Certification

congatecAGiscertifiedtoDINENISO9001:2008standard.

Technical Support

congatecAGtechniciansandengineersarecommittedtoprovidingthebestpossibletechnicalsupportforourcustomerssothatourproductscanbeeasilyusedandimplemented.Werequestthatyoufirstvisitourwebsiteatwww.congatec.comforthelatestdocumentation,utilitiesanddrivers,whichhavebeenmadeavailabletoassistyou.Ifyoustillrequireassistanceaftervisitingourwebsitethencontactourtechnicalsupportdepartmentbyemailatsupport@congatec.com


Lead-Free Designs (RoHS)

AllcongatecAGdesignsarecreatedfromlead-freecomponentsandarecompletelyRoHScompliant.

Electrostatic Sensitive Device

AllcongatecAGproductsareelectrostaticsensitivedevicesandarepackagedaccordingly.DonotopenorhandleacongatecAGproductexceptatanelectrostatic-freeworkstation.Additionally,donotshiporstorecongatecAGproductsnearstrongelectrostatic,electromagnetic,magnetic,orradioactivefieldsunlessthedeviceiscontainedwithinitsoriginalmanufacturer’spackaging.BeawarethatfailuretocomplywiththeseguidelineswillvoidthecongatecAGLimitedWarranty.

conga-QAF Options Information

The conga-QAF is available in six base variants. This user’s guide describes all of these variants. The table below shows the differentconfigurationsavailable.CheckforthePartNo.thatappliestoyourproduct.Thiswilltellyouwhatoptionsdescribedinthisuser’sguideareavailableonyourparticularmodule.

conga-QAF

Part-No. 015300 015301 015302 015303 015304 015305Processor AMD T40R AMD T40E AMDT24L AMD T40 E AMD T40R AMD T16R Clock Speed 1.0GHz 1.0GHz 1.0GHz 1.0GHz 1.0GHz 1.0GHzCore Single Dual Single Dual Single SingleL2 Cache 512kB 512kBx2 512kB 512kBx2 512kB 512kBTDP 5.5W 6.4W 5W 6.4W 5.5W 5.5WOnboard Memory DDR3L-1066 DDR3L-1066 DDR3L-1066 DDR3L-1066 DDR3L-1066 DDR3L-1066Size 2GB 2GB 2GB 2GB 2GB 2GBGraphics Radeon™HD6250 Radeon™HD6250 N/A Radeon™HD6250 Radeon™HD6250 Radeon™HD6250LVDS Single/Dual18/24bit Single/Dual18/24bit Single/Dual18/24bit Single/Dual18/24bit Single/Dual18/24bit Single/Dual18/24bitDDI DP/HDMI/DVI DP/HDMI/DVI DP/HDMI/DVI DP/HDMI/DVI DP/HDMI/DVI DP/HDMI/DVISDVO N/A N/A N/A N/A N/A N/ASSD N/A N/A N/A 4GB 8GB 4GB

Note

The processor TDP is defined for PCIe Gen1 configuration. When PCIe Gen2 is used, the processor TDP increases up to +2.5W.

The conga-QAF variants equipped with the AMD T24L processor do not support graphics display.


Contents1 Specifications ........................................................................... 12

1.1 FeatureList .............................................................................. 121.2 SupportedOperatingSystems ................................................. 131.3 MechanicalDimensions ........................................................... 131.4 SupplyVoltageStandardPower .............................................. 141.4.1 ElectricalCharacteristics .......................................................... 141.4.2 RiseTime ................................................................................. 141.5 PowerConsumption .................................................................151.5.1 conga-QAFAMDT40R1.0GHzSingleCore .......................... 161.5.2 conga-QAFAMDT40R1.0GHzSingleCorewith8GBSSD .. 161.5.3 conga-QAFAMDT24L1.0GHzSingleCorewithoutGPU ...... 161.5.4 conga-QAFAMDT16R1.0GHzSingleCorewith4GBSSD .. 171.5.5 conga-QAFAMDT40E1.0GHzDualCore ............................. 171.5.6 conga-QAFAMDT40E1.0GHzDualCorewith4GBSSD ..... 181.6 SupplyVoltageBatteryPower ................................................. 181.6.1 CMOSBatteryPowerConsumption ........................................ 181.7 EnvironmentalSpecifications ................................................... 19

2 BlockDiagram .......................................................................... 20

3 Heatspreader ........................................................................... 21

3.1 HeatspreaderDimensions ....................................................... 22

4 ConnectorSubsystems ............................................................ 23

4.1 PCIExpress™ ......................................................................... 244.2 ExpressCard™ ......................................................................... 244.3 GigabitEthernet ....................................................................... 244.4 SerialATA™(SATA) ................................................................. 244.5 USB2.0 .................................................................................... 244.6 SD/MMC ..................................................................................254.7 HighDefinitionAudio(HDA) .....................................................254.8 LVDS ........................................................................................254.9 SDVO .......................................................................................254.10 DisplayPort ...............................................................................254.11 HDMI ........................................................................................ 264.12 LPC .......................................................................................... 26

4.13 SPI ........................................................................................... 264.14 CANBus .................................................................................. 264.15 PowerControl .......................................................................... 264.16 PowerManagement ................................................................. 284.17 I²CBus ..................................................................................... 284.18 Watchdog ................................................................................. 284.19 FanControl .............................................................................. 28

5 AdditionalFeatures .................................................................. 29

5.1 congatecBoardController(cBC) ............................................. 295.2 BoardInformation .................................................................... 295.3 Watchdog ................................................................................. 295.4 I2CBus ..................................................................................... 295.5 PowerLossControl .................................................................. 295.6 EmbeddedBIOS ...................................................................... 305.6.1 CMOSBackupinNonVolatileMemory ................................... 305.6.2 OEMCMOSDefaultSettingsandOEMBIOSLogo ................ 305.6.3 OEMBIOSCode ...................................................................... 305.6.4 congatecBatteryManagementInterface ................................. 315.6.5 APISupport(CGOS/EAPI) ...................................................... 315.7 SuspendtoRAM ...................................................................... 315.8 OnboardSolidStateDisk ......................................................... 32

6 congaTechNotes .................................................................... 33

6.1 AHCI ........................................................................................ 336.2 RAID ........................................................................................ 336.3 Nativevs.LegacyIDEmode .................................................... 336.3.1 LegacyMode ........................................................................... 336.3.2 NativeMode ............................................................................ 336.4 ThermalManagement .............................................................. 346.5 ACPISuspendModesandResumeEvents ............................35

7 SignalDescriptionsandPinoutTables ..................................... 36

8 SystemResources ...................................................................52

8.1 I/OAddressAssignment ...........................................................52


8.1.1 LPCBus ...................................................................................528.2 InterruptRequest(IRQ)Lines ..................................................538.3 PCIConfigurationSpaceMap .................................................558.4 PCIInterruptRoutingMap .......................................................568.5 I²CBus .....................................................................................578.6 SMBus ....................................................................................57

9 BIOSSetupDescription ...........................................................58

9.1 EnteringtheBIOSSetupProgram. ..........................................589.1.1 BootSelectionPopup ..............................................................589.2 SetupMenuandNavigation .....................................................589.3 MainSetupScreen ..................................................................599.4 AdvancedSetup ....................................................................... 609.4.1 GraphicsConfigurationSubmenu ............................................ 609.4.2 WatchdogConfigurationSubmenu .......................................... 629.4.3 PCI&PCIExpressConfigurationSubmenu ............................. 639.4.3.1 PIRQRoutingSubmenu ..........................................................659.4.4 ACPIConfigurationSubmenu ..................................................659.4.5 RTCWakeSettingsSubmenu ................................................. 669.4.6 CPUConfigurationSubmenu ................................................... 669.4.7 ChipsetConfigurationSubmenu .............................................. 679.4.8 HardwareHealthMonitoringSubmenu .................................... 689.4.9 SATAConfigurationSubmenu ................................................. 699.4.10 USBConfigurationSubmenu ................................................... 709.4.11 SuperI/OConfigurationSubmenu ........................................... 719.4.12 SerialPortConsoleRedirection ............................................... 729.4.12.1 ConsoleRedirectionSettingsSubmenu .................................. 729.5 BootSetup ............................................................................... 739.5.1 BootSettingsConfiguration ..................................................... 739.6 SecuritySetup ..........................................................................759.6.1 SecuritySettings ......................................................................759.6.2 HardDiskSecurity ...................................................................759.6.3 Save&ExitMenu ....................................................................75

10 AdditionalBIOSFeatures ........................................................ 76

10.1 SupportedFlashDevices ......................................................... 7610.2 UpdatingtheBIOS ................................................................... 7610.3 BIOSSecurityFeatures ........................................................... 7610.4 HardDiskSecurityFeatures .................................................... 77

11 IndustrySpecifications ............................................................. 78


List of TablesTable1 FeatureSummary .................................................................... 12Table2 SignalTablesTerminologyDescriptions .................................. 36Table3 EdgeFingerPinout .................................................................. 37Table4 PCIExpressSignalDescriptions ............................................. 40Table5 ExpressCardSignalDescriptions ............................................ 40Table6 EthernetSignalDescriptions .................................................... 41Table8 USBSignalDescriptions .......................................................... 42Table9 SDIOSignalDescriptions ........................................................ 43Table10 HDASignalDescriptions .......................................................... 44Table11 LVDSSignalDescriptions ........................................................ 44Table12 SDVOSignalDescriptions .......................................................45Table13 DisplayPortSignalDescriptions ............................................... 46Table14 HDMI/DVISignalDescriptions ................................................. 46Table15 LPCSignalDescriptions .......................................................... 47Table16 SPIInterfaceSignalDescriptions ............................................ 47Table17 CANBusSignalDescriptions .................................................. 48Table18 PowerandGNDSignalDescriptions ....................................... 48Table19 PowerControlSignalDescriptions .......................................... 48Table20 PowerManagementSignalDescriptions ................................. 49Table21 MiscellaneousSignalDescriptions .......................................... 49Table22 ManufacturingSignalDescriptions ..........................................50Table23 ThermalManagementSignalDescriptions ..............................51Table24 FanControlSignalDescriptions ..............................................51Table25 IRQLinesinPICmode ............................................................53Table26 IRQLinesinAPICmode ..........................................................54Table27 PCIConfigurationSpaceMap .................................................55Table28 PCIInterruptRoutingMap .......................................................56PCIInterruptRoutingMap(continued) .......................................................56


1 Specifications

1.1 Feature ListTable 1 Feature Summary

Form Factor BasedonQseven®formfactorspecificationrevision1.20Processor AMDT40E1.0GHzDualCorewith2x512kBL2cache

AMDT40R1.0GHzSingleCorewith512kBL2cacheAMDT24L1.0GHzSingleCorewith512KBL2cacheAMDT16R1.0GHzSingleCorewith512KBL2cache

Memory OnboardDDR3L1066MT/s(533MHz)upto4GBChipset A55EControllerHubAudio HDA(HighDefinitionAudio)/digitalaudiointerfacewithsupportformultiplecodecsEthernet GigabitEthernet:Intel®82574Graphics Options IntegratedHighPerformance,DirectX®11GraphicswithUVD3.0.DualSimultaneousDisplaySupport

• FlatpanelInterface(providedbyAnalogixANX3110toLVDSconverter).Supports:• Single-channelLVDSinterface:1x18bppor1x24bpp• Dual-channelLVDSinterface:2x18bppor2x24bpppanel• VESAstandardorJEDIAdatamapping• AutomaticPanelDetectionviaEDID/EPI(EmbeddedPanelInterfacebasedon

VESAEDID™1.3)• Resolutions800x600upto1900x1200(WUXGA)@60Hz

DigitalDisplayInterface(usesAPUDP1port)canoperateas• DisplayPort1.1a,resolutionsupto1920x1200@60Hz-,• HDMI1.3aPort,resolutionupto1920x1080@60Hz-,• Single-linkDVI,resolutionsupto1920x1200@60Hz

Peripheral Interfaces

• 2xSerialATA® upto3Gb/swithsupportRAID0,1• 4xx1PCIExpress®Gen2linksupto5.0GT/sperlane• 8xUSB2.0(EHCI)• 2xExpressCard

• OptionalonboardSSDupto32GB• 1xSD/MMC• LPCBus• I²CBus,multimaster

BIOS AMIAptio® UEFI2.xfirmware,4MByteserialSPIwithcongatecEmbeddedBIOSfeaturesPower Management ACPI3.0compliantwithbatterysupport.AlsosupportsSuspendtoRAM(S3).

Note

Some of the features mentioned in the above Feature Summary are optional. Check the article number of your module and compare it to the option information list on page 8 of this user’s guide to determine what options are available on your particular module.


1.2 Supported Operating SystemsTheconga-QAFsupportsthefollowingoperatingsystems.

• Microsoft®Windows®832/64-Bit

• Microsoft®Windows®732/64-Bit

• Microsoft®Windows®7Embedded32/64-Bit

• Microsoft®Windows®XP

• Microsoft®Windows®XPEmbedded

• Linux

1.3 Mechanical Dimensions• 70.0mmx70.0mm@(2¾”x2¾”)

• TheQseven™module,includingtheheatspreaderplate,PCBthicknessandbottomcomponents,isuptoapproximately12mmthick.

Heatspeader

Qseven Module PCB

Carrier Board PCB

Dimension is dependenton connector height used

Dimension is dependenton connector height used

All measurements are in millimetersAll dimensions without tolerance ±0.2mm

Rear View of Qseven Module

2.00

1.20 ±0.1

6.00 8.00


1.4 Supply Voltage Standard Power• 5VDC±5%

Thedynamicrangeshallnotexceedthestaticrange.

1.4.1 Electrical Characteristics

Characteristics Min. Typ. Max. Units Comment5V Voltage ±5% 4.75 5.00 5.25 Vdc

Ripple - - ±50 mVPP 0-20MHzCurrent

5V_SB Voltage ±5% 4.75 5.00 5.25 VdcRipple ±50 mVPP

1.4.2 Rise Time

Theinputvoltagesshallrisefrom10%ofnominalto90%ofnominalataminimumslopeof250V/s.Thesmoothturn-onrequiresthat,duringthe10%to90%portionoftherisetime,theslopeoftheturn-onwaveformmustbepositive.

Note

For information about the input power sequencing of the Qseven® module refer to the Qseven® specification.

Nominal Static Range

Dynamic Range

Absolute Minimum

Absolute Maximum5.25V

4.75V

5V

5.05V

4.95V


1.5 Power ConsumptionThe power consumption values listed in this document weremeasured under a controlled environment. The hardware used includes aconga-QAFmodule,conga-QEVAL,SATAdrive,USBkeyboardandUSBmouse.TheSATAdrive,USBKeyboard,USBmousewerepoweredseparatelysothattheydonotinfluencethepowerconsumptionvaluethatismeasuredforthemodule.

EachmodulewasmeasuredwhilerunningWindowsXPProfessionalwithSP3(servicepack3)andthe“PowerScheme”wassetto“Portable/Laptop”.ThissettingensuresthattheAMDG-Seriesprocessorsrunin(lowestfrequencymode)withminimalcorevoltageduringdesktopidle.Powerconsumptionvalueswererecordedduringthefollowingstages:

Windows XP Professional SP3

• DesktopIdle

• 100%CPUworkload(seenotebelow)

• SuspendtoRAM(requiressetupnode“SuspendMode”inBIOStobeconfiguredtoS3STR(suspendtoRAM)).SupplypowerforS3modeis5VSB.

Note

A software tool was used to stress the CPU to 100% workload.

Processor Information

Inthefollowingpowertablesthereissomeadditionalinformationabouttheprocessors.AMDdescribesthetypeofmanufacturingprocessusedforeachprocessor.Thefollowingtermisused:

nm=nanometer

Themanufacturingprocessdescriptionisincludedinthepowertables.Seeexamplebelow.ForinformationaboutthemanufacturingprocessvisitAMD’swebsite.

AMDT40E1.0GHzDualCore512kBx2Cache40nm


1.5.1 conga-QAF AMD T40R 1.0 GHz Single Core

With 2GB onboard memory

conga-QAF Art. No. 015300 AMD T40R 1.0 GHz Single Core 512kB L2 Cache40nm

Layout Rev. QBRALA0 /BIOS Rev. QBRAR002Memory Size 2GB

Operating System Windows XP SP3Power State Desktop Idle 100% workload Suspend to Ram (S3) 5V SB Input

Power consumption (measured in Amperes/Watts) 1.09A / 5.43W 1.44A / 7.21W 0.06A / 0.30W

1.5.2 conga-QAF AMD T40R 1.0 GHz Single Core with 8GB SSD

With 2GB onboard memory and 8GB SSD




Power consumption (measured in Amperes/Watts) TBD A / TBD W TBD A / TBD W TBD A / TBD W

1.5.3 conga-QAF AMD T24L 1.0 GHz Single Core without GPU


conga-QAF Art. No. 015302 AMD T24L 1.0 GHz Single Core 512kB L2 Cache40nm



Power consumption (measured in Amperes/Watts) 1.12A / 5.60W 1.38A / 6.92W NA


1.5.4 conga-QAF AMD T16R 1.0 GHz Single Core with 4GB SSD

With 2GB onboard memory and 4GB SSD




Power consumption (measured in Amperes/Watts) TBD A / TBD W TBD A / TBD W TBD A / TBD W

1.5.5 conga-QAF AMD T40E 1.0 GHz Dual Core


conga-QAF Art. No. 015301 AMD T40E 1.0 GHz Dual Core 512kB x2 L2 Cache40nm



Power consumption (measured in Amperes/Watts) 1.14A / 5.70W 1.64A / 8.18W 0.06A / 0.30W


1.5.6 conga-QAF AMD T40E 1.0 GHz Dual Core with 4GB SSD

With onboard 2GB memory and 4GB SSD

conga-QAF Art. No. 015303 AMD T40E 1.0 GHz Dual Core 512kB x2 Cache40nm



Power consumption (measured in Amperes/Watts) 1.20A / 6.00 W 1.73 A / 8.64 W 0.06A / 0.30W

Note

All recorded power consumption values are approximate and only valid for the controlled environment described earlier. 100% workload refers to the CPU workload and not the maximum workload of the complete module. Power consumption results will vary depending on the workload of other components such as graphics engine, memory, etc.

The conga-QAF variants equipped with the AMD T24L processor do not support graphics.

1.6 Supply Voltage Battery Power• 2.5V-3.6VDC

• Typical3VDC

1.6.1 CMOS Battery Power Consumption

RTC @ 20ºC Voltage CurrentIntegratedintheAMDA55EFCH 3VDC Typ.2.05µA

TheCMOSbatterypowerconsumptionvaluelistedaboveshouldnotbeusedtocalculateCMOSbatterylifetime.YoushouldmeasuretheCMOSbatterypowerconsumptioninyourcustomerspecificapplicationinworstcaseconditions,forexampleduringhightemperatureandhighbatteryvoltage.Theself-dischargeofthebatterymustalsobeconsideredwhendeterminingCMOSbatterylifetime.FormoreinformationaboutcalculatingCMOSbattery lifetimerefer toapplicationnoteAN9_RTC_Battery_Lifetime.pdf,whichcanbefoundonthecongatecAGwebsiteatwww.congatec.com.


1.7 Environmental SpecificationsTemperature Operation:0°to60°C Storage:-20°to+80°C

Humidity Operation:10%to90% Storage:5%to95%

Caution

The above operating temperatures must be strictly adhered to at all times. When using a heatspreader the maximum operating temperature refers to any measurable spot on the heatspreader’s surface.

congatec AG strongly recommends that you use the appropriate congatec module heatspreader as a thermal interface between the module and your application specific cooling solution.

If for some reason it is not possible to use the appropriate congatec module heatspreader, then it is the responsibility of the operator to ensure that all components found on the module operate within the component manufacturer’s specified temperature range.

For more information about operating a congatec module without heatspreader, contact congatec technical support.

Humidity specifications are for non-condensing conditions.


2 Block Diagram

AMD Controller Hub

A55E

AMD APU G-Series Processor

AMD T40E AMD T40RAMD T16RAMD T24L

RTC

LVDS

8x U

SB 2

.0 H

ost

HDA

I/F

BC SPI

LPC

Bus

I2C Powe

r Man

agem

ent a

nd C

ontro

l Sign

als

Gbit E

ther

net

SM B

us

S

PIUMI 4x

4x x1

PCI

e Lan

es 0

,1,2,3

Memory Bus(DDR3-800 or DDR3-1066)

Onboard DDR3LMaximum 4GB

Intel®GBe Controller

82574

SSD NandDrive(optional)

Board ControllerSTM32F100R8T6b

Watchdog

BIOS(Flash)

DP or

HDM

I (Po

rt 1)

PCIe

x1

Lin

k

2x S

ATA

(Por

t 0, 1

)

SATA

(Por

t 2)

AnalogixeDP to LVDS

converter(option)

Fan C

ontro

l

OR

OR

USB to SD/MMCcontroller

SD/M

MC


3 HeatspreaderAnimportantfactorforeachsystemintegrationisthethermaldesign.Theheatspreaderactsasathermalcouplingdevicetothemoduleanditsaluminiumplateis2mmthick.

TheheatspreaderisthermallycoupledtotheCPUviaathermalgapfillerandonsomemodulesitmayalsobethermallycoupledtootherheatgeneratingcomponentswiththeuseofadditionalthermalgapfillers.

Althoughtheheatspreaderisthethermalinterfacewheremostoftheheatgeneratedbythemoduleisdissipated,itisnottobeconsideredasaheatsink.Ithasbeendesignedtobeusedasathermalinterfacebetweenthemoduleandtheapplicationspecificthermalsolution.Theapplicationspecificthermalsolutionmayuseheatsinkswithfans,and/orheatpipes,whichcanbeattachedtotheheatspreader.Somethermalsolutionsmayalso require that theheatspreader isattacheddirectly to thesystemschassis thereforeusing thewholechassisasaheatdissipater.

Caution

Attention must be given to the mounting solution used to mount the heatspreader and module into the system chassis. Do not use a threaded heatspreader together with threaded carrier board standoffs. The combination of the two threads may be staggered, which could lead to stripping or cross-threading of the threads in either the standoffs of the heatspreader or carrier board.

Only heatspreaders that feature micro pins that secure the thermal stacks should be used for applications that require the heatspreader to be mounted vertically. It cannot be guaranteed that the thermal stacks will not move if a heatspreader that does not have the micro pin feature is used in vertically mounted applications.

Additionally, the gap pad material used on all heatspreaders contains silicon oil that can seep out over time depending on the environmental conditions it is subjected to. For more information about this subject, contact your local congatec sales representative and request the gap pad material manufacturer’s specification.


3.1 Heatspreader Dimensions

Note

All measurements are in millimeters. Torque specification for heatspreader screws is 0.3 Nm. Mechanical system assembly mounting shall follow the valid DIN/IS0 specifications. The cooling strip found on the conga-QAF is connected directly to the ground plane when mounted in the conga-QEVAL evaluation carrier board. For more information about connecting the conga-QAF’s PCB cooling plate to the carrier board ground plane, refer to the Qseven Design Guide.

Caution

When using the heatspreader in a high shock and/or vibration environment, congatec recommends the use of a thread-locking fluid on the heatspreader screws to ensure the above mentioned torque specification is maintained.


4 Connector SubsystemsTheconga-QAFisbasedontheQseven®standardandthereforehas115edgefingersonthetopandbottomsideofthemodulethatmatewiththe230-pincard-edgeMXMconnectorlocatedonthecarrierboard.Thisconnectorisabletointerfacetheavailablesignalsoftheconga-QAFwiththecarrierboardperipherals.

I²C BusSPI BusLVDS

WatchdogPower Control

Power ManagementFan Control

DisplayPort/HDMI

4 PCI Express Lanes2x Serial ATA8x USB 2.0

HDA/Digital Audio I/FGigabit Ethernet

(Uses one PCI Express Lane)LPC Bus1x SDIO


4.1 PCI Express™TheAMDG-Seriesprocessorsupports4PCIExpressGen2lanesasPCIechannel0,1,2and3onthecarrierboardandaremadeavailableexternallyvia theMXMconnector.The lanescanbeconfigured tosupportPCIExpressdevices,edgecardsorexpresscards. ThePCIExpressinterfacesupportsPCIExpressSpecification2.0.

Formoreinformationrefertotheconga-QAFpinouttableinsection7“SignalDescriptionsandPinoutTables.”A4x1or1x4PCIExpresslaneconfigurationispossible.

4.2 ExpressCard™Theconga-QAFcansupporttheimplementationoftwoexpresscards,eachrequiringthededicationofoneUSBportandonePCIExpresslane.Refertosection7,“SignalDescriptionsandPinoutTables”forinformationaboutExpressCardportpins.

4.3 Gigabit EthernetTheconga-QAF isequippedwithaGigabitEthernetMediaDependent Interface (GbEMDI),providedby the Intel®82574GbEcontrollerthatisconnectedtoaAMDControllerHubbyPCIExpreesx1lane.TheEthernetinterfaceconsistsof4pairsoflowvoltagedifferentialpairsignalsdesignatedfromGBE0_MD0±toGBE0_MD3±pluscontrolsignalsforlinkactivityindicators.Thesesignalscanbeusedtoconnecttoa10/100/1000BaseTRJ45connectorwithintegratedorexternalisolationmagneticsonthecarrierboard.

4.4 Serial ATA™ (SATA)Two3Gb/sSerialATA(SATAport0and1)connectionsareprovidedbyaSATAcontrollerintegratedintheAMDControllerHubA55Efoundontheconga-QAF.TheoptionalSSDfeatureusesSATAport2.

4.5 USB 2.0Theconga-QAFoffersaUSB2.0hostcontrollerprovidedbytheAMDControllerHubA55E.ThiscontrollercomplieswithUSBstandard1.1and2.0andprovidesatotalof8USBportsviathecard-edgeMXMconnector.AllportsarecapableofsupportingUSB1.1and2.0compliantdevices.TheUSBclientportisnotsupportedbyconga-QAF.


4.6 SD/MMCTheSMSCUSB2.0FlashMediaCardControllerUSB2244foundontheconga-QAFprovidesaSD/MMCexpansionportforcommunicatingwithnon-volatileSDorMMCcard.Thisport isavailableexternallyandsupportsSDRevision2.0andMMCRevision4.2andisbackwardcompatiblewithpreviousinterfacespecifications.

Note

Only DOS and Linux (Ubuntu, Xandros) boot support for SDIO/MMC devices is available.

4.7 High Definition Audio (HDA)Theconga-QAFprovidesaninterfacethatsupportstheconnectionofHDAaudiocodecs.

4.8 LVDSTheconga-QAFoffersanLVDSinterfaceviaAnalogixDPtoLVDSconverter,connectedtotheDP0interfaceoftheAMDG-Seriesprocessor.Itsupports18or24bitsingle/dualchannelVESAorJEIDAdatamappingwithresolutionsrangingfrom800x600@[email protected]/EPIissupported.

4.9 SDVOTheconga-QAFdoesnotofferanSDVOinterface.

4.10 DisplayPortDisplayPortisanopen,industrystandarddigitaldisplayinterface,thathasbeendevelopedwithintheVideoElectronicsStandardsAssociation(VESA).TheDisplayPortspecificationdefinesascalabledigitaldisplayinterfacewithoptionalaudioandcontentprotectioncapability.Itdefinesalicense-free,royalty-free,state-of-the-artdigitalaudio/videointerconnect,intendedtobeusedprimarilybetweenacomputeranditsdisplaymonitor.

TheDPisprovidedbytheDDIoftheAMDG-Seriesprocessor(DP1interface)andissharedwiththeHDMI.Thesupportedresolutionisupto1920x1200@60Hz.


4.11 HDMIHigh-DefinitionMultimedia Interface (HDMI) isa licensablecompactaudio/videoconnector interface for transmittinguncompresseddigitalstreams.HDMI encodes the video data intoTMDS for digital transmission and is backward-compatiblewith the single-linkDigital VisualInterface(DVI)carryingdigitalvideo.

TheHDMIisprovidedbytheDDIoftheAMDG-Seriesprocessor(DP1interface)andissharedwithDisplayPort.Thesupportedresolutionisupto1920x1200@60Hz.

4.12 LPCTheconga-QAFofferstheLPC(LowPinCount)busthroughtheuseoftheAMDControllerHubA55E.TheLPCbuscorrespondsapproximatelytoaserializedISAbusyetwithasignificantlyreducednumberofsignalsandfunctionality.DuetothesoftwarecompatibilitytotheISAbus,I/Oextensionssuchasadditionalserialportscanbeeasilyimplementedonanapplicationspecificcarrierboardusingthisbus.OnlycertaindevicessuchasSuperI/OorTPM1.2chipscanbeimplementedonthecarrierboard.

4.13 SPITheconga-QAFofferstheSPIinterfaceonlyforbootingaBIOSfromanSPIFlashdeviceplacedonthecarrierboard.

4.14 CAN BusTheconga-QAFdoesnotoffertheCANbus.

4.15 Power ControlTheconga-QAFsupportsATX-stylepowersuppliescontrol.InordertodothisthepowersupplymustprovideaconstantsourceofVCC_5V_SBpower.TheAT-stylepowersupply(5Vonly)isalsosupported.Inthiscase,theconga-QAF’spinPWRBTN#shouldbeleftunconnected,pinSUS_S3#shouldcontrolthemainpowerregulatorsonthecarrierboard(+3.3V...)andpinsVCC_5V_SBshouldbeconnectedtothe5VinputpowerrailaccordingtotheQsevenspecification.

PWGIN

PWGIN(pin26)canbeconnectedtoanexternalpowergoodcircuit.Thisinputisoptionalandshouldbeleftunconnectedwhennotused.Throughtheuseofan internalmonitoron the+5V inputvoltageand/or the internalpowersupplies, theconga-QAFmodule iscapableof


generatingitsownpower-ongood.

SUS_S3#

TheSUS_S3#(pin18)signalisanactive-lowoutputthatcanbeusedtocontrolthemain5Vrailofthepowersupplyformoduleandallothermainpowersuppliesoncarrierboard.Inordertoaccomplishthis,thesignalmustbeinvertedwithaninverter/transistorthatissuppliedbystandbyvoltage(ATX-style)orsysteminputvoltage(AT-style)andislocatedonthecarrierboard.

PWRBTN#

WhenusingATX-stylepowersuppliesPWRBTN#(pin20)isusedtoconnecttoamomentary-contact,active-lowdebouncedpush-buttoninputwhiletheotherterminalonthepush-buttonmustbeconnectedtoground.Thissignalisinternallypulledupto3.3V_SBusinga10kresistor.WhenPWRBTN#isasserted,itindicatesthatanoperatorwantstoturnthepoweronoroff.TheresponsetothissignalfromthesystemmayvaryasaresultofmodificationsmadeinBIOSsettingsorbysystemsoftware.

Power Supply Implementation Guidelines

5voltinputpoweristhesoleoperationalpowersourcefortheconga-QAF.Theremainingnecessaryvoltagesareinternallygeneratedonthemoduleusingonboardvoltageregulators.Acarrierboarddesignershouldbeawareofthefollowingimportantinformationwhendesigningapowersupplyforaconga-QAFapplication:

• Ithasalsobeennoticedthatonsomeoccasions,problemsoccurwhenusinga5Vpowersupplythatproducesnonmonotonicvoltagewhenpoweredup.Theproblemisthatsomeinternalcircuitsonthemodule(e.g.clock-generatorchips)willgeneratetheirownresetsignalswhenthesupplyvoltageexceedsacertainvoltagethreshold.Avoltagedipafterpassingthisthresholdmayleadtothesecircuitsbecomingconfusedresultinginamalfunction.Itmustbementionedthatthisproblemisquiterarebuthasbeenobservedinsomemobilepowersupplyapplications.Thebestwaytoensurethatthisproblemisnotencounteredistoobservethepowersupplyrisewaveformthroughtheuseofanoscilloscopetodetermineiftheriseisindeedmonotonicanddoesnothaveanydips.Thisshouldbedoneduringthepowersupplyqualificationphasethereforeensuringthattheabovementionedproblemdoesn’tariseintheapplication.Formoreinformationaboutthisissuevisitwww.formfactors.organdviewpage25figure7ofthedocument“ATX12VPowerSupplyDesignGuideV2.2”.

Inrush and Maximum Current Peaks on VCC_5V_SB and VCC

Theinrush-currentontheconga-QAFVCC_5V_SBpowerrail(8mssoft-start)cangoupashighas0.4Aforamaximumof100µs.Sufficientdecouplingcapacitancemustbeimplementedtoensureproperpower-upsequencing.

Themaximumpeak-currentontheconga-QAFVCC(5V)powerrailcanbeashighas3.0A.Thisrequiresthatthepowersupplybeproperlydimensioned.


Note

For more information about power control event signals refer to the Qseven® specification.

4.16 Power ManagementACPI3.0compliantwithbatterysupport.AlsosupportsSuspendtoRAM(S3).NosupportforlegacyAPM.

4.17 I²C BusTheI²CbusisimplementedthroughtheuseofSTMicroelectronicsSTM32F100R8microcontroller.Itprovidesamulti-masterI²CBusthathasmaximumI²Cbandwidth.

4.18 WatchdogTheconga-QAFisequippedwithamultistagewatchdogsolutionthatcanbetriggeredbysoftwareorexternalhardware.Formoreinformationaboutthewatchdogfeature,seetheBIOSsetupdescriptionofthisdocumentandapplicationnoteAN3_Watchdog.pdfonthecongatecAGwebsiteatwww.congatec.com.

4.19 Fan ControlTheconga-QAFhasadditionalsignalsandfunctionstofurtherimprovesystemmanagement.OneofthesesignalsisanoutputsignalcalledFAN_PWMOUT thatallowssystem fancontrolusingaPWM(PulseWidthModulation)output.Additionally, there isan inputsignalcalledFAN_TACHOINthatprovidestheabilitytomonitorthesystem’sfanRPMs(revolutionsperminute).Thissignalmustreceivetwopulsesperrevolutioninordertoproduceanaccuratereading.Forthisreason,atwopulseperrevolutionfanorsimilarhardwaresolutionisrecommended.

Note

A four wire fan must be used to generate the correct speed readout.


5 Additional Features

5.1 congatec Board Controller (cBC)Theconga-QAFisequippedwithanSTMicroelectronicsSTM32F100R8microcontroller.ThisonboardmicrocontrollerplaysanimportantroleformostofthecongatecBIOSfeatures.ItfullyisolatessomeoftheembeddedfeaturessuchassystemmonitoringortheI²Cbusfromthex86corearchitecture,whichresultsinhigherembeddedfeatureperformanceandmorereliability,evenwhenthex86processorisinalowpowermode.

5.2 Board InformationThe cBC provides a rich data-set ofmanufacturing and board information such as serial number, EAN number, hardware and firmwarerevisions,andsoon.Italsokeepstrackofdynamicallychangingdatalikeruntimemeterandbootcounter.

5.3 WatchdogTheconga-QAFisequippedwithamultistagewatchdogsolutionthatistriggeredbysoftware.TheQseven™SpecificationdoesnotprovidesupportforexternalhardwaretriggeringoftheWatchdog,whichmeanstheconga-QAFdoesnotsupportexternalhardwaretriggering.

Formore information about theWatchdog feature, see the BIOS setup description section 9.4.2 of this document and application noteAN3_Watchdog.pdfonthecongatecAGwebsiteatwww.congatec.com.

5.4 I2C BusTheconga-QAFofferssupportforthefrequentlyusedI2Cbus.ThankstotheI2ChostcontrollerinthecBC,theI2Cbusismulti-mastercapable.

5.5 Power Loss ControlThecBChasfullcontrolofthepower-upofthemoduleandthereforecanbeusedtospecifythebehaviorofthesystemafteranACpowerlosscondition.Supportedmodesare“AlwaysOn”,“RemainOff”and“LastState”.


5.6 Embedded BIOSTheconga-QAFisequippedwithcongatecEmbeddedBIOS,whichisbasedonAmericanMegatrendsInc.AptioUEFIfirmware.ThesearethemostimportantembeddedPCfeatures:

5.6.1 CMOS Backup in Non Volatile Memory

AcopyoftheCMOSmemory(SRAM)isstoredintheBIOSflashdevice.Thispreventsthesystemfromnotbootingupwiththecorrectsystemconfigurationifthebackupbattery(RTCbattery)fails.Additionally,itprovidestheabilitytocreatesystemsthatdonotrequireaCMOSbackupbattery.

5.6.2 OEM CMOS Default Settings and OEM BIOS Logo

ThisfeatureallowssystemdesignerstocreateandstoretheirownCMOSdefaultconfigurationandBIOSlogo(splashscreen)withintheBIOSflashdevice.CustomizedBIOSdevelopmentbycongatecforthesechangesisnolongernecessarybecausecustomerscaneasilydothesechangesbythemselvesusingthecongatecsystemutilityCGUTIL.

5.6.3 OEM BIOS Code

WiththecongatecembeddedBIOSit isevenpossibleforsystemdesignerstoaddtheirowncodetotheBIOSPOSTprocess.Exceptforcustomspecificcode,thisfeaturecanalsobeusedtosupportWinXPSLPinstallation,Window7SLICtable,verbtablesforHDAcodecs,raregraphicmodesandSuperI/Ocontrollers.

FormoreinformationaboutcustomizingthecongatecembeddedBIOS,refertothecongatecsystemutilityuser’sguide(CGUTLm1x.pdf)andcanbefoundonthecongatecAGwebsiteatwww.congatec.comorcontactcongatectechnicalsupport.


5.6.4 congatec Battery Management Interface

Inordertofacilitatethedevelopmentofbatterypoweredmobilesystemsbasedonembeddedmodules,congatecAGhasdefinedaninterfacefortheexchangeofdatabetweenaCPUmodule(usinganACPIoperatingsystem)andasmartbatterysystem.AsystemdevelopedaccordingtothecongatecBatteryManagementInterfaceSpecificationcanprovidethebatterymanagementfunctionssupportedbyanACPI-capableoperatingsystem(e.g.chargestateofthebattery,informationaboutthebattery,alarms/eventsforcertainbatterystates,...)withouttheneedforadditionalmodificationstothesystemBIOS.

Theconga-QAFBIOSfullysupportsthisinterface.Formoreinformationaboutthissubject,visitthecongatecwebsiteandviewthefollowingdocuments:

• congatecBatteryManagementInterfaceSpecification

• BatterySystemDesignGuide

• conga-SBM3User’sGuide

5.6.5 API Support (CGOS/EAPI)

Inordertobenefitfromtheabovementionednon-industrystandardfeatureset,congatecprovidesanAPIthatallowsapplicationsoftwaredeveloperstoeasilyintegrateallthesefeaturesintotheircode.TheCGOSAPI(congatecOperatingSystemApplicationProgrammingInterface)isthecongatecproprietaryAPIthatisavailableforallcommonlyusedOperatingSystemssuchasWin32,Win64,WinCE,LinuxandQNX.ThearchitectureoftheCGOSAPIdriverprovidestheabilitytowriteapplicationsoftwarethatrunsunmodifiedonallcongatecCPUmodules.AllthehardwarerelatedcodeiscontainedwithinthecongatecembeddedBIOSonthemodule.Seesection1.1oftheCGOSAPIsoftwaredevelopersguide,whichisavailableonthecongatecwebsite.

OtherCOM (Computer onModules) vendors offer similar driver solutions for these kind of embeddedPC features,which are by natureproprietary.AlltheAPIsolutionsthatcanbefoundonthemarketarenotcompatibletoeachother.Asaresult,writingapplicationsoftwarethatcanrunonmorethanonevendor’sCOMisnotsoeasy.CustomershavetochangetheirapplicationsoftwarewhenswitchingtoanotherCOMvendor.

EAPI(EmbeddedApplicationProgrammingInterface)isaprogramminginterfacedefinedbythePICMGthataddressesthisproblem.WiththisunifiedAPIitisnowpossibletorunthesameapplicationonallvendor’sCOMsthatofferEAPIdriversupport.ContactcongatectechnicalsupportformoreinformationaboutEAPI.

5.7 Suspend to RAMTheSuspendtoRAMfeatureisavailableontheconga-QAF.


5.8 Onboard Solid State DiskAsolid-statedrive(SSD)isadatastoragedevicethatusessolid-statememorytostorepersistentdata.AnSSDisaharddiskdrivewithoutthetraditionalmovingparts,thuseasilyreplacingtraditionalharddrivesinmostapplications.Theconga-QAFcanbeoptionallyequippedwithanSSDupto32GByteincapacity.

Due to thenatureofNANDFlash technology, there isa limitationofmaximumwritecycles related toeachstoragecell.According to themanufacturerdatasheet,anenduranceof10million(forcommercialMLCtechnology)or100million(forindustrialSLCtechnology)writecyclesisspecified.UnlimitedwritecyclesISNOTspecified.SinceanadvancedNANDmemorymanagementtechnologyfirmwareisimplementedintheSSDdrive,itwillbalancethewearonerasedblockswithanadvancedwear-levelingalgorithm,whichprovidesamaximumof10million(or100milliondependingofthetypeofSSDused)productwritecycles.Inmostapplicationsthiswillbeanacceptableandsecuresolutionbutitmustbementionedthatthedevicelifetimewillbeaffectedmainlybythefollowingparameters:

1.OperationtimeandusedOS:Ifa24/7applicationisrunningunderawrite-intensiveOS(suchasWindowsXPetc.)withoutEWF(EnhancedWriteFilter),theamountofguaranteedwrite-cyclesmaybereachedbeforethedefinedMTBFofthecompletesystem.

2.TheratiobetweenusedandunusedSSDcapacitywillalsoaffectthelifetime.Sincethewear-levelingalgorithmusesaccessstatisticsforbalancingthewearsontheblocks,theSSDendurancewillincreaseordecreaseaccordingtotheamountofusedandunusedSSDspace.

3.Giventheinformationinparameters1and2,iftheSSDapplicationisa24/7continuouslyrunningOSequippedSSDdrive,withfrequentwriteaccessesandthereisnotenoughfreecapacityavailableforwearleveling,theSSDendurancewilldecreaseaccordingly.ForthisreasonitisnecessarytoavoidaconfigurationthatwillresultinnotenoughfreecapacitybeingavailableforwearlevelingandthereforeitisrequiredthatanEWFmechanismisusedtherebylimitingthewrite-cyclesinordertomaintainsufficientfreediskspace.FailuretouseaEWFmechanismwillvoidthewarrantyoftheSSDdrive.

Note

For more information about the SSD drive’s capability refer to the manufacturers datasheet.


6 conga Tech NotesThe conga-QAF has some technological features that require additional explanation. The following section will give the reader a betterunderstandingofsomeofthesefeatures.Thisinformationwillalsohelptogainabetterunderstandingoftheinformationfoundinthesystemresourcessectionofthisuser’sguideaswellassomeofthesetupnodesfoundintheBIOSSetupProgramdescriptionsection.

6.1 AHCITheAMDA55EFCH provides hardware support forAdvancedHostController Interface (AHCI), a programming interface for SATA hostcontrollers.PlatformssupportingAHCImaytakeadvantageofperformancefeaturessuchasnomaster/slavedesignationforSATAdevices(eachdeviceistreatedasamaster)andhardware-assistednativecommandqueuing.AHCIalsoprovidesusabilityenhancementssuchasHot-Plug.

6.2 RAIDTheindustry-leadingRAIDcapabilityprovideshighperformanceRAID0and1functionalityonthe2SATAportsoftheconga-QAF.Softwarecomponents includeanOptionROM forpre-bootconfigurationandboot functionality,aMicrosoftWindowscompatibledriver,andauserinterfaceforconfigurationandmanagementoftheRAIDcapabilityoftheAMDA55EFCH.

FormoreinformationaboutRAIDsupportontheconga-QAFrefertoapplicationnoteAN15_Configure_RAID_System.pdf,whichcanbefoundonthecongatecAGwebsiteatwww.congatec.com.

6.3 Native vs. Legacy IDE mode

6.3.1 Legacy Mode

Whenoperating in legacymode, theSATAcontrollersneed two legacy IRQs(14and15)andareunable toshare these IRQswithotherdevices.ThisisbecausetheSATAcontrollersemulatetheprimaryandsecondarylegacyIDEcontrollers.

6.3.2 Native Mode

NativemodeallowstheSATAcontrollerstooperateastruePCIdevicesandthereforedonotneeddedicatedlegacyresources.Thismeanstheycanbeconfiguredanywherewithinthesystem.WheneitherSATAcontroller1or2runsinnativemodeitonlyrequiresonePCIinterruptforbothchannelsandalsohastheabilitytosharethisinterruptwithotherdevicesinthesystem.Setting“NativeIDE”modeintheBIOSsetup


programwillautomaticallyenableNativemode.Seesection9.4.9formoreinformationaboutthis.Runninginnativemodefreesupinterruptresources(IRQs14and15)anddecreasesthechancethattheremaybeashortageofinterruptswheninstallingdevices.

Note

If your operating system supports native mode then congatec AG recommends you enable it.

6.4 Thermal ManagementACPI is responsible forallowing theoperatingsystem toplayan importantpart in thesystem’s thermalmanagement.This results in theoperatingsystemhavingtheabilitytotakecontroloftheoperatingenvironmentbyimplementingcoolingdecisionsaccordingtothedemandsputontheCPUbytheapplication.

Theconga-QAFACPIthermalsolutionoffersthreedifferentcoolingpolicies.

• Passive Cooling

Whenthetemperatureinthethermalzonemustbereduced,theoperatingsystemcandecreasethepowerconsumptionoftheprocessorbythrottlingtheprocessorclock.Oneoftheadvantagesofthiscoolingpolicyisthatpassivecoolingdevices(inthiscasetheprocessor)donotproduceanynoise.Usethe“passivecoolingtrippoint”setupnodeintheBIOSsetupprogramtodeterminethetemperaturethresholdthattheoperatingsystemwillusetostartorstopthepassivecoolingprocedure.

• Active Cooling

Duringthiscoolingpolicytheoperatingsystemisturningthefanon/off.Althoughactivecoolingdevicesconsumepowerandproducenoise,theyalsohavetheabilitytocoolthethermalzonewithouthavingtoreducetheoverallsystemperformance.Usethe“activecoolingtrippoint”setupnodeintheBIOSsetupprogramtodeterminethetemperaturethresholdthattheoperatingsystemwillusetostarttheactivecoolingdevice.Itisstoppedagainwhenthetemperaturegoesbelowthethreshold(5°Chysteresis).

• Critical Trip Point

Ifthetemperatureinthethermalzonereachesacriticalpointthentheoperatingsystemwillperformasystemshutdowninanorderlyfashioninordertoensurethatthereisnodamagedonetothesystemasresultofhightemperatures.Usethe“criticaltrippoint”setupnodeintheBIOSsetupprogramtodeterminethetemperaturethresholdthattheoperatingsystemwillusetoshutdownthesystem.

Note

The end user must determine the cooling preferences for the system by using the setup nodes in the BIOS setup program to establish the appropriate trip points.


If passive cooling is activated and the processor temperature is above the trip point the processor clock is throttled. See section 12 of the ACPI Specification 2.0 C for more information about passive cooling.

6.5 ACPI Suspend Modes and Resume Eventsconga-QAFsupportsS3(STR=SuspendtoRAM).FormoreinformationaboutS3wakeeventsseesection9.4.4“ACPIConfigurationSubmenu”.

S4(SuspendtoDisk)isnotsupportedbytheBIOS(S4_BIOS)butitissupportedbythefollowingoperatingsystems(S4_OS=Hibernate):

• Windows7,WindowsVista,WindowsXPandLinux

Thistableliststhe“WakeEvents”thatresumethesystemfromS3unlessotherwisestatedinthe“Conditions/Remarks”column:

Wake Event Conditions/RemarksPowerButton WakesunconditionallyfromS3-S5.OnboardLANEvent DevicedrivermustbeconfiguredforWakeOnLANsupport.PCIExpressWAKE# WakesunconditionallyfromS3-S5.PME# ActivatethewakeupcapabilitiesofaPCIdeviceusingWindowsDeviceManagerconfigurationoptionsforthisdeviceORsetResumeOn

PME#toEnabledinthePowersetupmenu.USBMouse/KeyboardEvent WhenStandbymodeissettoS3,thefollowingmustbedoneforaUSBMouse/KeyboardEventtobeusedasaWakeEvent.

USBHardwaremustbepoweredbystandbypowersource.SetUSBDeviceWakeupfromS3/S4toENABLEDintheACPIsetupmenu(ifsetupnodeisavailableinBIOSsetupprogram).UnderWindowsXPaddfollowingregistryentries:Addthiskey:HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Services\usbUnderthiskeyaddthefollowingvalue:“USBBIOSx“=DWORD:00000000Note that Windows XP disables USB wakeup from S3, so this entry has to be added to re-enable it.ConfigureUSBkeyboard/mousetobeabletowakeupthesystem:InDeviceManagerlookforthekeyboard/mousedevices.GotothePowerManagementtabandcheck‘Allowthisdevicetobringthecomputeroutofstandby’.Note: When the standby state is set to S3 in the ACPI setup menu, the power management tab for USB keyboard /mouse devices only becomes available after adding the above registry entry and rebooting to allow the registry changes to take affect.

RTCAlarm ActivateandconfigureResumeOnRTCAlarminthePowersetupmenu.OnlyavailableinS5.WatchdogPowerButtonEvent WakesunconditionallyfromS3-S5.

Note

The above list has been verified using a Windows XP SP3 ACPI enabled installation.


7 Signal Descriptions and Pinout TablesThefollowingsectiondescribesthesignalsfoundonQseven®module’sedgefingers.

Table2describestheterminologyusedinthissectionfortheSignalDescriptiontables.ThePU/PDcolumnindicatesifapull-uporpull-downresistorhasbeenused,ifthefieldentryareainthiscolumnforthesignalisempty,thennopull-uporpull-downresistorhasbeenimplemented.The“#”symbolattheendofthesignalnameindicatesthattheactiveorassertedstateoccurswhenthesignalisatalowvoltagelevel.When“#”isnotpresent,thesignalisassertedwhenatahighvoltagelevel.

Note

Not all the signals described in this section are available on all conga-QAF variants. Use the article number of the module and refer to the options table on page 8 to determine the options available on the module.

Table 2 Signal Tables Terminology Descriptions

Term DescriptionI InputPinO OutputPinOC OpenCollectorOD Open DrainPP PushPullI/O Bi-directionalInput/OutputPinP PowerInputNA NotapplicableNC Not ConnectedPCIE PCIExpressdifferentialpairsignals.IncompliancewiththePCIExpressBaseSpecification2.0GB_LAN GigabitEthernetMediaDependentInterfacedifferentialpairsignals.IncompliancewithIEEE802.3ab1000Base-TGigabitEthernetSpecification.USB UniversalSerialBusdifferentialpairsignals.IncompliancewiththeUniversalSerialBusSpecification2.0SATA SerialAdvancedTechnologyAttachmentdifferentialpairsignals.IncompliancewiththeSerialATAHighSpeedSerializedATAttachmentSpecification2.6.SPI SerialPeripheralInterfacebusisasynchronousserialdatalinkthatoperatesinfullduplexmode.CAN ControllerAreaNetworkbusisavehiclebusstandardthatallowsmicrocontrollersanddevicestocommunicatewitheachotherwithinavehiclewithoutahost

computer.LVDS Low-VoltageDifferentialSignalingdifferentialpairsignals.IncompliancewiththeLVDSOwner'sManual4.0.TMDS TransitionMinimizedDifferentialSignalingdifferentialpairsignals.IncompliancewiththeDigitalVisualInterface(DVI)Specification1.0.CMOS Logicinputoroutput.


Table 3 Edge Finger Pinout

Pin Signal Description Pin Signal Description1 GND PowerGround 2 GND PowerGround3 GBE_MDI3- GigabitEthernetMDI3- 4 GBE_MDI2- GigabitEthernetMDI2-5 GBE_MDI3+ GigabitEthernetMDI3+ 6 GBE_MDI2+ GigabitEthernetMDI2+7 GBE_LINK100# 100Mbpslinkspeed 8 GBE_LINK1000# 1000Mbpslinkspeed9 GBE_MDI1- GigabitEthernetMDI1- 10 GBE_MDI0- GigabitEthernetMDI0-11 GBE_MDI1+ GigabitEthernetMDI1+ 12 GBE_MDI0+ GigabitEthernetMDI0+13 GBE_LINK# GigabitEthernetLinkindicator 14 GBE_ACT# GigabitEthernetActivityindicator15 GBE_CTREF ReferencevoltageforGBE 16 SUS_S5# S5(SoftOFF)–shutdownstate17 WAKE# Externalsystemwakeevent 18 SUS_S3# S3(SuspendtoRAM)–SLP19 SUS_STAT# Suspendstatus 20 PWRBTN# Powerbutton21 SLP_BTN# Sleepbutton 22 LID_BTN# LIDbutton23 GND PowerGround 24 GND PowerGround25 GND PowerGround 26 PWGIN Powergoodinput27 BATLOW# Batterylowinput 28 RSTBTN# Resetbuttoninput29 SATA0_TX+ SerialATAChannel0TX+ 30 SATA1_TX+ SerialATAChannel1TX+31 SATA0_TX- SerialATAChannel0TX- 32 SATA1_TX- SerialATAChannel1TX-33 SATA_ACT# SerialATAActivity 34 GND PowerGround35 SATA0_RX+ SerialATAChannel0RX+ 36 SATA1_RX+ SerialATAChannel1RX+37 SATA0_RX- SerialATAChannel0RX- 38 SATA1_RX- SerialATAChannel1RX-39 GND PowerGround 40 GND PowerGround41 BIOS_DISABLE#

/BOOT_ALT#BIOSModuledisableBootAlternativeEnable

42 SDIO_CLK SDIOClockOutput

43 SDIO_CD# SDIOCardDetect 44 SDIO_LED SDIOLED45 SDIO_CMD SDIOCommand/Response 46 SDIO_WP SDIOWriteProtect47 SDIO_PWR# SDIOPowerEnable 48 SDIO_DAT1 SDIODataLine149 SDIO_DAT0 SDIODataLine0 50 SDIO_DAT3 SDIODataLine351 SDIO_DAT2 SDIODataLine2 52 SDIO_DAT5 SDIODataLine553 SDIO_DAT4 SDIODataLine4 54 SDIO_DAT7 SDIODataLine755 SDIO_DAT6 SDIODataLine6 56 RESERVED57 GND PowerGround 58 GND PowerGround59 HDA_SYNC HDAudio/AC’97Synchronization 60 SMB_CLK SMBusClockline61 HDA_RST# HDAudio/AC’97CodecReset 62 SMB_DAT SMBusDataline63 HDA_BITCLK HDAudio/AC’97SerialBitClock 64 SMB_ALERT# SMBusAlertinput65 HDA_SDI HDAudio/AC’97SerialDataIn 66 I2C_CLK I2CBusClock67 HDA_SDO HDAudio/AC’97SerialDataOut 68 I2C_DAT I2CBusData69 THRM# ThermalAlarmactivelow 70 WDTRIG# Watchdogtriggersignal71 THRMTRIP# ThermalTripindicatesanoverheatingcondition 72 WDOUT Watchdogeventindicator73 GND PowerGround 74 GND PowerGround75 USB_P7- USBPort7DifferentialPair- 76 USB_P6- USBPort6DifferentialPair-


Pin Signal Description Pin Signal Description77 USB_P7+ USBPort7DifferentialPair+ 78 USB_P6+ USBPort6DifferentialPair+79 USB_6_7_OC# Overcurrentdetectinput6/7USB 80 USB_4_5_OC# Overcurrentdetectinput4/5USB81 USB_P5- USBPort5DifferentialPair- 82 USB_P4- USBPort4DifferentialPair-83 USB_P5+ USBPort5DifferentialPair+ 84 USB_P4+ USBPort4DifferentialPair+85 USB_2_3_OC# Overcurrentdetectinput2/3USB 86 USB_0_1_OC# Overcurrentdetectinput0/1USB87 USB_P3- USBPort3DifferentialPair- 88 USB_P2- USBPort2DifferentialPair-89 USB_P3+ USBPort3DifferentialPair+ 90 USB_P2+ USBPort2DifferentialPair+91 USB_CC(*) USBClientpresentdetectpin 92 USB_ID(*) USBIDpin93 USB_P1- USBPort1DifferentialPair- 94 USB_P0- USBPort0DifferentialPair-95 USB_P1+ USBPort1DifferentialPair+ 96 USB_P0+ USBPort0DifferentialPair+97 GND PowerGround 98 GND PowerGround99 LVDS_A0+ LVDSPrimarychannel0+ 100 LVDS_B0+ LVDSSecondarychannel0+101 LVDS_A0- LVDSPrimarychannel0- 102 LVDS_B0- LVDSSecondarychannel0-103 LVDS_A1+ LVDSPrimarychannel1+ 104 LVDS_B1+ LVDSSecondarychannel1+105 LVDS_A1- LVDSPrimarychannel1- 106 LVDS_B1- LVDSSecondarychannel1-107 LVDS_A2+ LVDSPrimarychannel2+ 108 LVDS_B2+ LVDSSecondarychannel2+109 LVDS_A2- LVDSPrimarychannel2- 110 LVDS_B2- LVDSSecondarychannel2-111 LVDS_PPEN LVDSPowerenable 112 LVDS_BLEN LVDSBacklightenable113 LVDS_A3+ LVDSPrimarychannel3+ 114 LVDS_B3+ LVDSSecondarychannel3+115 LVDS_A3- LVDSPrimarychannel3- 116 LVDS_B3- LVDSSecondarychannel3-117 GND PowerGround 118 GND PowerGround119 LVDS_A_CLK+ LVDSPrimarychannelCLK+ 120 LVDS_B_CLK+ LVDSSecondarychannelCLK+121 LVDS_A_CLK- LVDSPrimarychannelCLK- 122 LVDS_B_CLK- LVDSSecondarychannelCLK-123 LVDS_BLT_CTRL

/GP_PWM_OUT0PWMBacklightbrightnessGeneralPurposePWMOutput

124 RESERVED

125 LVDS_DID_DAT/GP_I2C_DAT

DDCDisplayIDDatalineGeneralPurposeI2CDataline

126 LVDS_BLC_DAT(*) SSCclockchipdataline

127 LVDS_DID_CLK//GP_I2C_CLK

DDCDisplayIDClocklineGeneralPurposeI2CClockline

128 LVDS_BLC_CLK(*) SSCclockchipclockline

129 CAN0_TX(*) CANTXOutputforCANBusChannel0 130 CAN0_RX(*) CANRXInputforCANBusChannel0131 DP_LANE3+ DisplayPortdifferentialpairlinelane3 132 SDVO_INT+(*) SDVOInterruptline+133 DP_LANE3- DisplayPortdifferentialpairlinelane3 134 SDVO_INT-(*) SDVOInterruptline-135 GND PowerGround 136 GND PowerGround137 DP_LANE1+ DisplayPortdifferentialpairlinelane1 138 DP_AUX+ DisplayPortauxiliarychannel139 DP_LANE1- DisplayPortdifferentialpairlinelane1 140 DP_AUX- DisplayPortauxiliarychannel141 GND PowerGround 142 GND PowerGround143 DP_LANE2+ DisplayPortdifferentialpairlinelane2 144 SDVO_TVCLKIN+(*) SDVOTV-Outline+145 DP_LANE2- DisplayPortdifferentialpairlinelane2 146 SDVO_TVCLKIN-(*) SDVOTV-Outline-147 GND PowerGround 148 GND PowerGround149 DP_LANE0+ DisplayPortdifferentialpairlinelane0 150 HDMI_CTRL_DAT DDCbasedcontrolsignal(data)forHDMI/DVIdevice.151 DP_LANE0- DisplayPortdifferentialpairlinelane0 152 HDMI_CTRL_CLK DDCbasedcontrolsignal(clock)forHDMI/DVIdevice.


Pin Signal Description Pin Signal Description153 HDMI_HPD# HotplugdetectionforHDMI 154 DP_HPD# HotplugdetectionforDisplayport155 PCIE_CLK_REF+ PCIExpressReferenceClock+ 156 PCIE_WAKE# PCIExpressWakeevent157 PCIE_CLK_REF- PCIExpressReferenceClock- 158 PCIE_RST# ResetSignalforexternaldevices159 GND PowerGround 160 GND PowerGround161 PCIE3_TX+ PCIExpressChannel3Output+ 162 PCIE3_RX+ PCIExpressChannel3Input+163 PCIE3_TX- PCIExpressChannel3Output- 164 PCIE3_RX- PCIExpressChannel3Input-165 GND PowerGround 166 GND PowerGround167 PCIE2_TX+ PCIExpressChannel2Output+ 168 PCIE2_RX+ PCIExpressChannel2Input+169 PCIE2_TX- PCIExpressChannel2Output- 170 PCIE2_RX- PCIExpressChannel2Input-171 EXCD0_PERST# ExpressCardslot#0reset 172 EXCD1_PERST# ExpressCardslot#1reset173 PCIE1_TX+ PCIExpressChannel1Output+ 174 PCIE1_RX+ PCIExpressChannel1Input+175 PCIE1_TX- PCIExpressChannel1Output- 176 PCIE1_RX- PCIExpressChannel1Input-177 EXCD0_CPPE# ExpressCardslot#0Capable/Req 178 EXCD1_CPPE# ExpressCardslot#0Capable/Req179 PCIE0_TX+ PCIExpressChannel0Output+ 180 PCIE0_RX+ PCIExpressChannel0Input+181 PCIE0_TX- PCIExpressChannel0Output- 182 PCIE0_RX- PCIExpressChannel0Input-183 GND PowerGround 184 GND PowerGround185 LPC_AD0 LPCInterfaceAddress/Data0 186 LPC_AD1 LPCInterfaceAddress/Data1187 LPC_AD2 LPCInterfaceAddress/Data0 188 LPC_AD3 LPCInterfaceAddress/Data3189 LPC_CLK LPCInterfaceClock 190 LPC_FRAME# LPCframeindicator191 SERIRQ Serializedinterrupt 192 LPC_LDRQ# LPCDMArequest193 VCC_RTC 3Vbackupcellinput 194 SPKR

/GP_PWM_OUT2OutputforaudioenunciatorGeneralPurposePWMOutput

195 FAN_TACHOIN/GP_TIMER_IN

FantachometerinputGeneralPurposeTimerIn

196 FAN_PWMOUT/GP_PWM_OUT1

Fanspeedcontrol(PWM)GeneralPurposePWMOutput

197 GND PowerGround 198 GND PowerGround199 SPI_MOSI SPIMasterserialoutput/Slaveserialinput 200 SPI_CS0# SPIChipSelect0Output201 SPI_MISO SPIMasterserialinput/Slaveserialoutputsignal 202 SPI_CS1# SPIChipSelect1Output203 SPI_SCK SPIClockOutput 204 MFG_NC4 Donotconnectoncarrierboard205 VCC_5V_SB +5VDC,Standby±5% 206 VCC_5V_SB +5VDCStandby±5%207 MFG_NC0 Donotconnectoncarrierboard 208 MFG_NC2 Donotconnectoncarrierboard209 MFG_NC1 Donotconnectoncarrierboard 210 MFG_NC3 Donotconnectoncarrierboard211 VCC Powersupply+5VDC±5% 212 VCC Powersupply+5VDC±5%213 VCC Powersupply+5VDC±5% 214 VCC Powersupply+5VDC±5%215 VCC Powersupply+5VDC±5% 216 VCC Powersupply+5VDC±5%217 VCC Powersupply+5VDC±5% 218 VCC Powersupply+5VDC±5%219 VCC Powersupply+5VDC±5% 220 VCC Powersupply+5VDC±5%221 VCC Powersupply+5VDC±5% 222 VCC Powersupply+5VDC±5%223 VCC Powersupply+5VDC±5% 224 VCC Powersupply+5VDC±5%225 VCC Powersupply+5VDC±5% 226 VCC Powersupply+5VDC±5%227 VCC Powersupply+5VDC±5% 228 VCC Powersupply+5VDC±5%229 VCC Powersupply+5VDC±5% 230 VCC Powersupply+5VDC±5%


Note

The signals in the previous table marked with an asterisk symbol (*) are not supported on the conga-QAF.

Table 4 PCI Express Signal Descriptions

Signal Pin # Description I/O PU/PD CommentPCIE0_RX+PCIE0_RX-

180182

PCIExpresschannel0,ReceiveInputdifferentialpair. IPCIE SupportsPCIExpressBaseSpecification,Revision2.0

PCIE0_TX+PCIE0_TX-

179181

PCIExpresschannel0,TransmitOutputdifferentialpair. OPCIE SupportsPCIExpressBaseSpecification,Revision2.0

PCIE1_RX+PCIE1_RX-

174176

PCIExpresschannel1,ReceiveInputdifferentialpair. IPCIE SupportsPCIExpressBaseSpecification,Revision2.0.

PCIE1_TX+PCIE1_TX-

173175


PCIE2_RX+PCIE2_RX-

168170

PCIExpresschannel2,ReceiveInputdifferentialpair. IPCIE SupportsPCIExpressBaseSpecification,Revision2.0

PCIE2_TX+PCIE2_TX-

167169


PCIE3_RX+PCIE3_RX-

162164

PCIExpresschannel3,ReceiveInputdifferentialpair. IPCIE SupportsPCIExpressBaseSpecification,Revision2.0.

PCIE3_TX+PCIE3_TX-

161163


PCIE_CLK_REF+PCIE_CLK_REF-

155157

PCIExpressReferenceClockforLanes0to3. OPCIE

PCIE_WAKE# 156 PCIExpressWakeEvent:Sidebandwakesignalassertedbycomponentsrequestingwakeup.

I3.3VSB PU10k3.3VSB

PCIE_RST# 158 ResetSignalforexternaldevices. O3.3V

Table 5 ExpressCard Signal Descriptions

Signal Pin # Description I/O PU/PD CommentEXCD0_CPPE# 177 ExpressCardslot#0capablecardrequest. I3.3VSB PU10k

3.3VSBEXCD0_PERST# 171 ExpressCardslot#0reset. O3.3VEXCD1_CPPE# 178 ExpressCardslot#1capablecardrequest. I3.3VSB PU10k

3.3VSBEXCD1_PERST# 172 ExpressCardslot#1reset. O3.3V


Table 6 Ethernet Signal Descriptions

Signal Pin # Description I/O PU/PD CommentGBE_MDI0+GBE_MDI0-

1210

MediaDependentInterface(MDI)differentialpair0.TheMDIcanoperatein1000,100,and10Mbit/secmodes.Thissignalpairisusedforallmodes.

I/OAnalog Twistedpairsignalsforexternaltransformer.

GBE_MDI1+GBE_MDI1-

119

MediaDependentInterface(MDI)differentialpair1.TheMDIcanoperatein1000,100,and10Mbit/secmodes.Thissignalpairisusedforallmodes.


GBE_MDI2+GBE_MDI2-

64

MediaDependentInterface(MDI)differentialpair2.TheMDIcanoperatein1000,100,and10Mbit/secmodes.Thissignalpairisonlyusedfor1000Mbit/secGigabitEthernetmode.


GBE_MDI3+GBE_MDI3-

53

MediaDependentInterface(MDI)differentialpair3.TheMDIcanoperatein1000,100,and10Mbit/secmodes.Thissignalpairisonlyusedfor1000Mbit/secGigabitEthernetmode.


GBE_CTREF 15 ReferencevoltageforcarrierboardEthernetmagneticscentertap.Thereferencevoltageisdeterminedbytherequirementsofthemodule'sPHYandmaybeaslowas0Vandashighas3.3V.Thereferencevoltageoutputshouldbecurrentlimitedonthemodule.Inacaseinwhichthereferenceisshortedtoground,thecurrentmustbelimitedto250mAorless.

REF conga-QAFGbEuses1.9Vcentertabvoltage.

GBE_LINK# 13 Ethernetcontroller0linkindicator,activelow. O3.3VSBPP

seenotebelow

GBE_LINK100# 7 Ethernetcontroller0100Mbit/seclinkindicator,activelow. O3.3VSBPP

GBE_LINK1000# 8 Ethernetcontroller01000Mbit/seclinkindicator,activelow. O3.3VSBPP

GBE_ACT# 14 Ethernetcontroller0activityindicator,activelow. O3.3VSB seenotebelow,pulledto3.3VSB

Note

The GbE Controller used on the conga-QAF supports only three LEDs outputs:

GBE_LINK100# 100Mb/s link indicator

GBE_LINK1000# 1000Mb/s link indicator

GBE_LINK#/ACT Combined all speed link with link activity that is connected to GBE_LINK# pin on Qseven connector.

The conga-QAF can drive directly GbE LEDs with up to 10mA.


Table 7 SATA Signal Descriptions

Signal Pin # Description I/O PU/PD CommentSATA0_RX+SATA0_RX-

3537

SerialATAchannel0,ReceiveInputdifferentialpair. ISATA SupportsSerialATAspecification,Revision2.6

SATA0_TX+SATA0_TX-

2931

SerialATAchannel0,TransmitOutputdifferentialpair. OSATA SupportsSerialATAspecification,Revision2.6

SATA1_RX+SATA1_RX-

3638

SerialATAchannel1,ReceiveInputdifferentialpair. ISATA SupportsSerialATAspecification,Revision2.6

SATA1_TX+SATA1_TX-

3032

SerialATAchannel1,TransmitOutputdifferentialpair. OSATA SupportsSerialATAspecification,Revision2.6

SATA_ACT# 33 SerialATALed.OpencollectoroutputpindrivenduringSATAcommandactivity.

O3.3V upto10mA

Table 8 USB Signal Descriptions

Signal Pin # Description I/O PU/PD CommentUSB_P0+USB_P0-

9694

UniversalSerialBusPort0differentialpair. I/O USB2.0compliant.BackwardscompatibletoUSB1.1

USB_P1+USB_P1-

9593


USB_P2+USB_P2-

9088


USB_P3+USB_P3-

8987


USB_P4+USB_P4-

8482


USB_P5+USB_P5-

8381


USB_P6+USB_P6-

7876


USB_P7+USB_P7-

7775


USB_0_1_OC# 86 Overcurrentdetectinput1.ThispinisusedtomonitortheUSBpowerovercurrentoftheUSBPorts0and1.

I3.3VSB PU10k3.3VSB


I3.3VSB PU10k3.3VSB


I3.3VSB PU10k3.3VSB


I3.3VSB PU10k3.3VSB


USB_ID 92 USBIDpin.ConfiguresthemodeoftheUSBPort1.Ifthesignalisdetectedasbeing'highactive'theBIOSwillautomaticallyconfigureUSBPort1asUSBClientandenableUSBClientsupport.ThissignalshouldbedrivenasOCsignalbyexternalcircuitry.

I3.3VSB Not connected

USB_CC# 91 USBClientConnectpin.IfUSBPort1isconfiguredforclientmodethenanexternallyconnectedUSBhostshouldsetthissignaltohigh-activeinordertoproperlymaketheconnectionwiththemodule’sinternalUSBclientcontroller.IftheexternalUSBhostisdisconnected,thissignalshouldbesettolow-activeinordertoinformtheUSBclientcontrollerthattheexternalhosthasbeendisconnected.Alevelshifter/protectioncircuitryshouldbeimplementedonthecarrierboardforthissignal.

I3.3V Not connected

Table 9 SDIO Signal Descriptions

Signal Pin # Description I/O PU/PD CommentSDIO_CD# 43 SDIOCardDetect.ThissignalindicateswhenaSDIO/MMCcardispresent. I/O3.3V PU50k

3.3VSDIO_CLK 42 SDIOClock.Witheachcycleofthissignalaone-bittransferonthecommandandeach

datalineoccurs.Thissignalhasmaximumfrequencyof48MHz.O3.3V

SDIO_CMD 45 SDIOCommand/Response.Thissignalisusedforcardinitializationandforcommandtransfers.Duringinitializationmodethissignalisopendrain.Duringcommandtransferthissignalisinpush-pullmode.

I/O3.3VOD/PP

PU50k3.3V

SDIO_LED 44 SDIOLED.UsedtodriveanexternalLEDtoindicatewhentransfersoccuronthebus. O3.3VSDIO_WP 46 SDIOWriteProtect.Thissignaldenotesthestateofthewrite-protecttabonSDcards. I/O3.3V PU10k

3.3VSDIO_PWR# 47 SDIOPowerEnable.ThissignalisusedtoenablethepowerbeingsuppliedtoaSD/

MMCcarddevice.OD3.3V PU10k

3.3VSDIO_DAT0SDIO_DAT1SDIO_DAT2SDIO_DAT3SDIO_DAT4SDIO_DAT5SDIO_DAT6SDIO_DAT7

4948515053525554

SDIODatalines.Thesesignalsoperateinpush-pullmode. I/O3.3VPP

PU50k3.3V


Table 10 HDA Signal Descriptions

Signal Pin # Description I/O PU/PD CommentHDA_RST# 61 HDAudioCodecReset. O

3.3VSBHDA_SYNC 59 HDAudioSerialBusSynchronization. O

3.3VSBHDA_BITCLK 63 HDAudio24MHzSerialBitClockfromCodec. O

3.3VSBHDA_SDO 67 HDAudioSerialDataOutputtoCodec. O

3.3VSBHDA_SDI 65 HDAudioSerialDataInputfromCodec. I3.3VSB PD50k

Table 11 LVDS Signal Descriptions

Signal Pin # Description I/O PU/PD CommentLVDS_PPEN 111 Controlspanelpowerenable. O3.3VLVDS_BLEN 112 ControlspanelBacklightenable. O3.3VLVDS_BLT_CTRL/GP_PWM_OUT0

123 Primaryfunctionalityistocontrolthepanelbacklightbrightnessviapulsewidthmodulation(PWM).WhennotinuseforthisprimarypurposeitcanbeusedasGeneralPurposePWMOutput.

O3.3V

LVDS_A0+LVDS_A0-

99101

LVDSprimarychanneldifferentialpair0. OLVDS

LVDS_A1+LVDS_A1-

103105


LVDS_A2+LVDS_A2-

107109


LVDS_A3+LVDS_A3-

113115


LVDS_A_CLK+LVDS_A_CLK-

119121

LVDSprimarychanneldifferentialpairclocklines. OLVDS

LVDS_B0+LVDS_B0-

100102

LVDSsecondarychanneldifferentialpair0. OLVDS

LVDS_B1+LVDS_B1-

104106


LVDS_B2+LVDS_B2-

108110


LVDS_B3+LVDS_B3-

114116


LVDS_B_CLK+LVDS_B_CLK-

120122

LVDSsecondarychanneldifferentialpairclocklines. OLVDS


LVDS_DID_CLK/GP_I2C_CLK

127 PrimaryfunctionalityisDisplayIDDDCclocklineusedforLVDSflatpaneldetection.IfprimaryfunctionalityisnotuseditcanbeasGeneralPurposeI²Cbusclockline.

I/O3.3VOD

PU2.2k3.3V

LVDS_DID_DAT/GP_I2C_DAT

125 PrimaryfunctionalityDisplayIDDDCdatalineusedforLVDSflatpaneldetection.IfprimaryfunctionalityisnotuseditcanbeasGeneralPurposeI²Cbusdataline.

I/O3.3VOD

PU2.2k3.3V

LVDS_BLC_CLK 128 ControlclocksignalforexternalSSCclockchip. I/O3.3VOD

PU4.7k3.3V

Notsupported

LVDS_BLC_DAT 126 ControldatasignalforexternalSSCclockchip. I/O3.3VOD

PU4.7k3.3V

Notsupported

Table 12 SDVO Signal Descriptions

Signal Pin # Description I/O PU/PD CommentSDVO_BCLK+SDVO_BCLK-

131133

SDVOdifferentialpairclocklines. OPCIE NotSupported

SDVO_INT+SDVO_INT-

132134

SDVOdifferentialpairinterruptinputlines. IPCIE NotSupported

SDVO_GREEN+SDVO_GREEN-

137139

SDVOdifferentialpairgreendatalines. OPCIE NotSupported

SDVO_BLUE+SDVO_BLUE-

143145

SDVOdifferentialpairbluedatalines. OPCIE NotSupported

SDVO_RED+SDVO_RED-

149151

SDVOdifferentialpairreddatalines. OPCIE NotSupported

SDVO_FLDSTALL+SDVO_FLDSTALL-

138140

SDVOdifferentialpairfieldstalllines. IPCIE NotSupported

SDVO_TVCLKIN+SDVO_TVCLKIN-

144146

SDVOdifferentialpairTV-Outsynchronizationclocklines. IPCIE NotSupported

SDVO_CTRL_CLK 152 I²Cbasedcontrolsignal(clock)forSDVOdevice.Note: If the control bus from the SDVO device has a different signaling voltage, then a level shifting device will be required on the carrier board to properly translate the voltage level for this signal.

I/O3.3VOD PU100k3.3V NotSupported

SDVO_CTRL_DAT 150 I²Cbasedcontrolsignal(data)forSDVOdevice.Note: If the control bus from the SDVO device has a different signaling voltage, then a level shifting device will be required on the carrier board to properly translate the voltage level for this signal.

I/O3.3VOD PU100k3.3V NotSupported

Note

The SDVO interface signals are shared with the signals for the DisplayPort interface and/or the TMDS interface. The conga-QAF does not support the SDVO interface.


Table 13 DisplayPort Signal Descriptions

Signal Pin # Description I/O PU/PD CommentDP_LANE3+DP_LANE3-

131133

DisplayPortdifferentialpairlineslane3. OPCIE SharedwithSDVO_BCLK+andSDVO_BCLK-

DP_LANE2+DP_LANE2-

143145

DisplayPortdifferentialpairlineslane2. OPCIE SharedwithSDVO_BLUE+andSDVO_BLUE-

DP_LANE1+DP_LANE1-

137139

DisplayPortdifferentialpairlineslane1. OPCIE SharedwithSDVO_GREEN+andSDVO_GREEN-

DP_LANE0+DP_LANE0-

149151

DisplayPortdifferentialpairlineslane0. OPCIE SharedwithSDVO_RED+andSDVO_RED-

DP_AUX+DP_AUX-

138140

Auxiliarychannelusedforlinkmanagementanddevicecontrol.Differentialpairlines.

I/OPCIE SharedwithSDVO_FLDSTALL+andSDVO_FLDSTALL-

DP_HPD# 154 Hotplugactivelowdetectionsignalthatservesasaninterruptrequest.

I3.3V PU22k3.3V

ShouldbydrivenbyODoutput.ADD2-Nadaptercardwith0.8V(PCIe)logiclevelHPD#issupported.

Note

The DisplayPort interface signals are shared with the signals for the SDVO interface and/or the TMDS interface. SDVO interface is not supported on the conga-QAF.

Table 14 HDMI/DVI Signal Descriptions

Signal Pin # Description I/O PU/PD CommentTMDS_CLK+TMDS_CLK-

131133

TMDSdifferentialpairclocklines. OTMDS PassivelevelshiftershallusePD499R.

TMDS_LANE0+TMDS_LANE0-

143145

TMDSdifferentialpairlineslane0. OTMDS PassivelevelshiftershallusePD499R.


137139



149151


HDMI_CTRL_CLK 152 DDCbasedcontrolsignal(clock)forHDMI/DVIdevice. I/O3.3VOD SharedwithSDVO_CTRL_CLKPU10kto3.3VshallbyplacedoncarrierboardbetweenQsevenconnectorandlevelshifterFET,PU2.2kto5VshallbyplacedbetweenlevelshifterFETandHDMI/DVIconnector.

HDMI_CTRL_DAT 150 DDCbasedcontrolsignal(data)forHDMIdevice. I/O3.3VOD SharedwithSDVO_CTRL_DATPU10kto3.3VshallbyplacedoncarrierboardbetweenQsevenconnectorandlevelshifterFET,PU2.2kto5VshallbyplacedbetweenlevelshifterFETandHDMI/DVIconnector.

HDMI_HPD# 153 Hotplugactivelowdetectionsignalthatservesasaninterruptrequest.

I3.3V ShouldbydrivenbyODoutput.ADD2-Nadaptercardwith0.8V(PCIe)logiclevelHPD#issupported.


Note

The TMDS interface signals are shared with the signals for the SDVO interface and/or the DisplayPort interface. SDVO interface is not supported on the conga-QAF.

Table 15 LPC Signal Descriptions

Signal Pin # Description I/O PU/PD CommentLPC_AD0LPC_AD1LPC_AD2LPC_AD3

185186187188

MultiplexedCommand,AddressandData. I/O3.3V PU15k3.3V

LPC_FRAME# 190 LPCframeindicatesthestartofanewcycleortheterminationofabrokencycle. O3.3VLPC_LDRQ# 192 LPCDMArequest. I3.3V PU15kLPC_CLK 189 LPCclock. O3.3VSERIRQ 191 SerializedInterrupt. I/O3.3V PU8.2k

3.3V

Table 16 SPI Interface Signal Descriptions

Signal Pin # Description I/O PU/PD CommentSPI_MOSI 199 Masterserialoutput/Slaveserialinputsignal.SPIserialoutputdatafrom

Qseven®moduletotheSPIdevice.O 3.3VSB

SPI_MISO 201 Masterserialinput/Slaveserialoutputsignal.SPIserialinputdatafromtheSPIdevicetoQseven®module.

I3.3VSB

SPI_SCK 203 SPIclockoutput. O 3.3VSB

SPI_CS0# 200 SPIchipselect0output. O 3.3VSB

SPI_CS1# 202 SPIChipSelect1signalisusedasthesecondchipselectwhentwodevicesareused.DonotusewhenonlyoneSPIdeviceisused.

O 3.3VSB


Table 17 CAN Bus Signal Descriptions

Signal Pin # Description I/O PU/PD CommentCAN0_TX 129 CAN(ControllerAreaNetwork)TXoutputforCANBuschannel0.Inorder

toconnectaCANcontrollerdevicetotheQseven®module’sCANbusitisnecessarytoaddtransceiverhardwaretothecarrierboard.

O3.3V Not connected

CAN0_RX 130 RXinputforCANBuschannel0.InordertoconnectaCANcontrollerdevicetotheQseven®module’sCANbusitisnecessarytoaddtransceiverhardwaretothecarrierboard.

I3.3V Not connected

Table 18 Power and GND Signal Descriptions

Signal Pin # Description I/O PU/PD CommentVCC 211-230 PowerSupply+5VDC±5%. PVCC_5V_SB 205-206 StandbyPowerSupply+5VDC±5%. PVCC_RTC 193 3Vbackupcellinput.VCC_RTCshouldbeconnectedtoa3Vbackupcellfor

RTCoperationandstorageregisternon-volatilityintheabsenceofsystempower.(VCC_RTC=2.5-3.3V).

P

GND 1,2,23-25,34,39-40,57-58,73-74,97-98,117-118,135-136,141-142,147-148,159-160,165-166,183-184,197-198

PowerGround. P

Table 19 Power Control Signal Descriptions

Signal Pin # Description of Power Control signals I/O PU/PD CommentPWGIN 26 HighactiveinputfortheQseven®moduleindicatesthatpowerfromthepowersupplyis

ready. I5V PU50k

3.3VShouldbedrivenbyODoutput.

PWRBTN# 20 PowerButton:Lowactivepowerbuttoninput.Thissignalistriggeredonthefallingedge. I3.3VSBPU10k3.3VSB


Table 20 Power Management Signal Descriptions

Signal Pin # Description of Power Management signals I/O PU/PD CommentRSTBTN# 28 Resetbuttoninput.Thisinputmaybedrivenactivelowbyanexternalcircuitrytoreset

theQseven®module.I3.3V PU10k

3.3VBATLOW# 27 Batterylowinput.Thissignalmaybedrivenactivelowbyexternalcircuitrytosignal

thatthesystembatteryislowormaybeusedtosignalsomeotherexternalbatterymanagementevent.

I3.3VSB PU10k3.3VSB

WAKE# 17 Externalsystemwakeevent.Thismaybedrivenactivelowbyexternalcircuitrytosignalanexternalwake-upevent.

I3.3VSB PU10k3.3VSB

SUS_STAT# 19 SuspendStatus:indicatesthatthesystemwillbeenteringalowpowerstatesoon. O3.3VSBSUS_S3# 18 S3State:Thissignalshutsoffpowertoallruntimesystemcomponentsthatarenot

maintainedduringS3(SuspendtoRam),S4orS5states.ThesignalSUS_S3#isnecessaryinordertosupporttheoptionalS3coldpowerstate.

O3.3VSB

SUS_S5# 16 S5State:ThissignalindicatesS4orS5(SoftOff)state. O3.3VSBSLP_BTN# 21 Sleepbutton.LowactivesignalusedbytheACPIoperatingsystemtotransitionthe

systemintosleepstateortowakeitupagain.Thissignalistriggeredonfallingedge.I3.3VSB PU10k

3.3VSBLID_BTN# 22 LIDbutton.LowactivesignalusedbytheACPIoperatingsystemtodetectaLIDswitch

andtobringsystemintosleepstateortowakeitupagain.I3.3VSB PU10k

3.3VSB

Table 21 Miscellaneous Signal Descriptions

Signal Pin # Description I/O PU/PD CommentWDTRIG# 70 Watchdogtriggersignal.ThissignalrestartsthewatchdogtimeroftheQseven®

moduleonthefallingedgeofalowactivepulse.I3.3V PU10k3.3V

WDOUT 72 Watchdogeventindicator.Highactiveoutputusedforsignalingamissingwatchdogtrigger.Willbedeassertedbysoftware,systemresetorasystempowerdown.

O3.3V

I2C_CLK 66 ClocklineofI²Cbus. I/O3.3VOD PU2.2k3.3V

I2C_DAT 68 DatalineofI²Cbus. I/O3.3VOD PU2.2k3.3V

SMB_CLK 60 ClocklineofSystemManagementBus. I/O3.3VSBOD

PU2.2k3.3VSB

SMB_DAT 62 DatalineofSystemManagementBus. I/O3.3VSBOD

PU2.2k3.3VSB

SMB_ALERT# 64 SystemManagementBusAlertinput.ThissignalmaybedrivenlowbySMBdevicestosignalaneventontheSMBus.

I/O3.3VSBOD

PU10k3.3V

SPKR/GP_PWM_OUT2

194 Primaryfunctionalityisoutputforaudioenunciator,the“speaker”inPCATsystems.WhennotinuseforthisprimarypurposeitcanbeusedasGeneralPurposePWMOutput.

O3.3V

BIOS_DISABLE#/BOOT_ALT#

41 ModuleBIOSdisableinputsignal.Pulllowtodisablemodule’sonboardBIOS.Allowsoff-moduleBIOSimplementations.Thissignalcanalsobeusedtodisablestandardbootfirmwareflashdeviceandenableanalternativebootfirmwaresource,forexampleabootloader.

I3.3VSB PU10k3.3VSB


Table 22 Manufacturing Signal Descriptions

Signal Pin # Description I/O PU/PD CommentMFG_NC0 207 Thispinisreservedformanufacturinganddebuggingpurposes.MaybeusedasJTAG_TCKsignalfor

boundaryscanpurposesduringproductionorasavendorspecificcontrolsignal.WhenusedasavendorspecificcontrolsignalthemultiplexermustbecontrolledbytheMFG_NC4signal.

NA NA

MFG_NC1 209 Thispinisreservedformanufacturinganddebuggingpurposes.MaybeusedasJTAG_TDOsignalforboundaryscanpurposesduringproduction.Mayalsobeused,viaamultiplexer,asaUART_TXsignaltoconnectasimpleUARTforfirmwareandbootloaderimplementations.InthiscasethemultiplexermustbecontrolledbytheMFG_NC4signal.

NA NA

MFG_NC2 208 Thispinisreservedformanufacturinganddebuggingpurposes.MaybeusedasJTAG_TDIsignalforboundaryscanpurposesduringproduction.Mayalsobeused,viaamultiplexer,asaUART_RXsignaltoconnectasimpleUARTforfirmwareandbootloaderimplementations.InthiscasethemultiplexermustbecontrolledbytheMFG_NC4signal.

NA NA

MFG_NC3 210 Thispinisreservedformanufacturinganddebuggingpurposes.MaybeusedasJTAG_TMSsignalforboundaryscanpurposesduringproduction.Mayalsobeused,viaamultiplexer,asvendorspecificBOOTsignalforfirmwareandbootloaderimplementations.InthiscasethemultiplexermustbecontrolledbytheMFG_NC4signal.

NA NA

MFG_NC4 204 Thispinisreservedformanufacturinganddebuggingpurposes.MaybeusedasJTAG_TRST#signalforboundaryscanpurposesduringproduction.MayalsobeusedascontrolsignalforamultiplexercircuitonthemoduleenablingsecondaryfunctionforMFG_NC0..3(JTAG/UART).WhenMFG_NC4ishighactiveitisbeingusedforJTAGpurposes.WhenMFG_NC4islowactiveitisbeingusedforUARTpurposes.

NA NA

RSVD 124 Do not connect. NA NA

Note

The MFG_NC0..4 pins are reserved for manufacturing and debugging purposes. It’s recommended to route the signals to a connector on the carrier board.

The carrier board must not drive the MFG_NC-pins or have pull-up or pull-down resistors implemented for these signals. MFG_NC0...4 are defined to have a voltage level of 3.3V. It must be ensured that the carrier board has the correct voltage levels for JTAG/UART signals originating from the module. For this reason, a level shifting device may be required on the carrier board to guarantee that these voltage levels are correct in order to prevent damage to the module.

More information about implementing a carrier board multiplexer can be found in the Qseven® Design Guide.


Table 23 Thermal Management Signal Descriptions

Signal Pin # Description I/O PU/PD CommentTHRM# 69 ThermalAlarmactivelowsignalgeneratedbytheexternalhardwaretoindicatean

overtemperaturesituation.Thissignalcanbeusedtoinitiatethermalthrottling.I3.3V PU2.2k

3.3VTHRMTRIP# 71 ThermalTripindicatesanoverheatingconditionoftheprocessor.If'THRMTRIP#'

goesactivethesystemimmediatelytransitionstotheS5State(SoftOff).O3.3VSB

Table 24 Fan Control Signal Descriptions

Signal Pin # Description I/O PU/PD CommentFAN_PWMOUT/GP_PWM_OUT1

196 Primaryfunctionalityisfanspeedcontrol.UsesthePulseWidthModulation(PWM)techniquetocontroltheFan’sRPMbasedontheCPU’sdietemperature.WhennotinuseforthisprimarypurposeitcanbeusedasGeneralPurposePWMOutput.

O3.3VOC

PU10k3.3V

FAN_TACHOIN/GP_TIMER_IN

195 Primaryfunctionalityisfantachometerinput.WhennotinuseforthisprimarypurposeitcanbeusedasGeneralPurposeTimerInput.

I3.3V PU10k3.3V


8 System Resources

8.1 I/O Address AssignmentTheI/Oaddressassignmentoftheconga-QAFmoduleisfunctionallyidenticalwithastandardPC/AT.ThemostimportantaddressesandtheonesthatdifferfromthestandardPC/ATconfigurationarelistedinthetablebelow.

Note

The BIOS assigns PCI and PCI Express I/O resources from FFF0h downwards. Non PnP/PCI/PCI Express compliant devices must not consume I/O resources in that area.

8.1.1 LPC Bus

Ontheconga-QAFthePCIBusactsasthesubtractivedecodingagent.AllI/OcyclesthatarenotpositivelydecodedareforwardedtothePCIBusnottheLPCBus.OnlyspecifiedI/OrangesareforwardedtotheLPCBus.InthecongatecEmbeddedBIOSthefollowingI/OaddressrangesaresenttotheLPCBus:

2Eh–2Fh4Eh–4Fh60h,64h2E8h–2EFh2F8h–2FFh378h–37Fh3E8h–3EFh3F8h–3FFh778h–77FhA00h–BFFh

Partsoftheserangesarenotavailable ifaSuperI/Oisusedonthecarrierboard.IfaSuperI/Oisnot implementedonthecarrierboardthentheserangesareavailableforcustomeruse.IfyourequireadditionalLPCBusresourcesotherthanthosementionedabove,ormoreinformationaboutthissubject,contactcongatectechnicalsupportforassistance.


8.2 Interrupt Request (IRQ) LinesTable 25 IRQ Lines in PIC mode

IRQ# Available Typical Interrupt Source Connected to Pin0 No Counter0 Notapplicable1 No Keyboard Notapplicable2 No CascadeInterruptfromSlavePIC Notapplicable3 Yes IRQ3viaSERIRQ4 Yes IRQ4viaSERIRQ5 Yes IRQ5viaSERIRQ6 Yes IRQ6viaSERIRQ7 Yes IRQ7viaSERIRQ8 No Real-timeClock Notapplicable9 No SCI Notapplicable10 Yes IRQ10viaSERIRQ11 Yes IRQ11viaSERIRQ12 Yes IRQ12viaSERIRQ13 No Mathprocessor Notapplicable14 Note IDEController0(IDE0)/Generic IRQ14viaSERIRQ15 Note IDEController1(IDE1)/Generic IRQ15viaSERIRQ

Note

If the SATA interface mode configuration in BIOS setup is NOT set to legacy IDE mode, IRQ14 and 15 are free for LPC bus.


Table 26 IRQ Lines in APIC mode

IRQ# Available Typical Interrupt Source Connected to Pin / Function0 No Counter0 Notapplicable1 No Keyboard Notapplicable2 No CascadeInterruptfromSlavePIC Notapplicable3 Yes IRQ3viaSERIRQ4 Yes IRQ4viaSERIRQ5 Yes IRQ5viaSERIRQ6 Yes IRQ6viaSERIRQ7 Yes IRQ7viaSERIRQ8 No Real-timeClock Notapplicable9 No SCI Notapplicable10 Yes IRQ10viaSERIRQ11 Yes IRQ11viaSERIRQ12 Yes IRQ12viaSERIRQ13 No Mathprocessor Notapplicable14 Note 1 IDEController0(IDE0)/Generic IRQ14viaSERIRQ15 Note 1 IDEController1(IDE1)/Generic IRQ15viaSERIRQ16 No PIRQA,PCIExpressRootPort0/4,onboardGigabitLANController,PCIExpressPort0(seeNote2),MainHigh

DefinitionAudioController17 No PIRQB,PCIExpressRootPort1,PCIExpressPort1(seeNote2),EHCIHostController0,EHCIHostController118 No PIRQC,PCIExpressRootPort2,PCIExpressPort2(seeNote2),OHCIHostController0,OHCIHostController

1,IntegratedGraphicsController19 No PIRQD,PCIExpressRootPort3,PCIExpressPort3(seeNote2),ChipsetIDEController0(SATAPorts),HDMI/

DisplayPortHDAController(forHDMI/DisplayPortintegratedaudioonly)20 Yes PIRQE21 Yes PIRQF22 Yes PIRQG23 Yes PIRQH

InAPICmode,thePCIbusinterruptlinesareconnectedwithIRQ20,21,22and23.

Note

1. If the SATA interface mode configuration in BIOS setup is NOT set to legacy IDE mode IRQ14 and 15 are free for LPC bus.

2. Interrupt used if a single function PCI Express device is connected to the respective PCI Express port.


8.3 PCI Configuration Space MapTable 27 PCI Configuration Space Map

Bus Number (hex) Device Number (hex) Function Number (hex) PCI Interrupt Routing Description00h 00h 00h N.A. HostBridge00h 01h 00h Internal IntegratedGraphicsController(VGA)00h 01h 01h Internal HDMI/DisplayPortHDAController(forHDMI/DisplayPortintegrated

audioonly)00h(seeNote1) 04h 00h Internal PCIExpressRootPort000h(seeNote1) 05h 00h Internal PCIExpressRootPort100h(seeNote1) 06h 00h Internal PCIExpressRootPort200h(seeNote1) 07h 00h Internal PCIExpressRootPort300h 11h 00h Internal ChipsetIDEController0(SATAPorts)00h 12h 00h Internal OHCIHostController000h 12h 02h Internal EHCIHostController000h 13h 00h Internal OHCIHostController100h 13h 02h Internal EHCIHostController100h 14h 00h N.A. SMBusHostController00h 14h 02h Internal HighDefinitionAudioController00h 14h 03h N.A. PCItoLPCBridge00h 14h 04h N.A. PCItoPCIBridge00h 15h 00h Internal PCIExpressRootPortforon-moduleGigabitLANController00h 18h 00h N.A. ChipsetConfigurationRegisters00h 18h 01h N.A. ChipsetConfigurationRegisters00h 18h 02h N.A. ChipsetConfigurationRegisters00h 18h 03h N.A. ChipsetConfigurationRegisters00h 18h 04h N.A. ChipsetConfigurationRegisters00h 18h 05h N.A. ChipsetConfigurationRegisters00h 18h 06h N.A. ChipsetConfigurationRegisters00h 18h 07h N.A. ChipsetConfigurationRegisters01h(seeNote2) 00h 00h Internal PCIExpressPort002h(seeNote2) 00h 00h Internal PCIExpressPort103h(seeNote2) 00h 00h Internal PCIExpressPort204h(seeNote2) 00h 00h Internal PCIExpressPort305h(seeNote2) 00h 00h Internal OnboardGigabitLANController

Note

1. The PCI Express root ports are only visible if the PCI Express port is set to “Enabled” in the BIOS setup program and a device is attached to the corresponding PCI Express port on the carrier board.


2. The above table represents a case when a single function PCIe device is connected to all possible slots on the carrier board. The given bus numbers will change based on the actual configuration of the hardware .

8.4 PCI Interrupt Routing MapTable 28 PCI Interrupt Routing Map

PIRQ APIC Mode IRQ VGA HDA (HDMI / DP) OHCI 0 OHCI 1 EHCI 0 EHCI 1 SMBus IDE0 (SATA) HDA (Main)A 16 xB 17 x xC 18 x x xD 19 x xE 20F 21G 22H 23

PCI Interrupt Routing Map (continued)

PIRQ PCI-EX Root Port 0

PCI-EX Root Port 1

PCI-EX Root Port 2

PCI-EX Root Port 3

PCI-EX Root Port 4

PCI-EX Port 0 PCI-EX Port 1 PCI-EX Port 2 PCI-EX Port 3 LAN

A x x x 1 x 4 x 3 x 2 xB x x 2 x 1 x 4 x 3

C x x 3 x 2 x 1 x 4

D x x 4 x 3 x 2 x 1

EFGH

Note

1 Interrupt used by single function PCI Express devices (INTA).

2 Interrupt used by multifunction PCI Express devices (INTB).

3 Interrupt used by multifunction PCI Express devices (INTC).

4 Interrupt used by multifunction PCI Express devices (INTD).


8.5 I²C BusTherearenoonboardresourcesconnectedtotheI²Cbus.Address16hisreservedforcongatecBatteryManagementsolutions.

8.6 SM BusSystemManagement(SM)bussignalsareconnectedtotheAMDControllerHubA55EandtheSMbusisnotintendedtobeusedbyoff-boardnon-systemmanagementdevices.Formoreinformationaboutthissubjectcontactcongatectechnicalsupport.


9 BIOS Setup DescriptionThefollowingsectiondescribestheBIOSsetupprogram.TheBIOSsetupprogramcanbeusedtoviewandchangetheBIOSsettingsforthemodule.OnlyexperiencedusersshouldchangethedefaultBIOSsettings.

9.1 Entering the BIOS Setup Program.TheBIOSsetupprogramcanbeaccessedbypressingthe<DEL>or<F2>keyduringPOST.

9.1.1 Boot Selection Popup

TheBIOSoffers thepossibility toaccessaBootSelectionPopupmenubypressing the<F11>keyduringPOST. If thisoption isused,aselectionwillbedisplayedimmediatelyafterPOSTallowingtheoperatortoselecteitherthebootdevicethatshouldbeusedoranoptiontoentertheBIOSsetupprogram.

9.2 Setup Menu and NavigationThecongatecBIOSsetupscreeniscomposedofthemenubarandtwomainframes.Themenubarisshownbelow:

Main Advanced Boot Security Save & Exit

Theleftframedisplaysalltheoptionsthatcanbeconfiguredintheselectedmenu.Grayed-outoptionscannotbeconfigured.Onlytheblueoptionscanbeconfigured.Whenanoptionisselected,itishighlightedinwhite.

Therightframedisplaysthekeylegend.Abovethekeylegendisanareareservedfortextmessages.Thesetextmessagesexplaintheoptionsandthepossibleimpactswhenchangingtheselectedoptionintheleftframe.

Note

Entries in the option column that are displayed in bold print indicate BIOS default values.

Thesetupprogramusesakey-basednavigationsystem.Mostofthekeyscanbeusedatanytimewhileinsetup.Thetablebelowexplainsthesupportedkeys:


Key Description←→Left/Right Selectasetupmenu(e.g.Main,Boot,Exit).↑↓Up/Down Selectasetupitemorsubmenu.+-Plus/Minus Changethefieldvalueofaparticularsetupitem.Tab Selectsetupfields(e.g.indateandtime).F1 DisplayGeneralHelpscreen.F2 Loadprevioussettings.F9 Loadoptimaldefaultsettings.F10 Savechangesandexitsetup.ESC Discardchangesandexitsetup.ENTER Displayoptionsofaparticularsetupitemorentersubmenu.

9.3 Main Setup ScreenWhenyoufirstentertheBIOSsetup,youwillentertheMainsetupscreen.YoucanalwaysreturntotheMainsetupscreenbyselectingtheMaintab.TheMainscreenreportsBIOS,processor,memoryandboardinformationandisforconfiguringthesystemdateandtime.

Feature Options DescriptionBIOS InformationMainBIOSVersion no option DisplaysthemainBOISversion.OEMBIOSVersion no option DisplaystheadditionalOEMBIOSversion.BuildDate no option DisplaysthedatetheBIOSwasbuilt.Board InformationProductRevision no option Displaysthehardwarerevisionoftheboard.SerialNumber no option Displaystheserialnumberoftheboard.BCFirmwareRev. no option Displaystherevisionofthecongatecboardcontroller.MACAddress no option DisplaystheMACaddressoftheonboardEthernetcontroller.BootCounter no option Displaysthenumberofboot-ups.(max.16777215).RunningTime no option Displaysthetimetheboardisrunning[inhoursmax.65535].Memory InformationTotalMemory no option Displaysamountofinstalledmemory.MemoryClock no option Displayscurrentmemoryclock.

CPU Information no option DisplaysCPUtypeandfeatureinformation.System Date Dayoftheweek,

month/day/yearSpecifiesthecurrentsystemdate.Note: The date is in month/day/year format.

System Time Hour:Minute:Second Specifiesthecurrentsystemtime.Note: The time is in 24 hour format.


9.4 Advanced SetupSelecttheAdvancedtabfromthesetupmenutoentertheAdvancedBIOSSetupscreen.Themenuisusedforsettingadvancedfeatures:

Main Advanced Boot Security Save & ExitGraphicsConfigurationWatchdogConfigurationPCI&PCIExpressConfigurationACPIConfigurationRTCWakeSettingsCPUConfigurationChipsetConfigurationHardwareHealthMonitoringSATAConfigurationUSBConfigurationSuperI/OConfigurationSerialPortConsoleRedirection

9.4.1 Graphics Configuration Submenu

Feature Options DescriptionPrimaryGraphicsDevice IGD

PCI/PCIeSelectprimarygraphicsadaptertobeusedduringbootup.IGD:InternalGraphicsDevicePCI/PCIe:TrytouseexternalstandardPCIExpressGraphicsDevice.Ifnotpresent,IGDisused.

IntegratedGraphicsDevice

Auto ConfigurationDisabledManualConfiguration

DeactivateIGDorselectframebufferconfigurationmode.Inautomode,theframebuffersizewillbedefinedbasedontheamountofphysicalmemorypresent.

IGDFramebufferSize 32M64M128M256M512M

OnlyvisibleifIGDissettomanualconfiguration.SetfixedgraphicsframebuffersizeforIGD.Thegraphicsdrivermayallocateadditionalmemory.

DisplayChannel0Output LVDSDisabled

Defineoutputmodeandconnectionoftheintegrateddigitaldisplaychannel0.

DisplayChannel1Output DisplayPortBHDMI BDisabled

Defineoutputmodeandconnectionoftheintegrateddigitaldisplaychannel1.


Feature Options DescriptionIGDBootDisplayDevice Auto

DisplayChannel0DisplayChannel1DisplayChannel0+1

SelecttheIGDdisplaydevice(s)usedforbootup.

AlwaysTryAutoPanelDetect

NoYes

Ifsetto‘Yes’theBIOSwillfirstlookforanEDIDdatasetinanexternalEEPROMtoconfiguretheLVDSflatpaneloutput.OnlyifnoexternalEDIDdatasetcanbefound,thedatasetselectedunder‘LocalFlatPanelType’willbeusedasfallbackdataset.

LocalFlatPanelType AutoVGA640x4801x18(002h)VGA640x4801x18(013h)WVGA800x4801x24(01Bh)SVGA800x6001x18(01Ah)XGA1024x7681x18(006h)XGA1024x7682x18(007h)XGA1024x7681x24(008h)XGA1024x7682x24(012h)WXGA1280x7681x24(01Ch)SXGA1280x10242x24(00Ah)SXGA1280x10242x24(018h)UXGA1600x12002x24(00Ch)WUXGA1920x12002x18(015h)WUXGA1920x12002x24(00Dh)CustomizedEDID™1CustomizedEDID™2CustomizedEDID™3

SelectapredefinedLFPtypeorchooseAutotolettheBIOSautomaticallydetectandconfiguretheattachedLVDSpanel.AutodetectionisperformedbyreadinganEDIDdatasetviathevideoI²Cbus.Thenumberinbracketsspecifiesthecongatecinternalnumberoftherespectivepaneldataset.Note: Customized EDID™ utilizes an OEM defined EDID™ data set stored in the BIOS flash device.

BacklightInverterType NonePWMI2C

Selectthetypeofbacklightinverterused.PWM=UseIGDPWMsignal.I2C=UseI2CbacklightinverterdeviceconnectedtothevideoI²Cbus.

PWMInverterFrequency(Hz)

200-40000 OnlyvisibleifBacklightInverterTypeissettoPWM.SetthePWMinverterfrequencyinHertz.

BacklightSetting 0%,10%,25%,40%,50%,60%,75%,90%,100%

Actualbacklightvalueinpercentofthemaximumsetting.

InhibitBacklight NoPermanentUntilEndOfPOST

DecidewhetherthebacklightonsignalshouldbeactivatedwhenthepanelisactivatedorwhetheritshouldremaininhibiteduntiltheendofBIOSPOSTorpermanently.

InvertBacklightSetting NoYes

Allowtoinvertbacklightcontrolvaluesifrequiredfortheactualbacklighthardwarecontroller.


9.4.2 Watchdog Configuration Submenu

Feature Options DescriptionPOSTWatchdog Disabled

30sec1min2min5min10min30min

SelectthetimeoutvalueforthePOSTwatchdog.

Thewatchdogisonlyactiveduringthepower-on-self-testofthesystemandprovidesafacilitytopreventerrorsduringbootupbyperformingareset.

StopWatchdogforUserInteraction

NoYes

SelectwhetherthePOSTwatchdogshouldbestoppedduringthepopupbootselectionmenuorwhilewaitingforsetuppasswordinsertion.

RuntimeWatchdog DisabledOne time TriggerSingleEventRepeatedEvent

Selectstheoperatingmodeoftheruntimewatchdog.Thiswatchdogwillbeinitializedjustbeforetheoperatingsystemstartsbooting.Ifsetto‘One time Trigger’ thewatchdogwillbedisabledafterthefirsttrigger.Ifsetto‘Single Event’,everystagewillbeexecutedonlyonce,thenthewatchdogwillbedisabled.Ifsetto‘Repeated Event’ thelaststagewillbeexecutedrepeatedlyuntilaresetoccurs.

Delay Disabled10sec30sec1min2min5min10min30min

Selectthedelaytimebeforetheruntimewatchdogbecomesactive.Thisensuresthatanoperatingsystemhasenoughtimetoload.

Event1 NMIACPIEventResetPowerButton

Selectsthetypeofeventthatwillbegeneratedwhentimeout1isreached.Formoreinformationabout‘ACPI Event’seenotebelow.

Event2 DisabledNMIACPIEventResetPowerButton


Event3 DisabledNMIACPIEventResetPowerButton



Feature Options DescriptionTimeout1 0.5sec

1sec2sec5sec10sec30sec1min2min5min10min30min

Selectsthetimeoutvalueforthefirststagewatchdogevent.

Timeout2 seeabove Selectsthetimeoutvalueforthesecondstagewatchdogevent.Timeout3 seeabove Selectsthetimeoutvalueforthethirdstagewatchdogevent.WatchdogACPIEvent

ShutdownRestart

SelecttheoperatingsystemeventthatisinitiatedbythewatchdogACPIevent.Theseoptionsperformacriticalbutorderlyoperatingsystemshutdownorrestart.

Note

In ACPI mode it is not possible for a “Watchdog ACPI Event” handler to directly restart or shutdown the OS. For this reason, the congatec BIOS will do one of the following:

For Shutdown: An over temperature notification is executed. This causes the OS to shut down in an orderly fashion.

For Restart: An ACPI fatal error is reported to the OS.

9.4.3 PCI &PCI Express Configuration Submenu

Feature Options DescriptionPCIROMPriority LegacyROM

EFI Compatible ROMSpecifywhichPCIoptionROMtolaunchincasemultipleoptionROMs(legacyandEFIcompatible)arepresent.

LaunchPXEOptionROM DisabledEnabled

EnableordisablestartofPXEoptionROMsforexternallegacynetworkdevices.

LaunchStorageOptionROM DisabledEnabled

EnableordisablestartofoptionROMsforlegacymassstoragedevices.

PCI SettingsPCILatencyTimer 32,64,96,128,160,192,224,

248PCIBusClocksSelectvaluetobeprogrammedintoPCIlatencytimerregister.

VGAPaletteSnoop DisabledEnabled

EnableordisableVGApaletteregisterssnooping.


Feature Options DescriptionPERR#Generation Disabled

EnabledEnableordisablePCIdeviceSERR#generation.

SERR#Generation DisabledEnabled

EnableordisablePCIdeviceSERR#generation.

►PIRQRouting submenu OpensthePIRQroutingsubmenu.PCI Express Device & Link SettingsRelaxedOrdering Disabled

EnabledEnableordisablePCIExpressdevicerelaxedordering.

Extended Tag DisabledEnabled

Ifenabledadevicemayusean8-bittagfiledasarequester.

NoSnoop DisabledEnabled

EnableordisablePCIExpressdevice‘NoSnoop’option.

MaximumPayload Auto128Bytes256Bytes512Bytes1024Bytes2048Bytes4096Bytes

SetmaximumpayloadofPCIExpressdevicesorallowsystemBIOStoselectthevalue.

MaximumReadRequest Auto128Bytes256Bytes512Bytes1024Bytes2048Bytes4096Bytes

SetmaximumreadrequestsizeofPCIExpressdevicesorallowsystemBIOStoselectthevalue.

ExtendedSynch DisabledEnabled

Ifenabled,thegenerationofextendedPCIExpresssynchronizationpatternsisallowed.


9.4.3.1 PIRQ Routing Submenu

Feature Options DescriptionPIRQA Auto

IRQ3IRQ4IRQ6IRQ7IRQ10IRQ11IRQ14IRQ15

SetinterruptforselectedPIRQ.Refertothemodule’sresourcelistofdevicesconnectedtotherespectivePIRQ.Note: These settings will only be effective while operating in PIC (non IOAPIC) interrupt mode.

PIRQB Seeabove SeeabovePIRQC Seeabove SeeabovePIRQD Seeabove SeeabovePIRQE Seeabove SeeabovePIRQF Seeabove SeeabovePIRQG Seeabove SeeabovePIRQH Seeabove Seeabove

9.4.4 ACPI Configuration Submenu

Feature Options DescriptionHibernationSupport Disabled

EnabledEnableordisablesystemabilitytohibernate(operatingsystemS4sleepstate).Thisoptionmaynotbeeffectivewithsomeoperatingsystems.

ACPISleepState SuspendDisabled S3 (Suspend to RAM)

SelectthestateusedforACPIsystemsuspend.

S3VideoRepost DisabledEnabled

EnableordisablevideoBIOSre-postonS3resume.Requiredbysomeoperatingsystems.

USBDeviceWakeupFromS3orS4

DisabledEnabled

EnableordisableUSBdevicewakeupsupportfromS3orS4.Additionaloperatingsystemsmayberequiredaswell.

ActiveTripPoint Disabled,20,30,40,50,60,70,80,90,95°C

SpecifiesthetemperaturethresholdatwhichtheACPIawareOSturnsthefanon/off.

PassiveTripPoint Disabled,60,70,80,90,95°C SpecifiesthetemperaturethresholdatwhichtheACPIawareOSstarts/stopsCPUclockthrottling.LIDButtonSupport Disabled

EnabledActivateACPILIDbuttonsupport.

SleepButtonSupport DisabledEnabled

ActivateACPIsleepbuttonsupport.


9.4.5 RTC Wake Settings Submenu

Feature Options DescriptionWakeSystemAtFixedTime Disabled

EnabledEnablesystemtowakefromS5usingRTCalarm.

Wakeuphour Specifywakeuphour.Wakeupminute Specifywakeupminute.Wakeupsecond Specifywakeupsecond.

9.4.6 CPU Configuration Submenu

Feature Options DescriptionLimitCPUIDMaximum Disabled

EnabledWhenenabled,theprocessorwilllimitthemaximumCPUIDinputvalueto03hwhenqueried,eveniftheprocessorsupportsahigherCPUIDinputvalue.Whendisabled,theprocessorwillreturntheactualmaximumCPUIDinputvalueoftheprocessorwhenqueried.LimitingtheCPUIDinputvaluemayberequiredforolderoperatingsystemsthatcannothandletheextraCPUIDinformationreturnedwhenusingthefullCPUIDinputvalue.

AMDPowerNow!Support DisabledEnabled

EnableordisablesupportforAMDPowerNow!Technology.AllowsoperatingsystemstocontrolCPUperformancestates.

MaximumOSP-State P-State 0P-State1P-State2P-State3P-State4

SelectthemaximumCPUperformancestatetheoperatingsystemshouldsupport.Highernumbersmeanlowerperformance.P-state0isthehighestperformancestate.

MaximumPowerUpP-State P-State 0P-State1P-State2P-State3P-State4

SelectthemaximumCPUperformancestatetobesetatpowerup.Highernumbersmeanlowerperformance.P-state0isthehighestperformancestate.

NXMode DisabledEnabled

Enableordisablethe‘no-execute’pageprotectionfunction.

VirtualizationTechnology DisabledEnabled

Whenenabled,aVirtualMachineManager(VMM)canutilizetheintegratedhardwarevirtualizationsupport.

C6Support DisabledEnabled

EnableordisableCPUC6lowpowerstatesupport.

CorePerformanceBoost AutoDisabled

ControlsusageofboostedCPUP-states,i.e.P-statesabovethestandardCPUP-statelimit.AvailabilityofboostedP-statesdependsonCPUtypeandrevision,actualusageontotalCPU/GPUpowerconsumption.


9.4.7 Chipset Configuration Submenu

Feature Options DescriptionMemoryBankInterleaving Disabled

EnabledEnableordisablememorybankinterleaving.

MemoryBusClock Auto400MHz(DDR3-800)533MHz(DDR3-1066)

Selectorlimitmemoryfrequency.

HDAController AutoDisabledEnabled

ControlactivationoftheHighDefinitionAudiocontroller.

HDMI/DPAudioSupport DisabledEnabled

EnableordisableHDMI/DisplayPortintegratedaudiosupport.

OnboardLAN DisabledEnabled

EnableordisabletheonboardEthernetcontroller.

LaunchOnboardLANPXEROM

DisabledEnabled

EnableordisablePXEoptionROMexecutionoftheonboardethernetcontroller.

SDCardController DisabledEnabled

EnableordisabletheonboardUSBtoSDcardcontroller.

UMI(NBtoSB)PCIEGen2Support

DisabledEnabled

EnableordisablePCIExpressgeneration2linkspeedfortheUMIchipsetinterface.

PCIExpressPort0-3Configuration

1x4Port2x2Ports1x2Port+2x1Ports4 x1 Ports

SelectconfigurationofPCIExpressports0-3.

PCIExpressPort0 DisabledEnabled

EnableordisablePCIExpressport.Note: Unless the hotplug support for this port is enabled as well, an unpopulated port will still be disabled if no PCI Express device is connected.

LinkSpeed AutoPCIE Gen1PCIEGen2

ControllinkspeedforthisPCIExpressport.

HotplugSupport DisabledEnabled

Enableordisablehotplugsupportfortherespectiveport.










Feature Options DescriptionLinkSpeed Auto

PCIE Gen1PCIEGen2



Enableordisablehotplugsupportfortherespectiveport







9.4.8 Hardware Health Monitoring Submenu

Feature Options DescriptionCPUTemperature no option CurrentCPUtemperature.SouthbridgeTemperature no option Currentsouthbridgetemperature.BoardTemperature no option Currentboardtemperature.5VStandby no option Current5Vstandbyinputreading.

5VStandard no option Current5Vinputreading.CPUFanSpeed no option CurrentCPUfanspeedreading.


9.4.9 SATA Configuration Submenu

Feature Options DescriptionSATAInterfaceMode Native IDE

RAIDAHCILegacyIDE

SelectonboardSATAcontrollerinterfacemode.

SATAPort0 Enabled Disabled

Enableordisableselectedport.

PortSpeed Auto Gen1Gen2

SelectSATAspeedgenerationfortheselectedport.

SATAPort1 Enabled Disabled


PortSpeed Auto Gen1Gen2

SelectSATAspeedgenerationfortheselectedport.

OnboardSSD Enabled Disabled

EnableordisabletheoptionalonboardSSD.

SSDSpeed Auto Gen1Gen2

SelectSATAspeedgenerationfortheonboardSSD.

SSDWriteProtection DisabledEnabled

EnableordisablehardwarewriteprotectionfortheonboardSSD.


9.4.10 USB Configuration Submenu

Feature Options DescriptionUSBPort0 Disabled

EnabledEnableordisableselectedport.

USBPort1 DisabledEnabled














USBOvercurrentReporting DisabledEnabled

SelectwhetheractivationoftheUSBovercurrentsignalsresultsinUSBovercurrentregisterreportingandsoftwareeventhandlingaswell.

LegacyUSBSupport EnabledDisabledAuto

EnableslegacyUSBsupport.AutooptiondisableslegacysupportifnoUSBdevicesareconnected.DisableoptionwillkeepUSBdevicesavailableonlyforEFIapplicationsandsetup.

EHCIHand-off DisabledEnabled

ThisisaworkaroundforOSeswithoutEHCIhand-offsupport.TheEHCIownershipchangeshouldbeclaimedbytheEHCIOSdriver.

USBTransferTimeout 1sec5sec10sec20 sec

TimeoutvalueforlegacyUSBcontrol,bulkandinterrupttransfers.

DeviceResetTimeout 10sec20 sec30sec40sec

USBlegacymassstoragedeviceStartUnitcommandtimeout.

DevicePower-UpDelaySelection

AutoManual

DefinemaximumtimeaUSBdevicemightneedbeforeitproperlyreportsitselftothehostcontroller.Autoselectsadefaultvalue,whichis100msforarootportorderivedfromthehubdescriptorforahubport.

DevicePower-UpDelayValue 51-40

Actualpower-updelayvalueinseconds.


Feature Options DescriptionUSBMassStorageDeviceName

(Auto detected USB mass storage devices are listed here dynamically)

AutoFloppyForcedFDDHardDiskCD-ROM

EveryUSBmassstoragedevicethatisenumeratedbytheBIOSwillhaveanemulationtypesetupoption.ThisoptionspecifiesthetypeofemulationtheBIOShastoprovideforthedevice.

Note: The device’s formatted type and the emulation type provided by the BIOS must match for the device to boot properly.

SelectAUTOtolettheBIOSautodetectthecurrentformattedmedia.IfFloppyisselectedthenthedevicewillbeemulatedasafloppydrive.ForcedFDDallowsaharddiskimagetobeconnectedasafloppyimage.WorksonlyfordrivesformattedwithFAT12,FAT16orFAT32.HardDiskallowsthedevicetobeemulatedasharddisk.CD-ROMassumestheCD-ROMisformattedasbootablemedia,specifiedbythe‘ElTorito’FormatSpecification.

9.4.11 Super I/O Configuration Submenu

Feature Options DescriptionSerialPort0 Disabled

EnabledEnableordisableserialport0.

DeviceSettings IO=3F8h;IRQ=4; Fixedconfigurationofserialport0ifenabled.SerialPort1 Disabled

EnabledEnableordisableserialport1.

DeviceSettings IO=2F8h;IRQ=3; Fixedconfigurationofserialport1ifenabled.ParallelPort Disabled

EnabledEnableordisableparallelport.

DeviceSettings IO=378h;IRQ=7; Fixedconfigurationoftheparallelportifenabled.DeviceMode Standard Parallel Mode

EPPModeECPModeEPPMode&ECPMode

Settheparallelportmode.

Note

This setup menu is only available if an external Winbond W83627 Super I/O has been implemented on the carrier board.


9.4.12 Serial Port Console Redirection

Feature Options DescriptionCOM0 ConsoleRedirection

DisabledEnabled

Enableordisableserialport0consoleredirection.

►ConsoleRedirectionSettings submenu Openstheconsoleredirectionconfigurationsubmenu.COM1 ConsoleRedirection

DisabledEnabled

Enableordisableserialport1consoleredirection.

►ConsoleRedirectionSettings submenu Openstheconsoleredirectionconfigurationsubmenu.

9.4.12.1 Console Redirection Settings Submenu

Feature Options DescriptionTerminalType VT100

VT100+VT-UTF8ANSI

Selectterminaltype.

Baudrate 9600,19200,38400,57600,115200

Selectbaudrate.

DataBits 7,8

Setnumberofdatabits.

Parity NoneEvenOddMarkSpace

Selectparity.

StopBits 1 2

Setnumberofstopbits.

FlowControl NoneHardwareRTS/CTS

Selectflowcontrol.

Recorder Mode DisabledEnabled

Withrecordermodeenabled,onlytextoutputwillbesentovertheterminal.Thisishelpfultocaptureandrecordterminaldata.

Resolution100x31 DisabledEnabled

EnablesordisablesextendedterminalresolutioninUEFIenvironment.

LegacyOSRedirectionResolution

80x2480x25

NumberofrowsandcolumnssupportedforlegacyOSredirection.


9.5 Boot SetupSelecttheBoottabfromthesetupmenutoentertheBootsetupscreen.

9.5.1 Boot Settings Configuration

Feature Options DescriptionQuietBoot Disabled

EnabledDisableddisplaysnormalPOSTdiagnosticmessages.EnableddisplaysOEMlogoinsteadofPOSTmessages.Note: The default OEM logo is a dark screen.

SetupPromptTimeout

10-65535

Numberofsecondstowaitforsetupactivationkey.0meansnowaitforfastestboot,65535meansinfinitewait.

POST/SetupVGASupport

DisabledEnabled

SelectVGAmodeforsetupandPOSTscreen.EnablessetupandPOSTscreenoutputsupportforVGAandWVGAdisplayresolutions.

BootupNumLockState

OnOff

Selectthekeyboardnumlockstate.

EnablePopupBootMenu

NoYes

Selectwhetherthepopupbootmenucanbestarted.

BootPrioritySelection

DeviceBasedType Based

Selectbetweendeviceandtypebasedbootprioritylists.The“DeviceBased”bootprioritylistallowsyoutoselectfromalistofcurrentlydetecteddevicesonly.The“TypeBased”bootprioritylistallowsyoutoselectdevicetypes,evenifarespectivedeviceisnotyetpresent.Moreover,the“DeviceBased”bootprioritylistmightchangedynamicallyincaseswhendevicesarephysicallyremovedoraddedtothesystem.The“TypeBased”bootmenuisstaticandcanonlybechangedbytheuser.

1st,2nd,3rd,...BootDevice (Upto12bootdevicescanbeprioritizedifdevicebasedprioritylistcontrolisselected.If“TypeBased”prioritylistcontrolisenabledonly8bootdevicescanbeprioritized.)

DisabledSATA0DriveSATA1DriveOnboardSSDUSBFloppyUSBHarddiskUSBCDROMOnboardLANExternalLANOtherBEVDeviceOEMBEVDevice

Thisviewisonlyavailablewheninthedefault“TypeBased”mode.

Whenin“DeviceBased”modeyouwillonlyseethedevicesthatarecurrentlyconnectedtothesystem.

PowerLossControl Remain OffTurnOnLastState

SpecifiesthemodeofoperationifanACpowerlossoccurs.RemainOffkeepsthepoweroffuntilthepowerbuttonispressed.TurnOnrestorespowertothecomputer.LastStaterestoresthepreviouspowerstatebeforepowerlossoccurred.Note: Only works with an ATX type power supply.

ATShutdownMode System RebootHotS5

DeterminesthebehaviourofanAT-poweredsystemafterashutdown.


Feature Options DescriptionSystemOffMode G3/Mech Off

S5/SoftOffDefinesystemstateaftershutdownwhenabatterysystemispresent.

GateA20Active Upon RequestAlways

GateA20control.UponRequest=GateA20canbedisabledusingBIOSservices.Always=DonotallowdisablingGateA20.

Option ROM Messages

Force BIOSKeepCurrent

SetdisplaymodeforoptionROMs.

Interrupt19Capture DisabledEnabled

DefineswhetheroptionROMsmaytraptheINT19hlegacybootvector.

Note

1. The term ‘AC power loss’ stands for the state when the module looses the standby voltage on the 5V_SB pins. On congatec modules, the standby voltage is continuously monitored after the system is turned off. If within 30 seconds the standby voltage is no longer detected, then this is considered an AC power loss condition. If the standby voltage remains stable for 30 seconds, then it is assumed that the system was switched off properly.

2. Inexpensive ATX power supplies often have problems with short AC power sags. When using these ATX power supplies it is possible that the system turns off but does not switch back on, even when the PS_ON# signal is asserted correctly by the module. In this case, the internal circuitry of the ATX power supply has become confused. Usually another AC power off/on cycle is necessary to recover from this situation.

3. Unlike other module designs available in the embedded market, a CMOS battery is not required by congatec modules to support the ‘Power Loss Control’ feature.


9.6 Security SetupSelecttheSecuritytabfromthesetupmenutoentertheSecuritysetupscreen.

9.6.1 Security Settings

Feature Options DescriptionSetupAdministratorPassword Enterpassword Specifiesthesetupadministratorpassword.

HDD Security ConfigurationList of all detected hard disks supporting the security feature set.

Selectdevicetoopendevicesecurityconfigurationsubmenu

9.6.2 Hard Disk Security

Thisfeatureenablestheuserstoset,resetordisablepasswordsforeachharddriveinSetupwithoutrebooting.Iftheuserenablespasswordsupport,apowercyclemustoccurfortheharddrivetolockusingthenewpassword.Bothuserandmasterpasswordcanbesetindependentlyhoweverthedrivewillonlylockifauserpasswordisinstalled.

9.6.3 Save & Exit Menu

SelecttheSave&ExittabfromthesetupmenutoentertheSave&Exitsetupscreen.

YoucandisplayanSave&Exitscreenoptionbyhighlightingitusingthe<Arrow>keys.

Feature DescriptionSaveChangesandExit Exitsetupmenuaftersavingthechanges.Thesystemisonlyresetifsettingshavebeenchanged.DiscardChangesandExit Exitsetupmenuwithoutsavinganychanges.SaveChangesandReset Savechangesandresetthesystem.DiscardChangesandReset Resetthesystemwithoutsavinganychanges.Save OptionsSaveChanges Savechangesmadesofartoanyofthesetupoptions.Stayinsetupmenu.DiscardChanges Discardchangesmadesofartoanyofthesetupoptions.Stayinsetupmenu.RestoreDefaults LoadtheCMOSdefaultsofallthesetupoptions.►Boot OverrideList of all boot devices currently detected. Selectdevicetoleavesetupmenuandbootfromtheselecteddevice.

OnlyvisibleandactiveifBootPrioritySelectionsetupnodeissetto“DeviceBased”.


10 Additional BIOS FeaturesTheconga-QAFusesacongatec/AMIAptioEFIfirmwarethatisstoredinanonboardFlashRomchipandcanbeupdatedusingthecongatecSystemUtility,whichisavailableinaDOSbasedcommandline,Win32commandline,Win32GUI,andLinuxversion.

TheBIOSdisplaysamessageduringPOSTandonthemainsetupscreenidentifyingtheBIOSprojectnameandarevisioncode.TheinitialproductionBIOSisidentifiedasQBRAR1xx,whereQBRAisthecongatecinternalBIOSprojectnameforconga-QAF,RistheidentifierforaBIOSROMfile,1isthesocalledfeaturenumberandxxisthemajorandminorrevisionnumber.

Theconga-QAFBIOSbinarysizeisapproximately8MB.

10.1 Supported Flash DevicesTheconga-QAFsupportsthefollowingflashdevices:

• AtmelAT25DF321-SU

• GreenliantSystemsSST25VF032B-66-4I-S2AF

• MacronixMX25L3206EM2I-12G

TheflashdeviceslistedabovecanbeusedonthecarrierboardforexternalBIOSsupport.FormoreinformationaboutexternalBIOSsupport,refertotheApplicationNoteAN7_External_BIOS_Update.pdfonthecongatecwebsiteathttp://www.congatec.com.

10.2 Updating the BIOSBIOSupdatesareoftenusedbyOEMstocorrectplatformissuesdiscoveredaftertheboardhasbeenshippedorwhennewfeaturesareaddedtotheBIOS.

Formoreinformationabout“UpdatingtheBIOS”refertotheuser’sguideforthecongatecSystemUtility,whichiscalledCGUTLm1x.pdfandcanbefoundonthecongatecAGwebsiteatwww.congatec.com.

10.3 BIOS Security FeaturesTheBIOSprovidesasetupadministratorpasswordthatlimitsaccesstotheBIOSsetupmenu.


10.4 Hard Disk Security FeaturesHardDiskSecurityusestheSecurityModefeaturecommandsdefinedintheATAspecification.Thisfunctionalityallowsuserstoprotectdatausingdrive-levelpasswords.Thepasswordsarekeptwithinthedrive,sodataisprotectedevenifthedriveismovedtoanothercomputersystem.

TheBIOSprovidestheabilityto‘lock’and‘unlock’drivesusingthesecuritypassword.A‘locked’drivewillbedetectedbythesystem,butnodatacanbeaccessed.Accessingdataona‘locked’driverequirestheproperpasswordto‘unlock’thedisk.

TheBIOSenablesuserstoenable/disableharddisksecurityforeachharddriveinsetup.Amasterpasswordisavailableiftheusercannotremembertheuserpassword.Bothpasswordscanbesetindependentlyhoweverthedrivewillonlylockifauserpasswordisinstalled.Themaxlengthofthepasswordsis32bytes.

DuringPOSTeachharddriveischeckedforsecuritymodefeaturesupport.Incasethedrivesupportsthefeatureanditislocked,theBIOSpromptstheuserfortheuserpassword.Iftheuserdoesnotenterthecorrectuserpasswordwithinfiveattempts,theuserisnotifiedthatthedriveislockedandPOSTcontinuesasnormal.Iftheuserentersthecorrectpassword,thedriveisunlockeduntilthenextreboot.

InordertoensurethattheATAsecurityfeaturesarenotcompromisedbyvirusesormaliciousprogramswhenthedriveistypicallyunlocked,theBIOSdisablestheATAsecurityfeaturesattheendofPOSTtopreventtheirmisuse.Withoutthisprotectionitwouldbepossibleforvirusesormaliciousprogramstosetapasswordonadrivetherebyblockingtheuserfromaccessingthedata.


11 Industry SpecificationsThelistbelowprovideslinkstoindustryspecificationsthatapplytocongatecAGmodules.

Specification LinkQseven®Specification http://www.qseven-standard.org/Qseven®DesignGuide http://www.qseven-standard.org/LowPinCountInterfaceSpecification,Revision1.0(LPC) http://developer.intel.com/design/chipsets/industry/lpc.htmUniversalSerialBus(USB)Specification,Revision2.0 http://www.usb.org/homeSerialATASpecification,Revision1.0a http://www.serialata.orgPCIExpressBaseSpecification,Revision2.0 http://www.pcisig.com/specifications

http://www.qseven-standard.org/

http://www.qseven-standard.org/

http://developer.intel.com/design/chipsets/industry/lpc.htm

http://www.usb.org/home

http://www.serialata.org/

http://www.pcisig.com/specifications

conga-QAF User's Guide

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