COMPUTER SYSTEM ARCHITECTURE ASSIGNMENT BUS/PCI BUS MODEMS SIDHARTH JONNALA VENKATA SOUJANYA...

33
COMPUTER SYSTEM ARCHITECTURE ASSIGNMENT BUS/PCI BUS MODEMS SIDHARTH JONNALA VENKATA SOUJANYA Vallapuneni BOHAN REN

Transcript of COMPUTER SYSTEM ARCHITECTURE ASSIGNMENT BUS/PCI BUS MODEMS SIDHARTH JONNALA VENKATA SOUJANYA...

COMPUTER SYSTEM ARCHITECTUREASSIGNMENT

BUS/PCI BUS MODEMS

SIDHARTH JONNALAVENKATA SOUJANYA VallapuneniBOHAN REN

Bus

● There are a number of possible interconnection systems

● Single and multiple BUS structures are most common

● e.g. Control/Address/Data bus (PC)

● e.g. Unibus (DEC-PDP)

What is a bus?● A communication pathway connecting two or more devices

● Usually broadcast

● Often grouped

○ A number of channels in one bus

○ e.g. 32 bit data bus is 32 separate single bit channels

● Power lines may not be shown

Data Bus● Carries data

o Remember that there is no difference between “data” and “instruction” at this level

● Width is a key determinant of performance

● 8, 16, 32, 64 bit

Address Bus● Identify the source or destination of data

○ e.g. CPU needs to read an instruction (data) from a given location in memory

● Bus width determines maximum memory capacity of system

○ e.g. 8080 has 16 bit address bus giving 64k address space

Control Bus● Control and timing information

○ Memory read/write signal

○ Interrupt request

○ Clock signals

Bus Interconnection Scheme

Single Bus Problem● Lots of devices on one bus leads to:

○ Propagation delays

○ Long data paths mean that co-ordination of bus use can adversely affect performance

○ If aggregate data transfer approaches bus capacity

● Most systems use multiple buses to overcome these problems

Traditional Bus (with cache)

High Performance Bus

Bus Types● Dedicated

○ Separate data & address lines

● Multiplexed

○ Shared lines

○ Address valid or data valid control line

○ Advantage - fewer lines

■ Disadvantages

● More complex control

● Ultimate performance

Bus Arbitration ● More than one module controlling the bus

○ e.g. CPU and DMA controller

● Only one module may control bus at one time

● Arbitration may be centralised or distributed

Centralised and Distributed Arbitration● Centralised

○ Single hardware device controlling bus access

○ Bus Controller

○ Arbiter

○ May be part of CPU or separate

● Distributed

○ Each module may claim the bus

○ Control logic on all modules

Timing● Co-ordination of events on bus

● Synchronous

○ Events determined by clock signals

○ Control Bus includes clock line

○ A single 1-0 is a bus cycle

○ All devices can read clock line

○ Usually sync on leading edge

○ Usually a single cycle for an event

PCI BUS

history❏ VL-Bus vs EISA

❏ PCI presents a hybrid of sorts between VL-Bus and EISA

❏ PCI(Peripheral Component Interconnect ) bus is designed by Intel.

❏ Intel decided to public all the patents to encourage the entire industry to adopt

it.

PCI Design❏ an asynchronous bus

❏ topic speed for most speed card is 33Mhz

❏ PCI card can run at lower speeds(Ex. In a system clocked at

25MHz, for example, the bus could also run at this speed.)

❏ peripherals must be designed to work over the entire range of

permitted speeds.

❏ the number of devices on a PCI bus depends on the load.

PCI Transaction

1. the initiating device has to get permission to have control of the bus.

2. Having gained control of the bus, an initiator places the target address and a

code representing the transfer type on the bus.

3. Other PCI devices determine, by decoding the address and the command

type information, whether they are the intended target for the transfer.

4. The target device claims the transaction by asserting a device select signal.

5. Once the target has sent its acknowledgement, the bus transaction enters the

data phase.

PCI Bridge

❏The PCI designers used a bridge to connect the PCI bus to the processor bus.

❏advantage:

the bus design can be independent of that of the processor.o interface a

PCI bus to a new type of processor requires only a new bridge chip.

Configuration Space

❏Each PCI device has a block of 256 bytes of configuration space.

❏Configuration space is completely separate from memory and I/O space, and

can only be accessed using the PCI bus Configuration Read and Write

commands.

PCI Express

❏developed by Intel (and formerly know as 3GIO or 3rd Generation I/O)

❏a point-to-point system

❏strongly scalable

❏ future

PCI-Express could mean more than faster computers. As the technology develops, computer makers could design a motherboard with PCI-Express connectors that attach to special cables. This could allow for completely modular computer system, much like home stereo systems.

Modems Introduction

• Modem is short for modulator-demodulator. A modem is a device or program that enables a computer to transmit data over, for example, telephone or cable lines.

• Computer information is stored digitally, whereas information transmitted over telephone lines is transmitted in the form of analog waves. A modem converts between these two forms.

• To better understand what modem does let us look at the definition of modulation and demodulation.

• Modulation is the process of transforming digital information(1’s and 0’s) in to Analog signals. Demodulation is process of transforming analog signals previously modulated ,back in to digital signals.

More about Modems

• Internet access requires a cable modem, a device that has two interfaces on it: one to the computer and one to the cable network. The computer-to-cable-modem interface is straightforward. It is normally Ethernet, just as with ADSL.

• The other end is more complicated. A large part of the cable standard deals with radio engineering . Cable modems, like ADSL modems, are always on.They make a connection when turned on and maintain that connection as long as they are powered up because cable operators do not charge for connect time.

• In the future, the entire modem might be a small card plugged into the computer, just as with the old telephone modems.

How modems work

To better understand how they work, let us see what happens when a cable modem is plugged in and powered up.

1. The modem scans the downstream channels looking for a special packet periodically put out by the head end to provide system parameters to modems that have just come online.

2. Upon finding this packet, the new modem announces its presence on one of the upstream channels.

3. The head end responds by assigning the modem to its upstream and downstream channels

4. These assignments can be changed later if the head end deems it necessary to balance the load.

How modems Work

5. The modem then determines its distance from the head end by sending it a special packet and seeing how long it takes to get the response.

6.This process is called Ranging.

More about the Process• It is important for the modem to know its distance to accommodate the way the upstream channels

operate and to get the timing right.

• The channels are divided in time in minislots. Each upstream packet must fit in one or more consecutive minislots. Mini slot length depends on the network.

• The head end announces the start of a new round of minislots periodically, but the starting gun is not heard at all modems simultaneously due to the propagation time down the cable.

• When a computer wants to send a packet, it transfers the packet to the modem, which then requests the necessary number of minislots for it.

• If the request is accepted, the head end puts an acknowledgement on the downstream channel telling the modem which minislots have been reserved for its packet.

• The packet is then sent, starting in the mini slot allocated to it. Additional packets can be requested using a field in the header.

• On the other hand, if there is contention for the request mini slot, there will be no acknowledgement and the modem just waits a random time and tries again. After each successive failure, the randomization time is doubled to spread out the load when there is heavy traffic.

How downstream channels are managed

• The downstream channels are managed differently from the upstream channels. For one thing, there is only one sender (the head end) so there is no contention and no need for minislots, which is actually just time-division statistical multiplexing.

• For another, the traffic downstream is usually much larger than upstream, so a fixed packet size of 204 bytes is used.

How packets are sent

• Once the modem has completed ranging and gotten its upstream channel, downstream channel, and mini slot assignments, it is free to start sending packets. These packets go to the head end, which relays them over a dedicated channel to the cable company’s main office and then to the ISP (which may be the cable company itself).

• The first packet is one to the ISP requesting a network address (technically, an IP address), which is dynamically assigned. It also requests and gets an accurate time of day.

How security is achieved

• The next step involves security.

• Since cable is a shared medium, anybody who wants to go to the trouble to do so can read all the traffic zipping past him.

• To prevent everyone from snooping on their neighbors (literally), all traffic is encrypted in both directions. Part of the initialization procedure involves establishing encryption keys.

• Finally, the modem has to log in and provide its unique identifier over the secure channel. At this point the initialization is complete. The user can now log in to the ISP and get to work

INDIVIDUAL CONTRIBUTIONSIDHARTH JONNALA BUS

VENKATA SOUJANYA Vallapuneni MODEMS

BOHAN REN PCI BUS