Computer Architecture Lecture 2 Combinational Circuits Ralph Grishman September 2015 NYU.
Computer Architecture Lecture 9 MIPS ALU and Data Paths Ralph Grishman Oct. 2015 NYU.
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Transcript of Computer Architecture Lecture 9 MIPS ALU and Data Paths Ralph Grishman Oct. 2015 NYU.
Computer ArchitectureLecture 9
MIPS ALU and Data Paths
Ralph GrishmanOct. 2015
NYU
Computer Architecture lecture 9 2
MIPS Instruction Set
• We will build a processor which implements a small subset of the MIPS instruction set
• load word and store word• R-type: add, subtract, and, or, set less than• branch on equal
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Computer Architecture lecture 9 3
Two memories
• To make the design simpler, we will build a machine with two memories:
• instruction memory• data memory
– “Harvard architecture”
• Such a design is typical for controllers but not for general-purpose PC’s (Why?)
• It will allow us to do both instruction fetch and execution in a single (long) clock cycle
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Computer Architecture lecture 9 4
A sequential machine
• Conceptually, we are still designing a sequential machine:
• But we will design it in pieces, and then put the pieces together
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current state next state
output input
Computer Architecture lecture 9 5
The pieces
• We need logic for• instruction fetch• R-type instructions• load word• store word• branch on equal
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Computer Architecture lecture 9 6
Instruction fetch
• To fetch instructions in sequence, we need
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Computer Architecture lecture 9 7
Instruction fetch
• We will connect them up like so:
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Computer Architecture lecture 9 8
R-type instructions
• To implement one R-type instruction, we need• our MIPS register file
– set up for MIPS:two read ports, one write port, 32 32-bit registers
• the logic for this operation (add, sub, and, …)
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adder
Computer Architecture lecture 9 9
• How do we set up a circuit which can either do ‘add’ or ‘and’ or ‘or’ … depending on some external signal?
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Computer Architecture lecture 9 10
• We use a multiplexer:
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multiplexer
add
and
or
S
Computer Architecture lecture 9 11
ALU
• This arrangement for choosing one of the arithmetic or logical operations is termed an Arithmetic-Logic Unit, or ALU
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Computer Architecture lecture 9 1212Copyright © 2014 Elsevier Inc. All rights reserved.
FIGURE B.5.6 A 1-bit ALU that performs AND, OR, and addition (see Figure B.5.5).
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Computer Architecture lecture 9 1313Copyright © 2014 Elsevier Inc. All rights reserved.
FIGURE B.5.8 A 1-bit ALU that performs AND, OR, and addition on a and b or a and b. By selecting (Binvert 5 1) and setting CarryIn to 1 in the least significant bit of the ALU, we get two’s comple-ment subtraction of b from a instead of addition of b to a.
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Computer Architecture lecture 9 1414Copyright © 2014 Elsevier Inc. All rights reserved.
FIGURE B.5.9 A 1-bit ALU that performs AND, OR, and addition on a and b or a and b. By selecting (Ainvert 5 1) and (Binvert 5 1), we get a NOR b instead of a AND b.
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Computer Architecture lecture 9 15
R-type instructions
• So we will implement the R-type instructions using• our MIPS register file• an ALU
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Computer Architecture lecture 9 16
Data memory
• To implement load word and store word, we must first add a data memory:
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Computer Architecture lecture 9 17
registers + ALU + data memory
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Computer Architecture lecture 9 18
R-type
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Computer Architecture lecture 9 19
Load word
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from instr
Computer Architecture lecture 9 20
Store word
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from instr
Computer Architecture lecture 9 21
Combining lw, sw, and R-type
• Note the mux-es
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Computer Architecture lecture 9 22
Branches
• Branch condition: register equality
• Branch instruction specifies offset relative to address of next instruction
• signed offset (branch forward / backward)• offset in words
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Computer Architecture lecture 9 23
Branch logic
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Computer Architecture lecture 9 24
Full core MIPS data path
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Computer Architecture lecture 9 25
Control Logic
• What’s left: setting the proper control lines for each instruction
• We will do this in two steps• ALU function for each instruction• other control lines for each instruction
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Computer Architecture lecture 9 26
ALU Control InputsALU function A invert Binvert Operation
and
or
add
subtract
set less than
nor
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Computer Architecture lecture 9 27
ALU Control InputsALU function A invert Binvert Operation
and 0 0 00
or 0 0 01
add 0 0 10
subtract 0 1 10
set less than 0 1 11
nor 1 1 00
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Computer Architecture lecture 9 28
ALU functions requiredInstruction ALU function
load word
store word
and
or
add
subtract
set less than
branch on equal
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Computer Architecture lecture 9 29
ALU functions requiredInstruction ALU function
load word add
store word add
and and
or or
add add
subtract subtract
set less than set less than
branch on equal subtract
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