Computation Energy

Randy Huang

Sep 29, 1998

Outline

Why do we care about energy/power Components of power consumption Measurements of power consumption Reduction of power consumption Summary

Introduction

What is computation energy? Why do we care about energy?

– PGAs excel in multi-media applications that are needed in hand-held battery-operated devices

– easy to build devices that burn hundreds of watts if not careful

Energy and Power

Energy = Power / Toggle Frequency Pavg = Pdyn + Psc + Pleak + Pstatic

Pdyn is about 90% of power consumption

Dynamic Power Consumption

P = C x Vdd x Vswing x f x activity factor Look at graph of inverter Look at typical values

Power Measurement

Get a real chip and measure it Get a circuit design and simulate it Build a model

Question: why would you choose one method over another?

Xilinx 4003 Measurements

Look at table of Xilinx measurements Compared to the typical value we

calculated earlier

Why is the number so bad?

Review sources of power consumption Look at the pie chart again

Why is interconnect so bad?

Look at a picture of heavily loaded FPGA interconnect with series connection of switches explain series of resistance effect plus transistor hanging off the interconnect, that it becomes highly resistive and capacitive

Circuit Simulation

Need a circuit representation Use SPICE Use random inputs?

Build a model

Cautionary words from Randy Power factor approximation method

from UC San Diego Dual bit type model from UC Berkeley

Power Factor Approximation

Pavg = Gf =

Results of Power Approximation

Look at the graph of

Dual Bit Type Model

Look at bits of dynamic range graph

Dual Bit Type Model

Look at the bit correlation graph

Results of Dual Bit Type Model

Look at subtracter graph

Power Consumption Reduction

Review dynamic power consumption Hierarchy of low power technique

– algorithm– architecture– logic/cad– circuit– device

Algorithm Level Technique

Flexible, greatest amount of leverage Parallelization Correlation

Architecture Level Technique

Pipelining Gated clock Reducing the number of busses and

switches Reducing fanout? Size of CLB

Logic Level Technique

Mapping Locality Constant propagation

Circuit Level Technique

Circuit family Reduce swing on the buses

Device Level Technique

Great effect on C, Vsupply and everything else

Summary

Why do we care about energy/power Components of power consumption Measurements of power consumption Reduction of power consumption Question: Do PGAs offer better

computation energy efficiency than general purpose processor?