Comparison of Energy Dissipation Concepts for DC Circuit ... · the source of the DC line is...

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Comparison of Energy Dissipation Concepts for DC Circuit Breakers

A. Jehle, K. Pally, J. Biela Power Electronic Systems Laboratory, ETH Zürich

Physikstrasse 3, 8092 Zürich, Switzerland

mailto:[email protected]

Comparison of Energy Dissipation Conceptsfor DC Circuit Breakers

Andreas Jehle, Kessy Pally and Jurgen BielaLaboratory for high power electronic systems, ETH Zurich

Email:[email protected], URL:http://www.hpe.ee.ethz.ch

Keywords�HVDC�, �Multiterminal HVDC�

AbstractIn DC grids, DC circuit breakers (CB) are used to interrupt currents in case of a fault and to dissipate the remainingenergy in the line. Independent of the actually DC CB concept, different energy dissipation concepts can be used,which also influence the performance of the DC CB. In this paper, the energy dissipation with different circuitarrangements, where the energy is dissipated in a single loop, in two loops or in two coupled loops, are discussedand compared. Additionally, the effect of different voltage waveforms across the DC CB and the distribution ofthe current limiting inductance on the input and the output side of the DC CB are investigated.

1 IntroductionIn recent years, interest in bulk HVDC transmission has significantly increased. One reason is the need for offshoreenergy transmission from windfarms, which is limited to short distances for AC transmission. Also for transmittingenergy from remote power stations and solar parks with low losses, HVDC systems are attractive. Additionally,voltage source converters (VSC) allow a power reversal without a voltage reversal, being a first step to a meshedmulti-terminal DC grid with low transmission losses [1].

One of the major remaining problems of HVDC transmission is to turn off lines, especially in case of a fault,where currents rise quickly to high values, because of the relatively low inductances and the high capacitancesencountered in HVDC systems. Besides turning off the complete DC grid [2], DC circuit breaker (DC CB) are anattractive solution. There, DC CB must interrupt a (fault) current in the line, must block an increasing transientinterruption voltage (TIV) across the DC CB, and must dissipate the remaining energy in the line inductances.To interrupt a current and to block the TIV, DC CB can use mechanical switches (MS), semiconductor switchesor a combination of both in so called hybrid circuit breaker (HCB). To dissipate the remaining energy in the lineinductances, usually varistors parallel to the DC CB are used. This concept is called single loop energy dissipation(SLED) (Fig.4), because the fault current flows in a single loop.

For most DC CBs, there are several alternative Energy Dissipation Concepts (EDiC) for dissipating the remain-ing line energy. By dissipating the energy of the inductors in the input and output loop independently (Two loopenergy dissipation (TLED) (Fig.5)), the input current can be decreased faster and the total energy to dissipate issmaller. Also, a coupled two loop energy dissipation (CTLED) (Fig.6), which combines the advantages of SLEDand TLED, can be used. These alternative EDiCs are generally published as part of a specific DC CB topology andthe influence of the used EDiC on the fault current is only compared to the SLED. Only [3] shows the influence ofEDiCs on the fault current and the DC CB terminals voltages. However, the comparison is limited to three EDiCsand the variation of the shares of the current limiting inductance on the input and output side of the DC CB.

CB

CB

CB

CB CB

CB

CB

CB

DCAC

DCAC AC

DC

ACDC

100km 100km

200km 200km

145kV

145kV

380kV

380kV

800MW

800MW

200MW

1200MW

Position of considered HCB

Figure 1: Exemplary block diagram of a 4-terminal symmetricmonopolar DC grid [4] including cables (green) and overheadlines (red), which is used for comparing the presented EDiCs.

Therefore, this paper gives a detailed comparison ofdifferent EDiCs. First, different parameters of the DCtransmission and the DC CBs, which influence the be-havior of the EDiCs, are shortly discussed in section 2.Next, seven EDiCs are shown and their working princi-ples are explained in sections 3 - 5. For each EDiC, theinfluence of the different EDiC parameters and the in-ductances on the fault current and terminal voltages isshown. Finally, the EDiCs are compared for the trans-mission line shown in Fig.1 in terms of time to zerocurrent, DC CB terminal voltages, energy to dissipateand component numbers (section 7).

Comparison of Energy Dissipation Concepts for DC Circuit Breakers JEHLE Andreas

EPE'18 ECCE Europe ISBN: 978 - 9 - 0758 - 1528 - 3 - IEEE catalog number: CFP18850-ART P.1Assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)

2 Transmission system and DC CB

2.1 Transmission system

+-

Main current branch

Auxiliary branch

Energy absorber

inL outL

DCV

DCI f edL Line

Hybrid circuit breakerSource

Figure 2: DC CB in a DC transmission system. The DC CB consists of amain current branch, an auxiliary branch and an energy absorber. On bothsides are current limiting inductances Lin and Lout . The DC source is de-picted with an inductance L f ed , which represents cable inductances of feed-ing lines and/or arm inductances of MMC.

In this section, the parameters of the DCline in Fig.2 are shortly explained.

The voltage sources VDC of a DC line are ei-ther other lines, converter stations or both.In case of a fault, the current increase inother lines is limited by the cable induc-tance. As converter stations usually mod-ular multilevel converters (MMC) are ap-plied, where the IGBTs are simply turnedoff in case of a fault. Then, the MMC actsas diode rectifier with the arm inductanceslimiting the current increase. Therefore,the source of the DC line is presented inthe following part as DC source with an inductance L f ed (Fig.2). Despite the inductance L f ed , the current in-creases in most fault cases still to high values during the time required to detect the fault and open the DC CB.Therefore, additional current limiting inductances Lin and Lout are usually added to limit the fault current increase.Additionally, also the inductance of the line Lline from the DC CB to the fault limits the increase of the fault current.

2.2 DC circuit breaker (DC CB)

UFD

LCS

Main current branch

Auxiliary branch

Energy absorber

Resonant circuitMCB

Main current branch

Energy absorber

Energy absorber

Solid state circuit breaker

a)

b)

c)Figure 3: Three different CB conceptswith single loop energy dissipation: a)Resonant CB, b) hybrid CB, and c)solid state CB

For the fault current interruption, three basic DC CB concepts can be used [5]:

1. Resonant DC CB (Fig.3a) use a resonant circuit parallel to a mechanicalcircuit breaker (MCB). After opening the MCB under current with anarc, the resonant circuit is excited by the negative resistance of the arc.The increasing oscillating current generates a zero current crossing inthe MS and the current commutates to the resonant circuit. The voltageslope across the MCB is limited by the capacitor of the resonant circuitand is determined by the fault current.

2. HCB (Fig.3b) use semiconductors to commutate the current from anultra-fast disconnector (UFD) quickly to an auxiliary branch. In mostHCBs, the voltage increases with a slope determined by a capacitorand by the fault current amplitude after the current commutated fromthe MS to the auxiliary branch. However, also variants exist, whichcan control the voltage across the HCB with the number of turned-offsemiconductor switches [6, 7] (Fig.3b).

3. Solid state DC CB (Fig.3c) consist only of semiconductors, which canbe quickly turned off but generate relatively high on-state losses. Snub-bers are used to limit the voltage slope. The voltage across the DC CBcan be controlled by the number of turned-off semiconductors.

Basically, all three DC CB concepts can use alternative EDiCs, although varis-tors parallel to the HCB and solid state CB are still required for the over-voltage protection of the semiconductor switches. Important for the EDiCis the current through the DC CB and the voltage across the DC CB. Soit is for example possible to increase the voltage across the HCB with aramp and thereby decrease the maximum fault current and energy to dissi-pate [8].

Additionally, many DC CB can be realized also as an unidirectional DC CB,which results in a lower number of components. Due to the use of a DC CBat each end of a line, also unidirectional DC CB can be used in DC grids [9].Therefore, the design of the EDiCs differs if the DC CB is used as unidirec-tional or bidirectional DC CB, which must be considered in a comparison.

3 Single loop energy dissipation (SLED)Most DC CB are published as a two terminal system, where varistors MOVpar parallel to the main current branchare used to dissipate the remaining energy in the line (Fig.4). This results in a coupled input and output current ofthe DC CB (I f ,in = I f ,out = I f ). After turning off the DC CB, the current is commutated to the varistors MOVpar,resulting in a defined maximum TIV across the DC CB (VCB). If the number of series connected varistors is con-trolled for example by the number of turned-off IGBTs, the voltage across the DC CB can be controlled. This



offtfaultt

+-

Main current branch

Auxiliary branchinL outLf,inI f edL

Hybrid circuit breaker with single loop energy dissipation (SLED)

DCV fVCBVCB,inV CB,outV

f,outIlineL

parMOV f,outICB,inV

CB,outV

CBV

Loop = f,inI f,outI t

Figure 4: HCB with single loop energy dissipation (SLED): One or more varistors are placed in parallel to the main currentbranch. The current of the feeding line is therefore equal to the fault current.

allows to keep VCB constant, which results in a faster energy dissipation. The didt of the fault current and the maxi-

mum terminal voltage after turn-off are:

dI f

dt=−

VCB +Vf −VDC

L f ed +L f in +Lout +Lline(1)

VCB,in =VDC +(VCB +Vf −VDC)(L f ed +Lin)

L f ed +L f in +Lout +Lline(2) VCB,out =Vf −

(VCB +Vf −VDC)(Lline +Lout)

L f ed +L f in +Lout +Lline(3)

The SLED has several advantages and disadvantages:

+ The maximum TIV across the DC CB is defined and can be controlled if HCB or solid state DC CB are used.

+ The topology is symmetric and the energy absorbers can therefore be used for decreasing a current in bothdirections.

- The di/dt depends on the line inductance and is therefore relatively low, which results in a relatively longtime to zero input current and a high energy to dissipate.

- The voltages between the DC CB terminals and ground depend on the inductances and depend therefore onthe line length. The terminal voltages could be controlled to some degree by changing the voltage across theDC CB. However, this would require additional measurements and control. To prohibit overvoltages due tooscillations in the grid, additional protection devices are required.

4 Two loop energy dissipation (TLED)Contrary to DC CB with SLED, DC CB with TLED must have at least two connections to ground or to the returnconductor. Three different EDiCs for unidirectional current breaking (I f ,in > 0) with TLED are shown in Fig.5.All three use a varistor MOVin between line and ground on the current feeding side. After the DC CB is turned off,the current of the feeding side I f ,in is commutated to the varistor MOVin and decreases:

dI f ,in

dt=−

(VCB,in −VDC)

L f ed +Lin(4)

On the faulty line side, different configurations of varistors, resistors and semiconductors can be used. The EDiCof the HCBs from [10] and [11] uses a series connection of a resistor Rout and a diode Dout (Fig.5a). During normaloperation, the diode Dout blocks the system voltage. As soon as the HCB is turned off, the fault current I f ,out iscommutated to diode Dout and resistor Rout , which dissipates the remaining energy of the faulty line. The currentdecreases with:

dI f ,out

dt=−

(RI f ,out +Vf )

Lout +Lline(5)

With a TLED the maximum voltage across the HCB is:

VCB,max =VCB,in,max +RI f ,out,max (6)

Therefore, a faster energy dissipation on the feeding line side results in a slower energy dissipation on the faultyline side for an equal maximum voltage VCB,max.A possibility to decrease the fault current I f ,out faster is using varistor MOVout [12] as sown in Fig.5b). Thesystem voltage is again blocked by Dout in normal operation and after the HCB turned off, the fault current I f ,outis commutated to diode Dout and varistor MOVout . The fault current decreases with:

dI f ,out

dt=−

(−VCB,out +Vf )

Lout +Lline(7)



Hybrid circuit breaker with two loop energy dissipation (TLED)

+-

Main current branch


DCV fV

f,outICBV

CB,inV CB,outV

f,inI f,outI

+-

Main current branch


DCV fV

f,outICBV

CB,inV CB,outV

f,inI f,outI

lineL

lineL

lineL

inMOV

inMOV

inMOV

outMOV

outMOV

outR

IGBT

outD

outD

outD+-

Main current branch


DCV fV

f,outICBV

CB,inV CB,outV

f,inI f,outI

a)

b)

c)offtfaultt

offtfaultt

offtfaultt

CBV

CBV

CBV

f,outI

f,outI

f,outI

CB,outV

CB,outV

CB,outV t

t

tLoop f,outI

Loop f,outI

Loop f,outILoop f,inI

Loop f,inI

Loop f,inI

offtfaultt

offtfaultt

offtfaultt

CBV

CBV

CBV

CB,inV

CB,inV

CB,inV

f,inI

f,inI

f,inI

t

t

t

Figure 5: EDiCs for TLED in an unidirectional HCB (I f ,in > 0): To decrease the current I f ,in of the feeding line, a varistorbetween line and ground is used. On the faulty line side, diodes are used to block the DC voltage during normal operation. Todecrease the current I f ,out a) a resistor b) a varistor or c) a varistor with parallel IGBT is used.

The maximum voltage across the HCB is defined as

VCB,max =VCB,in,max +VCB,out,max. (8)

Again, a faster energy dissipation on the feeding line side results in a slower energy dissipation on the faulty lineside for an equal maximum voltage VCB,max. However, the fault current I f ,out decreases faster due to the nonlinearvaristor MOVout .Both mentioned topologies with TLED have the maximum terminal voltage VCB,in,max on the feeding line side andthe maximum terminal voltage VCB,out,max for the energy dissipation on the faulty line side directly after the turn-offof the HCB. Therefore, the time to zero of the feeding line current I f ,in depends on the maximum terminal voltageVCB,out,max for the energy dissipation on the faulty line side. This can be avoided with the topology shown inFig.5c). This topology uses also a varistor MOVout and a diode Dout . However, an IGBT is used parallel to varistorMOVout , which is turned on during normal operation. After turning the DC CB off, current I f ,in is commutated tovaristor MOVin and generates the terminal voltage VCB,in. The current on the faulty line side is commutated to theIGBT and consequently generates only a small voltage VCB,out . Therefore, the maximum voltage to decrease thefeeding line current I f ,in can be equal to the maximum voltage across the HCB VCB,in =VCB, which results in a fastenergy dissipation. As soon as the input current I f ,in decreased that much that VCB,in,max ≤ VCB,max −VCB,out,max,the IGBT can be turned off and a negative voltage VCB,out is generated, which decreases the output current (8). Insummary, a TLED has several advantages and disadvantages:

+ The feeding line current can be decreased faster.

+ The terminal voltages during the energy dissipation are clearly defined. Additionally, the varistor on thefeeding line side limits overvoltages during normal operation and after turn-off.

- The TIV across the HCB cannot be controlled.

- EDiCs with TLED are asymmetric. Therefore, for bidirectional current breaking additional componentsmust be added.

5 Coupled two loop energy dissipation (CTLED)Combinations of SLED and TLED are also possible (Fig.6). As for the SLED, varistors are used in parallel to theDC CB. As for the TLED, different configurations of varistors/resistors and semiconductors can be used for thefaulty line side. In case of a fault, the current is commutated to the varistors MOVpar after the DC CB is turnedoff. This allows to control the voltage VCB across the DC CB by changing the number of series connected varistorsMOVpar. The fault current decreases as for the SLED if the resulting voltage VCB,out is positive (3). Otherwise,diodes Dout in Fig.6 start to conduct and the feeding line current I f ,in decreases faster than the current on the faultyline side I f ,out .



In Fig.6a), a diode Dout for blocking the system voltage in normal operation and a resistor Rout for the energydissipation is used. If diodes Dout start to conduct, the feeding line and the faulty line current decrease with:

dI f ,in

dt=

VCB −VDC −R(I f ,out − I f ,in)

L f ed +Lin(9)

dI f ,out

dt=

R(I f ,out − I f ,in)+Vf

Lou +Lline(10)

In Fig.6b), the current decreases as in the SLED as long as VCB,out is so high that the varistors MOVout do not startto conduct (3). When varistors MOVout start to conduct, the currents decrease independently with:

dI f ,in

dt=

VCB −VDC −VCB,out

L f ed +Lin(11)

dI f ,out

dt=

VCB,out +Vf

Lou +Lline(12)

+-

Main current branch


Hybrid circuit breaker with coupled two loop energy dissipation (CTLED)

DCV fV

f,outI

CBVCB,inV CB,outV

f,outI f,in-I

+-

Main current branch


DCV fV

f,outI

CBVCB,inV CB,outV

+-

Main current branch


DCV fV

f,outI

CBVCB,inV CB,outV

f,outI f,in-I

f,outI f,in-I

a)

b)

c)

lineL

lineL

lineL

parMOV

parMOV

parMOV

outMOV

outMOV

outR

IGBT

outD

outD

outDLoop f,inI

Loop f,inI

Loop f,inI

Loop f,outI

Loop f,outI

Loop f,outI

Figure 6: EDiCs for CTLED in an unidirectional HCB (I f ,in > 0): Dependingon the design of the EDiC and the fault distance, the energy dissipation is similarto the SLED (Fig.4) or to the TLED (Fig.5). The voltage and current waveforms(VCB,in, VCB, VCB,out , I f ,in and I f ,out ) are equal to the corresponding waveformsin SLED respectively TLED. Varistors parallel to the main current branch areeither used to decrease the current I f ,in in the feeding line or in both lines. Fordecreasing the current I f ,out in the faulty line during the TLED a) a resistor b) avaristor or c) a varistor with parallel IGBT is used. Diodes are used to block theDC voltage during normal operation.

Similar to the topology in Fig.5c), thevoltage VCB,out in Fig.6c) can be keptat zero by short circuiting the varistorMOVout [13]. As soon as VCB,out is notpositive (3), the input currents start todecrease:

dI f ,in

dt=− (VCB −VDC)

L f ed +Lin(13)

The output current I f ,out can again bedecreased by turning the IGBT off afterI f ,in is zero (8).In general, the CTLED has the follow-ing advantages:

+ The maximum TIV across theHCB can be controlled, which al-lows to some degree to switch be-tween SLED and TLED behaviorand therefore between fast energydissipation and a low blockingvoltage, which results in lowerdistortions for no fault switching.

+ The feeding line current can bedecreased faster.

- The terminal voltages are onlydefined when diode Dout con-ducts. A complete overvolt-age protection requires additionalcomponents.

- EDiCs with CTLED are stronglyasymmetric. Bidirectional cur-rent breaking therefore requiresadditional components.

6 Setup for the comparisonIn this section, the setup for the simulations of the different EDiCs, whose results are presented in the next section,is shown. The basic setup for the comparison is equal for all investigated EDiCs. A symmetric monopolar fourterminal grid with 400kV nominal voltage and MMCs is used for the simulations (DCS2 [4]).

Current limiting reactors are placed in series to each CB to limit the current increase during a fault. The currentlimiting inductance value is Llim = 100mH, which is commonly used as minimum reactor size [14]. The currentlimiting inductance can be placed at one side of the CB or divided into two inductors on both sides. In the com-parison, the effect of the placement is included by using the current limiting inductor either on the node side, theline side or splitting it in two equal inductors on both sides.

In the simulation of the DC CB, the main current branch and the auxiliary branch of the HCB in Fig.3b) are consid-ered. For the simulation of the EDiCs, the timing of HCB is important since it determines the current amplitudesand the start of the energy dissipation. After an assumed detection time of 2ms, the current is commutated by theLCS in less than 250µs [15]. The UFD is opened next. The maximum opening time of the UFD is 2ms [15]. Twodifferent voltage waveforms can be used during the opening of the UFD:

1. Step: The voltage across the UFD is kept zero during the opening of the UFD [15]. After this ’delay time’of 2ms, the voltage across the UFD is increased in a single step to the maximum UFD blocking voltage byturning off all IGBTs of the auxiliary branch at the same time.



Table I: Maximum currents depending on the voltage waveform across the CB and the distance between CB and fault.

Fault distance Step Ramp Step & control Ramp & Control0 km 11084A 8990A 11084A 8990A

50 km 8418A 7160A 8418A 7160A100km 7017A 6170A 7017A 6170A

Table II: Energy to dissipate/time to zero (input) current depending on the voltage waveform across the HCB and the distancebetween HCB and fault for SLED.

Fault distance Step Ramp Step & Control Ramp & Control0 km 39.5MJ/17.15ms 28.9MJ/15.14ms 38.0MJ/16.40ms 28.1MJ/14.76ms

50 km 32.1MJ/18.02ms 24.5MJ/15.62ms 30.5MJ/16.95ms 23.5MJ/15.09ms100km 28.4MJ/19.45ms 22.2MJ/17.10ms 26.8MJ/18.29ms 21.3MJ/16.19ms

2. Ramp: The voltage across the UFD is ramped up during the opening of the UFD. After a short initialacceleration phase, the contact distance increases approximately linear. This allows to increase the voltageproportional to the distance by turning off the individual IGBTs of the auxiliary branch sequentially [8, 16].The acceleration phase is shorter than 500µs [17], which allows to increase the voltage afterwards with400kV/ms.

After the blocking voltage of the DC CB increased to the DC voltage of the system, the currents I f ,in and I f ,outstart to decrease. Since varistors and/or resistors define the blocking voltage, the blocking voltage decreasesas the currents decrease. Therefore, the decrease of the currents slows down while the currents decrease. Inthis comparison, two additional variants of the above described voltage waveforms are included, which keep theblocking voltage constant for a short time while the currents decrease:

3. Step & Control: As with waveform 1, the voltage across the UFD is increased in one step to the maximumUFD blocking voltage. As soon as the current decreases, additional IGBTs are turned off to keep the voltageconstant. For the comparison, the additional number of IGBTs is chosen to keep the voltage constant untilthe current is halved.

4. Ramp & Control: As with waveform 2, the voltage is ramped up to the maximum UFD blocking voltage.As soon as the current decreases, additional IGBTs are turned off to keep the voltage constant. For thecomparison, the additional number of IGBTs is chosen to keep the voltage constant until the current ishalved.

The first voltage waveform can be used for all EDiCs. The second to fourth voltage waveform can only be used ifthe voltage across the UFD can be actively controlled, which is only the case for SLED and CTLED. The requiredpassive components for energy dissipation of a CB depends also on its position in the grid and therefore varies foreach HCB in the grid [14]. The comparison of the EDiCs are performed for the highlighted CB shown in Fig. 1.

7 Comparison

0 2 4 6 8 10 12 14 160

2

4

6

8

10

12

0

100

200

300

400

500

600]kA[I ]kV[V

]ms[t

Vramp

Vstep

Vramp & control

Vstep & control

Iramp

Istep

Iramp & control

Istep & control

fault LCS opens

UFD openUFD contact

distance increases

Figure 7: Currents for CBs with SLED depending on the usedvoltage waveform across the HCB for a fault at 50km distanceto the HCB.

In the following, a comparison of the different EDiCsin terms of time to zero input current, input and outputterminal voltage, energy to dissipate and componentnumbers is shown. The maximum fault current in theHCB is independent of the used EDiC and depends onthe voltage waveform across the HCB and the fault dis-tance (Tab.I). The maximum fault current is reached assoon as the HCB blocks the DC voltage of the system.With a voltage across the HCB before the UFD is com-pletely open the slope of the current decreases, whichresults in a lower maximum fault current (Fig.7). Theadditional line inductance of a distant fault decreasesalso the maximum current.

7.1 Single loop energy dissipation (SLED)In this section, the simulation results of the EDiCswith SLED for different voltage waveforms across theHCB are presented. The current limiting inductanceis equally distributed to both sides of the HCB for thesimulations, because the current is decreased in a sin-gle loop and the distribution of the current limiting inductance has no influence on the current and the energy todissipate. The resulting number of varistors are equal for unidirectional and bidirectional current breaking, sinceEDiCs with SLED are symmetrical. As shown in Fig.7, the different voltage waveforms result in different currentsand times to zero current (Tab.II). The maximum energies to dissipate are at a fault close to the HCB (0km), while



Table III: Maximum input/output voltage depending on the voltage waveform across the HCB and the distance between HCBand fault for SLED.

Fault distance Step Ramp Step & Control Ramp & Control0 km 563kV/410kV 559kV/406kV 577kV/406kV 568kV/406kV

50 km 906kV/821kV 1060kV/808kV 908kV/823kV 1057kV/824kV100km 1450kV/1107kV 1070kV/818kV 1110kV/818kV 1078kV/818kV

Table IV: Time to zero input current and energy to dissipate for EDiCs with TLED for 0km distance to the fault (worst case).

VR = 10kV VR = 50kV VMOV = 10kV VMOV = 50kV VR,MOV = 10kV VR,MOV = 50kV IGBTtzero,uni 13.8ms 15.8ms 13.4ms 14.9ms 13.4ms 14.9ms 13.4ms

Euni 24.4MJ 30.5MJ 24.5MJ 30.4MJ 25.1MJ 36.9MJ 18.5MJtzero,bi 15.5ms 27.2ms 15.5ms 17.4ms 15.4ms 17.5ms 15.1ms

Ebi 33.4MJ 40.8MJ 33.8MJ 40.4MJ 33.8MJ 48.6MJ 31.9MJ

the time to zero current is maximum for a fault at the other end of the line (here: 100km). Increasing the voltageduring the opening of the UFD leads to a lower current slope and to a decrease of the current before the UFD iscompletely open. Therefore, the current is already lower for voltage waveforms with a ramped up voltage whenthe UFD is completely open. This leads finally to a lower energy to dissipate (36.7% less) and a lower time tozero current (2ms shorter). Voltage waveforms with control of the voltage after the opening of the UFD lead to afaster decrease of the current after the opening of the UFD. The constant voltage until the current is halved usedin the simulations, corresponds to an increase of the number of IGBTs by less than 2.2% and leads for SLED to adecrease of the maximum dissipated energy of 4.5% for the step voltage and 2.8% for the ramped up voltage.

0 10 20 30 40 50 60 70 80 90

0

2

4

6

8

0

5

10

15

20

]kA[I ]MW[E

]ms[t

Iin,LinIout,Lin

Iin,Lout

Iout,Lout

Ein,Lin

Eout,LinEout,Lout

Ein,Lout

Figure 8: Input and output current of HCB withSLED for placement of the current limiting induc-tance either on the input or the output side.

0102030405060708090

SLED step

SLED ramp

MOV/R [MW]

V R

=1

0kV

V MO

V=10

kV

V R,M

OV=

10kV

V R

=5

0kV

V MO

V=50

kV

V R,M

OV=

50kV

IGB

T

100

Figure 9: Total installed energy dissipation ca-pability of EDiCs with TLED in comparison toEDiCs with SLED (unidirectional/bidirectional).

As already mentioned in section 3, the input and the output volt-ages of the HCB depend on the current limiting inductances andthe distance to the fault. This leads to relatively high input andoutput voltages (Tab.III) compared to the nominal system voltageof 400kV.

7.2 Two loop energy dissipation (TLED)For the comparison of the EDiCs with TLED, simulations with thethree different EDiCs presented in section 4 have been performed.For the EDiC with resistor on the faulty line side and the EDiCwith varistor on the faulty line side, simulations with a maximumnegative output voltage of VCB,out =−10kV and VCB,out =−50kVhave been performed (VR = 10kV , VR = 50kV , VMOV = 10kV andVMOV = 50kV ). Accordingly, the maximum input voltage VCB,in is590kV respectively 550kV in order to limit the maximum voltageacross the HCB to 600kV . For the EDiCs with a varistor with par-allel IGBT, the maximum input voltage VCB,in is 600kV . To keepthe maximum HCB voltage, the IGBT is turned off so late that theinput current and the input voltage already decreased.Both EDiCs with varistor on the faulty line side use additionallypart of MOVin as MOVout for bidirectional current breaking. Thisis also possible for the bidirectional EDiC with resistor by using aseries connection of a MOV and a resistor for dissipating the en-ergy on the feeding line side (VR,MOV = 10kV and VR,MOV = 50kV ).However, this results in higher energies to dissipate due to thefaster decreasing input voltage.A free parameter of unidirectional EDiCs is the distribution of thecurrent limiting inductance on the feeding and the faulty line side.Generally, all EDiCs with TLED have the lowest energy to dissi-pate if the current limiting inductance is completely on the faultyline side. As exemplary shown in Fig.8, in this case the current onthe feeding line side decreases faster and the energy to dissipate onthe feeding line side and the overall energy to dissipate are lower.For bidirectional EDiCs, only an equal distribution should be usedas long as the current breaking capability for both sides should beequal.The performances of the different EDiCs with TLED are depictedin Tab.IV. The lowest energies to dissipate and lowest times tozero current are obtained by deenergizing a small current limitinginductance on the feeding side as fast as possible with a high inputvoltage. Therefore, unidirectional EDiCs with TLED and highinput voltage can decrease the energy to dissipate and the time to zero input current compared to EDiCs with SLED.EDiCs for bidirectional current breaking have due to the equal distribution of the current limiting inductance higherenergies to dissipate and times to zero input current than unidirectional EDiCs with TLED. In contrast to the energy



Table V: Additional installed semiconductor power and voltages for unidirectional EDiCs for TLED.

VR = 10kV VR = 50kV VMOV = 10kV VMOV = 50kV VR,MOV = 10kV VR,MOV = 50kV IGBTPdiode 6.55GW 6.13GW 6.56GW 6.11GW 6.57GW 6.08GW 6.67GW

Vdiode,max 591.2kV 553kV 591.7kV 550.9kV 592.9kV 548.8kV 601.8kVPIGBT 0GW 0GW 0GW 0GW 0GW 0GW 2.06GWVIGBT 0kV 0kV 0kV 0kV 0kV 0kV 185.6kV

Table VI: Energy to dissipate for EDiCs with CTLED for 0km distance to the fault (worst case).

Unidirectional current breaking HCB Bidirectional current breaking HCBStep Ramp Step & Control Ramp & Control Step Ramp Step & Control Ramp & Control

VR = 10kV 23.6MJ 17.9MJ 22.3MJ 17.5MJ 32.3MJ 23.9MJ 31.4MJ 23MJVR = 50kV 27.1MJ 20.1MJ 25.8MJ 19.3MJ 37.1MJ 28.5MJ 36.3MJ 27.6MJ

VMOV = 10kV 24MJ 18.2MJ 22.7MJ 17.7MJ 33.2MJ 24.5MJ 32MJ 23.6MJVMOV = 50kV 28.8MJ 22.1MJ 27.6MJ 20.7MJ 38.7MJ 28.6MJ 37.6MJ 28MJVIGBT = 10kV 22.5MJ 17.6MJ 21.6MJ 17.2MJ 31.6MJ 23MJ 30.6MJ 22.6MJVIGBT = 50kV 22.7MJ 17.6MJ 21.7MJ 17.2MJ 32MJ 23MJ 30.5MJ 22.6MJ

dissipation with SLED, the maximum time to zero input current occurs for faults close to the HCB (0km). This isdue to the fact that the time to zero input current depends only on the current limiting inductance on the feedingline side and the maximum current apart from the used EDiC with TLED. A disadvantage of EDiCs with TLEDfor bidirectional current breaking is that only a part of the varistors is used for each current breaking direction.Therefore, the installed energy dissipation capability as shown in Fig.9 is for all HCB with bidirectional currentbreaking and TLED higher than for SLED. Only unidirectional EDiCs with TLED and high input voltage candecrease the installed energy dissipation capability compared to EDiCs with SLED. An additional drawback of theTLED are that additional diodes and IGBTs are required as shown in Tab.V for unidirectional EDiCs for TLED.

7.3 Coupled two loop energy dissipation (CTLED)

0

5

10

15

20

25

30

35

40

Step Ramp Step & Control Ramp & Control

MOV/R [MW]

VR =10kV (unidirectional/bidirectional)VMOV=10kV (unidirectional/bidirectional)VIGBT=10kV (unidirectional/bidirectional)

SLED

Figure 10: Installed energy dissipation capabilities forEDiCs with CTLED for unidirectional and bidirectionalcurrent breaking with a minimum output voltage of 10kV.

For the comparison of EDiCs with CTLED, the three differ-ent EDiCs shown in Fig.6 are used with a maximum negativeoutput voltage of VCB,out = −10kV and VCB,out = −50kV .Similar to EDiCs with TLED, the distribution of the cur-rent limiting inductance to the current feeding line side andthe faulty line side of the HCB can be varied for EDiCswith CTLED used for unidirectional current breaking. Simi-lar to EDiCs with TLED, the complete current limiting in-ductance placed on the faulty line side leads to the low-est energies to dissipate and time to zero current. There-fore, the cases with equal distribution and complete currentlimiting inductance on the feeding line are not consideredfor the unidirectional current breaking. Bidirectional cur-rent breaking should again be performed with equal distri-bution of the current limiting inductance to the feeding lineside and the faulty line side. Another free design parameterof EDiCs with CTLED is the voltage waveform across theHCB. Again, all four voltage waveforms are considered.

The performance of EDiCs with CTLED in terms of en-ergy to dissipate and time to zero input current are shown inTab.VI and Tab.VII. The simulations prove that CTLED cancombine successfully the advantages of SLED and TLED toimprove the performance of HCBs. Similar to EDiCs withTLED, the input current can be decreased faster than withSLED since only half or no current limiting inductance ispresent in the loop on the feeding side. Additionally, the high input voltage leads again to a faster decreasing input

Table VII: Time to zero input current for EDiCs with CTLED for 0km distance to the fault (worst case).

Unidirectional current breaking HCB Bidirectional current breaking HCBStep Ramp Step & Control Ramp & Control Step Ramp Step & Control Ramp & Control

VR = 10kV 13.3ms 9.7ms 12.8ms 9.4ms 15.2ms 12ms 15ms 13.6msVR = 50kV 14.7ms 13.9ms 14.7ms 13.7ms 16.3ms 15.4ms 16ms 14.8ms

VMOV = 10kV 13.7ms 9.8ms 12.8ms 9.4ms 15.4ms 14ms 15.1ms 13.8msVMOV = 50kV 14.6ms 14.1ms 14.7ms 13.7ms 16.9ms 15ms 16.4ms 13.8msVIGBT = 10kV 13ms 9.4ms 10.2ms 9.1ms 15ms 13.6ms 14.8ms 13.3msVIGBT = 50kV 14.6ms 9.8ms 10.5ms 9ms 15.1ms 13.7ms 14.8ms 13.7ms



Table VIII: Maximum terminal voltage of CTLED for bidirectional current breaking and maximum input/output voltages forunidirectional current breaking.

Fault Bidirectional current breaking HCB Unidirectional current breaking HCBdistance Step Ramp Step & Control Ramp & Control Step Ramp Step & Control Ramp & Control

0km 773kV 601kV 775kV 601kV 835kV/434kV 598kV/436kV 848kV/441kV 601kV/436kV50km 811kV 596kV 808kV 602kV 990kV/601kV 599kV/599kV 1002kV/599kV 601kV/599kV100km 893kV 593kV 893kV 601kV 974kV/639kV 637kV/637kV 985kV/639kV 637kV/637kV

Table IX: Additional installed powers of IGBTs for EDiCs with varistor with parallel IGBT (10kV/50kV output voltage) anddiodes for EDiCs with CTLED.

Bidirectional current breaking HCB Unidirectional current breaking HCBStep Ramp Step & Control Ramp & Control Step Ramp Step & Control Ramp & Control

Diodes 19.8GW 10.81GW 19.8GW 10.81GW 7.08GW 5.73GW 7.08GW 5.73GWIGBTs (10kV) 0.22GW 0.18GW 0.22GW 0.18GW 0.11GW 0.09GW 0.11GW 0.09GWIGBTs (50kV) 1.11GW 0.45GW 1.11GW 0.45GW 0.55GW 0.22GW 0.55GW 0.22GW

current due to the low output voltages. Therefore, lower minimum output voltages ensure again a lower energyto dissipate and a lower time to zero current. Similar to EDiCs with SLED, the voltage across the UFD can becontrolled and increased earlier, which also leads to a faster energy dissipation.In terms of the installed energy dissipation capability, EDiCs with CTLED benefit from the lower energy to dis-sipate and in case of bidirectional current breaking from the usage of varistors parallel to the UFD for currentbreaking in both directions (Fig.10). While EDiCs with CTLED combine the advantages of SLED and TLEDin terms of performance and a low installed energy dissipation capability, EDiCs with CTLED combine also thedisadvantages in terms of high terminal voltages and high numbers of required semiconductors. One of the mainproblems is that the terminal voltages are only limited by the HCB during the interruption as soon as the diodeconducts. When and if the diode starts to conduct depends on several parameters as the voltage across the HCBand the distribution of the current limiting inductances and the line inductances, respectively the distance to thefault (Tab.VIII). Additionally, the diode does not directly start to conduct as soon as the HCB voltage has beenincreased. Therefore, a fast stepwise increase of the voltage across the UFD leads to a higher input voltage than aslow ramped up voltage across the UFD, which enables the current to commutate to the diode before the maximumvoltage across the UFD is reached. Because of the high terminal voltages, also the number of required diodes ishigh (Tab.IX) and require an additional overvoltage protection.

8 ConclusionIn this paper, energy dissipation concepts for DC CB are presented and compared. The paper discusses the advan-tages and disadvantages of dissipating the energy with a SLED, a TLED and a CTLED. Additionally, the effectsof different voltage waveforms across the UFD and different distributions of the current limiting inductance on thecurrent feeding and the faulty line side of unidirectional DC CB are discussed. In the second part of the paper,simulation results are used to compare the different concepts in terms of required components and performance(Tab.X).SLED can be used without additional semiconductors and the installed energy dissipation capability is the samefor unidirectional and bidirectional current breaking. In addition, the ramped up voltage across the UFD results ina faster energy dissipation than with a single voltage step. For bidirectional current breaking, this allows a 12%lower energy to dissipate than for TLED and a 53% lower installed energy dissipation capability than for TLED,although the time to zero current is 1.1ms longer for the considered system (Fig.1). However, for unidirectionalcurrent breaking, placing the complete current limiting inductance on the output side results for TLED in a lowerenergy to dissipate (-22%) and a 2.8ms lower time to zero input current. In addition, the installed energy dissipationcapability can be decreased by 15% and the terminal voltages are limited. An even better performance can beachieved with CTLED by using a ramped up voltage across the UFD and placing the complete current limitinginductance on the output side. For unidirectional current breaking, the time to zero input current decreases by 7.2mscompared to SLED, respectively by 4.4ms compared to TLED. This is also true for bidirectional current breakingwith 2.2ms shorter time to zero current compared to SLED and 1.5ms shorter time to zero current compared toTLED. Also the energy to dissipate and the installed energy dissipation capability are below SLED and TLED.Therefore, the use of a CTLED is clearly advantageous for unidirectional and bidirectional current breaking alikeand should be considered for future DC CB.

Table X: Comparison of SLED, TLED and CTLED

SLED TLED CTLEDTime to zero input current high medium low

Maximum dissipated energy high medium lowTerminal voltages limited no yes additional

Installed energy dissipation capability medium high lowAdditional required semiconductors non yes yes



List of abbreviations

CB circuit breaker VSC voltage source converterHVDCs high voltage dc TIV transient interruption voltageMS mechanical switch HCB hybrid circuit breakerSLED single loop energy dissipation EDiC energy dissipation conceptsTLED two loop energy dissipation CTLED coupled two loop energy dissipationMMC modular multilevel converter MCB mechanical circuit breakerUFD ultra-fast disconnector MMC modular multilevel converterMOV metal oxide varistor IGBT insulated-gate bipolar transistorLCS load commutating switch

AcknowledgmentThis project is carried out in the frame of the Swiss Centre for Competence in Energy Research on the Future SwissElectrical Infrastructure (SCCER-FURIES) with the financial support of the Swiss Commission for Technologyand Innovation (CTI - SCCER program).

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