Compact Car Parking System

8/21/2019 Compact Car Parking System

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COMPACT CAR PARKING SYSTEM

A.A.N.M. & V.V.R.S.R.POLYTECHNIC, GUDLAVALLERU

CHAPTER-1

INTRODUCTION

Today, due to the advent of the latest technology, there is a solution that isbeing for every problem. Almost, any problem that plagues humanity has been given a

severe thrash in the form of a sound reciprocation.

Even in this new era, where the size of an electronic gadget has been reduced to a

pin size object, that retains all the features of its complex version, some problems still

plague humanity. At this point of time, the main problems that have been troubling

human life are Unemployment, Pollution, Poverty, Traffic congestion at crowded areas

etc.,We have always been in the forefront to find at least a paltry solution to any one of

the problems that have existed for so long now. We decided to whet our inquisitive

brains in order to find a tentative solution to any one problem. During this course of

time, we have decided to find an exciting reply to the parking of cars at crowded areas.

With this spark, we could ignite a whole new concept that is bound to create tremors

among the unruly people who demand a huge amount just for parking. Thus, this small

spark of ours ignited into the idea "Micro controller based Compact Parking System.

Now a days, vehicle parking near shopping malls is one of the biggest problems in

the world. Two wheelers need a small space for parking whereas four wheelers occupy

a relatively wider parking in this system. In this system, we have placed vertical racks in

underground that are capable of moving up and down because of a driving mechanism.

This driving mechanism is taken care by the usage of stepper motors. A versatile Micro

controller AT89C51 is used to control all operations. This system also uses a serial

EEPROM to store a password. An LCD display and a keyboard have been provided for

the user to view and type the passwords respectively.

The principle here is the fact that when a car arrives for parking, IR gate sensor

makes the gate to open upon receiving a feedback from the Micro controller regarding a

vacant rack. The vacant rack's number will be automatically displayed on the display.

The user then can type a four-digit password and after it gets accessed, the rack

automatically goes underground.

Thus, we hope that system solves the parking problem at least to some extent.


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CHAPTER-2

BLOCK DIAGRAM

FIG 2.1 BLOCK DIAGRAM

The block diagram includes the Micro controller unit that controls all the control

operations and the interfaced units include the keyboard, serial EEPROM, LCD and the

MOSFET driver circuits which connect the stepper motors to the micro controller unit.

The keyboard helps in entering the password which is stored in the serial EEPROM and

the LCD helps in the display of the rack number for the user. The IR

transmitter/receiver senses the arrival of the car and sends the information to the microcontroller unit to perform the required task. The zero position feedback system helps in

indicating the position of the rack. Two stepper-motors are used; one for the movement

of the rack and the other is for the gate movement.


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CHAPTER 3

PRINCIPLE OF OPERATION

The principle of operation includes the sensing of the car by the IR sensor and the

driving mechanism by the stepper motor

When a car arrives for parking, IR sensor placed at the gate will give feed back to

micro controller. MC checks the vacant rack. Then MC moves the stepper motor till the

vacant rack is placed in front of the gate.

In this system we are providing vertical racks, placed in under ground. These racks

are connected to a driving mechanism, which will move the racks in upward or

downward direction. Stepper motors are used in driving mechanism because of their

precise movements.

When power is switched on, controller is reset by power on reset circuit. Then it

scans gate sensor continuously. As soon as a car is placed between the sensors, the IR

beam is intersected and the Rx o/p will go high. By sensing this, micro controller opens

the gate by driving stepper motor 6 revolutions to open 90 up. Then it searches for

vacant rack and drives other motor 10 revolutions per rack to place the rack in front ofthe gate. While moving lift, it scans slot sensors to sense the position. When the plate

attached backside of the rack crosses the slot, then it intersects the light beam so that the

output goes low. After sensing this, micro controller stops the rack movement. After

parking the vehicle, the user has to enter his password, using keyboard to protect his

rack. Then the gate closes and rack moves to home position and store the rack position

as filled in memory.

Again when the user press open key, system asks for password and when it

matches, it opens the rack again and store the rack position as vacant in memory then it

moves into home position after time delay.

A full wave rectifier along with filter and regulator is used to generate +12V

unregulated and +5V regulated D.C. +12V is used for stepper motor driving and +5V is

used for control circuit operation.


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CHAPTER 4

WORKING OF SYSTEM

There are two processes, the user has to undergo

1. Entering.

2. Leaving.

ENTERING:

When a vehicle arrives for parking, the IR sensor present near the gate will sense the car

and sends the information to the MC. The MC checks for the vacant racks and places

the vacant rack in front of the gate and opens the gate. Then the user parks the vehicle

on the rack and then finally gives the password. After entering the password, the buzzer

gives a beep sound and displays the number of the rack in which the car is placed. This

completes the entry action.

LEAVING:

When the user wants to get his car back then he need to enter the number of the rack

and then the password. Then the microcontroller identifies the car based on the

password and opens the gate and places the car on the track opening the gate. This

completes the leaving action and the rack is available for further use.


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CHAPTER-5

CIRCUIT DIAGRAM

FIG-5.1.CIRCUIT DIAGRAM


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CHAPTER 6

CIRCUIT DESCRIPTION

6.1 HARDWARE DESCRIPTION:

The micro-controller continuously keeps on checking the status of the IR

transmitter/receiver that is connected to the 8 pin and when the input to that pin is low it

indicates the presence of vehicle and then it keeps on checking the status of the racks

inorder to find the vacant rack. After finding the vacant rack it energizes the stepper

motor connected to the rack by passing a low-level input to the driver circuits connected

to pins P3.4to P3.7. The slot sensor connected to the port P3.2helps in placing the rack at

the right position near the gate. After the rack reaches the ground level the stepper

motor of the gate is energized to open the gate. It takes 2 revolutions for the gate to

open. Then the vehicle is placed on the rack and the user gives the password through the

keypad. This is stored in the serial EEPROM through the control pins connected to P3.0

and P3.1. Whet the user gives the number of the rack it senses that it is a leaving process

and asks for password. After retrieving the car it clears the password memory by

passing all zeros. After a particular amount of delay the gate automatically closes. All

the control is done through software programming.

The hardware circuitry comprises of the following:

1. Power supply2. IR Transmitter/Receiver3. Micro controller (AT89C51)4.

16x2 character LCD

5. 4x3 matrix Key pad6. Stepper motor7. MOSFET driver circuitry8. Slot sensor9. Serial EEPROM (AT24C04)10. LM35811. Buzzer


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6.1.1 POWER SUPPLY:

FIG 6.1 POWER SUPPLY

Power supply unit provides 5V regulates power supply to the systems. It consists

of two parts namely,

1. Rectifier2. Monolithic voltage regulatorRECTIFIER:

Here the step down transformer 230-0V/12-0-12 and gives the secondary current up

to 2A, to the Rectifier. The Transformer secondary is provided with a center tap.

Hence the voltage V1and V2are equal and are having a phase difference of 1800. So it

is anode of Diode D1is positive with respect to the center tap, the anode of the other

diode D2will be negative with respect to the center tap. During the positive half cycle

of the supply D1 conducts and current flows through the center tap D1 and load.During this period D2will not conduct as its anode is at a negative potential. During the

negative half cycle of the supply voltage, the voltage on the diode D 2will be positive

and hence D2 conducts. The current flows through the transformer winding, Diode D2

and load. It is to be noted that the current I1and I2are flowing in the same direction in

load.


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The average of the two currents I1 and I2 flow through the load producing a voltage

drop, which is the D.C. output voltage of the rectifier. Using capacitor filters the ripple

in the out waveform can be minimized. The voltage can be regulated by using

monolithic IC voltage regulators.

MONOLITHIC IC VOLTAGE REGULATOR:

A voltage regulator is a circuit that supplies a constant voltage regardless of

changes in load currents. Although voltage regulators can be designed using op-amps, it

is quicker and easier to use IC voltage regulators. Furthermore, IC voltage regulators are

versatile and relatively inexpensive and are available with features such as

programmable output, current/voltage boosting, internal short-circuit current limiting,thermal shutdown and floating operation for high voltage applications.

Here we are using 7800 series voltage regulators. The 7800 series consists of 3-

terminal positive voltage regulators with seven voltage options. These ICs are designed

as fixed voltage regulators and with adequate heat sinking can deliver output currents in

excess of 1A. Although these devices do not require external components, such

components can be used to obtain adjustable voltages and currents. For proper operation

a common ground between input and output voltages is required. In addition, the

difference between input and output voltages (Vi Vo) called drop out voltage, must be

typically 1.5V even during the low point as the input ripple voltage. Further more, the

capacitor Ci is required if the regulator is located an appreciable distance from a power

supply filter. Typical performance parameters for voltage regulators are line regulation,

load regulation, temperature stability and ripple rejection. Line regulation is defined as

the change in output voltage for a change in the input voltage and is usually expressed

in millivolts or as a percentage of Vo. Temperature stability or average temperature

coefficient of output voltage (Tcvo) is the change in output voltage per unit change in

temperature and is expressed in either millivolts/C or parts per million (PPM/C).

Ripple rejection is the measure of a regulators ability to reject ripple voltage. It is

usually expressed in decibels. The smaller the values of line regulation, load regulation

and temperature stability the better the regulation.


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6.1.2 IR TRANSMITTER AND RECEIVER:

FIG 6.2 IR TRANSMITTER/RECEIVER CIRCUIT

Infrared transmitter is one type of LED which emits infrared rays generally called IR

Transmitter. Similarly IR Receiver is used to receive the IR rays transmitted by the IR

transmitter. One important point is that both IR transmitter and receiver should be

placed in a straight line to each other.

IR transmitter continuously emits the IR light rays. When an obstacle occurs these

rays are reflected by the obstacle and are collected by IR receiver. The IR receiver is

connected to the comparator. The comparator is constructed using LM358. In the

comparator circuit the reference voltage is given to inverting input terminal. The non-

inverting terminal is connected to IR receiver. When no interrupt occurs the IR rays are

not reflected to the receiver so the IR receiver is not conducting. So the comparator

inverting input voltage is higher then non-inverting input. So it sends an active low pulse

to the MCU. When there is vehicle in between transmitter and receive, IR rays are collected

by receiver and the non-inverting input voltage is greater and thus sends a high pulse to

the micro-controller which indicates the presence of vehicle. Thus the vehicle is detected.

6.1.3 MICRO CONTROLLER(AT89C51)

The system requirements and control specifications clearly rule out the use of 16, 32 or

64 bit micro controllers or microprocessors. Systems using these may be earlier to

implement due to large number of internal features. They are also faster and more

reliable but, the above application is satisfactorily served by 8-bit micro controller.

Using an inexpensive 8-bit Microcontroller will doom the 32-bit product failure in any

competitive market place.


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The micro controller employed here is AT89C51.The reason for adopting this

micro controller is the 8-bit Microcontroller available in the market the main answer

would be because it has 4 Kb on chip flash memory which is just sufficient for our

application. The on-chip Flash ROM allows the program memory to be reprogrammed

in system or by conventional non-volatile memory Programmer. The Atmel AT89C51

is a powerful microcomputer which provides a highly-flexible and cost-effective

solution to many embedded control applications. Moreover ATMEL is the leader in

flash technology in todays market place and hence using

AT 89C51 is the optimal solution.

FIG 6.3 PIN DIAGRAM OF AT89C51


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FIG 6.4 BLOCK DIAGRAM OF AT89C51FEATURES:

Compatible with MCS-51 Products

4K Bytes of In-System Reprogrammable Flash Memory

Endurance: 1,000 Write/Erase Cycles

Fully Static Operation: 0 Hz to 24 MHz

Three-level Program Memory Lock

128 x 8-bit Internal RAM

32 Programmable I/O Lines

Two 16-bit Timer/Counters

Six Interrupt Sources

Programmable Serial Channel


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SALIENT FEATURES:

The 89C51 can be configured to bypass the internal 4K ROM and run solely with

external program memory. For this its external access (EA) pin has to be grounded,

which makes it equivalent to 8031. The program store enable (PSEN) signal acts as read

pulse for program memory. The data memory is external only and a separate RD* signal

is available for reading its contents. Use of external memory requires that three of its 8-bit

ports (out of four) are configured to provide data/address multiplexed bus. Hi address bus and

control signals related to external memory use. The RXD and TXD ports of UART also appear

on pins 10 and 11 of 8051 and 8031, respectively. One 8-bit port, which is bit addressable is

extremely useful for control applications.

The UART utilizes one of the internal timers for generation of baud rate. The crystal used for

generation of CPU clock has therefore to be chosen carefully. The 11.0596 MHz crystals;

available abundantly, can provide a baud rate of 9600.

HARDWARE DETAILS:

The on chip oscillator of 89C51 can be used to generate system clock. Depending upon

version of the device, crystals from 3.5 to 12 MHz may be used for this purpose. The

system clock is internally divided by 6 and the resultant time period becomes one

processor cycle. The instructions take mostly one or two processor cycles to execute,

and very occasionally three processor cycles. The ALE (address latch enable) pulse rate

is 16th of the system clock, except during access of internal program memory, and thus

can be used for timing purposes.

The two internal timers are wired to the system clock and prescaling factor is decided

by the software, apart from the count stored in the two bytes of the timer control

registers. One of the counters, as mentioned earlier, is used for generation of baud rate

clock for the UART. It would be of interest to know that the 8052 have a third timer,

which is usually used for generation of baud rate.

The reset input is normally low and taking it high resets the micro controller, In the

present hardware, a separate CMOS circuit has been used for generation of reset signal

so that it could be used to drive external devices as well.


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WRITING THE SOFTWARE:

The 89C51 has been specifically developed for control applications. As mentioned

earlier, out of the 128 bytes of internal RAM, 16 bytes have been organized in such a

way that all the 128 bits associated with this group may be accessed bit wise to facilitate

their use for bit set/reset/test applications. These are therefore extremely useful for

programs involving individual logical operations. One can easily give example of lift

for one such application where each one of the floors, door condition, etc may be

depicted by a single hit.

The 89C51 has instructions for bit manipulation and testing. Apart from these, it has 8-bit

multiply and divide instructions,which may be used with advantage. The 89C51 has short

branch instructions for 'within page' and conditional jumps, short jumps and calls within 2k

memory space which are very convenient, and as such the controller seems to favor programs

which are less than 2k byte long. Some versions of 8751 EPROM devices have a security bit

which can be programmed to lock the device and then the contents of internal program EPROM

cannot be read. The device has to be erased in full for further alteration, and thus it can only be

reused but not copied. EEPROM and FLASH memory versions of the device are also available

now.

MEMORY UNIT:

Memory is part of the micro controller whose function is to store data. The easiest way

to explain it is to describe it as one big closet with lots of drawers. If we suppose that we

marked the drawers in such a way that they cannot be confused, any of their contents

will then be easily accessible. It is enough to know the designation of the drawer and so

its contents will be known to us for sure.

Memory components are exactly like that. For a certain input we get the contents of a

certain addressed memory location and thats all. Two new concepts are brought to us:

addressing and memory location. Memory consists of all memory locations, and

addressing is nothing but selecting one of them. This means that we need to select the

desired memory location on one hand, and on the other hand we need to wait for the

contents of that location. Besides reading from a memory location, memory must also

provide for writing onto it. This is done by supplying an additional line, called control

line. We will designate this line as R/W. Control line is used in the following way: if

r/w=1, reading is done, and if opposite is true then writing is done on the memory

location. Memory is the first element, and we need a few operation of our microcontroller.


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CENTRAL PROCESSING UNIT :

Let us add 3 more memory locations to a specific block that builds in capability to

multiply, divide, subtract, and move its contents from one memory location onto

another. The part we just added in is called central processing unit (CPU). Its memory

locations are called registers.

Registers are therefore memory locations whose role is to help with performing various

mathematical operations or any other operations with data wherever data can be found.

Look at the current situation. We have two independent entities (memory and CPU),

which are interconnected, and thus any exchange of data is hindered, as well as its

functionality. If, for example, we wish to add the contents of two memory locations and

return the result again back to memory, we would need a connection between memory

and CPU. Simply stated, we must have some way through data goes from one block

to another.

BUS:

It represents a group of 8, 16, or more wires. There are two types of buses: address and data

bus. The first one consists of as many lines as the amount of memory we wish to address, and

the other one is as wide as data, in our case 8 bits or the connection line. First one serves to

transmit address from CPU memory, and the second to connect all blocks inside the micro

controller.

INPUT-OUTPUT UNIT;

Those locations weve just added are called ports. There are several types of ports: input,

output or bi-directional ports. When working with ports, first of all it is necessary to choose

which port we need to work with, and then to send data to, or take it from the port. When

working with it the port acts like a memory location. Something is simply being written into or

read from it, and it could be noticed on the pins of the micro-controller.

6.1.4 LIQUID CRYSTAL DISPLAY:

The alphanumeric 16character X 2line LCD requires 8data lines and also 3 control

signals and they are interfaced to 3664.By using 2 ports, port 0&3 data pins are

connected to LCD as data bus. Port0 can be basically used as I/O port i.e. it can be

programmed as an input or as an output port. That means if it is programmed as output

port, suppose if it is required to read data from LCD immediately it is not possible.

Before reading the data it is required to make the port as an input port. Data reading

from LCD gives an erroneous reading & should not be implemented.


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Because of this port5 is made as input / output port depending on the situation. The

control signals are connected to port 3 pins. They are EN bar & RS bar, RW bar. At

different instance such as data write / command write / data read etc. Various signals are

to be provided as indicated by the by the LCD manufacturers.

FIG 6.5 LCD PIN CONFIGURATION

To interface the LCD, to the Micro controller it require an 8 bit and also three control

signals differentiate the data from the control words send to the LCD. The Micro

controller has to send the necessary control words followed by the data to be displayed.

Depending on the operation to be performed the control words are selected and passes

to the LCD. The data to be displayed on the LCD is to be sent in the ASCII format.

Thus all the character to be displayed are converted into ASCII form and then sent to

the LCD along with different control words. The control word differentiates the various

operations to be executed. It is also possible to read the LCD data if required.

The control signals to the LCD are also provided by the Micro controller. This is also

done through pins 2.5, 2.6, 2.7.Through program necessary control signals are passed to

the LCD by using the bits of the port. The remaining can be used for some other

purpose if there is a need. The software controls the necessary ports and performs the

task it is designed .


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PIN DESCRIPTION:


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6.1.5 4 by3 MATRIX KEYPAD:

This simple 4x3 keypad permits data entry to a microcontroller I/O port .The 4 rows are

connected via 100k pull-down resistors to ground, so reading a row with all switches

open returns a "0". Rows 1, 2, 3 and 4 are connected to port pins 1, 2, 3 and 4

respectively and Columns 1, 2 and 3 are routed to port pins 5, 6 and 7 respectively.

FIG 6.6 KEYPAD

6.1.6 STEPPER MOTORS

These motors are also called stepping motors or step motors. This name is used becausethis motor rotates trough a fixed angular step in response to each input current pulse

received by its controller. In the recent years, there has been wide demand of stepping

motors because of the explosive growth of the computer industry. This popularity is due

to the fact that they can be directly controlled by computers, microprocessors and

programmable controllers.

As we know industrial motors are used to convert electrical energy into

mechanical energy but they cannot be used for precision positioning of an object. These

stepper motors are ideally suited for situations where precise positioning is required.

When a command pulse is received each time the output shaft rotates in a series of

discrete angular intervals. When number of pulses supplied are definite then shaft of the

stepper motor turns through definite known angle. This makes stepper motor suited for

open loop position control because no feedback need to be taken from the shaft.


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Such motors develop some torques ranging from 1Mn-m. In a tiny wristwatch motor of

3mm diameter, up to 40N-M in a motor of 15cm diameter suitable for machine tool

applications. Power output ranges from 1Wto a max of 2500W. The only moving party

in a stepper motor is its rotor, which has no windings, commutator or brushes. This

feature makes it quite robust and reliable.

STEP ANGLE:The angle through which motor shaft rotates for each command is

called the step angle. Smaller the stepper angle, greater the no. of steps for revolution

and higher the resolution or accuracy of positioning obtained. The step angle can be as

small as 0.72 degrees as large as 90 degrees. But most common step sizes are 1.8, 2.5,

7.5 and 15.

Resolution is given by the number of steps needed to complete one revolution of

the rotor shaft. Higher the resolution greater the extraordinary ability to operate at very

high stepping rates up to (20,000 steps 1 second) Operation at high speeds is called

slewing.

Stepping motors come in two varieties, permanent magnet and variable reluctance

(there are also hybrid motors, which are indistinguishable from permanent magnet

motors from the controller's point of view). Lacking a label on the motor, you can

generally tell the two apart by feel when no power is applied. Permanent magnet motors

tend to "cog" as you twist the rotor with your fingers, while variable reluctance motors

almost spin freely (although they may cog slightly because of residual magnetization in

the rotor). You can also distinguish between the two varieties with an ohmmeter.

Variable reluctance motors usually have three (sometimes four) windings, with a

common return, while permanent magnet motors usually have two independent

windings, with or without center taps. Center-tapped windings are used in unipolar

permanent magnet motors.


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Stepping motors come in a wide range of angular resolution. The coarsest motors

typically turn 90 degrees per step, while high- resolution permanent magnet motors are

commonly able to handle 1.8 or even 0.72 degrees per step. With an appropriate

controller, most permanent magnet and hybrid motors can be run in half steps, and some

controllers can handle smaller fractional steps or micro steps. For both permanent

magnet and variable reluctance stepping motors, if just one winding of the motor is

energized, the rotor (under no load) will snap to a fixed angle and then hold that angle

until the torque exceeds the holding torque of the motor, at which point, the rotor will

turn, trying to hold at each successive equilibrium point.

UNIPOLAR MOTORS

FIG 6.7 UNIPOLAR STEPPER MOTOR

Unipolar stepping motors, both Permanent magnet and hybrid stepping motors with 5 or

6 wires are usually wired as shown in the schematic in FIG 6.7, with a center tap on

each of two windings. In use, the center taps of the windings are typically wired to the

positive supply, and the two ends of each winding are alternately grounded to reverse

the direction of the field provided by that winding.

The motor cross section shown in FIG 6.7 is of a 30 degree per step permanent magnet

or hybrid motor -- the difference between these two motor types is not relevant at this

level of abstraction. Motor winding number 1 is distributed between the top and bottom

stator pole, while motor winding number 2 is distributed between the left and right

motor poles. The rotor is a permanent magnet with 6 poles, 3 souths and 3 norths,

arranged around its circumference.


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For higher angular resolutions, the rotor must have proportionally more poles. The

30- degree per step motor in the figure is one of the most common permanent magnet

motor designs, although 15 and 7.5 degree per step motors are widely available.

Permanent magnet motors with resolutions as good as 1.8 degrees per step are made,

and hybrid motors are routinely built with 3.6 and 1.8 degrees per step, with resolutions

as fine as 0.72 degrees per step available.

As shown in the figure, the current flowing from the center tap of winding 1 to terminal

a causes the top stator pole to be a north pole while the bottom stator pole is a south

pole. This attracts the rotor into the position shown. If the power to winding 1 is

removed and winding 2 is energized, the rotor will turn 30 degrees, or one step.

CONCEPTUAL MODEL OF UNIPOLAR STEPPER MOTOR

FIG 6.8CONCEPTUAL MODEL OF UNIPOLAR STEPPER MOTOR

With center taps of the windings wired to the positive supply, the terminals of each

winding are grounded, in sequence, to attract the rotor, which is indicated by the arrow

in the picture. (Remember that a current through a coil produces a magnetic field.)

This conceptual diagram depicts a 90-degree step per phase.


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In a basic "Wave Drive" clockwise sequence, winding 1a is de-activated and winding 2a

activated to advance to the next phase. The rotor is guided in this manner from one

winding to the next, producing a continuous cycle. Note that if two adjacent

windings are activated, the rotor is attracted mid-way between the two windings.

The following table describes 3 useful stepping sequences and their relative merits. The

sequence pattern is represented with 4 bits, a '1' indicates an energized winding. After

the last step in each sequence the sequence repeats. Stepping backwards through the

sequence reverses the direction of the motor.

Table of Stepping Sequences

Sequence Name Description

0001

0010

0100

1000

Wave

Drive,

One-

Phase

Consumes the least power. Only one phase is

energized at a time. Assures positional accuracy

regardless of any winding imbalance in the

motor.

0011

0110

1100

1001

Hi-

Torque,

Two-

Phase

Hi Torque - This sequence energizes two

adjacent phases, which offers an improved

torque-speed product and greater holding torque.


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0001

0011

0010

01100100

1100

1000

1001

Half-Step Half Step - Effectively doubles the

stepping resolution of the motor, but the

torque is not uniform for each step.

(Since we are effectively switchingbetween Wave Drive and Hi-Torque with

each step, torque alternates each step.)

This sequence reduces motor resonance,

which can sometimes cause a motor to

stall at a particular resonant frequency.

Note that this sequence is 8 steps.

IDENTIFYING STEPPER MOTORS

FIG 6.9STEPPER MOTOR IDENTIFICATION DIAGRAM


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Stepper motors have numerous wires, 4, 5, 6, or 8. When you turn the shaft you will

usually feel a "notched" movement. Motors with 4 wires are probably bipolar motors

and will not work with a Unipolar control circuit. The most common configurations are

pictured above. Measuring from one coil to the other will show an open circuit, since

the 2 coils are not connected.

SHORTCUT FOR FINDING THE PROPER WIRING SEQUENCE

Connect the center tap(s) to the power source (or current-Limiting resistor.) Connect the

remaining 4 wires in any pattern. If it doesn't work, you only need try these 2 swaps...

1 2 4 8 - (arbitrary first wiring order)

1 2 8 4 - switch end pair

1 8 2 4 - switch middle pair

You're finished when the motor turns smoothly in either direction. If the motor turns in

the opposite direction from desired, reverse the wires so that ABCD would become

DCBA.

HEAT CONSIDERATIONS

Over-heating can be an early indicator of a problem or need for additional heat sinking.

This is true of both the controller and motors. Components can be warm to the touch,

but not so hot that you can't leave your finger on them for a few seconds.

Motors are designed to be mounted in such a way that, heat is drawn away from the

motors. This is usually accomplished with a metal mounting bracket. Motors that are

not yet mounted may require some type of temporary heat sinking. Motors heat more

running at the LOW speeds or in Hold Mode.


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6.1.7MOSFETDRIVERCIRCUITRY:

FIG 6.10 MOSFET DRIVER CIRCUIT

When the output of the controller is high, the base current I flows in to base of the

transistor, thus providing voltage drop more then 0.7V across the Ve junction, thus the

transistor goes in to saturation mode. So the Ic is maximum and the voltage drop across

the Vce junction is zero. I.e. the input to MOSFET is zero. So the MOSFET will not

conduct and stepper motor coil will not energize.

If the output of the controller is low, the base current I is zero, thus providing

voltage drop less then 0.1V across the VBEjunction, thus the transistor goes in to cut-off

mode. So the Ic is minimum and the voltage drop across the VCEjunction is maximum.

I.e. the input to MOSFET is almost Vcc. So the MOSFET will conduct and stepper

motor coil get energized. For driving of motor coils, we used IRF540 MOSFET, which

are having low on-state resistance so that the dissipation is less, fast switching and lowthermal resistance. This MOSFET is driven by BC548 transistor. For each motor four

MOSFET sections are required.

6.1.8 SLOT SENSOR:

This device has a compact construction where the emitting-light sources and the

detectors are located face-to-face on the same optical axis. The operating wavelength is

950 nm. The detector consists of a phototransistor.


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APPLICATIONS:

Contactless optoelectronic switch, control and counter

FEATURES:

Compact construction No setting efforts case variations Polycarbonate case protected against ambient light Current Transfer Ratio (CTR) of typical 2.5%

6.1.9 SERIAL EEPROM (AT24C04):

There are several forms of memory that don't require the standard address bus and data

bus wiring. These memories are called serial memories, and they are just the ticket to

allow you to store large amounts of information without giving up those precious I/O

lines. There are several different styles of serial EEPROM. The big advantage to using a

Serial EEPROM is that the wiring only requires 4 signal lines from the CPU to operate

it.

The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serialelectrically erasable and programmable read-only memory (EEPROM) organized as

128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation are

essential. The entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V)

versions.

FIG 6.11 PIN DIAGRAM OF AT24C04 PIN DESCRIPTION


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SERIAL CLOCK (SCL) : The SCL input is used to positive edge clock data into each

EEPROM device and negative edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is

open-drain driven and may be wire-ORed with any number of other open-drain or open

collector devices.

DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address

inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight

1K/2K devices may be addressed on a single bus system (device addressing is discussed

in detail under the Device Addressing section).The AT24C04 uses the A2 and A1 inputs

for hard wire addressing and a total of four 4K.The A0 pin is a no connect and can be

connected to ground.

The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K

devices may be addressed on a single bus system. The A0 and A1 pins are no connects

and can be connected to ground.

WRITE PROTECT (WP): The AT24C01A/02/04/08A/16A has a Write Protect pin that

provides hardware data protection. The Write Protect pin allows normal Read/Write

operations when connected to ground (GND). When the Write Protect pin is connected

to VCC, the write protection feature is enabled.

6.1.10 LM358:

These devices consist of two independent, high-gain, frequency-compensated

operational amplifiers designed to operate from a single supply over a wide range of

voltages. Operation from split supplies also is possible if the difference between the two

supplies is 3 V to 30 V (3 V to 26 V for the LM2904 and LM2904Q), and VCC is at

least 1.5 V more positive than the input common-mode voltage. The low supply-current

drain is independent of the magnitude of the supply voltage. Applications include

transducer amplifiers, dc amplification blocks, and all the conventional operational

amplifier circuits that now can be implemented more easily in single-supply-voltage

systems. For example, these devices can be operated directly from the standard 5-V

supply used in digital systems and easily provide the required interface electronics

without additional 5-V supplies.


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FIG 6.12 PIN DIAGRAM OF LM358

FEATURES:

Wide Range of Supply VoltagesSingle Supply . . . 3 V to 30 V

Dual Supplies

Low Supply-Current Drain Independent of Supply Voltage . . . 0.7 mA Typ Common-Mode Input Voltage Range Low Input Bias and Offset Parameters: Input Offset Voltage . . . 3 mV Type

Input Offset Current . . . 2 nA Type

Input Bias Current . . . 20 nA Type

Differential Input Voltage Range Equal to Maximum-Rated Supply Voltage . . . 32 V (LM2904 and LM2904Q . . . 26 V) Open-Loop Differential Voltage Amplification . . . 100 V/mV Type Internal Frequency Compensation6.1.11 BUZZER:

FIG 6.13 BUZZER CIRCUIT


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When the output of the controller is high, the base current IB flows in to base of the

transistor, thus providing voltage drop more then 0.7V across the V BEjunction, thus the

transistor goes in to saturation mode. So the ICis maximum and the LED will glow and

simultaneously, buzzer gives a beep sound.

6.2 SOFTWAREDESCRIPTION

ALGORITHM:

STEP 1: INTIALISE THE MICRO-CONTROLLER AND OTHER FUNCTIONSINTIALISE I/O PORTS, STACK POINTERINTIALISE LCD AND DISPLAY TITLES

MOVE THE RACK TO HOME POSITIONREAD EEPROM

STEP 2: SCAN THE SENSOR

IF SENSOR NOT ACTIVE, DISPLAY PUT CAR ON TRACKIF ACTIVE, CHECK THE STATUS OF EACH RACK

IF RACK1 VACANT OPEN RACK1 ELSE IF RACK2 VACANT OPEN RACK2 ELSE IF RACK3 VACANT OPEN RACK3 ELSE IF RACK4 VACANT OPEN RACK4

IF NO RACK IS VACANT DISPLAY RACKS FILLED

STEP 3: OPEN THE GATE AND SCAN FOR PASSWORDIF WAITING FOR PASSWORD, STORE NUMBERS AS

PASSWORDS,SET THE STATUS OF THAT PARTICULAR RACK. (FOR ENTRY

PROCESS)ELSE IF KEY1 PRESSED, SCAN FOR PASSWORD 1.ELSE IF KEY2 PRESSED, SCAN FOR PASSWORD 2.ELSE IF KEY3 PRESSED, SCAN FOR PASSWORD 3.ELSE IF KEY4 PRESSED, SCAN FOR PASSWORD 4.

STEP 4: IF CODE ENTERED AND # IS PRESSEDSTORE THE PASSWORD AND RETURN TO STEP2 ( FOR

ENTERINGPROCESS)

IF PASSWORD MATCHED, OPEN THE CORRESPONDING RACKAND

RESET THE FLAG STATUS OF THAT RACK.(FOR LEAVINGPROCESS)

IF NOT MATCHED COUNT FALSE COUNTS AND IF GREATERTHAN 3

RING BUZZER


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PROGRAMMING:

;> TITLE : COMPACT PARKING SYSTEM;> TARGET : AT89C51;>

;---------------------------------------------------------------------------------------------------------;>;> INCLUDES :

$MOD51;>;---------------------------------------------------------------------------------------------------------;>;> HARD WARE DETAILS :;>;> DISPLAY ENABLE - P2.5

DEN BIT P2.5

;> DISPLAY READ/WRITE - P2.6DRW BIT P2.6

;> DISPLAY REG SELECT - P2.7DRS BIT P2.7

;> BUZZER CONTROL - P2.4BUZ BIT P2.4

;> SERIAL DATA I/O - P3.1SDA BIT P3.1

;> SERIAL CLOCK - P3.0SCL BIT P3.0

;> CAR ARRIVAL FB - P1.7CAF BIT P1.7

;> SENSOR FEED BACK EN - P3.3LIFTFB BIT P3.3

;> GATE OPEN LIMIT - P3.2GATEFB BIT P3.2

;>;---------------------------------------------------------------------------------------------------------;>;> FLAGS:

BUSY_CHEK BIT 00H

KEY_RLS BIT 01HINT_FLG BIT 02HENTR_FLG BIT 03HOPEN_CLS BIT 04HCLEAR_SEND BIT 05HOPERATION BIT 06HCLOSE BIT 07HRACK_V1 BIT 08HRACK_V2 BIT 09HRACK_V3 BIT 0AH


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RACK_V4 BIT 0BHKEY_LOCK BIT 10HMSG_LOCK BIT 11H

;>

;---------------------------------------------------------------------------------------------------------;>;> VARIABLES:

VACANT DATA 21HMOT_CNT1 DATA 25HMOT_CNT2 DATA 26HPRV_KEY DATA 30HKEY_PRS DATA 31HKEY_VAL1 DATA 32HKEY_VAL2 DATA 33HDSP_BUF DATA 34H

ADDR_LO DATA 36HASC_VAL DATA 37HKEY_VAL DATA 38HDSP_PTR DATA 39HMOT_COM DATA 3AHSTEP_CNT DATA 3BHFAULT_CNT DATA 3CHRACK_NO DATA 3DHMEM_PTR DATA 3EHMENU DATA 3FHPSS_WD_A1 DATA 40HPSS_WD_A2 DATA 41HPSS_WD_A3 DATA 42HPSS_WD_B1 DATA 43HPSS_WD_B2 DATA 44HPSS_WD_B3 DATA 45HPSS_WD_C1 DATA 46HPSS_WD_C2 DATA 47HPSS_WD_C3 DATA 48HPSS_WD_D1 DATA 49HPSS_WD_D2 DATA 4AH

PSS_WD_D3 DATA 4BHRACK_STS DATA 4CH

FLT_CNT DATA 4DHTMP_WD_D1 DATA 50HTMP_WD_D2 DATA 51HTMP_WD_D3 DATA 52H

;>;---------------------------------------------------------------------------------------------------------;>


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;> DEFINITIONS :COM EQU 0fch ; command ;display headersDAT EQU 0fdh ; dataEOL EQU 0feh ; end of line

FADDR EQU 0A0h ; read status registerPADDR EQU 00h ; programmable address (0..7)

;>;------------------------------------------------------------------------------------------------------------;>;> VECTOR ADDRESESS:

ORG 0000Hljmp RESET

; ORG 0003H

; reti; ORG 000BH; reti; ORG 0013H; reti; ORG 001BH; reti;>;---------------------------------------------------------------------------------------------------------;>

RESET:mov P3, #0FFH ; move all ports HIGHmov P2, #0FFHmov P1, #0FFHmov P0, #0FFHmov sp, #065H ; init stack pointermov DSP_PTR, #8BHmov FLT_CNT, #00Hmov MEM_PTR, #PSS_WD_A1mov R1, MEM_PTRsetb BUZ

; lcall DLY1mov dptr, #INITIALISElcall MESSAGElcall DLY1mov dptr, #WELCOMElcall MESSAGElcall DLYmov dptr, #COLLEGElcall MESSAGE


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lcall DLYmov dptr, #NAMElcall MESSAGElcall DLY

mov dptr, #PRESlcall MESSAGElcall DLYmov dptr, #NAME1lcall MESSAGElcall DLYmov dptr, #NAME2lcall MESSAGElcall DLYmov dptr, #HODlcall MESSAGE

lcall DLYmov dptr, #CLRSCRlcall MESSAGElcall DLY1mov dptr, #MOV_HOMElcall MESSAGE

clr INT_FLGclr ENTR_FLGmov MENU, #00Hlcall BRING_HOME_LIFTlcall READ_CARD

; mov RACK_STS, #00Hmov VACANT, RACK_STSclr OPEN_CLSclr MSG_LOCK

;>;---------------------------------------------------------------------------------------------------------;>MAIN:

orl P2, #0FH

orl P3, #0F0Hjb ENTR_FLG, DONT_DISP_1jb MSG_LOCK, DONT_DISP_1setb MSG_LOCKmov dptr, #INITIALISElcall MESSAGEmov dptr, #TRACKlcall MESSAGEmov dptr, #BLANK2lcall MESSAGE


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DONT_DISP_1:

lcall MENUSlcall OPTIONS

lcall DLY1jb CAF, MAINlcall DLY1

jb CAF, MAINlcall DLY1

jb CAF, MAINclr MSG_LOCK

jb OPEN_CLS, DONT_OPRN_RACKSsetb OPEN_CLSclr OPERATIONclr CLOSE

lcall RACK_OPEN_CLOSEDONT_OPRN_RACKS:

ljmp MAIN;>;---------------------------------------------------------------------------------------------------------;>

DISP_LET:lcall READY ; Check weather display is readysetb DRSsetb BUSY_CHEKmov P0, R7 ; place the data at port 1clr DRWnopsetb DEN ; send enable strobeclr DEN ;ret ; return to message

;>;---------------------------------------------------------------------------------------------------------;>

DISP_COM:lcall READY ; Check weather display is ready

clr DRSclr BUSY_CHEKmov P0, R7 ; place the data at port 1clr DRWnopsetb DEN ; send enable strobeclr DEN ;ret ; return to message

;>;---------------------------------------------------------------------------------------------------------;>


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MESSAGE: ; sub for sending charactors to displaypush acc

MESSAGE1:lcall READY ; Check weather display is ready

clr a ; Clr accumulatormovc a, @a+dptr ; Load accumulator with the contents of dptrinc dptr ;cjne a, #EOL, COMD ; If the data is not end of line goto comd

pop accret ; if the data is end of line stop sending

COMD: ;cjne a, #COM, DDATA ; if the data is not command goto dataclr DRS ; COMMAND MODEclr BUSY_CHEK

sjmp MESSAGE1 ; goto message again

DDATA: ;

cjne a, #DAT, SENDIT ; if the data is not data to be send gotocomd

setb DRS ; set DRS to high ( DATA MODE )setb BUSY_CHEKsjmp MESSAGE1 ; goto message again

SENDIT: ;mov p0, a ; place the data at port 1clr DRW ; set WRITE MODEnopsetb DEN ; send enable strobeclr DEN ;sjmp MESSAGE1 ; goto message again

;>;---------------------------------------------------------------------------------------------------------;>

READY: ; sub to check display busy

clr DEN ; disable display buffermov p0, #0ffh ; set port1 in read modeclr DRS ; COMMAND MODEsetb DRW ; READ MODE

WAIT: ;clr DEN ; send enable strobesetb DEN ;

jb p0.7, WAIT ; if display is not send ready signal be in loopclr DEN ; disable display buffer

jnb BUSY_CHEK, NO_DRS_SET


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setb DRSNO_DRS_SET

ret ; return to message;>

;---------------------------------------------------------------------------------------------------------;>LIFT_UP:

mov DPTR, #STEP_LIFTmov MOT_CNT1, #20D

MOT_LOOP1:mov MOT_CNT2, #210D

MOT_LOOP2:inc STEP_CNTmov A, STEP_CNTcjne A, #04h, NOTCH5

mov STEP_CNT, #00hNOTCH5:

mov A, STEP_CNTmovc A, @A+dptrmov R2, Amov A, P3anl A, #0FHorl A, R2mov P3, Alcall DLY2djnz MOT_CNT2, MOT_LOOP2djnz MOT_CNT1, MOT_LOOP1orl P3, #0F0Hret

;>;---------------------------------------------------------------------------------------------------------;>LIFT_DOWN:


MOT_LOOP3:

mov MOT_CNT2, #150DMOT_LOOP4:dec STEP_CNTmov A, STEP_CNTcjne A, #0FFh, NOTCH6mov STEP_CNT, #03h

NOTCH6:mov A, STEP_CNTmovc A, @A+dptrmov R2, Amov A, P3

anl A, #0FH


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orl A, R2mov P3, Alcall DLY2djnz MOT_CNT2, MOT_LOOP4

djnz MOT_CNT1, MOT_LOOP3orl P3, #0F0Hret

;>;---------------------------------------------------------------------------------------------------------;>GATE_DOWN:

mov DPTR, #STEP_GATEmov MOT_CNT1, #02D


MOT_LOOP6:inc STEP_CNTmov A, STEP_CNTcjne A, #04h, NOTCH4mov STEP_CNT, #00h

NOTCH4:mov A, STEP_CNTmovc A, @A+dptrmov R2, Amov A, P2anl A, #0F0Horl A, R2mov P2, Alcall DLY2lcall DLY2djnz MOT_CNT2, MOT_LOOP6djnz MOT_CNT1, MOT_LOOP5orl P2, #0FHret

;>;---------------------------------------------------------------------------------------------------------

;>

GATE_UP:mov DPTR, #STEP_GATEmov MOT_CNT1, #02D


MOT_LOOP8:dec STEP_CNTmov A, STEP_CNTcjne A, #0FFh, NOTCH3


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mov STEP_CNT, #03hNOTCH3:

mov A, STEP_CNTmovc A, @A+dptr

mov R2, Amov A, P2anl A, #0F0Horl A, R2mov P2, Alcall DLY2lcall DLY2

jnb GATEFB, SKIP_STOP_GMret

SKIP_STOP_GM:djnz MOT_CNT2, MOT_LOOP8

djnz MOT_CNT1, MOT_LOOP7orl P2, #0FHret

;>;---------------------------------------------------------------------------------------------------------;>RACK_OPEN_CLOSE:

jnb OPERATION, SKIP_SENCE_SEQ1 ; RACK OPENING SEQUENCEljmp SKIP_SENCE_SEQ

SKIP_SENCE_SEQ1:mov A, RACK_STS ; CHECK WEATHER RACKS ARE EMPTYanl A, #0FHcjne A, #0FH, RACK_NOT_EMPTYmov DPTR, #NOT_EMPTlcall MESSAGElcall DLYljmp SKIP_SENCE_SEQ

RACK_NOT_EMPTY:jb RACK_V1, DONT_MOVE_LIFT1Asetb RACK_V1orl RACK_STS, #01H ; load_rack 1 as fill

mov RACK_NO, #01Hmov DPTR, #RACK_1lcall MESSAGElcall DLY

; mov MOT_COM, #01H; lcall MOT_CNTRL

ljmp DONT_MOVE_LIFT1DDONT_MOVE_LIFT1A:

jb RACK_V2, DONT_MOVE_LIFT1Bsetb RACK_V2orl RACK_STS, #02H ; load_rack 2 as fill


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mov RACK_NO, #02Hmov DPTR, #RACK_2lcall MESSAGEmov MOT_COM, #01H

lcall MOT_CNTRLljmp DONT_MOVE_LIFT1D

DONT_MOVE_LIFT1B:jb RACK_V3, DONT_MOVE_LIFT1Csetb RACK_V3orl RACK_STS, #04H ; load_rack 3 as fillmov RACK_NO, #03Hmov DPTR, #RACK_3lcall MESSAGEmov MOT_COM, #01Hlcall MOT_CNTRL

mov MOT_COM, #01Hlcall MOT_CNTRLljmp DONT_MOVE_LIFT1D

DONT_MOVE_LIFT1C:jb RACK_V4, DONT_MOVE_LIFT1Dsetb RACK_V4orl RACK_STS, #08H ; load_rack 4 as fillmov RACK_NO, #04Hmov DPTR, #RACK_4lcall MESSAGEmov MOT_COM, #01Hlcall MOT_CNTRLmov MOT_COM, #01Hlcall MOT_CNTRLmov MOT_COM, #01Hlcall MOT_CNTRL

DONT_MOVE_LIFT1D:lcall DLY1mov dptr, #GATE_OPENlcall MESSAGEmov MOT_COM, #03H ; OPENING GATE WHEN CAR

ARRIVALlcall MOT_CNTRLlcall DLY1

setb OPERATION ; STOP OPENING RACKSsetb KEY_LOCKmov MENU, #00Hmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCR


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lcall MESSAGEmov DPTR, #ASK_COD ; ASK FOR PASS WORDlcall MESSAGEsetb ENTR_FLG ; ENABLE KEY BOARD FOR ENTERING

VALUES

mov A, RACK_NOcjne A, #01H, LOAD_MPT1mov MEM_PTR, #PSS_WD_A1

LOAD_MPT1:cjne A, #02H, LOAD_MPT2mov MEM_PTR, #PSS_WD_B1

LOAD_MPT2:cjne A, #03H, LOAD_MPT3mov MEM_PTR, #PSS_WD_C1

LOAD_MPT3:cjne A, #04H, LOAD_MPT4mov MEM_PTR, #PSS_WD_D1

LOAD_MPT4:mov R1, MEM_PTRmov DSP_PTR, #8BH

SKIP_SENCE_SEQ:;----------------------------------------------------------------------------

jnb CLOSE, SKIP_CLOSE_RACK ; CLOSING SEQUENCE

clr CLOSElcall DLY1clr KEY_LOCKmov dptr, #GATE_CLOlcall MESSAGEmov MOT_COM, #04H ; GATE CLOSING WHEN CAR PARKEDlcall MOT_CNTRL

mov A, RACK_NOcjne A, #01H, MOVE_BACK_RACK1

mov DPTR, #RACK_C1

lcall MESSAGE; mov MOT_COM, #02Hlcall BRING_HOME_LIFT

MOVE_BACK_RACK1:mov A, RACK_NOcjne A, #02H, MOVE_BACK_RACK2mov DPTR, #RACK_C2lcall MESSAGElcall BRING_HOME_LIFT

MOVE_BACK_RACK2:mov A, RACK_NO


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cjne A, #03H, MOVE_BACK_RACK3mov DPTR, #RACK_C3lcall MESSAGElcall BRING_HOME_LIFT

MOVE_BACK_RACK3:mov A, RACK_NOcjne A, #04H, MOVE_BACK_RACK4mov DPTR, #RACK_C4lcall MESSAGElcall BRING_HOME_LIFT

MOVE_BACK_RACK4:

SKIP_CLOSE_RACK:ret

;>

;---------------------------------------------------------------------------------------------------------;>MOT_CNTRL:

mov A, MOT_COMcjne A, #01H, MOVE_LIFT_UPlcall LIFT_UP

MOVE_LIFT_UP:mov A, MOT_COMcjne A, #02H, MOVE_LIFT_DOWNlcall LIFT_DOWN

MOVE_LIFT_DOWN:mov A, MOT_COMcjne A, #03H, MOVE_GATE_UPlcall GATE_UP

MOVE_GATE_UP:mov A, MOT_COMcjne A, #04H, MOVE_GATE_DOWNlcall GATE_DOWN

MOVE_GATE_DOWN:mov MOT_COM, #00h

ret ; return to message

;>;---------------------------------------------------------------------------------------------------------;>BRING_HOME_LIFT:



MOT_LOOP10:inc STEP_CNTmov A, STEP_CNT


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cjne A, #04h, NOTCH2mov STEP_CNT, #00h

NOTCH2:mov A, STEP_CNT

movc A, @A+dptrmov R2, Amov A, P3anl A, #0FHorl A, R2mov P3, Alcall DLY2djnz MOT_CNT2, MOT_LOOP10djnz MOT_CNT1, MOT_LOOP9

MOVE_MOT_DOWN:

mov DPTR, #STEP_LIFTdec STEP_CNTmov A, STEP_CNTcjne A, #0FFh, NOTCH1mov STEP_CNT, #03h

NOTCH1:mov A, STEP_CNTmovc A, @A+dptrmov R2, Amov A, P3anl A, #0FHorl A, R2mov P3, Alcall DLY2

jnb LIFTFB, MOVE_MOT_DOWN

mov MOT_CNT1, #02DMOT_LOOP11:mov MOT_CNT2, #75DMOT_LOOP12:

dec STEP_CNT

mov A, STEP_CNTcjne A, #0FFh, NOTCH0mov STEP_CNT, #03h

NOTCH0:mov A, STEP_CNTmovc A, @A+dptrmov R2, Amov A, P3anl A, #0FHorl A, R2


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mov P3, Alcall DLY2djnz MOT_CNT2, MOT_LOOP12djnz MOT_CNT1, MOT_LOOP11

orl P3, #0F0Hret ; return to message

;>;---------------------------------------------------------------------------------------------------------;>SELECT_RACKS:

mov A, MENUcjne A, #01H, DONT_SELECT_RACK1clr RACK_V1anl RACK_STS, #0FEH ; load_rack 1 as fillmov RACK_NO, #01H

mov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGEmov DPTR, #RACK_1lcall MESSAGElcall DLYmov dptr, #GATE_OPENlcall MESSAGEmov MOT_COM, #03H ; OPENING GATE WHEN CAR

ARRIVALlcall MOT_CNTRLlcall DLYlcall DLYlcall DLYlcall DLYmov dptr, #GATE_CLOSlcall MESSAGEmov MOT_COM, #04H ; GATE CLOSING WHEN CAR

PARKEDlcall MOT_CNTRL

mov DPTR, #RACK_C1lcall MESSAGElcall BRING_HOME_LIFTmov DPTR, #REMOVElcall MESSAGElcall DLYlcall DLYlcall DLYret ; return to message


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DONT_SELECT_RACK1:mov A, MENUcjne A, #02H, DONT_SELECT_RACK2clr RACK_V2

anl RACK_STS, #0FDH ; load_rack 1 as fillmov RACK_NO, #02Hmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGEmov DPTR, #RACK_2lcall MESSAGEmov MOT_COM, #01H ; OPENING RACKlcall MOT_CNTRLmov dptr, #GATE_OPEN

lcall MESSAGEmov MOT_COM, #03H ; OPENING GATElcall MOT_CNTRLlcall DLYlcall DLYlcall DLYlcall DLYmov dptr, #GATE_CLOSlcall MESSAGEmov MOT_COM, #04H ; GATE CLOSING WHEN CAR

PARKEDlcall MOT_CNTRLmov DPTR, #RACK_C2lcall MESSAGElcall BRING_HOME_LIFTmov DPTR, #REMOVElcall MESSAGElcall DLYlcall DLYlcall DLYret ; return to message

DONT_SELECT_RACK2:mov A, MENUcjne A, #03H, DONT_SELECT_RACK3clr RACK_V3anl RACK_STS, #0FBH ; load_rack 1 as fillmov RACK_NO, #03Hmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGEmov DPTR, #RACK_3


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lcall MESSAGEmov MOT_COM, #01H ; OPENING RACKlcall MOT_CNTRLmov MOT_COM, #01H ; OPENING RACK

lcall MOT_CNTRLmov dptr, #GATE_OPENlcall MESSAGEmov MOT_COM, #03H ; OPENING GATElcall MOT_CNTRLlcall DLYlcall DLYlcall DLYlcall DLYmov dptr, #GATE_CLOSlcall MESSAGE

mov MOT_COM, #04H ; GATE CLOSING WHEN CARPARKED

lcall MOT_CNTRLmov DPTR, #RACK_C3lcall MESSAGElcall BRING_HOME_LIFTmov DPTR, #REMOVElcall MESSAGElcall DLYlcall DLYlcall DLYret ; return to message

DONT_SELECT_RACK3:mov A, MENUcjne A, #04H, DONT_SELECT_RACK4clr RACK_V4anl RACK_STS, #0F7H ; load_rack 1 as fillmov RACK_NO, #04Hmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCR

lcall MESSAGEmov DPTR, #RACK_4lcall MESSAGEmov MOT_COM, #01H ; OPENING RACKlcall MOT_CNTRLmov MOT_COM, #01H ; OPENING RACKlcall MOT_CNTRLmov MOT_COM, #01H ; OPENING RACKlcall MOT_CNTRLmov dptr, #GATE_OPEN


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lcall MESSAGEmov MOT_COM, #03H ; OPENING GATElcall MOT_CNTRLlcall DLY

lcall DLYlcall DLYlcall DLYmov dptr, #GATE_CLOSlcall MESSAGEmov MOT_COM, #04H ; GATE CLOSING WHEN CAR PARKEDlcall MOT_CNTRLmov DPTR, #RACK_C4lcall MESSAGElcall BRING_HOME_LIFTmov DPTR, #REMOVE

lcall MESSAGElcall DLYlcall DLYlcall DLY

DONT_SELECT_RACK4:ret ; return to message

;>;---------------------------------------------------------------------------------------------------------;>

DLY:mov r4, #0Fh

GONE: mov r5, #00hOUT: mov r6, #00hIN: djnz r6, IN

djnz r5, OUTdjnz r4, GONEret

DLY1:mov r4, #07h

GONE1: mov r5, #04hOUT1: mov r6, #00h

IN1: djnz r6, IN1djnz r5, OUT1djnz r4, GONE1ret

DLY2:mov r4, #03h

GONE2: mov r5, #04hOUT2: mov r6, #075hIN2: djnz r6, IN2

djnz r5, OUT2djnz r4, GONE2

ret


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;>;------------------------------------------------------------------------------------------------------------;>

KBREAD: ; key board submov P1, #0EFHnopmov A, P1anl A, #0FHmov KEY_VAL1, A

mov P1, #0DFHnopmov A, P1anl A, #0FH

swap Aorl KEY_VAL1, A

mov P1, #0BFHnopmov A, P1anl A, #0FHmov KEY_VAL2, A

mov PRV_KEY, KEY_PRSmov A, KEY_VAL1

cjne A, #0FEH, NOT_KEY1mov KEY_PRS, #01Hajmp CHEK_BOUNSE

NOT_KEY1:cjne A, #0FDH, NOT_KEY2mov KEY_PRS, #04Hajmp CHEK_BOUNSE

NOT_KEY2:cjne A, #0FBH, NOT_KEY3

mov KEY_PRS, #07Hajmp CHEK_BOUNSENOT_KEY3:

cjne A, #0F7H, NOT_KEY4mov KEY_PRS, #0AHajmp CHEK_BOUNSE

NOT_KEY4:cjne A, #0EFH, NOT_KEY5mov KEY_PRS, #02Hajmp CHEK_BOUNSE


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NOT_KEY5:cjne A, #0DFH, NOT_KEY6mov KEY_PRS, #05Hajmp CHEK_BOUNSE

NOT_KEY6:cjne A, #0BFH, NOT_KEY7mov KEY_PRS, #08Hajmp CHEK_BOUNSE

NOT_KEY7:cjne A, #7FH, NOT_KEY8mov KEY_PRS, #00Hajmp CHEK_BOUNSE

NOT_KEY8:mov A, KEY_VAL2cjne A, #0EH, NOT_KEY9

mov KEY_PRS, #03Hajmp CHEK_BOUNSE

NOT_KEY9:cjne A, #0DH, NOT_KEY0mov KEY_PRS, #06Hajmp CHEK_BOUNSE

NOT_KEY0:cjne A, #0BH, NOT_KEYSmov KEY_PRS, #09Hajmp CHEK_BOUNSE

NOT_KEYS:cjne A, #07H, NOT_KEYHmov KEY_PRS, #0BHajmp CHEK_BOUNSE

NOT_KEYH:mov KEY_PRS, #0FFH

CHEK_BOUNSE:mov A, KEY_PRScjne A, PRV_KEY, SET_BOUNCE

SET_BOUNCE:jc SET_BOUNCE1

clr KEY_RLSretSET_BOUNCE1:

setb KEY_RLSret

;>;------------------------------------------------------------------------------------------------------------;>


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MENUS: ; key board sub

lcall KBREAD ; READ KEYjb KEY_RLS, GOTO_DESELECT ; IF NOT KEYHIT JUMP

retGOTO_DESELECT:

mov KEY_VAL, KEY_PRS ; SAVE PRESENT KEYmov A, KEY_VAL ;cjne A, #0AH, GOTO_LAST ; COMPARE BOTH KEY VALS

GOTO_LAST:jc READ_NUM_KEYSret

READ_NUM_KEYS:jb ENTR_FLG, DISPLAY_CODEret

DISPLAY_CODE:mov A, KEY_VALcjne A, #01H, GOTO_KEY2 ; IF KEY != 1 THEN JUMP NEXT

mov ASC_VAL, #31H ; KEY = '1'GOTO_KEY2:

cjne A, #02H, GOTO_KEY3 ; IF KEY != 1 THEN JUMP NEXTmov ASC_VAL, #32H ; KEY = '2'

GOTO_KEY3:cjne A, #03H, GOTO_KEY4 ; IF KEY != 1 THEN JUMP NEXT







mov ASC_VAL, #37H ; KEY = '7'GOTO_KEY8:cjne A, #08H, GOTO_KEY9 ; IF KEY != 1 THEN JUMP NEXT




mov ASC_VAL, #30H ; KEY = '0'


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GOTO_KEY1:; cjne A, #0AH, GOTO_KEYA ; IF KEY != 1 THEN JUMP NEXT; mov ASC_VAL, #'A' ; KEY = '0'; GOTO_KEYA:

; cjne A, #0BH, GOTO_KEYB ; IF KEY != 1 THEN JUMP NEXT; mov ASC_VAL, #'B' ; KEY = '0'; GOTO_KEYB:; cjne A, #0CH, GOTO_KEYC ; IF KEY != 1 THEN JUMP NEXT; mov ASC_VAL, #30H ; KEY = '0'; GOTO_KEYC:; cjne A, #0DH, GOTO_KEYD ; IF KEY != 1 THEN JUMP NEXT; mov ASC_VAL, #30H ; KEY = '0'; GOTO_KEYD:; cjne A, #0EH, GOTO_KEYE ; IF KEY != 1 THEN JUMP NEXT; mov ASC_VAL, #30H ; KEY = '0'

; GOTO_KEYE:; cjne A, #0FH, GOTO_KEYF ; IF KEY != 1 THEN JUMP NEXT; mov ASC_VAL, #30H ; KEY = '0'; GOTO_KEYF:

mov A, KEY_VALmov @R1, Amov r7, DSP_PTRlcall DISP_COMmov R7, ASC_VALlcall DISP_LETinc R1inc DSP_PTRmov A, DSP_PTRcjne A, #8EH, SKIP_RE_ADRmov DSP_PTR, #8BHmov R1, MEM_PTR

SKIP_RE_ADR:ret

;>;---------------------------------------------------------------------------------------------------------;>

OPTIONS:jnb KEY_RLS, TRY_SEL_2 ; IF NOT KEYHIT JUMPmov A, KEY_VAL ;cjne A, #0AH, TRY_SEL_1ajmp GOTO_STRTM

TRY_SEL_1:mov A, KEY_VAL ;cjne A, #0BH, TRY_SEL_2ajmp GOTO_SENDM


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TRY_SEL_2:

jb KEY_LOCK, GET_RACK_4

mov A, KEY_VAL ;

cjne A, #01H, GET_RACK_1ljmp GOTO_OPEN_RACK1

GET_RACK_1:mov A, KEY_VAL ;cjne A, #02H, GET_RACK_2ljmp GOTO_OPEN_RACK2

GET_RACK_2:mov A, KEY_VAL ;cjne A, #03H, GET_RACK_3ljmp GOTO_OPEN_RACK3

GET_RACK_3:

mov A, KEY_VAL ;cjne A, #04H, GET_RACK_4ljmp GOTO_OPEN_RACK4

GET_RACK_4:ret

GOTO_STRTM:clr RACK_V1clr RACK_V2clr RACK_V3clr RACK_V4mov RACK_STS, #00Hmov FLT_CNT, #00Hmov MENU, #00Hmov PSS_WD_A1, #00Hmov PSS_WD_A2, #00Hmov PSS_WD_A3, #00Hmov PSS_WD_B1, #00Hmov PSS_WD_B2, #00Hmov PSS_WD_B3, #00Hmov PSS_WD_C1, #00H

mov PSS_WD_C2, #00Hmov PSS_WD_C3, #00Hmov PSS_WD_D1, #00Hmov PSS_WD_D2, #00Hmov PSS_WD_D3, #00Hlcall BYTE_FILLret

;------------------------------------------


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GOTO_SENDM:mov A, MENUxrl A, #00H

jnz COMPARE_CODES

lcall BYTE_FILLclr OPEN_CLSmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGEclr ENTR_FLGsetb OPERATIONsetb CLOSElcall RACK_OPEN_CLOSEret

;. . . . . . . . . . . . . . . . . . . . . . .COMPARE_CODES:

mov A, MENUcjne A, #01H, COMPARE_CODE1mov A, PSS_WD_A3cjne A, TMP_WD_D3, NOT_MATCHED_A1mov A, PSS_WD_A2cjne A, TMP_WD_D2, NOT_MATCHED_A1mov A, PSS_WD_A1cjne A, TMP_WD_D1, NOT_MATCHED_A1lcall SELECT_RACKSsetb BUZmov FLT_CNT, #00Hljmp COMPARE_CODE1

NOT_MATCHED_A1:mov DPTR, #INVALID_CODlcall MESSAGElcall DLYinc FLT_CNTmov a, FLT_CNTcjne A, #03H, COMPARE_CODE1A

COMPARE_CODE1A:jc COMPARE_CODE1clr BUZlcall DLYsetb BUZ


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COMPARE_CODE1:;. . . . . . . . . . . . . . . . . . . . . . .

mov A, MENUcjne A, #02H, COMPARE_CODE2

mov A, PSS_WD_B3cjne A, TMP_WD_D3, NOT_MATCHED_B1mov A, PSS_WD_B2cjne A, TMP_WD_D2, NOT_MATCHED_B1mov A, PSS_WD_B1cjne A, TMP_WD_D1, NOT_MATCHED_B1lcall SELECT_RACKSsetb BUZmov FLT_CNT, #00Hljmp COMPARE_CODE2

NOT_MATCHED_B1:mov DPTR, #INVALID_CODlcall MESSAGElcall DLYinc FLT_CNTmov a, FLT_CNTcjne A, #03H, COMPARE_CODE2A

COMPARE_CODE2A:jc COMPARE_CODE2clr BUZlcall DLY

setb BUZCOMPARE_CODE2:;. . . . . . . . . . . . . . . . . . . . . . .

mov A, MENUcjne A, #03H, COMPARE_CODE3mov A, PSS_WD_C3cjne A, TMP_WD_D3, NOT_MATCHED_C1mov A, PSS_WD_C2cjne A, TMP_WD_D2, NOT_MATCHED_C1mov A, PSS_WD_C1cjne A, TMP_WD_D1, NOT_MATCHED_C1

lcall SELECT_RACKSsetb BUZmov FLT_CNT, #00Hljmp COMPARE_CODE3

NOT_MATCHED_C1:mov DPTR, #INVALID_CODlcall MESSAGElcall DLYinc FLT_CNTmov a, FLT_CNT

cjne A, #03H, COMPARE_CODE3A


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COMPARE_CODE3A:jc COMPARE_CODE3clr BUZlcall DLY

setb BUZCOMPARE_CODE3:

;. . . . . . . . . . . . . . . . . . . . . . .mov A, MENUcjne A, #04H, COMPARE_CODE4mov A, PSS_WD_D3cjne A, TMP_WD_D3, NOT_MATCHED_D1mov A, PSS_WD_D2cjne A, TMP_WD_D2, NOT_MATCHED_D1mov A, PSS_WD_D1cjne A, TMP_WD_D1, NOT_MATCHED_D1lcall SELECT_RACKSsetb BUZmov FLT_CNT, #00Hljmp COMPARE_CODE4

NOT_MATCHED_D1:mov DPTR, #INVALID_CODlcall MESSAGElcall DLYinc FLT_CNTmov a, FLT_CNT

cjne A, #03H, COMPARE_CODE4ACOMPARE_CODE4A:jc COMPARE_CODE4clr BUZlcall DLYsetb BUZ

COMPARE_CODE4:clr ENTR_FLGmov MENU, #00HRET

;. . . . . . . . . . . . . . . . . . . . . . .

;------------------------------------------GOTO_OPEN_RACK1:

clr MSG_LOCKmov A, MENUcjne A, #00H, SKIP_ENTR_MENU1mov MENU, #01Hsetb ENTR_FLG


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mov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGE

mov DPTR, #ASK_COD ; ASK FOR PASS WORDlcall MESSAGEmov MEM_PTR, #TMP_WD_D1mov R1, MEM_PTR

SKIP_ENTR_MENU1:ret

;------------------------------------------GOTO_OPEN_RACK2:

clr MSG_LOCKmov A, MENUcjne A, #00H, SKIP_ENTR_MENU2mov MENU, #02Hsetb ENTR_FLGmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGEmov DPTR, #ASK_COD ; ASK FOR PASS WORDlcall MESSAGEmov MEM_PTR, #TMP_WD_D1mov R1, MEM_PTR

SKIP_ENTR_MENU2:ret;------------------------------------------

GOTO_OPEN_RACK3:clr MSG_LOCKmov A, MENUcjne A, #00H, SKIP_ENTR_MENU3mov MENU, #03Hsetb ENTR_FLGmov dptr, #INITIALISElcall MESSAGE

mov DPTR, #CLRSCRlcall MESSAGEmov DPTR, #ASK_COD ; ASK FOR PASS WORDlcall MESSAGEmov MEM_PTR, #TMP_WD_D1mov R1, MEM_PTR

SKIP_ENTR_MENU3:ret

;------------------------------------------


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GOTO_OPEN_RACK4:clr MSG_LOCKmov A, MENUcjne A, #00H, SKIP_ENTR_MENU4

mov MENU, #04Hsetb ENTR_FLGmov dptr, #INITIALISElcall MESSAGEmov DPTR, #CLRSCRlcall MESSAGEmov DPTR, #ASK_COD ; ASK FOR PASS WORDlcall MESSAGEmov MEM_PTR, #TMP_WD_D1mov R1, MEM_PTR

SKIP_ENTR_MENU4:ret

;>;------------------------------------------------------------------------------------------------------------;>

READ_CARD:lcall VERIFY_BYTE_FILLret

;>;---------------------------------------------------------------------------------------------------------

;>BYTE_FILL:

; Fill every byte in an AT24Cxx with the same value.; Writes one address at a time (page mode is not used).; Returns CY set to indicate write timeout.; Destroys A, B, DPTR, XDATA, ADDR_HI:ADDR_LO.

push dplpush dphpush acc

push bmov R1, #PSS_WD_A1mov dptr, #0000h ; initialize address pointer

BF51:mov ADDR_LO, dpl ; set up addressmov b, #40h ; retry counter

BF52:mov a, #PADDR ; programmable addresslcall WRITE_BYTE ; try to write

jnc BF53 ; jump if write OKdjnz b, BF52 ; try again


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setb c ; set timeout error flagajmp BF54 ; exit

BF53:inc R1

inc dptr ; advance address pointercjne R1, #PSS_WD_A1 + 14d, BF51 ; jump if not lastclr c ; clear error flag

BF54:pop bpop accpop dphpop dplret

;>;---------------------------------------------------------------------------------------------------------;>VERIFY_BYTE_FILL:

; Verify that all bytes in an AT24Cxx match a fill value.; Reads and verifies one byte at a time (page mode is not used).; Performs a Random Read function to initialize the internal; address counter and checks the contents of the first address.; Then performs multiple Current Address Read functions to step; through the remaining addressess.; Returns CY set to indicate read timeout or compare fail.

; Destroys A, B, DPTR.push dplpush dphpush accpush b

mov r0, #PSS_WD_A1mov dptr, #0000h ; initialize address pointer/countermov ADDR_LO, dpl ; set up addressmov b, #20h ; retry counter

VB81:

mov a, #PADDR ; programmable addresslcall READ_RANDOM ; try to readmov @r0, a ; jump if compare errorinc r0

jnc VB82 ; jump if read OKdjnz b, VB81 ; try againljmp VB86 ; set error flag and exit

VB82:mov a, #PADDR


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lcall READ_CURRENTmov @r0, a ; jump if compare errorinc r0inc dptr ; advance address pointer

cjne R0, #PSS_WD_A1 + 14d, VB82 ; jump if not lastclr c ; clear error flagajmp VB87 ; exit

VB86:setb c ; set error flag

VB87:pop bpop accpop dphpop dpl

ret;>;---------------------------------------------------------------------------------------------------------;>WRITE_BYTE:

; AT24Cxx Byte Write function.; Called with programmable address in A, byte address in; register pair ADDR_HI:ADDR_LO, data in register XDATA.; Does not wait for write cycle to complete.; Returns CY set to indicate that the bus is not available; or that the addressed device failed to acknowledge.; Destroys A.

lcall STARTjc WB49 ; abort if bus not available

rl a ; programmable address to bits 3:1orl a, #FADDR ; add fixed addressclr acc.0 ; specify write operation

lcall SHOUT ; send device addressjc WB48 ; abort if no acknowledge

mov a, ADDR_LO ; send low byte of addresslcall SHOUT ;

jc WB48 ; abort if no acknowledge

mov a, @R1 ; get datalcall SHOUT ; send data

jc WB48 ; abort if no acknowledge


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clr c ; clear error flagWB48:

lcall STOPWB49:

ret;>;---------------------------------------------------------------------------------------------------------;>READ_CURRENT:

; AT24Cxx Current Address Read function.; Called with programmable address in A. Returns data in A.; Returns CY set to indicate that the bus is not available; or that the addressed device failed to acknowledge.

lcall STARTjc RC45 ; abort if bus not available

rl a ; programmable address to bits 3:1orl a, #FADDR ; add fixed addresssetb acc.0 ; specify read operationlcall SHOUT ; send device address

jc RC44 ; abort if no acknowledge

lcall SHIN ; receive data byte

lcall NAK ; do not acknowledge byteclr c ; clear error flagRC44:

lcall STOPRC45:

ret;>;---------------------------------------------------------------------------------------------------------;>READ_RANDOM:

; AT24Cxx Random Read function.; Called with programmable address in A, byte address in; register pair ADDR_HI:ADDR_LO. Returns data in A.; Returns CY set to indicate that the bus is not available; or that the addressed device failed to acknowledge.

push bmov b, a ; save copy of programmable address

; Send dummy write command to set internal address.


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lcall STARTjc RR47 ; abort if bus not available

rl a ; programmable address to bits 3:1

orl a, #FADDR ; add fixed addressclr acc.0 ; specify write operationlcall SHOUT ; send device address

jc RR46 ; abort if no acknowledge

mov a, ADDR_LO ; send low byte of addresslcall SHOUT ;

jc RR46 ; abort if no acknowledge

; Call Current Address Read function.

mov a, b ; get programmable addresslcall READ_CURRENTajmp RR47 ; exit

RR46:lcall STOP

RR47:pop b

ret;>

;---------------------------------------------------------------------------------------------------------;>START:

; Send START, defined as high-to-low SDA with SCL high.; Return with SCL, SDA low.; Returns CY set if bus is not available.

setb SDAsetb SCL

; Verify bus available.

jnb SDA, S40 ; jump if not highjnb SCL, S40 ; jump if not high

nop ; enforce setup delay and cycle delaynopclr SDAnop ; enforce hold delay


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nop ;nop ;nop ;nop ;

nop ;clr SCL

clr c ; clear error flagajmp S41

S40:setb c ; set error flag

S41:ret

;>;---------------------------------------------------------------------------------------------------------

;>STOP:

; Send STOP, defined as low-to-high SDA with SCL high.; SCL expected low on entry. Return with SCL, SDA high.

clr SDAnop ; enforce SCL low and data setupnopnop ; enforce SCL low and data setupnopsetb SCLnop ; enforce setup delaynop ;nop ;nop ;nop ;nop ;setb SDAret

;>

;---------------------------------------------------------------------------------------------------------;>SHIN:

; Shift in a byte from the AT24Cxx, most significant bit first.; SCL expected low on entry. Return with SCL low.; Returns received data byte in A.

setb SDA ; make SDA an inputpush bmov b, #08H ; bit count


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SH43:nop ; enforce SCL low and data setupnop ;nop ;

nop ;nop ;

setb SCL ; raise clocknop ; enforce SCL highnop ;nop ;nop ;mov c, SDA ; input bitrlc a ; move bit into byteclr SCL ; drop clock

djnz b, SH43 ; next bit

pop b

ret;>;---------------------------------------------------------------------------------------------------------;>SHOUT:

; Shift out a byte to the AT24Cxx, most significant bit first.; SCL, SDA expected low on entry. Return with SCL low.; Called with data to send in A.; Returns CY set to indicate failure by slave to acknowledge.; Destroys A.

push bmov b, #08H ; bit counter

SO42:rlc a ; move bit into CY

mov SDA, c ; output bitnop ; enforce SCL low and data setupnop ; enforce SCL low and data setupsetb SCL ; raise clocknop ; enforce SCL highnop ;nop ;nop ;nop ;nop ;


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clr SCL ; drop clockdjnz b, SO42 ; next bit

setb SDA ; release SDA for ACK

nop ; enforce SCL low and tAAnop ;setb SCL ; raise ACK clocknop ; enforce SCL highnop ;nop ;nop ;mov c, SDA ; get ACK bitclr SCL ; drop ACK clock

pop b

ret;>;---------------------------------------------------------------------------------------------------------;>

NAK:

; Clock out a negative acknowledge bit (high).; SCL expected low on entry. Return with SCL low, SDA high.

setb SDA ; NAK bitnop ; enforce SCL low and data setupnop ;nop ;setb SCL ; raise clocknop ; enforce SCL highnop ;nop ;nop ;nop ;nop ;nop ;

clr SCL ; drop clockret

;>;---------------------------------------------------------------------------------------------------------;>;> ROM TABLE AREA;>


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INITIALISE:db COM, 30h, 30h, 30h, 30h, 3ch, 06h, 0ch, 01h, EOL

NAME:db COM, 80h, DAT, 'COMPACT PARKING', COM, 0C0H, DAT,'

SYSTEM ', EOLWELCOME:

db COM, 80h, DAT, '**** WELCOME ***', EOLCOLLEGE:

db COM, 80h, DAT, ' S.S.C.E.T. ', COM, 0C0H, DAT,'LANKAPALLI ', EOL

PRES:db COM, 80h, DAT, 'SUBMITTED BY.. ', COM, 0C0H, DAT,'

', EOLNAME1:

db COM, 80h, DAT, 'V.SAI ANUSHA ', COM, 0C0H,DAT,'G.L.KUMARI ', EOL

NAME2:db COM, 80h, DAT, 'Y.NIHARIKA ', COM, 0C0H,

DAT,'Y.SRILEKHA ', EOLHOD:

db COM, 80h, DAT, 'OUR GUIDE&HOD.. ', COM, 0C0H,DAT,'YRK.PARAMA HAMSA', EOL

ASK_COD:db COM, 80h, DAT, 'ENTER CODE: ', EOL

INVALID_COD:

db COM, 80h, DAT, 'INVALID CODE.. ', EOLNOT_LOD:db COM, 080h, DAT, 'INVALID CODE.. ', EOL

RACK_1:db COM, 080h, DAT, 'OPENING RACK 1..', EOL




RACK_C1:db COM, 080h, DAT, 'CLOSING RACK 1..', EOL




TRACK:db COM, 080h, DAT, 'PUT CAR ON TRACK', EOL


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GATE_OPEN:db COM, 080h, DAT, 'GATE OPENING ', EOL

GATE_CLOS:db COM, 080h, DAT, 'GATE CLOSING... ', EOL

MOV_HOME:db COM, 080h, DAT, 'MOVING TO HOME..', EOL

NOT_EMPT:db COM, 080h, DAT, 'RACKS FILLED ', EOL

REMOVE:db COM, 080h, DAT, 'VACANT THE TRACK', EOL

BLANK2:db COM, 0C0h, DAT, ' ', EOL

CLRSCR:db COM, 01h, EOL

;>;---------------------------------------------------------------------------------------------------------;>

ORG 0D00H

STEP_LIFT:db 09CHdb 05CHdb 06CHdb 0ACH

STEP_GATE:db 19Hdb 15Hdb 16Hdb 1AH

END


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CHAPTER 7

FABRICATION MODEL

A) HARDWARE CIRCUITRY

B) RACK MECHANISM C) OVERALL VIEW

FIG.7.FABRICATION MODEL


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CHAPTER 8

REAL TIME APPLICATION

This system is extensively in use in Japan and Singapore and it can be referred to as

Puzzle Parkingand requires minimum space.. This system involves the arrangement

of the racks both horizontally and vertically. A car will be placed on a slot and is

controlled by a computer that keeps the track of all vacant slots. In real time application

Hydraulic lifts are used to lift the cars and the computer guides the lifts to place them in

the vacant slot.

The Municipal Corporation of Delhi (MCD) has decided to construct multi-levelparking lots in Paharganj and Karol Bagh that will have minimum human involvement.

It has got Rs 4.8 crore for the Paharganj parking that can hold 500 cars and Rs 5 crore

for the one at Karol Bagh that can accommodate 300 cars.

In real time application the specifications can be considered as follows:

Mode of drive Motor drive

Size of car

(LWH)5000mm1850mm1550mm

Weight of car 2000Kg

Lifting motor

power15KW

Lifting speed 70m/min

Sliding speed 8m/min

Electricity AC380V,50Hz,3phases 5 wires system

Electricity power 20kw

Safeguard devices Ejection-type anti-fall device

Warning devices Yes

Frame

composition

Columns and beams are made of H type steel, Channel steel, angle steel

and square pipes


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CHAPTER 9

ADVANTAGES OF THE SYSTEM

Uses the most modern and latest technology, ensuring long life. The life span and

functioning of all the mechanical parts can be guaranteed for over 20 years, if

maintained properly by the user.

Reduced ground space requirement as compared to conventional parking systems. Low parking and retrieval times 90 seconds to 150 seconds per car depending onthe configuration.

Reduced noise levels in such systems, when compared to conventional parking lotsas car engines are not running while being parked in and out.

Minimal maintenance required. Safe operation; safety devices conforming to the EU standards used. Environment friendly, as car engines are not running while being parked in and out. Reduced chances of fire hazard and no risk to human lives. No danger of assaults, car break-ins and damages to personal belongings as there isno human presence inside the parking tower.

The whole structure can be customized as per customers requirements andlimitations. Each level inside the parking system can be varied as per the dimensions of

various cars, as SUVs would need a much larger clear height than a normal sedan.

These systems can be built for maximizing space and volume utilization.


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CHAPTER 10

CONCLUSION AND FUTURE SCOPE

In the conventional parking, each car is parked in separate space, which occupies large

space. In this system, in one car

Compact Car Parking System

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Transcript of Compact Car Parking System