COMM 604 Channel Coding - GUC

21
COMM 604 Channel Coding Lecture 2 Linear Block Codes Dr. Engy Aly Maher Spring 2020

Transcript of COMM 604 Channel Coding - GUC

Page 1: COMM 604 Channel Coding - GUC

COMM 604

Channel Coding

Lecture 2

Linear Block Codes

Dr. Engy Aly Maher

Spring 2020

Page 2: COMM 604 Channel Coding - GUC

Digital Communication Systems

Source of

Information

User of

Information

Source

Encoder

Channel

Encoder

Modulator

Source

Decoder

Channel

Decoder

De-Modulator

Channel

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Motivation for Channel Coding

B B*

0 0

11

Physical Channel

p

p

(1-p)

(1-p)

Pr{B*≠B}=p

For a relatively noisy channel, p (i.e., probability of error) may have a value of 10-2

For many applications, this is not acceptable

– Examples:

Speech Requirement: Pr{B*≠B}<10-3

Data Requirement: Pr{B*≠B}<10-6

Channel coding can help to achieve such a high level of performance

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Channel Coding

B1B2.. Bk

Channel Decoder

0 0

11

Physical Channel

p

p

(1-p)

(1-p)

Channel Encoder

Channel Encoder: Mapping of k information bits in to an n-bit code word

Channel Decoder: Inverse mapping of n received code bits back to k information bits

Code Rate r=k/n

r<1

W1W2.. WnW*1W*2.. W*n B*1B*2.. B*k

Physical Channel

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What are Linear Block Codes?

Information sequence is segmented into message blocks of

fixed length.

Each k-bit information message is encoded into an n-bit

codeword (n>k)

Linear Block Codes

Binary Block Encoder

2k

k-bit Messages

2k

n-bit DISTINCTcodewords

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What are Linear Block Codes?

Linear Block Codes

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What are Linear Block Codes?

Linear Block Codes

Modulo-2 sum of any two codewords is ………

also a codeword

Each codeword v that belongs to a block

code C is a linear combination of k

linearly independent codewords in C,

i.e.,

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What are Linear Block Codes?

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What are Linear Block Codes?

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Linear Independence

A set of vectors g0, g1,…, gk-1 are linearly independent

if there exists no scalars u0, u1,…, uk-1 that satisfy

0 1 10 1 k-1v g g g 0ku u ... u

Unless u0=u1=…= uk-1=0

Examples

[0 1 0 ], [1 0 1], [1 1 1] are ………

Linearly Dependent

[0 1 0 ], [1 0 1], [0 0 1] are ………

Linearly Independent

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Linear Independence

0

1

3

1 1 0 1 0 0 0

0 0 1 0 1 1 1

1 1 1 1 1 1 1

1 0 1 0 0 0 1

2

g

gG=

g

g

u= [0 1 1 1]

Block Encoder (v=u.G)

v= g1+g2+g3

v= [0 1 1 1 0 0 1]

Linearly Dependent

u= [1 0 0 1]

Block Encoder (v=u.G)

v= g0+g3

v= [0 1 1 1 0 0 1]NOT DISTINCT

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(n,k) Systematic Linear Block Codes

Split data into k-bit blocks

Add (n-k) parity bits to each block using (n-k) linear

equations, making each block n bits long

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(n,k) Systematic Linear Block Codes

00 01 0 1

10 11 1 1

1 0 1 1 1 1

1 0 0

0 1 0

0 0 1

G= P I

,n k

,n k

k

k , k , k ,n k

p p ... p ...

p p ... p ...

. . . . . .

. . . . . .

. . . . . .

p p ... p ...

p-matrix kxk- identity matrix

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The Parity Check Matrix

For any k x n matrix G with k linearly independent rows, there

exists an (n-k) x n matrix H (Parity Check Matrix), such that

– G.HT=0

00 01 1 0

01 11 1 1

0 1 1 1 1 1

1 0 0

0 1 0

0 0 1

T

H= I P

k ,

k ,

k

,n k ,n k k ,n k

p p ... p...

p p ... p...

. . .. . .

. . .. . .

. . .. . .

p p ... p...

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The Parity Check Matrix

1 1 0 1 0 0 0

0 1 1 0 1 0 0

1 1 1 0 0 1 0

1 0 1 0 0 0 1

G

1 0 0 1 0 1 1

0 1 0 1 1 1 0

0 0 1 0 1 1 1

H

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Encoding Circuit

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Encoding Circuit 1 1 0 1 0 0 0

0 1 1 0 1 0 0

1 1 1 0 0 1 0

1 0 1 0 0 0 1

G

u0 u1 u2 u3

Input u

To channel

+ + +

v0 v1 v2

Parity Register

Message Register

Output v

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Syndrome

Tv.H 0

Tv.H 0

v C

v C

Channelv r

+v r=v+e

e Error Pattern

Syndrome

Ts=r.H

Characteristic of parity check matrix (H)

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Error Detection

s 0 r Cr is NOT a codeword

An Error is Detected: What Options do we have?

Ask for Retransmission of Block

Automatic Repeat Request (ARQ)

Attempt the Correction of Block

Forward Error Correction

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Undetectable Error Patterns

Can we be sure that r=v ??

NO! WHY?

s 0 r C

e C r C How many undetectable error patterns exist?

2k-1 Nonzero codeword means

2k-1 undetectable error patterns

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Syndrome Circuit

1 0 0

0 1 0

0 0 1

1 1 0

0 1 1

1 1 1

1 0 1

TH

0 0 3 5 6

1 1 3 4 5

2 2 4 5 6

s r r r r

s r r r r

s r r r r

r1 r2 r3 r4 r5 r6r0

+ + +

s0 s1 s2

Ts=r.H