COLUMBIA Circuit Review Outline Block diagram Power on and reset sequence Power block diagram ...

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COLUMBIA Circuit Review Outline Block diagram Power on and reset sequence Power block diagram Power budget block diagram SMI/SCI/SWI Interface Audio block diagram SMBUS block diagram Placement

Transcript of COLUMBIA Circuit Review Outline Block diagram Power on and reset sequence Power block diagram ...

Page 1: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

COLUMBIA Circuit Review Outline

Block diagram Power on and reset sequence Power block diagram Power budget block diagram SMI/SCI/SWI Interface Audio block diagram SMBUS block diagram Placement

Page 2: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

Block Diagram

Page 3: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

DREFSSCLK (100 MHz)

DREFSSCLK# (100 MHz)

CLK_ICH14(14.318 MHz)

CLK_MCH_BCLK# (166 MHz)

COLUMBIA Clock Block Diagram

CPU

Crestline

CLK_CPU_BCLK (166 MHz)

CLK_CPU_BCLK# (166 MHz)

Crystal14.31818MHz

CPUC0

CPUT0

CPUC1_FPCLK_PCM (33 MHz)

CLKGENRTM865-433

X1/X2

CPUT1_F

DDR2NORMAL

TYPE

DDR2NORMAL

TYPE

M_C

LK_D

DR

0/#

PCI2

MINI CARDKEDRON a/b/g/n

CLK_PCIE_MINI1

PCI3

Crystal32.768KHz

KBC WPC8768L

ICH8-M

X1/X2

RTC 32.768kHz

PCI_F5/ITP_EN

USB_48MHz/FSLA

REF0

CODECALC268

MDC

ACZ_BITCLK

AC_BTCLK_MDC

Crystal 24.576MHz

CLK48_ICH(48 MHz)

CLK_ICHPCI(33 MHz)

PCLK_KBC (33 MHz)

SRCT0/DOTT_96 DREFCLK (96 MHz)

FWH

SRCC0/DOTC_96 DREFCLK# (96 MHz)

CLK_PCIE_ICH(100 MHz)CLK_PCIE_ICH#(100 MHz)

SRCT6

SRCC6

Crystal 25MHz

SRCT3SRCC3

CLK_MCH_3GPLL (100 MHz)CLK_MCH_3GPLL# (100 MHz)

BCLK1

BCLK0

HPLL_CLK

HPLL_CLK#

PEG_CLK

PEG_CLK#

DPLL_REF_CLK

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

DPLL_REF_CLK#

CLK14

CLK48

PCICLK

DMI_CLKN

DMI_CLKP

SRCT7

SRCC7

M_C

LK_D

DR

1/#

M_C

LK_D

DR

2/#

M_C

LK_D

DR

3/#

PCI4

SRCC4

SRCT4

CLK_PCIE_MINI1# (100 MHz)

(100 MHz)

PCLK_FWH (33 MHz)

TIPCI7412

LANGIGA BCM5787M

CLK_PCIE_LAN

SRCC8

SRCT8

CLK_PCIE_LAN#

(100 MHz)

(100 MHz)

SATA

CLK_PCIE_SATA

SRCC2

SRCT2

CLK_PCIE_SATA# (100 MHz)

(100 MHz)

NVIDIAG72M-V

CLK_PCIE_PEG

SRCC10

SRCT10

CLK_PCIE_PEG# (100 MHz)

(100 MHz)

NEW CARD

CLK_PCIE_NEW

SRCC1

SRCT1

CLK_PCIE_NEW#(100 MHz)

(100 MHz)

CLK_MCH_BCLK (166 MHz)

Page 4: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

COLUMBIA Power ON/RESET Sequence

3D3V_S0 3D3V_S5

5V_S05V_S5

5V_S0

VCC_CORE_S0

RTC_AUX_S5

3D3V_AUX_S5

3D3V_S0

1D25V_S02D5V_S0

PM_SLP_S3#

5V_S0

ICH8-M

G792

Merom

CLKICS 9LPRS365

MAX8770

Crestline

KBCWPC8768L

-2

REGISTER(BTCRL.SBR)

1:RESET

0:RELEASE

RTC

VGATE_PWRGD

SLP_S4# SLP_S3#

PWROK CPUPWRGD

SHDN#RSTIN#

H_CPURST#

RESET#

RTCRST#

CPUCORE_ONPWROK

VRMPWRGD

CK_PWRGD

PWRGD

PWRGOOD

RSMRST#

RSMRST#_KBC

PWRBTN#PCIRST#

PLT_RST1#

3D3V_S5

RSMRST#_

KBC_PWRBTN#PM_PWRBTN#

PM_PWRBTN#

PM_SLP_S3#

TPS51100S5

CPUCORE_ON

RESET#

PWROK

H_P

WR

GD

H_CPURST#

PLTRST#

PCIRST1#

HDDDRV#_5

Adapter In

AD+ DCBATOUT5V_AUX_S5

MAX8744

-4-5-6

-7

1

2

23 4

1D5V_S0

DDR_VREF_S3

S3

7

7 8

9

10

11

11

12

13

S5_ENABLE

5

4

5

5

CD ROM

PM_SLP_S4#

PM_SLP_S4#

PM_SLP_S3#PM_SLP_S4#

DDR_VREF_S0

5

3D3V_S55V_S5

-2S5_ENABLE

-1-1

APL5912

APL5915APL5312

6

1D5V_S0

1D8V_S3

3D3V_S0

6

WPC8768L

3D3V_AUX_S5

-3G913

PM_SLP_S3#

MAX8717

PG1

PG2EN1 EN2

51D8V_S3 1D05V_S0

4

1D8V_S3

DCBATOUT

TIPCI7412

1D8V_S0 1D8V_S35

18ms after VCCRTC

RTC_AUX_S5 VCCRTC

VCCSUS1_05

10ms after VCCSUS1_05

10ms after VCCSUS1_05

3ms after VGATE_PWRGD99ms after 1D05V_S0

GOLDFINGER

LAN

MXM

MINICARD

NEWCARD

WINDBONDCK_PWRGD

CLK_PWRGD

TP

Page 5: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

COLUMBIA Power ON Sequence

Page 6: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

Power Block Diagram

Page 7: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

ICH8M

VCC_CORE_S0

Crestline Merom

VCC_CORE_S0 (CORE) (47A)1D05V_S0 (FSB VCCP) (4.5A)1D5V_VCCA_S0 (PLL) (130mA)

CLK GENICS 9LPRS502

220mA

CODEC3.3V(35mA)5V(55mA)

LPCROM6mA

DDRII 1D8V_S3(5000mA) 0D9V_S3(1200mA)

16941mA

1D8V_S3

Mini card802.11/BT

660mA

VCC_CORE_S0

3D3V_S5

1D8V_S3

3D3V_S5

47000mA

5065 mA

200mA

3D3V_S0

5V_S0

CRT500mA

HDD1000mA

CD ROM1500mA

AMP 1432540mA

TOUCHPAD25mA

2D5V_S0

LCD400mA

6135 mA

1D5V_S0130mA

FAN500mA

1D5V_S0

2D5V_S0

KBC Winbond WPC8768L3D3V_AUX_S5(170mA)

KBC EV BD

1D05V_S01D05V_S0

2010mA5V_S5

3D3V_AUX_S5

BCM5787M3D3V_LAN_S5(590mA)

5V_S5

8598mA

2660mA

907mA

0D9V_S3 1200mA 0D9V_S3

MDC40mA

G72MV

1D8V_S0 (2000mA)3D3V_S0 (640mA)2D5V_S0 (130mA)1D2V_S0 (1633mA)=>MXM cardVGA_CORE_S0 (7930mA)=>MXM card

1D05V_S31D05V_M

1D25V_S01D25V_S0 710mA

540mA

AMP 1410408mA

1D05V_S0 (CORE+GFX) (11310mA)(11573mA)1D05V_M (CLink) (540mA)1D25V_S0 (PLL/DMI)(710mA)1D25V_M (PLL/DDR2)(950mA)1D5V_S0(TV/CRT) (130mA)1D8V_S3 (DDRIO/LVDSIO) (3598mA)3D3V_S0 (TVDAC/CRT Sync/IO/Bandgap) (316mA )

1D05V_S0 (Core/I/O) (1131mA)1D5V_S0 (Azalia/PATA/PCI/PCIE/DMI/ SATA/LPC/USB) (2400mA)3D3V_S0 (LAN/SPI) (400mA)3D3V_S5 (SUS) ( 277mA)5V_S5 (SUS) (10mA)5V_S0 (USB/PATA/PCI) (6mA)

3D3V_AUX_S5

ExpressCARD

1000mA

BIOS ROM30mA

TI7412

150mA

1D8V_S01D8V_S0 2000mA

COLUMBIA Power Budget Block Diagram

5V_AUX_S5 5V_AUX_S550mA

PCMCIACARD

1A

Finger print500mA

PCMCIACARD

1A

MS Card200 mASD Card200 mA

USB*42000mA

Page 8: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

LPC BUS

KBCWPC8768L

ECSCI#

SMI#

PWUREQ#

SM_ECSMI#

ECSWI#

ECSCI#_1GPIO7

GPIO8

GPIO12

COLUMBIA SMI/SCI/SWI Interface

HDA_SDIN0

PWRBTN#

ICH8-MPCIRST#

Power Switch block

AC_Link

AC_IN#

BAT_IN#

GPIO06

GPIO10AD_OFF

From S3 state wakeup event: (1) Power Button; (2) WOL ( AC Only ); (3) Embedded Modem ( AC Only ) ;(4) RTC; (5) Lid; (6) Battery Critical

PM_SLP_S3#

GPIO07

KBC_PWRBTN#

KBC_LID#

RSMRST#

GPIO20

G792THRM/FanAlert#

RSMRST#

TIPCI7412

ACZ_SDATAOUT

HDA_SDIN1CODECALC268

MDC

FWH

ACZ_SDATAIN0

GS

D

1

23

3D3V_AUX_S5

12

12

C

12

ECRST#

GPIO23

VCC_POR#

GPIO40

GPIO03

X-Bus

GPIO01

HDA_SDOUT

ACZ_SDATAIN1

RSMRST#_KBC

PM_PWRBTN#

Page 9: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

ACZ_SPKR

CODECREALTEK ALC268

ICH8-M

TIPCI7412

CDRCDLCD-GND

Line Out

PCBEEP

Line_RLine_L

PHONE

PCI_SPKR

COLUMBIA Audio Block Diagram

MDC CON.

Line-In/ Mic-In

H.P. Jack

Line Out

1 Watt

1 Watt

AC97

KBCWPC8768L

KBC_BEEP

AUDIO_BEEP

LINR_IN_R

LINL_IN_L

MIC1 AUD_MICIN

Audio AMP.

G1410Q

Audio AMP.

G1432Q

Page 10: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

COLUMBIA SMB Interface

KBC

WPC8768L

3D3V_AUX_S5

VCC

3D3V_AUX_S5

Battery AID=16/17

3D3V_S0

ICH8_M

SMBC_ICH

SMBD_ICH

CLK GEN ICS 9LPRS502

ID=D2/D3

ThermalG792

ID=7A/7B

DDR2DIMM B

ID=A2/A3

DDR2DIMM A

ID=A0/A1

5V_S03D3V_S5 3D3V_S0

4D7K4D7K

1D8V_S0 1D8V_S0 3D3V_S0

5V_S0

5V_AUX_S5

10K

KBC_SCL2

KBC_SDA2

3D3V_S0

10K

BAT_SCL

BAT_SDA

Page 11: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

VGAMXM

0 Ohm

0 Ohm

NV_EDID_CLK

NV_EDID_DAT

AlvisoGMCH

0 Ohm

0 Ohm

0 Ohm

0 Ohm

NV_DDCCLK

NV_DDCDATA

GMCH_DDCCLK

GMCH_DDCDATA

EDID_CLK

CRT

LCD

0 Ohm

0 Ohm

0 Ohm

0 Ohm

EDID_DAT

3D3V_S0

CLK_DDC_EDID

DAT_DDC_EDID

2.2K

CLK_DDC1_5

DAT_DDC1_5

COLUMBIA SMB Interface

3D3V_S0 5V_S0

Page 12: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

Placement (TOP)

360.0

270.0

SB

PCMCIA

Page 13: COLUMBIA Circuit Review Outline  Block diagram  Power on and reset sequence  Power block diagram  Power budget block diagram  SMI/SCI/SWI Interface.

Placement (BOTTON)

360.0

270

DC in

DVI

USB

RJ-11

Express Card

C/R

MXM Card Type II

Fan

Battery 8 Cell

DDR

CPU

NB

HDD

ODD

RJ-45

S-Video

USBX2

USBMini Card / MDC

FIR Audio

1394

VGA