COE 202: Digital Logic Design Sequential Circuits Part 2
-
Upload
gwenllian-baker -
Category
Documents
-
view
62 -
download
2
description
Transcript of COE 202: Digital Logic Design Sequential Circuits Part 2
![Page 1: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/1.jpg)
COE 202: Digital Logic DesignSequential Circuits
Part 2
Dr. Ahmad AlmulhemEmail: ahmadsm AT kfupm
Phone: 860-7554Office: 22-324
Ahmad Almulhem, KFUPM 2009
![Page 2: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/2.jpg)
Objectives• Analysis of Synchronous Sequential
Circuits• Procedure• Examples
Ahmad Almulhem, KFUPM 2009
![Page 3: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/3.jpg)
Analysis of Combinational vs Sequential CircuitsCombinational :•Boolean Equations•Truth Table
•Output as a function of inputs
Sequential :•State Equations•State Table•State Diagram
•Output as a function of input and current state•Next state as a function of inputs and current state.
Ahmad Almulhem, KFUPM 2009
![Page 4: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/4.jpg)
Analysis of Sequential CircuitsSteps:
• Obtain state equations• FF input equations• Output equations
• Fill the state table• Put all combinations of inputs and current states• Fill the next state and output
• Draw the state diagram
Ahmad Almulhem, KFUPM 2009
![Page 5: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/5.jpg)
State Table
Ahmad Almulhem, KFUPM 2009
4 sections
![Page 6: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/6.jpg)
State Table (2-D Form)
Ahmad Almulhem, KFUPM 2009
1
![Page 7: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/7.jpg)
State Diagram
• The state diagram is a graphical representation of a state table (provides same information)
• Circles are states (FFs), Arrows are transitions between states• Labels of arrows represent inputs and outputs
Ahmad Almulhem, KFUPM 2009
![Page 8: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/8.jpg)
Example 1Analyze this circuit?• Is this a sequential
circuit? Why?• How many inputs?• How many outputs?• How many states?• What type of
memory?
Ahmad Almulhem, KFUPM 2009
![Page 9: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/9.jpg)
Example 1 (cont.)
Ahmad Almulhem, KFUPM 2009
Q(t) D Q(t+1)0 0 0
0 1 1
1 0 0
1 1 1
D Q(t+1)0 0
1 1
Q(t+1) = D
Characteristic Tables and Equations
D Flip Flop (review)
![Page 10: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/10.jpg)
Example 1 (cont.)
Ahmad Almulhem, KFUPM 2009
![Page 11: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/11.jpg)
Example 1 (cont.)State equations:
DA = AX + BX
DB = A’ X
Y = (A + B) X’
Ahmad Almulhem, KFUPM 2009
![Page 12: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/12.jpg)
Example 1 (cont.)State equations:
DA = AX + BX
DB = A’ X
Y = (A + B) X’
State table:
Ahmad Almulhem, KFUPM 2009
![Page 13: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/13.jpg)
Example 1 (cont.)State equations:
DA = AX + BX
DB = A’ X
Y = (A + B) X’
State table (2D):
Ahmad Almulhem, KFUPM 2009
![Page 14: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/14.jpg)
Example 1 (cont.)State equations:
DA = AX + BX
DB = A’ X
Y = (A + B) X’
State table:
Ahmad Almulhem, KFUPM 2009
State diagram:
![Page 15: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/15.jpg)
Example 2
Ahmad Almulhem, KFUPM 2009
• Analyze this circuit.• What about the output?• This circuit is an example of a Moore machine (output
depends only on current state)• Mealy machines is the other type (output depends on inputs
and current states)
![Page 16: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/16.jpg)
Example 2 (cont.)
Equation:DA = A X Y
Ahmad Almulhem, KFUPM 2009
![Page 17: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/17.jpg)
Example 2 (cont.)
Ahmad Almulhem, KFUPM 2009
Equation:DA = A X Y
![Page 18: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/18.jpg)
Example 3
Ahmad Almulhem, KFUPM 2009
Analyze this circuit?• Is this a sequential
circuit? Why?• How many inputs?• How many outputs?• How many states?• What type of
memory?
![Page 19: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/19.jpg)
Example 3 (cont.)
Ahmad Almulhem, KFUPM 2009
J K Q(t+1)0 0 Q(t)
0 1 0
1 0 1
1 1 Q’(t)
Q(t+1) = JQ’ + K’Q
Characteristic Tables and Equations
JK Flip Flop (review)
![Page 20: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/20.jpg)
Example 3 (cont.)
Ahmad Almulhem, KFUPM 2009
![Page 21: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/21.jpg)
Example 3 (cont.)
Ahmad Almulhem, KFUPM 2009
State equations:JA = B, KA = B X’
JB = X’, KB = A X
by substitution:A = JAA’ + KA’A = A’ B + A B’ + A XB = B’ X’ + A B X + A’ B X’
![Page 22: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/22.jpg)
Example 3 (cont.)
Ahmad Almulhem, KFUPM 2009
State equations:JA = B, KA = B X’
JB = X’, KB = A X
by substitution:A = JAA’ + KA’A = A’ B + A B’ + A XB = B’ X’ + A B X + A’ B X’
![Page 23: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/23.jpg)
Example 3 (cont.)
Ahmad Almulhem, KFUPM 2009
State equations:JA = B, KA = B X’
JB = X’, KB = A X
by substitution:A = JAA’ + KA’A = A’ B + A B’ + A XB = B’ X’ + A B X + A’ B X’
![Page 24: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/24.jpg)
Example 4
Ahmad Almulhem, KFUPM 2009
![Page 25: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/25.jpg)
Example 4 (cont.)State equations:JA = BX’
KA = BX’ + B’X
DB = X
Y = X’AB
by substitution:A(t+1) = JAA’ + KA’A
Ahmad Almulhem, KFUPM 2009
![Page 26: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/26.jpg)
Example 4 (cont.)
Ahmad Almulhem, KFUPM 2009
Current State Input Next State Output
A(t) B(t) X A(t+1) B(t+1) Y
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 0 0 0
1 0 1 1 1 0
1 1 0 1 0 1
1 1 1 0 1 0
State equations:JA = BX’
KA = BX’ + B’X
DB = X
Y = X’AB
by substitution:A(t+1) = JAA’ + KA’A
![Page 27: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/27.jpg)
Example 5
Ahmad Almulhem, KFUPM 2009
Analyze this circuit?• Is this a sequential
circuit? Why?• How many inputs?• How many outputs?• How many states?• What type of
memory?
![Page 28: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/28.jpg)
Example 5 (cont.)
Ahmad Almulhem, KFUPM 2009
T Q(t+1)0 Q(t)
1 Q’(t)Q(t+1) = TQ’ + T’Q
Characteristic Tables and Equations
T Flip Flop (review)
![Page 29: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/29.jpg)
Example 5 (cont.)
Ahmad Almulhem, KFUPM 2009
![Page 30: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/30.jpg)
Example 5 (cont.)
Ahmad Almulhem, KFUPM 2009
State equations:TA = BX
TB = X
Y = AB
by substitution:A(t+1) = TAA’ + TA’A
![Page 31: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/31.jpg)
Example 5 (cont.)
Ahmad Almulhem, KFUPM 2009
State equations:TA = BX
TB = X
Y = AB
by substitution:A(t+1) = TAA’ + TA’A
![Page 32: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/32.jpg)
Example 5 (cont.)
Ahmad Almulhem, KFUPM 2009
State equations:TA = BX
TB = X
Y = AB
by substitution:A(t+1) = TAA’ + TA’A
The output depends only on current state.This is a Moore machine
What does this circuit do?
![Page 33: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/33.jpg)
Mealy vs Moore Finite State Machine (FSM)Mealy FSM:• Output depends on current state and input• Output is not synchronized with the clock
Moore FSM:• Output depends on current state only
Ahmad Almulhem, KFUPM 2009
![Page 34: COE 202: Digital Logic Design Sequential Circuits Part 2](https://reader033.fdocuments.in/reader033/viewer/2022042616/5681342f550346895d9b1ee5/html5/thumbnails/34.jpg)
Summary• To analyze a sequential circuit:
• Obtain state equations• FF input equations• Output equations
• Fill the state table• Put all combinations of inputs and current states• Fill the next state and output• For the next state use characteristic table/equation
• Draw the state diagram• Two types of synchronous sequential
circuits (Mealy and Moore)
Ahmad Almulhem, KFUPM 2009