Code No: R22021 JNTU World...... Explain how UJT is used for sweep circuit? b) Draw the circuit...
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||'''|''|''||''|'''| Code No: R22021 II B. Tech II Semester Supplementary Examinations Jan/Feb - 2015 PULSE AND DIGITAL CIRCUITS (Com. to EEE, ECE, ECC, BME, EIE) Time: 3 hours Max Marks: 75 Answer any FIVE Questions All Questions carry Equal Marks ~~~~~~~~~~~~~~~~~~~~~~~~~ 1. a) Obtain the response of an RC low pass circuit for a step input. b) Draw the circuit diagram of RLC based ringing circuit and explain its operation. 2. a) Draw the basic circuit diagram of negative peak clamper circuit and explain its operation. b) Draw the circuit diagram of slicer circuit using zener diodes and explain its operation with the help of its transfer characteristic. 3. a) Define the transistor switching times: i) delay time ii) rise time iii) storage time and iv) fall time. b) Draw the circuit diagram of RTL logic gate and explain its operation with the help of truth table. 4. a) Draw the circuit diagram of a fixed bias binary with speed up capacitors. b) Explain the method of symmetrical triggering with relevant diagram. 5. Design a collector coupled monostable multivibrator employing two n-p-n silicon transistors with 5 msec as its quasi stable state duration. Make reasonable assumptions. 6. a) Write the differences between the voltage and current time base generators? b) Discuss the concept of Bootstrap Time Base Generator. 7. a) What is relaxation? With neat circuit diagram explain the principle of operation of a voltage sweep circuit using UJT. b) Define and explain the following terms: i) Phase delay and ii) Phase jitter 8. a) Explain a method of triggering a blocking oscillator with the help of circuit diagram. b) With neat circuit explain operation of bi-directional sampling gate using transistors. 1 of 1 SET - 1 R10 JNTU World www.alljntuworld.in JNTU World JNTU World
Transcript of Code No: R22021 JNTU World...... Explain how UJT is used for sweep circuit? b) Draw the circuit...
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Code No: R22021
II B. Tech II Semester Supplementary Examinations Jan/Feb - 2015
PULSE AND DIGITAL CIRCUITS (Com. to EEE, ECE, ECC, BME, EIE)
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~
1. a) Obtain the response of an RC low pass circuit for a step input.
b) Draw the circuit diagram of RLC based ringing circuit and explain its operation.
2. a) Draw the basic circuit diagram of negative peak clamper circuit and explain its operation.
b) Draw the circuit diagram of slicer circuit using zener diodes and explain its operation with
the help of its transfer characteristic.
3. a) Define the transistor switching times:
i) delay time ii) rise time iii) storage time and iv) fall time.
b) Draw the circuit diagram of RTL logic gate and explain its operation with the help of truth
table.
4. a) Draw the circuit diagram of a fixed bias binary with speed up capacitors.
b) Explain the method of symmetrical triggering with relevant diagram.
5. Design a collector coupled monostable multivibrator employing two n-p-n silicon transistors
with 5 msec as its quasi stable state duration. Make reasonable assumptions.
6. a) Write the differences between the voltage and current time base generators?
b) Discuss the concept of Bootstrap Time Base Generator.
7. a) What is relaxation? With neat circuit diagram explain the principle of operation of a voltage
sweep circuit using UJT.
b) Define and explain the following terms: i) Phase delay and ii) Phase jitter
8. a) Explain a method of triggering a blocking oscillator with the help of circuit diagram.
b) With neat circuit explain operation of bi-directional sampling gate using transistors.
1 of 1
SET - 1 R10
JNTU W
orld
www.alljntuworld.in JNTU World
JNTU World
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Code No: R22021
II B. Tech II Semester Supplementary Examinations Jan/Feb - 2015
PULSE AND DIGITAL CIRCUITS (Com. to EEE, ECE, ECC, BME, EIE)
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~
1. a) Obtain the condition for an RC high pass circuit to behave as a good differentiator.
b) What is a double differentiator circuit? Draw and explain its response to ramp input.
2. a) Draw the shunt clipper that clips the sine wave signal above +5V and explain its working
with waveforms.
b) Explain the response of the clamping circuit when a square wave input is applied under
steady state conditions.
3. a) With the help of neat wave forms explain the transition time of a diode.
b) Compare the Resistor Transistor and Diode Transistor logic families.
4. a) Explain the reason for the occurrence of overshoot at the base of normally ON transistor of
one shot. Derive an expression for overshoot.
b) Explain how a Schmitt trigger can be used as a comparator and as a squaring circuit.
5. Draw the circuit diagram of collector coupled transistor astable multivibrator. Explain its
operation and also derive an expression for the time period.
6. a) Explain how UJT is used for sweep circuit?
b) Draw the circuit diagram of Transistor Miller time base generator and give the requirement
of each component.
7. a) Explain the need for synchronization.
b) With neat circuit diagram and waveforms, explain the pulse synchronization of an astable
relaxation circuit.
8. a) Explain the operation of astable transistor blocking oscillator with diode control.
b) Differentiate different types of uni-directional diode sampling gate.
1 of 1
SET - 2 R10
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orld
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Code No: R22021
II B. Tech II Semester Supplementary Examinations Jan/Feb - 2015
PULSE AND DIGITAL CIRCUITS (Com. to EEE, ECE, ECC, BME, EIE)
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~
1. a) Obtain the expression for the gain A and phase angle Φ of an RC low pass circuit. Sketch
the frequency response and find the expression for higher cutoff frequency.
b) A symmetrical square wave of 20V peak to peak amplitude with zero average value and with
a fundamental time period ‘T’ is given as input of an RC low pass circuit. Obtain the
expression for peak-to-peak value of the output signal.
2. a) Classify different types of clipper circuits. Give their circuits and explain their operation
with the aid of transfer characteristics.
b) State and prove clamping-circuit theorem.
3. a) Design the transistor switch for the following specifications: Vin= ±3Vsquare wave,
VCC=10V, IC=1mA, hFE=50. Assume Si transistor.
b) Why totem pole is used in DTL? Draw circuit diagram and explain a DTL gate with this.
4. a) Discuss symmetrical and asymmetrical triggering in case of bi-stable transistor
multivibrator.
b) Design a transistor Schmitt trigger circuit employing two n-p-n silicon transistors which
has its upper tripping point at 6V and lower tripping point at 4V. Assume that VCC=18V,
IC(sat)=4mA and hFE(min)=20.
5. a) Describe how the gate width T of an emitter coupled monostable multivibrator can be
linearly varied by adjusting the bias voltage V through a dc potentiometer.
b) Design an Astable Multivibrator to generate 5 kHz square wave.
The supply voltage VCC=10V, IC(sat)=10mA, hFE(min)=50 and assume Si transistors.
6. a) Explain how an inductor L can be used to improve the linearity of a simple RC sweep
circuit.
b) How does sync signal amplitude will affect frequency of operation of the sweep generator?
7. a) Explain the factors which influence the stability of a relaxation divider with the help of a
neat waveforms
b) Explain how the synchronization of a sweep circuit is achieved with symmetrical signals.
8. a) Explain the principle of operation of monostable blocking oscillator with base timing.
Sketch the current waveforms and derive an expression for current pulse width.
b) What is pedestal? How it effect the output of sampling gates?
1 of 1
SET - 3 R10
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orld
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Code No: R22021
II B. Tech II Semester Supplementary Examinations Jan/Feb - 2015
PULSE AND DIGITAL CIRCUITS (Com. to EEE, ECE, ECC, BME, EIE)
Time: 3 hours Max Marks: 75
Answer any FIVE Questions
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~
1. a) What is low pass RC circuit? Derive an expression of output voltage for square wave input
and draw input-output characteristics of this circuit
b) Explain the operation of RC high pass circuit when exponential input is applied.
2. a) Derive the steady state response of a clamping circuit for a square wave input in which the
resistance Rs of the signal source is taken into account.
b) Design a diode clamper circuit to clamp the positive peaks of the input signal at zero level.
The frequency of the input signal is 500Hz.
3. a) Derive expressions for rise and fall time of a transistor in terms of the transistor Parameters
and operating currents.
b) Verify the truth table of RTL NOR gate with the circuit diagram of two inputs.
4. a) What are the basic techniques in the triggering of Bistable Multivibrator? Explain the
techniques with neat diagrams.
b) Design a self bias bi-stable multivibrator employing two p-n-p silicon transistors to
operate at a maximum frequency of 60Hz. Assume that VCC=15V, RC=2.2kΩ,
VCE(sat)=0.4V, VBE(sat)=0.95V, hFE=30 and the impedance of the trigger source RS=680Ω.
5. a) Explain the operation of a collector coupled transistor monostable multivibrator with the
help of a neat circuit diagram and waveform.
b) Write short notes on triggering of monostable multivibrators
6. a) With a neat circuit, explain a method of compensation used to improve the linearity of
bootstrap time base circuit.
b) Compare a transistor-switch sweep circuit with UJT sweep circuit with respect to sweep
speed and linearity of sweep.
7. a) What is phase jitter? Discuss the significance of it in a frequency divider.
b) A UJT sweep operates with VV=3V, Vp=16V and η=0.5. A sinusoidal synchronizing voltage
of 2V peak is applied between bases and the natural frequency of the sweep is 1 kHz, over
what range of sync signal frequency will the sweep remain in 1:1 synchronism with the sync
signal?
8. a) Derive an expression for the pulse width of a triggered transistor blocking oscillator
with base timings.
b) Derive the gain and control voltages of four diode sampling gate.
1 of 1
SET - 4 R10
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