Class B Amplifier Design
21
Class B Amplifier Design Proposal Evan Bare Andrew Cook Lee Kusy Joe Morrow Khiem Nguyen Michael West Ingram School of Engineering Texas State University San Marcos, TX December 5 th , 2011
description
Slide show developed as part of school project. My contribution to group, in addition to engineering and circuit design, was creating and organizing a Power Point presentation to summarize our design.
Transcript of Class B Amplifier Design
Class B Amplifier Design Proposal
Evan Bare Andrew Cook Lee Kusy Joe Morrow Khiem Nguyen Michael West
Ingram School of EngineeringTexas State UniversitySan Marcos, TXDecember 5th, 2011
Class B Characteristics
High efficiency High gain Push/pull transistors Power Amplifier
› Av ≈ 1
› Ai > 1
Class B Pros/Cons
Advantages:› Ideally, no quiescent current› High efficiency (max efficiency of 78.5%)
Disadvantages:› Crossover distortion› Requires a biasing current› Q point stabilization
D.J. Bates, A. Malvino. "Power Amplifiers," in Electronic Principles, 7th ed. New York: McGraw-Hill, 2007. pp. 392-397.
Design Considerations
Input: Sinusoidal voltage, 50 Ω resistance
Output: 2 – 16 Ω speaker Onboard 12 V supply High power gain High efficiency Minimum cost Single layer PCB Minimum PCB area
Power Supply (12 V)
0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.070.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
Time (s)
Volt
age (
V)
Alternate Power Supply (USB)
Provides 5 V±5%, max 500 mA› Limits input signal to max 2.5 Vpk
› Sufficient power Additional Cost
› USB connector› Additional PCB area
"7.3.2 Bus Timing/Electrical Characteristics". Universal Serial Bus Specification. USB.org
Proposed Design
vinvout
Transistor Biasing
› VCB = 0.7 V
› VBE = 0.7 V
› Place each base 0.7 V above/below emitter voltage
½ Vcc ½ Vcc
½ Vcc + 0.7V
½ Vcc - 0.7V
Stability
Avoid thermal runaway Stabilizing capacitor between bases
› Keeps base voltages stable with AC swings
Maximum Efficiency
D.J. Bates, A. Malvino. "Power Amplifiers," in Electronic Principles, 7th ed. New York: McGraw-Hill, 2007. pp. 392-397.
Actual Efficiency
7 Vpk, 1 kHz input, 16 Ω load:
110 mA x 12.0 V = 1.32 W
245 mA x 3.93 V = 963 mW
Power Gain
From Multisim:› pout = 523 mW
› pin = 27.96 mW
Improvements?› Op-Amp
𝐴𝑝=𝑝𝑜𝑢𝑡
𝑝𝑖𝑛
𝑝𝑖𝑛=𝑣 𝑖𝑛×𝑖𝑖𝑛
𝑝𝑜𝑢𝑡=𝑣𝑜𝑢𝑡× 𝑖𝑜𝑢𝑡
1E+0 1E+1 1E+2 1E+3 1E+4 1E+5 1E+6 1E+7 1E+8 1E+90
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Input Frequency (Hz)
Frequency Response
Audible Range
(20 Hz – 20 kHz)
fC1 = 16 Hz fC2 = 15 MHz
Load Variations v Power5 Vpk, 1 kHz Sinusoidal Input Signal
0 0.00005 0.0001 0.00015 0.0002 0.00025 0.0003 0.00035 0.0004 0.000450
0.5
1
1.5
2
2.5
2 Ohm
4 Ohm
8 Ohm
16 Ohm
Time (s)
pou
t (W
)
Cost Analysis
Single Prototype: $8.55 + PCBComponents # per Circuit Unit Price ($) Cost ($)
1 kΩ resistor 5 0.33 1.65
500 µF capacitor 5 0.48 2.40
2N3904 transistor 3 0.43 1.29
2N3906 transistor 1 0.46 0.46
1N4002GP diode 4 0.50 2.00
100 µF capacitor 1 0.48 0.48
1N5242B Zener 1 0.27 0.27
Total: $8.55
Pricing from http://www.digikey.com as of Dec 3rd, 2011
Cost Analysis
Mass Production: $0.756 + PCBComponents # per Circuit Unit Price ($) Cost ($)
1 kΩ resistor 5 0.036 0.18
500 µF capacitor 5 0.039 0.195
2N3904 transistor 3 0.033 0.099
2N3906 transistor 1 0.033 0.033
1N4002GP diode 4 0.048 0.192
100 µF capacitor 1 0.039 0.039
1N5242B Zener 1 0.018 0.018
Total: $0.756
Pricing from http://www.digikey.com as of Dec 3rd, 2011
PCB Requirements
9 mm
50 mm
PCB Area: 9 x 50 = 450 mm2
30 units per 10 x 16 cm board
Summary
Transistor-biased design $0.76/unit Minimal PCB area Amplification throughout audible range High efficiency Ap 20
Web Resources
http://www.qrp.pops.net/AF-Basics.asp
http://www.digikey.com
http://www.ece.drexel.edu/courses/ECE-E352/ClassABAmp.pdf
http://vijayatronics.info/Notes/ch-2%20ampli.pdf
http://www.electronics-tutorials.ws/amplifier/amp_6.html
http://www.usb.org
Acknowledgements:
Dr. Semih AslanIngram School of Engineering
Texas State University
Questions?Diagram Supply Biasing Stability Efficiency
Gain Frequency Load Cost PCB
