CIS 020 Assembly Programming
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Transcript of CIS 020 Assembly Programming
CIS 020 Assembly Programming
Chapter 18 - Sub-routines and
Sub-program Linkage
© John Urrutia 2012, All Rights Reserved.5/27/2012 1
ObjectivesUnderstand the Types of SubroutinesDescribe how to create and invoke
SubroutinesDescribe how communications with
Subroutines workDescribe the differences and similarities
between Subroutines and SubprogramsDemonstrate understanding of Subprogram
Linkage and Communications
© John Urrutia 2012, All Rights Reserved. 25/27/2012
SubroutinesGenerally a block of instructions that perform
a specific function needed from several points within a program.
Provides storage efficiency by creating the specific function once and “Calling” that function from wherever it is needed.
Subroutines are identified by a label at their entry point and generally terminate with a BR instruction
© John Urrutia 2012, All Rights Reserved. 35/27/2012
SubroutinesDesignated Flowchart symbol
© John Urrutia 2012, All Rights Reserved. 45/27/2012
CALLSubroutin
e
Subroutine
Return to CALL
All needed instructions
Entry Point
Two Types of SubroutinesInternal –
Written specifically for this program for use anywhere in this program.
Relies on the supporting environment provided by the main program.
Generally, must be within the address range of the current base register.
© John Urrutia 2012, All Rights Reserved. 55/27/2012
Two Types of SubroutinesExternal –
Written as an independent stand-alone set of reusable code that can be added anywhere into a program.
Generally stored in a system library and copied into your program via a copybook or MACRO.
© John Urrutia 2012, All Rights Reserved. 65/27/2012
Subroutine LINKAGETo utilize subroutines
You must address the subroutine entry pointYou must address the next instruction to
execute after the subroutine completes.Linkage between the main routine and
subroutinesUse special branch instructions – BAL & BALRUse the branch register to return to caller– BR
© John Urrutia 2012, All Rights Reserved. 75/27/2012
Subroutine LINKAGEBAL – Branch and Link
Stores the Address of the instruction following the BAL in the Register of Operand 1 Then
Branches to the Address of Operand 2
© John Urrutia 2012, All Rights Reserved. 85/27/2012
OPERATION OPERANDS10 16
B A L R 5 , S U B R T N 0 1
Subroutine LINKAGEBAL – Branch and Link
Use caution – inadvertently changing the contents of the register in Operand 1 will have unpredictable results!!!
What do I do if I need to use this register??Upon entry to the subroutine –
Store the Register using the ST instruction Create a 4 Byte storage area for this purpose.
© John Urrutia 2012, All Rights Reserved. 95/27/2012
Subroutine LINKAGEBALR – Branch and Link Register
This instruction is primarily used for calling external subroutines / subprograms.
Stores the Address of the instruction following the BALR in the Register of Operand 1 Then
Branches to the Address of Operand 2
© John Urrutia 2012, All Rights Reserved. 105/27/2012
OPERATION OPERANDS10 16
B A L R R 1 4 , R 1 5
Subroutine LINKAGEProgram Housekeeping
Keeping track of where we are and where we’re going
Standard Register Linkage ConventionsR1 – Address of the list of data addressesR13 – Address of Calling Program’s Register
Save AreaR14 – Address of Calling Program’s Next
InstructionsR15 – On Entry – Called Program’s Entry Point
Address On Exit – Called Program’s Return
Code© John Urrutia 2012, All Rights Reserved. 115/27/2012
© John Urrutia 2012, All Rights Reserved. 125/27/2012
RR – Register to RegisterRR – are the fastest instructions.2 Byte instruction Length with the coding
format
Translates to
© John Urrutia 2012, All Rights Reserved. 135/27/2012
RR Op Code R1 R20-7 8-11 12-15 16-19 32-35
First Halfword Second Halfword
OPERATION OPERANDS10 16
M R R 6 , R 8
B'0001 1100 1010 1000'X' 1 C 6 8'
RS – Register to StorageRS – Transfer data between a register and
storage.4 Byte instruction Length with the coding
format
Translates to© John Urrutia 2012, All Rights Reserved. 145/27/2012
B'1001 0000 1110 1100 1101 0000 0000 1100'X' 9 0 E C D 0 0 C'
OPERATION OPERANDS10 16
S T M 1 4 , 1 2 , 1 2 ( 1 3 )
RS
Op Code R1 R3 B2 D2Bits 0-7 8-11 12-15 16-19 20-31
First Halfword Second Halfword
RX – Register to Indexed StorageRX – Transfer control by mask to storage
address .4 Byte instruction Length with the coding
format
Translates to© John Urrutia 2012, All Rights Reserved. 155/27/2012
B'0100 0111 1111 0101 0110 0011 1111 1000'X' 4 7 F 5 6 3 E 8'
OPERATION OPERANDS10 16
B C 1 5 , 1 0 0 0 ( 5 , 6 )
RX
Op Code M1 R3 B2 D2Bits 0-7 8-11 12-15 16-19 20-31
First Halfword Second Halfword
RX – Register to Indexed StorageRX – Transfer data between a register and
storage.4 Byte instruction Length with the coding
format
Translates to© John Urrutia 2012, All Rights Reserved. 165/27/2012
B'0100 0000 0100 0101 0110 0011 1111 1000'X' 4 0 4 5 6 3 E 8'
OPERATION OPERANDS10 16
S T H 4 , 1 0 0 0 ( 5 , 6 )
RS
Op Code R1 R3 B2 D2Bits 0-7 8-11 12-15 16-19 20-31
First Halfword Second Halfword
SI – Storage ImmediateSI –Data imbedded in instruction to storage.4 Byte instruction Length with the coding
format
Translates to
© John Urrutia 2012, All Rights Reserved. 175/27/2012
B‘1001 0101 0110 1111 0110 0011 1111 1000'X' 9 5 6 F 6 3 E 8'
OPERATION OPERANDS10 16
C L I 1 0 0 0 ( 5 , 6 ) , C ' ? '
RS
Op Code I2 B2 D2Bits 0-7 8-15 16-19 20-31
First Halfword Second Halfword
Storage to Storage InstructionsLeast efficient instructionsSS Formats
© John Urrutia 2012, All Rights Reserved. 185/27/2012
SS
Op Code B1 D1 B2 D2Bits 0-7 16-19 20-31 32-35 36-47
L1 L2 B1 D1 B2 D28-11 12-15 16-19 20-31 32-35 36-47
L1 I3 B1 D1 B2 D28-11 12-15 16-19 20-31 32-35 36-47
First Halfword Second Halfword Third Halfword
L18-15
SS – Storage to StorageSS – Storage to Storage, Character Format6 Byte instruction Length with the coding
format
Translates to
© John Urrutia 2012, All Rights Reserved. 195/27/2012
B‘1101 0010 1111 1111 0101 0000 0000 1100 0110 0000 0000 0000'X' D 2 F F 5 0 0 C 6 0 0 0'
OPERATION OPERANDS10 16
M V C 1 2 ( 2 5 5 , 5 ) , 0( 6 )
SS
Op Code B1 D1 B2 D2Bits 0-7 16-19 20-31 32-35 36-47
First Halfword Second Halfword Third Halfword
L18-15
SS – Storage to StorageSS – Storage to Storage, Packed Decimal
Format6 Byte instruction Length with the coding
format
Translates to© John Urrutia 2012, All Rights Reserved. 205/27/2012
B‘1111 0010 0011 0110 0101 0000 0000 1100 0110 0000 0000 1000'X' F 2 3 6 5 0 0 C 6 0 0 8'
OPERATION OPERANDS10 16
P A C K 1 2 ( 4 , 5 ) , 8 ( 7 , 6 )
SS
Op Code L1 L2 B1 D1 B2 D2Bits 0-7 8-11 12-15 16-19 20-31 32-35 36-47
First Halfword Second Halfword Third Halfword
SS – Storage to StorageSS – Storage to Storage, Shift Packed
Decimal Format6 Byte instruction Length with the coding
format
Translates to© John Urrutia 2012, All Rights Reserved. 215/27/2012
B‘1111 0010 0011 0100 0101 0000 0000 1100 0000 0000 0000 0011'X' F 0 3 4 5 0 0 C 6 0 0 3'
OPERATION OPERANDS Shift Rounding10 16 Number Digit
S R P 1 2 ( 4 , 5 ) , 3 ( 0 ) , 5
SS
Op Code L1 I3 B1 D1 B2 D2Bits 0-7 8-11 12-15 16-19 20-31 32-35 36-47
First Halfword Second Halfword Third Halfword
Program Interrupts & the PSWProgram interrupts occur when you tell the
system to do something it can’t.Old School – System simply stops workingToday – System is built with redundancy and
continues to work while suspending your program execution
When an interrupt occurs, generally your program is terminated with an appropriate system code.
There are 5 types of interrupts
© John Urrutia 2012, All Rights Reserved. 225/27/2012
Program Interrupts & the PSWThere are 5 types of interrupts
External – caused by an action outside of the system.
I/O problem – external or internal associated with I/O subsystem
Program – caused by a faulty instruction or address
Machine – hardware, faulty circuit or equipment
Supervisor – caused by an error detected by the Supervisor Program.
© John Urrutia 2012, All Rights Reserved. 235/27/2012
Program Interrupts & the PSWThe PSW – Program Status Word
Identifies the state of the system at the time the interrupt occurred.
z390 PSW Consists of the following informationPSW=07050600 800FFFDA D2030000D088 MVC ABEND S0C5
© John Urrutia 2012, All Rights Reserved. 245/27/2012