CIS 020 Assembly Programming Chapter 12 - RR-Format Instructions & more RX-Format Instructions ©...

CIS 020 Assembly Programming

Chapter 12 - RR-Format Instructions

& more RX-Format Instructions

© John Urrutia 2012, All Rights Reserved.5/27/2012 1

ObjectivesSyntax & Use of RR-Format instructionsRegister ComparisonsBinary or Fixed-point Multiplication / DivisionCondition Code branching

© John Urrutia 2012, All Rights Reserved. 25/27/2012

Register to RegisterRR instructions are the most efficient and are

used for comparisons and arithmetic between general purpose registers.

Most common RR instructions are of the form □R where □ is a letter representing the function and the R represent the register or register-pair.

□ can be:


A - Add D - Divide N - AndB - Branch L - Load O - OrC - Compare M - Multiply S - Subtract

X - Exclusive Or

Register to RegisterThere are 57 RR instructions

All RR instructions are 2 bytes long with the following syntax


RR Op Code R1 R20-7 8-11 12-15

First Halfword

OPERATION OPERANDS# #R R R 1 , R 2

Register to RegisterThe Load Register instruction

Copies the sending Register, Operand 2 to the receiving Register, Operand 1.


LABEL OPERATION OPERANDS1 # #I 1 L R R 1 , R 2

BEFORE AFTERI 1 R 1 X'????????' R 1 X'1BEAD4CD'

R 2 X'1BEAD4CD' R 2 X'1BEAD4CD'

Register to RegisterThe Add Register instruction

Adds in binary format, the sending Register, Operand 2 to the receiving Register, Operand 1.


LABEL OPERATION OPERANDS1 # #I 1 A R R 1 , R 2

BEFORE AFTERI 1 R 1 X'6FC32A20' R 1 X'8BADFEED'


Register to RegisterThe Subtract Register instruction

Subtracts in binary format, the sending Register, Operand 2 to the receiving Register, Operand 1.


LABEL OPERATION OPERANDS1 # #I 1 S R R 1 , R 2

BEFORE AFTERI 1 R 1 X'6FC32A20' R 1 X'53D85553'


RR & RX InstructionsThe Comparison instructions - C & CR

Compares a registers 4 bytes algebraically, either to a Register or Fullword.

Register can be 0 through 15Parameter should be on a fullword boundary.

Failure to do this will slow down the instruction


LABEL OPERATION OPERANDS1 # #I 1 C R R 1 , R 2I 2 C R 2 , O U T

O U T D C F ' 5 7 0 0 5 '

BEFORE AFTERI 1 R 1 X'55555555' R 1 X'55555555' CC=2

R 2 X'00000000' R 2 X'00000000'I 2 O U T X'0000DEAD' O U T X'0000DEAD' CC=1

RR & RX instructions

The Condition Code is set after all arithmetic and comparison instructions.

If numeric values are being compared the results can be tested using the following branch instructions


BZ - branch 0 BNZ - branch not 0BM - branch MINUS BNM - branch not MIN.BP - branch Positive BNP - branch not Pos.

BO - branch Ones

Binary/Fixed-point Multiplication

When multiplying, the product can never exceed the number of digits being multiplied.Registers have a fixed 32 bits. When

multiplying 32 bits * 32 bits the result is 64 bits and can’t be stored in a single register.

For Fixed-point Multiplication the result is stored in a “Register Pair” consisting of an even numbered and sequentially odd numbered pair of Registersi.e. – R6 & R7


Binary/Fixed-point MultiplicationThe M and MR instructions

Multiplies the odd numbered register in the register pair of Operand 1, by either 4 consecutive bytes or by the specified register in Operand 2.

The product is stored in the odd numbered register of the pair and overflow is in the even numbered register

Operand 2 parameter should be on a fullword boundary.Failure to do this will slow down the instruction

Incorrect reference to the even-odd paired registers will cause a specification ABEND S0C6



Operand 1, even-odd register pair. Odd numbered register contains the Multiplicand

Operand 2, 4 Byte reference / fullword or Register Contains the Multiplier

Product replaces value in the even-odd register pair.


LABEL OPERATION OPERANDS1 # #

L R 5 , = F ' 4 0 9 6 'I 2 M R 4 , M U L T

M U L T D C F ' 2 1 8 4 5 '

BEFORE AFTERI 2 M U L T X'00005555' M U L T X'00005555'

R 5 X'00001000' R 5 X'05555000'



LABEL OPERATION OPERANDS

1 # #

L R 7 , = F ' 8 0 8 0 8 0 'L R 6 , = F ' 0 4 0 4 0 4 '

I 1 M R R 6 , R 6

BEFORE AFTERI 1 R 6 X'00009DD4' R 6 X'00000007'

R 7 X'000C5490' R 7 X'9A125740'


Square of R7


1 # #

L R 7 , = F ' 8 0 8 0 8 0 'L R 6 , = F ' 0 0 0 0 0 0 '

I 1 M R R 6 , R 7

BEFORE AFTERI 1 R 6 X'00000000' R 6 X'00000098'

R 7 X'000C5490' R 7 X'096ED100'

Binary/Fixed-point DivisionThe D and DR instructions

Divides the even-odd register pair (64 bits) of Operand 1, by either 4 consecutive bytes or by the specified register in Operand 2 (32 bits).

The quotient (32 bits) is stored in the odd numbered register of the pair and remainder (32 bits) is in the even numbered register

Operand 2 parameter should be on a fullword boundary.Failure to do this will slow down the instruction

Incorrect reference to the even-odd paired registers will cause a specification ABEND S0C6


Binary/Fixed-point DivisionWhen dividing, quotients exceeding the 32 bit limit

or dividing by zero will trigger a Divide Exception (ABEND S0C9).

The sign of the division is determined algebraically and is based on the dividend and divisor

For negative Dividends ensure the correct sign by using the following:



1 # #

I 1 L R 6 , D I V I D E N DI 2 S R D A R 6 , 3 2

Binary/Fixed-point DivisionThe D and DR instructions



1 # #

I 1 L R 6 , D I V I D E N DI 2 S R D A R 6 , 3 2I 3 D R R 6 , R 8

D I V I D E N D D C F ' - 6 5 5 3 6 '

BEFORE AFTERI 1 R 6 X'????????' R 6 X'FFFF0000'I 2 R 6 X'FFFF0000' R 6 X'FFFFFFFF'

R 7 X'????????' R 7 X'FFFF0000'I 3 R 6 X'FFFFFFFF' R 6 X'FFFFFF9C'

R 7 X'FFFF0000' R 7 X'FFFFFDEC'R 8 X'0000007B' R 8 X'0000007B'

Binary Halfword InstructionsJust like the binary fullword instructions:

Add an H


A -Add L -LoadC -Compare M -MultiplyS -Subtract ST -Store

AH -Add LH -LoadCH -Compare MH -MultiplySH -SubtractSTH -Store

Binary Halfword InstructionsRegisters using halfword instructions always

refer to the low order 2 bytes of the registerBecause multiplying halfwords will never

exceed fullword capacity there is no need for register pairs


CIS 020 Assembly Programming Chapter 12 - RR-Format Instructions & more RX-Format Instructions ©...

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