Chopper–CDS Amplifier

Group 3Jihyun Cho, Jaeyoung Kim and Inhee Lee

Chopper Amplifier

• Input signal is at near DC (e.g. EEG)

• Up-convert before amp. to avoid 1/f noise

[1] JSSC ‘10

f f f ff

Chopper

• Similar to commutating mixer

Correlated Double Sampling

• Down-conversion by sampling• Add a zero at DC

Chopper + CDS operation

0 HPF 2

Signal Transfer function

• +6dB signal gain at low frequency

10k 100k 1M

-2

0

2

4

6

Sig

nal G

ain

(dB

)

Freq (Hz)

Noise Transfer Function

• Filter out noise and DC at amp output

10k 100k 1M

-200

-180

-160

-140

-120

-100

-80

Am

p. O

ffset

Gai

n (d

B)

Freq (Hz)

Chopper vs. CDS

0.00

0.10

0.20

0.00

0.10

0.20

0.00

0.10

0.20

0 100k 200k

0.00

0.10

0.20

Inpu

t (V

)

Mix

up (V

)

DC

offs

et (V

)

Out

put (

V)

Freq (Hz)

0.00

0.10

0.20

0.00

0.10

0.20

0.00

0.10

0.20

0 100k 200k

0.00

0.10

0.20

Inpu

t (V)

Mix

up (V

)

DC

offs

et (V

)

Out

put (

V)

Freq (Hz)

Input

1st Chop

DC @ amp out

2nd Chop

10mV

100mV Input

1st Chop

DC @ amp out

CDS2x

• Large offset output saturation• Bandpass response is required

100 102 104 106 108

-20

0

20

40

60

gain

(dB

)

frequency (Hz)

Amplifier Design

Bandpass Telescopic Amp.

DC : source degenerationAC : differential pair

Gain suppression@ low freq.

[1] JSSC ‘10

Circuit Implementation

1st order RC LPF CMFB

VCM

Input Offset w/o BPF

# of iteration : 10K• Monte Carlo

101 102 103 104 105 106

-20

0

20

40

60

Gai

n (d

B)

frequency (Hz)101 102 103 104 105 106

-20

0

20

40

60

Gai

n (d

B)

frequency (Hz)

AC Simulation w/ Offset

Conventional Amp. This work (BP Amp.)

1σ

6σ

No offset

0σ~ 6σ

Tran. Simulation w/ Offset

Conventional Amp. This work (BP Amp.)

6σ

1σ

No offset

0σ~ 6σ

0.0 100.0µ

-2

0

2

4

Vou

t (m

V)

Time (sec)

0.0 50.0µ 100.0µ

0.0

0.1

0.2

0.3

0.4

Vou

t (V

)

Time (sec)

Chopping Clock Generator

• Constant current reference• Current starved inverter ring oscillator• Temperature-insensitive clock

BPRP+POLY

RRRPOLY

BN

-40 0 40 80 120300

350

400

450

500

Clo

ck fr

eque

ncy

(kH

z)Temperature (oC)

1.20V 1.32V 1.08V

51 mHz/oC

[2] CICC ‘08

Optimal Chopping Freq.

• Gain > Max – 3dB fCH = 400kHz• Min. input-referred noise density = 22.3nV/√Hz

22.9nV/√Hz

56dB

10k 100k 1M

40

50

60

Chopping frequency (Hz)

Gai

n (d

B)

0

20

40

60

80

100 Input Noise D

ensity (nV/sqrt(H

z))

400kHz

PNOISE Simulation

22.9nV/√Hz

fCH = 400kHz

1 100 10k 1M10n

100n

1µ

10µ

100µN

oise

Den

sity

(V/s

qrt(H

z))

Frequency (Hz)

Input-referred Output-referred

1 10 100 1k2122232425

nV/s

qrt(H

z)

Chip Layout

LPF LPF

CAP

AM

P

Chopper

Clo

ck G

ener

ator

CDSBias

This WorkJSSC ’10

[1]ISSCC ’11

[3]ISSCC ’10

[4]JSSC ’10

[5]

Process [µm] 0.13 0.18 0.35 0.70 0.35VDD [V] 1.2 1.8 5.0 5.0 1.8

Input Noise[nV/√Hz] 23 37 6 11 95

IDD [µA]13.5

(*26.9)14.4 1500 143 13

FOM(VNI

2 /Δf)* I7.1

(*14.1)19.7 51.2 15.8 117

fCH [kHz] 400 500 200 30 50DC Gain [dB] 56 168 150 100 130

Area [mm2] 0.06 1.14 1.26 1.8 0.64

Performance Summary

* Current consumption is doubled for only 1st stage design

Reference[1] M. Belloni, E. Bonizzoni, A. Fornasari, and F. Maloberti, "A Micropower

Chopper—CDS Operational Amplifier", IEEE J. Solid-State Circuits, vol. 45,no 12, pp. 2521-2529, Dec., 2010.

[2] Y. Lin, D. Sylvester, and D. Blaauw, “An Ultra Low Power 1V, 200nWTemperature Sensor for Passive Wireless Application,” CICC, pp. 507-510,Sept., 2008.

[3] Y. Kusuda, “A 5.9nV/√Hz Chopper Operational Amplifier with 0.78μVMaximum Offset and 28.3nV/°C Offset Drift,” ISSCC Dig. Tech. Papers, pp.242-243, Feb., 2011.

[4] Q. Fan, J.H. Huijsing, and K.A.A. Makinwa, “A 21nV/√Hz Chopper-StabilizedMultipath Current-Feedback Instrumentation Amplifier with 2μV Offset,”ISSCC Dig. Tech. Papers, pp. 80-81, Feb., 2010.

[5] Y. Kusuda, “Auto Correction Feedback for Ripple Suppression in a ChopperAmplifier,” IEEE J. Solid-State Circuits, vol. 45, no 8, pp. 1436-1445, Aug.,2010.