Chapter 9 Bootloader

Chapter 9Chapter 9

BootloaderBootloader

Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004

Chapter 9, Slide 2

Learning ObjectivesLearning Objectives

Need for a bootloader.Need for a bootloader. What happens during a reset.What happens during a reset. Boot modes and processes.Boot modes and processes. Memory map.Memory map.


Chapter 9, Slide 3

What is the bootloader?What is the bootloader?

When the DSP is NOT powered or under When the DSP is NOT powered or under reset the internal program memory is in a reset the internal program memory is in a random state.random state.

DMADMA

L2

Cac

he

L2

Cac

he

L1P CacheL1P Cache

L1D CacheL1D Cache

CPUCPU

Boot ConfigBoot Config

EM

IFE

MIF

EPROMEPROM

C6211/C6711C6211/C6711

VCCVCCVCCVCC

AddrAddr00000000000100010002000200030003......


Chapter 9, Slide 4


When the DSP is powered and the CPU is taken When the DSP is powered and the CPU is taken out of reset the internal memory is still in a out of reset the internal memory is still in a random state and the program will start running random state and the program will start running for address zero.for address zero.

DMADMA

L2

Cac

he

L2

Cac

he

L1P CacheL1P Cache

L1D CacheL1D Cache

CPUCPU


EM

IFE

MIF

EPROMEPROM

C6211/C6711C6211/C6711

VCCVCCVCCVCC

AddrAddr00000000000100010002000200030003......

PC=0000PC=0000PC=0001PC=0001PC=0002PC=0002PC=0003PC=0003

00000000000100010002000200030003


Chapter 9, Slide 5


With the boot, a portion of code can be With the boot, a portion of code can be automatically copied from external to automatically copied from external to internal memory.internal memory.

DMADMA

L2

Cac

he

L2

Cac

he

L1D CacheL1D Cache

CPUCPU


EM

IFE

MIF

EPROMEPROM

C6211/C6711C6211/C6711

VCCVCCVCCVCC

L1P CacheL1P Cache


Chapter 9, Slide 6

What happens at reset: System timelineWhat happens at reset: System timeline

When the device is held in reset:When the device is held in reset: The device is initialised to the default state.The device is initialised to the default state. Most 3-state outputs are in the high impedance state.Most 3-state outputs are in the high impedance state.

Device ResetDevice Reset

/RS pin/RS pin

CPU ResetCPU Reset


Chapter 9, Slide 7


On the rising edge of the /RS pin:On the rising edge of the /RS pin: The processor checks the boot mode configuration (HD[4:3]) and starts the boot loader.The processor checks the boot mode configuration (HD[4:3]) and starts the boot loader. The EDMA automatically copies 1K bytes from the beginning of CE1 location to the internal program memory starting at address zero.The EDMA automatically copies 1K bytes from the beginning of CE1 location to the internal program memory starting at address zero.

Device ResetDevice Reset CPU ResetCPU Reset

Boot load in Boot load in operationoperation

/RS pin/RS pin

CPU ResetCPU Reset


Chapter 9, Slide 8


Once the boot loader has finished initialising the internal memory the CPU is taken out of reset.Once the boot loader has finished initialising the internal memory the CPU is taken out of reset. The CPU starts running from address zero.The CPU starts running from address zero.

Device ResetDevice Reset CPU ResetCPU Reset

Boot load in Boot load in operationoperation

/RS pin/RS pin

CPU ResetCPU Reset


Chapter 9, Slide 9

‘‘C6211 and ‘C6711 Memory mapC6211 and ‘C6711 Memory map

The ‘C6211 and ‘C6711 has only one The ‘C6211 and ‘C6711 has only one memory map, MAP0.memory map, MAP0.

Internal memory is always located at Internal memory is always located at address zero.address zero.

Internal memory can be used as either Internal memory can be used as either program or data.program or data.


Chapter 9, Slide 10

‘‘C6211 and ‘C6711 Memory mapC6211 and ‘C6711 Memory map


Chapter 9, Slide 11

Boot modes and processesBoot modes and processes

Two questions need to be answered Two questions need to be answered about the bootloader, these are:about the bootloader, these are: What methods of boot are available and What methods of boot are available and

how are they selected?how are they selected? How does the DSP know what type of How does the DSP know what type of

memory it is going to boot from?memory it is going to boot from?


Chapter 9, Slide 12

Bootloader operational modesBootloader operational modes

The TMS320C6211 and ‘C6711 support The TMS320C6211 and ‘C6711 support the following boot configurations:the following boot configurations:

(1)(1) Host Port Interface (HPI) boot.Host Port Interface (HPI) boot.

(2)(2) 8-bit ROM boot.8-bit ROM boot.



Note: with the ‘C6211 and ‘C6711 there is no Note: with the ‘C6211 and ‘C6711 there is no “no-boot” mode as for the other ‘C6000 “no-boot” mode as for the other ‘C6000 processors.processors.


Chapter 9, Slide 13

Bootloader configurationBootloader configuration

The boot mode is selected by pulling the The boot mode is selected by pulling the HD[4:3] pins (HPI data bus pins) high HD[4:3] pins (HPI data bus pins) high or low at reset.or low at reset.

Depending on the voltages on this pins Depending on the voltages on this pins one of the four modes is selected.one of the four modes is selected.

Boot modeBoot mode

HPI bootHPI boot8-bit ROM boot 8-bit ROM boot 16-bit ROM boot16-bit ROM boot32-bit ROM boot32-bit ROM boot

HD[4:3]HD[4:3]

0000010110101111


Chapter 9, Slide 14

Endianess configurationEndianess configuration

The endian mode is determined at the The endian mode is determined at the same time as boot mode.same time as boot mode.

Pulling pin HD[8] high or low selects the Pulling pin HD[8] high or low selects the following endian modes.following endian modes.

Device operationDevice operation

Big endianBig endianLittle endianLittle endian

HD[8]HD[8]

0011

Note: ensure that the software development Note: ensure that the software development tools are also configured with the same tools are also configured with the same endian type as the hardware.endian type as the hardware.


Chapter 9, Slide 15

Clock mode configurationClock mode configuration

The input clock mode is also determined at The input clock mode is also determined at the same time as boot mode.the same time as boot mode.

Pulling CLKMODE0 pin high or low Pulling CLKMODE0 pin high or low selects the following modes.selects the following modes.

PLL frequency multiplierPLL frequency multiplier

No multiplicationNo multiplicationInput frequency is multiplied by 4Input frequency is multiplied by 4

CLKMODE0CLKMODE0

0011


Chapter 9, Slide 16

Boot process: HPI boot modeBoot process: HPI boot mode

In this mode the following sequence is In this mode the following sequence is used:used: The CPU is held in reset while the remaining The CPU is held in reset while the remaining

of the device is released.of the device is released. The host processor initialises the CPU’s The host processor initialises the CPU’s

memory space through the HPI.memory space through the HPI. When all the necessary memory is initialised When all the necessary memory is initialised

the host processor takes the CPU out of reset the host processor takes the CPU out of reset by writing a ‘1’ to the DSPINT bit filed of by writing a ‘1’ to the DSPINT bit filed of the Host Port Interface Control (HPIC) the Host Port Interface Control (HPIC) register.register.

DSPINT HPICDSPINT HPIC

1717


Chapter 9, Slide 17


DMADMA

L2

Cac

he

L2

Cac

he

L1D CacheL1D Cache

CPUCPU


EM

IFE

MIF

DRAMDRAM

C6211/C6711C6211/C6711

/RS/RS

L1P CacheL1P Cache

HP

IH

PIHOSTHOST


Chapter 9, Slide 18


Question: How does the host processor Question: How does the host processor check that the memory has been check that the memory has been initialised correctly?initialised correctly?

Answer: The host can read and write to Answer: The host can read and write to any address so it can check by reading the any address so it can check by reading the ‘initialised’ memory.‘initialised’ memory.


Chapter 9, Slide 19


Question: If an external memory needs to Question: If an external memory needs to be initialised via the HPI how do you be initialised via the HPI how do you ensure that the EMIF is set correctly?ensure that the EMIF is set correctly?

Answer: The first thing the Host should Answer: The first thing the Host should do is to write the EMIF register then do is to write the EMIF register then write to the external memory locations.write to the external memory locations.


Chapter 9, Slide 20

Boot process: ROM boot modeBoot process: ROM boot mode

In this mode the following sequence is In this mode the following sequence is used:used: The CPU is held in reset while the The CPU is held in reset while the

bootloader operates.bootloader operates. The bootloader copies 1Kbytes from CE1 The bootloader copies 1Kbytes from CE1

with the default settings to internal memory with the default settings to internal memory at address zero.at address zero.

CPU is taken out of reset.CPU is taken out of reset. CPU starts running code from address zero.CPU starts running code from address zero.


Chapter 9, Slide 21

Boot process: ROM boot modeBoot process: ROM boot mode

DMADMA

L2

Cac

he

L2

Cac

he

L1D CacheL1D Cache

CPUCPU


EM

IFE

MIF

DRAMDRAM

C6211/C6711C6211/C6711

/RS/RS

L1P CacheL1P Cache

ROMROM

VCCVCC

Chapter 9Chapter 9

BootloaderBootloader

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Chapter 9 Bootloader

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