Chapter 6Working with Time: Interrupts, Counters and Timers

The aims of this chapter are to introduce:• Why we need interrupts and counter/timers;• The underlying interrupt hardware structure;• The 16F84A interrupt structure;• How to write simple programs with interrupts;• The underlying microcontroller counter/timer hardware structure;• The 16F84A Timer 0 structure;• Simple applications of the counter/timer;• The Sleep mode.

Designing Embedded Systemswith PIC Microcontrollers: Principles and Applications

2nd Edition. Tim Wilmshurst

Instructors using Designing Embedded Systems with PIC Microcontrollers are welcome to use or change these slides as they see fit. Feedback, to t.j.wilmshurst@derby.ac.uk, is welcomed. The copyright to all diagrams is held by Microchip Technology, or T. Wilmshurst, unless otherwise stated

An Interrupt Review

An Interrupt is an external input to the CPU. The interrupt facility allows the processor to respond rapidly to external changes.

When an Interrupt is detected by the CPU, it:- completes the current instruction,- stores the address of the next instruction, and possibly other key variables (e.g. contents of Accumulator and Condition Code Register), onto the stack,- jumps to an interrupt service routine (ISR), whose address is determined by an "interrupt vector".

• Many interrupts can be masked, ie disabled, by setting a bit in a control register. In some processors however (but not PIC), some interrupts are not maskable.

• If an Interrupt is masked, then there is a possibility that it will not be detected. • Therefore there are also Interrupt Flags, bits in SFRs, which are set whenever an

associated interrupt occurs. These record the fact that an interrupt has occurred, even if the CPU is unable to respond to it.

• An Interrupt that has occurred, but has not received CPU response, is called a Pending Interrupt.

• In the case of several interrupts, one ISR is completed before the next interrupt is responded to.

S Q

InterruptFlag*

Interrupt X

Interrupt X Enable*

OtherGlobal Interrupt Enable*

Non-maskable

Interrupt

Interrupt

inputs to

CPUR(reset by CPUor program)

* bits in a Special Function Register

interruptsmaskablereplicated for all other maskable interrupts

A Generic Interrupt Structure

The Reset Vector

Interrupt Routine always starts here

Control SFR(s)

Peripheral

Data Transfer SFR(s)

Microcontroller

Core

"Outside

World"

Interrupt(s)

Microcontroller Interaction with Peripherals, via SFR and Interrupt

Recalling Interrupt-Related Points that have already Come up

The PIC 16F84A Interrupt Structure

Global Interrupt Enable

External Interrupt

EEPROM Write Complete

Port B Change

Timer Overflow

Interrupt Flag

RA2

RA3

RA4/T0CKI

MCLR

V

RB0/INT

RB1

RB2

RB3 RB4

RB5

RB6

RB7

RA1

RA0

OSC1/CLKIN

OSC2/CLKOUT

VDDSS Supply voltage

Oscillator connections

Port A, Bit 0

Port A, Bit 1Port A, Bit 2

Port A, Bit 3

*Port A, Bit 4

Ground

**Port B, Bit 0

Port B, Bit 1

Port B, Bit 2

Port B, Bit 3

Port B, Bit 7

Port B, Bit 6

Port B, Bit 5

Port B, Bit 4

*also Counter/Timer clock input

**also external Interrupt input

Reset

1

9 10

18

External Interrupt input

Note that the interrupt flags are set by the interrupt action, but must be cleared in the program, during the ISR. What happens if this isn’t done?

The PIC 16F84A INTCON Register

Interrupt Detected

Complete Current Instruction

Save Program Counter on Stack

Reload PC with 0004H

Continue Program Execution

Instruction is RETFIE?

No

Set GIE to 1

Load PC from Stack

Continue Program Execution

Yes

Clear GIE

ISR execution starts

main program is running

main program continues

The PIC 16 Series Interrupt Response

Note that this diagram shows what the PIC microcontroller itself does as an interrupt occurs. The programmer need not worry about any of these actions, but needs to know that they’re happening.

Programming with Single Interrupts

It is comparatively easy to write simple programs with just one interrupt. For success, the essential points to watch are:

• Start the ISR at the Interrupt Vector, location 0004;

• Enable the interrupt that is to be used, by setting enable bits in the INTCON and/or PIE registers;

• Set the Global Enable bit, GIE;

• Once in the ISR, clear the interrupt flag;

• End the ISR with a retfie instruction;

• Ensure that the interrupt source, for example Port B or Timer 0, is actually set up to generate interrupts!

;********************************************************;Int_Demo1;This program demonstrates simple interrupts. ;Intended for simulation.;tjw rev.14.2.09 Tested in simulation 14.9.09;********************************************************...... org 00 goto start;

org 04 ;here if interrupt occursgoto Int_Routine

; org 0010......;Comment in or out following instruction to change ;interrupt edge; bcf option_reg,intedg

bcf status,rp0 ;select bank 0 bsf intcon,inte ;enable external interruptbsf intcon,gie ;enable global int

wait movlw 0a ;set up initial port output valuesmovwf portanopmovlw 15movwf portagoto wait

;org 0080

Int_Routine movlw 00movwf portabcf intcon,intf ;clear the interrupt flagretfieend

A Simple Interrupt

Application

Try Programming Exercise 6.1

The INTCON Register of a PIC 16F84A is set as shown in a) below.a) Determine which interrupts are enabled. b) An interrupt occurs, and the INTCON register is found to have changed to b). Which interrupt source has called? c) Which bit must the user change before the end of the ISR?

INTCON INTCON1 0 1 0 1 0 0 0 1 0 1 10 0 0 1

Interrupt Example 1

a) b)

org 0000 goto start

org 0014 goto my_interrupt

;this is the interrupt routinemy_interrupt movlw 0f

addwf counter1,1 btfsc flags,2 ;test motor run flag clrf overflow return

;Program starts herestart bsf status,5…

Interrupt Example 2

An inexperienced programmer writes the code opposite for a 16F84A to respond to an external interrupt. He correctly enables the interrupt, and no other interrupts are enabled.

a) How should the INTCON register be set?

b) What are the errors in the program excerpt?

Moving to Multiple Interrupts – Identifying the Source

As we have seen, the 16F84A has four interrupt sources, but only one interrupt vector. Therefore, if more than one interrupt is enabled, it is not obvious at the beginning of an ISR which interrupt has occurred. In this case the programmer must write the ISR so that at its beginning it tests the flags of all possible interrupts and determines from this which one has been called. This is shown in the example ISR below.

interrupt btfsc intcon,0 ;test RBIF goto portb_intbtfsc intcon,1 ;test external interrupt flaggoto ext_intbtfsc intcon,2 ;test timer overflow flaggoto timer_int

portb_int...place portb change ISR here...

bcf intcon,0 ;and clear the interrupt flagretfie

ext_int...place external interrupt ISR here...

bcf intcon,1 ;and clear the interrupt flagretfie

timer_int...place timer overflow ISR goes here...

bcf intcon,2 ;and clear the interrupt flagretfie

;This subroutine adds two 16-bit numbers, stored in phi-plo, and qhi-qlo, ;and stores result in rhi-rlo. 16-bit overflow in Carry flag at end. Double_add

movf plo,0 ;move plo to the W regaddwf qlo,0 ;add lower bytesmovwf rlobtfsc status,0incf phi,1 ;add in Carrymovf phi,0addwf qhi,0 ;add upper bytes

movwf rhi return

Int_Routinebcf status,0 ;clear the Carry flagmovlw 0ff ;change W reg valuebcf intcon,intfretfieend

Because an interrupt can occur at any time, it has the power to be extremely destructive. The program fragment below is written to illustrate this.

Context Saving

Try Programming Exercises 6.2 and

6.3

The temporary data being used in a particular activity in the CPU is called its context. In the PIC 16 Series this includes at least the W register value and the Status register. It is clearly important to save the context when an interrupt occurs. Some microcontrollers do this automatically, but PIC 16 Series microcontrollers do not. Therefore, it is up to the programmer to ensure that whatever context saving that is needed is done in the program.

Critical Regions and Masking

In certain program parts we will not want to accept the intrusion of an interrupt under any circumstances, with or without context saving. We call these critical regions. We can disable, or mask, the interrupts for their duration, by manipulating the enable bits in the INTCON register.

Critical regions may include:• times when the microcontroller is simply not readied to act on the interrupt (for example during initialization – hence only enable interrupts after initialization is complete); • time-sensitive activity, including timing loops and multi-instruction setting of outputs;• any calculation made up of a series of instructions where the ISR makes use of the result.

The Digital Counter Reviewed

It is very easy to make a digital counter using flip-flops. Counters can be made which count up, count down, which can be cleared back to zero, pre-loaded to a certain value, and which by the provision of an overflow output can be cascaded with other counters. A simple example is shown.

The Counter as Timer

Clock

Pulse Input

T

1 2 3 4 5 n

T c If the incoming clock pulses are regular in frequency, the counter can also measure time. In this example time is being measured between two pulses.

If TC is clock period, and n cycles are counted, then the period during which counting has taken place is nTC .Example: clock frequency is 1 MHz, clock period is therefore 1us, before overflow counter can count:

8-bit 255us16-bit 65535us = 65.5ms24-bit 16.78 secs32-bit 4,295 secs = 1hr, 11minutes

8-bit Counter

Multiplexer selecting

counting source Multiplexer selecting prescalerInput edge select

The 16F84A TIMER0 Module

The 16F84A OPTION Register

;********************************************************************;cntr_demo Counter Demonstration;This program demos Timer 0 as counter, using ping-pong hardware ;TJW 15.4.05 Tested 15.4.05;********************************************************************......

list p=16F84A#include p16f84A.inc

;org 00

; Initialisebsf status,rp0 ;select memory bank 1movlw B'00011000'movwf trisa ;port A according to above pattern movlw 00movwf trisb ;all port B bits outoutmovlw B'00101000';set up TMR0 for external input, +ve edge,

;no prescalemovwf TMR0 ;as we are in Bank 1, this addresses OPTIONbcf status,rp0 ;select bank 0

;movlw 04 ;switch on "out of play" led to show power is onmovwf porta

loop movf TMR0,0 ;Continuously display Timer 0 on Port Bmovwf portbgoto loopend

Application 1: Object or Event Counting

The simplest application of Timer 0 is to use it as a counter, counting pulses entering the microcontroller through the external input. This demo program configures the Timer 0 module to count paddle presses on the Ping-pong hardware.

Try Programming Exercise 6.4

...;Initialise

org 0010Start bsf status,5 ;select memory bank 1

movlw B'00011000'movwf trisa ;port A according to above pattern movlw 00movwf trisb ;all port B bits opmovlw B'00000010' ;set up TMR0 for internal input, prescale

by 8 movwf TMR0 ;as we are in Bank 1, this addresses OPTIONbcf status,5 ; select bank 0

...

...;introduces delay of 5ms approxdelay5 movlw D’131’ ;preload counter, so that 125 cycles, each ;of 40us, occur before timer

overflow movwf TMR0

del1 btfss intcon,2 ;test for Timer Overflow flag goto del1 ;loop if not setbcf intcon,2 ;clear Timer Overflow flag

return

Application 2: Hardware-Generated Time Delays

We saw in an earlier lecture how program loops could be used to generate time delays. Here we hand over that delay function to the Timer. The internal oscillator signal is now used as clock source. The example below shows part of the initialisation, as well as the delay routine. How useful is this program change, compared to the previous software loop?

Try Programming Exercise 6.5

The purpose of the interrupt is to attract the attention of the CPU quickly, but actually how quickly does this happen? The time between the interrupt occurring and the CPU responding to it is called the latency. This depends on certain aspects of hardware and on the characteristics of the program running. This timing diagram shows how the mid-range PIC family responds to an enabled external interrupt.

Taking Things Further: Interrupt Latency

End of Lecture

Note