Chapter 6 register

By:Siti Sabariah Hj. SalihinElectrical Engineering Department

EE 202 : DIGITAL ELECTRONICS1

CHAPTER 6 : REGISTER

Course Learning Outcomes, CLOCourse Learning Outcomes, CLOCourse Learning Outcomes, CLOCourse Learning Outcomes, CLOUpon completion of the course, students should be able to:

� CLO 3 : Draw logics diagrams, truth tables and timing diagrams for all common flip flops and use these to implement sequential logic circuits correctly.

CHAPTER 6 : REGISTER

EE 202 : DIGITAL ELECTRONICS


Upon completion of this Chapter, students should be able toUpon completion of this Chapter, students should be able toUpon completion of this Chapter, students should be able toUpon completion of this Chapter, students should be able to :6.1 Understand the concepts and applications of registers and shift

Registers. 6.1.1 Classify the Shift Register according to the methods of data input/output: SISO, PIPO, SIPO, PISO. 6.1.2 State the applications of Shift registers listed in 6.1.1 6.1.3 Interpret the Operation and circuit of Shift Register listed in 6.1.1 6.1.4 Interpret the Operation and application of an integrated circuits Shift Register listed in 6.1.1 6.1.5 Explain the application of Shift Register as arithmetic circuits: 6.1.6 Explain the operations and application of Ring Counters and Johnson Counter

CHAPTER 6 : REGISTEREE 202 : DIGITAL ELECTRONICS

Introduction – Shift Register

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� Shift registers are constructed using several flip-flop, connected in such a way to STORE and TRANSFER/ Shift digital data.

� Basically, D flip-flop is used. The input data (either ‘0’ or ‘1’) is applied to the D terminal and the data will be stored at Q during positive/negative-edge transition of the clock pulse. D Q

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� One D FF is used to store 1-bit of data. Thus, the number of flip-flops used is the same with the number of bit stored.

� Shift register mean that the data in each FF can be transferred/move to other FF upon edge triggering of the clock signal. � Four types of data movement in shift register are:-

� Parallel in / parallel out (PIPO) (PIPO) (PIPO) (PIPO)

� Serial in / serial out (SISO) (SISO) (SISO) (SISO)

� Parallel in / serial out (PISO) (PISO) (PISO) (PISO)

� Serial in / parallel out (SIPO) (SIPO) (SIPO) (SIPO)

Shift Register


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SerialSerialSerialSerial ParallelParallelParallelParallel•Movement of N-bit data require N number of CLK pulses. Thus, the operation is slow.•Only one FF is required to be connected at the output terminal, thus only one wire is required.

•Require only one CLK pulse to transfer all N-bit of data. Thus, operation is faster than serial.•Required N number of connection to the output terminal, which is proportional to the number of bit. Thus, too many connection is required.

� Serial DataSerial DataSerial DataSerial Data VS Parallel DataParallel DataParallel DataParallel Data movement


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D Q2

CP

D Q1

CP

D Q3

CP

D Q0

CP

D3 D2 D1 D0

Q3 Q2 Q1 Q0

� Flip-flop configuration for PIPO register.

CLKCLKCLKCLK


Parallel in / parallel out (PIPO) (PIPO) (PIPO) (PIPO)

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PIPO data movement. PIPO data movement. PIPO data movement. PIPO data movement.

Q3

Q2

CLK

Q1

Q0

1 0 1 1 1

00000000

0000

0000

1 0 10 0

0

0

1 1 1 1

0 0 1 0

D3

D2

D1

D0

1

0

1

0

0

1

1

0

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� Flip-flop connection for SISO.

D QD QD QD Q1111

FF1 FF1 FF1 FF1CPCPCPCP

D QD QD QD Q2222


D QD QD QD Q0000


D QD QD QD Q3333

FF3 FF3 FF3 FF3CPCPCPCPCLKCLKCLKCLK

DDDDININININ

1111stststst CLK CLK CLK CLK 2222ndndndnd CLK CLK CLK CLK 3333rdrdrdrd CLK CLK CLK CLK 4444thththth CLK CLK CLK CLK


Serial in / serial out (SISO) (SISO) (SISO) (SISO)

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SISO data movement. Binary data 10111 is transferred!

DATA-IN

Q3

Q0

Q1

1st

CLK

2nd 3rd 4th 5th

Q2

1 0 1 1 1

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Flip-flop connection for PISO

D Q1

FF1 FF1 FF1 FF1

CP

D Q2

FF2 FF2 FF2 FF2

CP

D Q0

FF0 FF0 FF0 FF0

CP

D Q3

FF3 FF3 FF3 FF3

CPCLK

D0 D1 D2 D3SHIFT/LOAD

Serial data out

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� PISO data movement.

SHIFT/LOAD

CLK

Q3

0

0 1 1 1

1 0 1

0

0

0

1

1 1 1 1

0 0 1 1

D0

D1

D2

D3

1 0

Parallel in / serial out (PISO) (PISO) (PISO) (PISO)

0000 1 0 1

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Integrated circuits Shift Register

Chips for shift registers� 74164 is a 8-bit SIPO shift register

74164

CLK

CLR

AB

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7


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Chips for shift registers

� 74165 is a 8-bit PISO register

74165

CLK

CLK INH

SH/LDSER

D0 D1 D2 D3 D4 D5 D6 D7

Q7

Q7



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Chips for shift registers� 74195 can be used as a 4-bit PIPO register

74195

CLK

SH/LD

JK

Q0 Q1 Q2 Q3

CLR

D0 D1 D2 D3



� Shift Register as Divider 2 circuits Example : 14 = 1 1 1 0 7 = 0 1 1 1 3.5= 3 = 00 1 1 1.5 = 1 = 0 0 0 1

Notes : Shift to RIGHT as divider 2.

Shift Register as arithmetic circuits:Shift Register as arithmetic circuits:Shift Register as arithmetic circuits:Shift Register as arithmetic circuits:


� Shift Register as Multiplier 2 circuits Example : 8 = 1100 16 = 10000 32 = 100000 64 = 1000000

Notes : Shift to LEFT as Multiplier 2.

Shift Register as arithmetic circuits:Shift Register as arithmetic circuits:Shift Register as arithmetic circuits:Shift Register as arithmetic circuits:


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� A shift register countershift register countershift register countershift register counter is a shift register whose output being fed back (connected back) to the serial input. This shift register would count the

state in a unique sequence!� Two types of shift register counter:-

� The ring counterThe ring counterThe ring counterThe ring counter� The Johnson counterThe Johnson counterThe Johnson counterThe Johnson counter

Shift Register Counters


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Ring Counter (continue)

�Ring counters are used to construct “One-Hot” counters�It can be constructed for any desired MOD number�A MOD-N ring counter uses N flip-flops connected in the arrangement as shown in fig. a)�In general ring-counter will require more flip-flops than a binary counter for the same MOD number


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Ring Counter

Q3 Q2 Q1 Q0


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22


0 0 0 1

1 0 0 0

0 1 0 0

0 0 1 0


� Exercise: Draw a 3 Bit Ring Counter Circuit with initial input 010 . show a True Table until 8 clock pulse/number sequence and draw the output waveform.

� Answer: Discuss with Your lecturer

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Johnson Counter Or Twisted-ring counter

�Johnson counter constructed exactly like a normal ring counter except that the inverted output of the last flip-flop is fed back to

first flip-flop


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Johnson Counter (Continue)


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Johnson Counter (Continue)

A

B

C

0 1 1 1

0 0 1 1

0 0 0 1


1. "Digital Systems Principles And Application" Sixth Editon, Ronald J. Tocci.

2. "Digital Systems Fundamentals" P.W Chandana Prasad, Lau Siong Hoe, Dr. Ashutosh Kumar Singh, Muhammad Suryanata.

REFERENCES: REFERENCES: REFERENCES: REFERENCES:

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Chapter 6 register

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