1-1

Chapter 2

Logic Gates

08 Hours

18 Marks

2.1 Logic Gates

Logic gates are electronic circuits. For implementing various logic

expressions (a.k.a. Boolean expressions), logic gates can be used. The logic gate

is the most basic building block of combinational logic. Logic gate performs a

logical operation on one or more logical inputs and produce a single logical

output. Before studying logic gates one should know the things discussed here.

Truth table for a logic system lists all possible combinations of input

variables and corresponding output generated by the logic system. Output of a

logic system can be found from the logic expression (i.e. Boolean expression) of

that logic system.

When the number of input binary variables is only one, then there are

only two possible inputs, i.e. ‘0’ and ‘1’. If the number of inputs is two, there can

be four possible input combinations, i.e. 00, 01, 10 and 11. Similarly, for three

input binary variables, the number of possible input combinations becomes

eight, i.e. 000, 001, 010, 011, 100, 101, 110 and 111.

In general, if a logic circuit has n binary inputs, its truth table will have

2n possible input combinations (i.e. truth table contains 2n rows).

Figure 2.1 shows a sample 2–input logic system and table 2.2 shows a

sample truth table for a 2–input logic system.

Figure 2.1: A sample 2–input logic system

Table 2.1: A sample Truth Table

Input Output

A B Y

0 0 0

0 1 0

1 0 0

1 1 1

Logic

System

A

B Y

1-2

2.1.1 Basic Gates Logic gate is the most basic building block of any digital system (even for

computers). Each basic logic gate is a piece of hardware or an electronic circuit

that can be used to implement some basic logic expression. For implementing

various laws of Boolean algebra, basic gates can be used. Basic gates perform

basic logical operations on the logical inputs.

There are three basic logic gates, namely the OR gate, the AND gate and

the NOT gate.

2.1.1.1 OR gate

The OR gate performs logical OR operation on two or more inputs

(generally referred as logic variables). The OR gate has two or more inputs and

a single output. Output of an OR gate is LOW if all the inputs are LOW. In all

other cases, output of OR gate is HIGH.

The OR operation on two independent logical variables A and B can be

represented by following logic expression (sometimes also called logical

equation).

𝑌 = 𝐴 + 𝐵

It is read as Y is equal to A OR B. The logic expression shown above is

logic expression for 2–input OR gate. Logical symbol for 2 – input OR gate is

shown in figure 2.2.

Figure 2.2: Logical symbol for 2 – input OR gate

Truth table for 2 – input OR gate is shown in table 2.2.

Table 2.2: Truth table for 2 – input OR gate

i/p o/p

A B Y

0 0 0

0 1 1

1 0 1

1 1 1

Figure 2.3: IC pin configuration for IC 7432

A

B

Y=A+B

1-3

The TTL IC used for 2 – input OR gate is 7432. It is a quad 2 – input OR

gate. i.e. There are four 2 – input OR gates in the IC. Pin configuration of IC

7432 is shown in figure 2.3.

The logic expression or logical equation for 3 – input OR gate is shown

below.

𝑌 = 𝐴 + 𝐵 + 𝐶

Logical symbol for 3 – input OR gate is shown in figure 2.4.

Figure 2.4: Logical symbol for 3 – input OR gate

Truth table for 3 – input OR gate is shown in table 2.3.

Table 2.3: Truth table for 3 – input OR gate

i/p o/p

A B C Y

0 0 0 0

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

The TTL IC used for 3 – input OR gate is 744075. It is a triple 3 – input

OR gate. i.e. There are three 3 – input OR gates in the IC.

2.1.1.2 AND gate

The AND gate performs logical AND operation on two or more inputs

(generally referred as logic variables). The AND gate has two or more inputs

and a single output. Output of an AND gate is HIGH if all the inputs are HIGH.

In all other cases, output of AND gate is LOW.

The AND operation on two independent logical variables A and B can be

represented by following logic expression (sometimes also called logical

equation).

𝑌 = 𝐴. 𝐵

It is read as Y is equal to A AND B. The logic expression shown above is

logic expression for 2–input AND gate. Logical symbol for 2 – input AND gate is

shown in figure 2.5.

A

C

Y=A+B+C B

1-4

Figure 2.5: Logical symbol for 2 – input AND gate

Truth table for 2 – input AND gate is shown in table 2.4.

Table 2.4: Truth table for 2 – input AND gate

i/p o/p

A B Y

0 0 0

0 1 0

1 0 0

1 1 1

The TTL IC used for 2 – input AND gate is 7408. It is a quad 2 – input

AND gate. i.e. There are four 2 – input AND gates in the IC. Pin configuration of

IC 7408 is shown in figure 2.6.

Figure 2.6: IC pin configuration for 7408

The logic expression or logical equation for 3 – input AND gate is shown

below.

𝑌 = 𝐴. 𝐵. 𝐶

Logical symbol for 3 – input AND gate is shown in figure 2.7.

Figure 2.7: Logical symbol for 3 – input AND gate

Truth table for 3 – input AND gate is shown in table 2.5.

A

C

Y=A.B.C B

A

B

Y=A.B

1-5

Table 2.5: Truth table for 3 – input AND gate

i/p o/p

A B C Y

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 1

The TTL IC used for 3 – input AND gate is 7411. It is a triple 3 – input

AND gate. i.e. There are three 3 – input AND gates in the IC.

2.1.1.3 NOT gate

The NOT gate performs logical NOT (i.e. negation) operation on an input

(generally referred as logic variable). The NOT gate has a single input and a

single output. Output of an AND gate is complement of its input. If input is

LOW, output is HIGH and if input is HIGH, output is LOW.

The NOT operation on a logical variable X can be represented by

following logic expression (sometimes also called logical equation).

𝑌 = �̅�

or

𝑌 = 𝑋′

It is read as Y is equal to NOT X. Logical symbol for NOT gate is shown in

figure 2.8.

Figure 2.8: Logical symbol for NOT gate

Truth table for NOT gate is shown in table 2.6.

Table 2.6: Truth table NOT gate

i/p o/p

X Y

0 1

1 0

The TTL IC used for NOT gate is 7404. It is a hex inverter. i.e. There

are six NOT gates in the IC. Pin configuration of IC 7404 is shown in figure 2.9.

X 𝑌 = �̅�

1-6

Figure 2.9: IC pin configuration of 7404

2.1.2 Universal Gates In addition to basic gates, other logic gates like NAND and NOR gates are

also used in designing digital circuits. The NAND gate and NOR gate are called

universal gates because using any one type of those gates any logic expression

can be realized. Implementation of any logic expression is economical if it is

done using any one type of universal gates (as compared to implementation

using basic gates). The basic reason behind this is the easier fabrication of these

gates.

2.1.2.1 NAND gate

NAND stands for NOT AND. The name suggests that it is a combination

of AND gate followed by a NOT gate as shown in figure 2.10.

Figure 2.10: NAND gate as a combination of AND and NOT gates

The NAND gate has two or more inputs and a single output. Output of an

NAND gate is LOW if all the inputs are HIGH. In all other cases, output of

NAND gate is HIGH.

The NAND operation on two independent logical variables A and B can be

represented by following logic expression (sometimes also called logical

equation).

𝑌 = 𝐴. 𝐵̅̅ ̅̅ ̅

The logic expression shown above is logic expression for 2–input NAND

gate. Logical symbol for 2 – input NAND gate is shown in figure 2.11.

Figure 2.11: Logical symbol for 2 – input NAND gate

A

B

𝑌 = 𝐴. 𝐵̅̅ ̅̅ ̅

A

B Y

1-7

Truth table for 2 – input NAND gate is shown in table 2.7. It can be

obtained by negating the output of AND gate.

Table 2.7: Truth table for 2 – input NAND gate

i/p o/p

A B Y

0 0 1

0 1 1

1 0 1

1 1 0

The TTL IC used for 2 – input NAND gate is 7400. It is a quad 2 – input

NAND gate. i.e. There are four 2 – input NAND gates in the IC. Pin

configuration of IC 7400 is shown in figure 2.12.

Figure 2.12: IC pin configuration of 7400

The logic expression or logical equation for 3 – input NAND gate is shown

below.

𝑌 = (𝐴. 𝐵. 𝐶)̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅

Logical symbol for 3 – input NAND gate is shown in figure 2.13.

Figure 2.13: Logical symbol for 3 – input NAND gate

Table 2.8: Truth table for 3 – input NAND gate

i/p o/p

A B C Y

0 0 0 1

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 0

A

C

𝑌 = (𝐴. 𝐵. 𝐶)̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅ B

1-8

Truth table for 3 – input NAND gate is shown in table 2.8. The TTL IC

used for 3 – input NAND gate is 7410. It is a triple 3 – input NAND gate. i.e.

There are three 3 – input NAND gates in the IC.

2.1.2.2 NOR gate

NOR stands for NOT OR. The name suggests that it is a combination of

OR gate followed by a NOT gate as shown in figure 2.14.

Figure 2.14: NOR gate as a combination of OR and NOT gates

The NOR gate has two or more inputs and a single output. Output of an

NOR gate is HIGH if all the inputs are LOW. In all other cases, output of NOR

gate is LOW.

The NOR operation on two independent logical variables A and B can be

represented by following logic expression (sometimes also called logical

equation).

𝑌 = 𝐴 + 𝐵̅̅ ̅̅ ̅̅ ̅̅

The logic expression shown above is logic expression for 2–input NOR

gate. Logical symbol for 2 – input NOR gate is shown in figure 2.15.

Figure 2.15: Logical symbol for 2 – input NOR gate

Truth table for 2 – input NOR gate is shown in table 2.9. It can be

obtained by negating the output of OR gate.

Table 2.9: Truth table for 2 – input NOR gate

i/p o/p

A B Y

0 0 1

0 1 0

1 0 0

1 1 0

The TTL IC used for 2 – input NOR gate is 7402. It is a quad 2 – input NOR

gate. i.e. There are four 2 – input NOR gates in the IC. Pin configuration for IC

7402 is shown in figure 2.16.

A

B 𝑌 = 𝐴 + 𝐵̅̅ ̅̅ ̅̅ ̅̅

A

B Y

1-9

Figure 2.16: IC pin configuration for 7402

The logic expression or logical equation for 3 – input NOR gate is shown

below.

𝑌 = (𝐴 + 𝐵 + 𝐶)̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅

Logical symbol for 3 – input NOR gate is shown in figure 2.17.

Figure 2.17: Logical symbol for 3 – input NOR gate

Truth table for 3 – input NOR gate is shown in table 2.10.

Table 2.10: Truth table for 3 – input NOR gate

i/p o/p

A B C Y

0 0 0 1

0 0 1 0

0 1 0 0

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 0

The TTL IC used for 3 – input NOR gate is 7427. It is a triple 3 – input

NOR gate. i.e. There are three 3 – input NOR gates in the IC.

2.1.3 Derived Gates The gates those are derived from basic gates are called as derived gates.

Sometimes NAND gate and NOR gate are also referred as derived gates (as they

are derived from basic gates). Two more derived gates are Ex-OR gate and Ex-

NOR gate.

2.1.3.1 Ex-OR gate (XOR gate)

The Ex-OR stands for Exclusive OR. It is used for performing OR

operation exclusively. Ex-OR gate has two inputs and a single output. (We may

design multiple input Ex-OR gates. But they are not readily available). Output

A

C

𝑌 = (𝐴 + 𝐵 + 𝐶)̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ B

1-10

of Ex-OR gate is HIGH if odd number of inputs is HIGH. If even number of

inputs is HIGH, output is LOW.

The logic expression (sometimes also called logical equation) of 2 – input

Ex-OR gate is shown below.

𝑌 = 𝐴 ⊕ 𝐵 = �̅�𝐵 + 𝐴�̅�

It is read as Y is equal to A Ex-OR B. Logical symbol for 2 – input Ex-OR

gate is shown in figure 2.18.

Figure 2.18: Logical symbol for 2 – input Ex-OR gate

Table 2.11: Truth table for 2 – input Ex-OR gate

i/p o/p

A B Y

0 0 0

0 1 1

1 0 1

1 1 0

Truth table for 2 – input Ex-OR gate is shown in table 2.11. The TTL IC

used for 2 – input Ex-OR gate is 7486. It is a quad 2 – input XOR gate. i.e. There

are four 2 – input XOR gates in the IC. Pin configuration for IC 7486 is shown in

figure 2.19.

Figure 2.19: IC pin configuration for 7486

We may design multiple-input Ex-OR gates. In multiple input Ex-OR

gates output is HIGH if odd number of inputs have HIGH value. In all other

cases, output is LOW.

2.1.3.2 Ex-NOR gate

The Ex-NOR stands for Exclusive NOR. It means NOT of Ex-OR. Ex-

NOR gate has two inputs and a single output. (We may design multiple input

Ex-NOR gates. But they are not readily available). Output of Ex-NOR gate is

HIGH if even number of inputs is HIGH. If odd number of inputs is LOW,

output is LOW.

The logic expression (sometimes also called logical equation) of 2 – input

Ex-NOR gate is shown below.

A

B 𝑌 = 𝐴 ⊕ 𝐵

1-11

𝑌 = (𝐴 ⊕ 𝐵)̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅ = 𝐴𝐵 + �̅��̅�

It is read as Y is equal to A Ex-NOR B. Logical symbol for 2 – input Ex-

NOR gate is shown in figure 2.20.

Figure 2.20: Logical symbol for 2 – input Ex-NOR gate

Truth table for 2 – input Ex-NOR gate is shown in table 2.12.

Table 2.12: Truth table for 2 – input Ex-NOR gate

i/p o/p

A B Y

0 0 1

0 1 0

1 0 0

1 1 1

The TTL IC used for 2 – input Ex-NOR gate is 747266. It is a quad 2 –

input XNOR gate. i.e. There are four 2 – input XNOR gates in the IC. Pin

configuration for IC 747266 is shown in figure 2.21.

Figure 2.21: IC pin configuration for 747266

2.1.4 Deriving gates from universal gates The NAND gate and NOR gate are called universal gates because using

any one type of those gates any logic expression can be realized. We can also

derive all the gates using any one type of universal gates.

2.1.4.1 Deriving NOT gate

Figure 2.22: NOT gate using NAND gate

A 𝑌 = �̅�

A

B

𝑌 = 𝐴 ⊕ 𝐵

1-12

Figure 2.23: NOT gate using NOR gate

2.1.4.2 Deriving AND gate

Figure 2.24: AND gate using NAND gates only

Figure 2.25: AND gate using NOR gates only

2.1.4.3 Deriving OR gate

Figure 2.26: OR gate using NAND gates only

A

𝑌 = 𝐴 + 𝐵

B

𝑌 = 𝐴. 𝐵

B

A

A

𝑌 = 𝐴. 𝐵

B

𝑌 = �̅� A

1-13

Figure 2.27: OR gate using NOR gates only

2.1.4.4 Deriving NOR gate using NAND gates

Figure 2.28: NOR gate using NAND gates only

2.1.4.5 Deriving NAND gate using NOR gates

Figure 2.29: NAND gate using NOR gates only

2.1.5 Construction of logic circuits using universal gates Using any one type of universal gates any logic expression can be

realized.

Example 1: Construct a logic circuit using NAND gates only for following

expression

𝑋 = 𝐴. (𝐵 + 𝐶)

𝑌 = (𝐴. 𝐵)̅̅ ̅̅ ̅̅ ̅̅

B

A

A

B

𝑌 = (𝐴 + 𝐵)̅̅ ̅̅ ̅̅ ̅̅ ̅̅

A

𝑌 = 𝐴 + 𝐵

B

1-14

Example 2: Construct a logic circuit using NOR gates only for following

expression

𝑋 = 𝐴. (𝐵 + 𝐶)

Figure 2.27: OR gate using NOR gates only

Questions:

1. Draw symbol, logical equation and truth table of 3 i/p AND gate and 3

i/p OR gate. [4M]

2. Draw pin configuration of TTL ICs used for AND gate and NAND gate.

[4M]

B

𝑋 = 𝐴. (𝐵 + 𝐶)

C

A

A

𝑋 = 𝐴. (𝐵 + 𝐶)

B

C

1-15

3. Draw logical symbol, truth table and logical expression of EX-OR gate.

[2M]

4. Draw symbol and truth table for EX-NOR gate. [2M]

5. Draw logical symbol, truth table and logical expression for NAND and

NOR gate. [4M]

6. Draw logical symbol, expression, truth table and IC pin configuration for 2

input NOR gate. [4M]

7. Draw the pin configuration with the internal schematic of IC 7400. [2M]

8. Draw symbol, logical equation, truth table and TTL IC used for 2 i/p EX-

OR and NOR gate. [4M]

9. Draw logic symbol and truth table of NOR gate. [2M]

10. Draw AND gate using NAND gates only and NOR gates only. [2M]

11. Implement AND, OR, NOT and NOR gate using NAND gates only. [4M]

12. Draw logical symbol, truth table and logical expression of NAND gate and

AND gate. [4M]

13. What is universal gate? Construct a logic circuit using NAND gates only

for following expression. [4M]

𝑋 = 𝐴 ∙ (𝐵 + 𝐶)

14. What are universal gates? Draw logical circuits of basic gates using

universal gates. [4M]

15. Define universal gate and design basic gates using NAND as universal

gate. [4M]

16. What is universal gate? Construct any two basic gates using NOR gate.

[4M]

17. Implement OR and AND gates by using NAND gates only. [4M]

2.2 Boolean laws

Boolean algebra is mathematics of logic. It is one of the most basic tool for

simplifying Boolean laws. Logic variables are denoted by capital letters (e.g. A,

B, C, …). If value of 𝐴 = 0, then �̅� = 1 and if value of 𝐴 = 1, then �̅� = 0. Two

Boolean expressions are said to be equal if and only if the truth tables of them

are identical.

Fundamental laws of Boolean algebra are shown below.

𝐴 + 0 = 𝐴 𝐴. 0 = 0

𝐴 + 1 = 1 𝐴. 1 = 𝐴

𝐴 + 𝐴 = 𝐴 𝐴. 𝐴 = 𝐴

𝐴 + �̅� = 1 𝐴. �̅� = 0

�̿� = 𝐴

Commutative laws are shown below.

𝐴 + 𝐵 = 𝐵 + 𝐴

𝐴. 𝐵 = 𝐵. 𝐴

Associative laws are shown below.

(𝐴 + 𝐵) + 𝐶 = 𝐴 + (𝐵 + 𝐶)

1-16

(𝐴. 𝐵). 𝐶 = 𝐴. (𝐵. 𝐶)

Distributive laws are shown below.

𝐴. (𝐵 + 𝐶) = 𝐴. 𝐵 + 𝐴. 𝐶

𝐴 + 𝐵. 𝐶 = (𝐴 + 𝐵). (𝐴 + 𝐶)

Some more important laws are shown below.

𝐴. 𝐵 + 𝐴. �̅� = 𝐴

(𝐴 + 𝐵). (𝐴 + �̅�) = 𝐴

(𝐴 + �̅�). 𝐵 = 𝐴. 𝐵

𝐴. �̅� + 𝐵 = 𝐴 + 𝐵

𝐴 + 𝐴. 𝐵 = 𝐴

𝐴. (𝐴 + 𝐵) = 𝐴

De-Morgan’s theorems are shown below.

𝐴. 𝐵 … 𝑁̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅ = �̅� + �̅� + ⋯ + �̅�

𝐴 + 𝐵 + ⋯ + 𝑁̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ = �̅�. �̅� … �̅�

De-Morgan’s first theorem states that complement of product of

variables is equal to the sum of complements of the variables.

De-Morgan’s second theorem states that complement of sum of

variables is equal to the product of complements of the variables.

Duality property states that all Boolean expressions remain valid when

following steps are performed.

Step 1: Interchange OR operator (+) and AND operator (.)

Step 2: Replace all 1’s by 0’s and all 0’s by 1’s.

e.g. As 𝐴 + 0 = 𝐴, its dual is 𝐴. 1 = 𝐴

As (𝐴 + �̅�). 𝐵 = 𝐴. 𝐵, its dual is 𝐴. �̅� + 𝐵 = 𝐴 + 𝐵

As 𝐴. 𝐵 … 𝑁̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅ = �̅� + �̅� + ⋯ + �̅�, its dual is 𝐴 + 𝐵 + ⋯ + 𝑁̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ = �̅�. �̅� … �̅�

2.2.1 Proofs of Boolean laws Any Boolean law or theorem or expression can be proved in two ways

- Using truth table

- Matching L.H.S. with R.H.S. by simplification

2.2.1.1 Proofs of Boolean laws using truth table

When proof is done with the help of truth tables, by comparing L.H.S. and

R.H.S. in the truth table, law/ theorem/ expression can be proven.

Example 1:

Prove that 𝐴. (𝐵 + 𝐶) = 𝐴. 𝐵 + 𝐴. 𝐶

Proof:

1 2 3 4 5 6 7 8

A B C (B+C) A.(B+C) A.B A.C A.B+A.C

0 0 0 0 0 0 0 0

0 0 1 1 0 0 0 0

1-17

0 1 0 1 0 0 0 0

0 1 1 1 0 0 0 0

1 0 0 0 0 0 0 0

1 0 1 1 1 0 1 1

1 1 0 1 1 1 0 1

1 1 1 1 1 1 1 1

By comparing column number 5 and column number 8, it is proven that

𝐴. (𝐵 + 𝐶) = 𝐴. 𝐵 + 𝐴. 𝐶

Example 2:

Prove that 𝐴 + 𝐵. 𝐶 = (𝐴 + 𝐵). (𝐴 + 𝐶)

Proof:

1 2 3 4 5 6 7 8

A B C B.C A+B.C A+B A+C (A+B).(A+C)

0 0 0 0 0 0 0 0

0 0 1 0 0 0 1 0

0 1 0 0 0 1 0 0

0 1 1 1 1 1 1 1

1 0 0 0 1 1 1 1

1 0 1 0 1 1 1 1

1 1 0 0 1 1 1 1

1 1 1 1 1 1 1 1

By comparing column number 5 and column number 8, it is proven that 𝐴 + 𝐵. 𝐶 = (𝐴 + 𝐵). (𝐴 + 𝐶)

Example 3:

Prove De-Morgan’s first theorem.

De-Morgan’s first theorem states that complement of product of

variables is equal to the sum of complements of the variables.

i.e. 𝐴. 𝐵 … 𝑁̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅ = �̅� + �̅� + ⋯ + �̅�

Proof:

Let’s try to prove the De-Morgan’s first theorem for three variables

as,

𝐴. 𝐵. 𝐶̅̅ ̅̅ ̅̅ ̅̅ = �̅� + �̅� + 𝐶̅

1 2 3 4 5 6 7 8 9

𝐴 𝐵 𝐶 𝐴. 𝐵. 𝐶 𝐴. 𝐵. 𝐶̅̅ ̅̅ ̅̅ ̅̅ �̅� �̅� 𝐶̅ �̅� + �̅� + 𝐶̅ 0 0 0 0 1 1 1 1 1

0 0 1 0 1 1 1 0 1

0 1 0 0 1 1 0 1 1

0 1 1 0 1 1 0 0 1

1 0 0 0 1 0 1 1 1

1 0 1 0 1 0 1 0 1

1 1 0 0 1 0 0 1 1

1-18

1 1 1 1 0 0 0 0 0

By comparing column number 5 and column number 9, it is proven that

𝐴. 𝐵. 𝐶̅̅ ̅̅ ̅̅ ̅̅ = �̅� + �̅� + 𝐶̅

2.2.1.2 Proofs of Boolean laws using simplification method

When proof is done with the help of simplification, L.H.S. and R.H.S. are

simplified using basic Boolean laws. Then by matching L.H.S. and R.H.S, law/

theorem/ expression can be proven.

Example 1:

Prove that �̅��̅� + �̅��̅��̅� + �̅�𝑋𝑌 �̅� + 𝑊𝑌�̅� = �̅�

Proof:

By using law

L.H.S. = �̅�. (�̅� + �̅��̅� + �̅�𝑋𝑌 + 𝑊𝑌)

= �̅�. (�̅� + 𝑊𝑌 + �̅��̅� + 𝑊𝑌̅̅ ̅̅ ̅𝑋)

= �̅�. ((�̅� + 𝑊𝑌) + ( �̅��̅� + 𝑊𝑌̅̅ ̅̅ ̅𝑋))

= �̅�. ((𝑊 + �̅�) + �̅�. (�̅� + 𝑋𝑌)) 𝐴. �̅� + 𝐵 = 𝐴 + 𝐵

∴ 𝑊. 𝑌 + �̅� = 𝑊 + �̅�

= �̅�. ((𝑊 + �̅�) + �̅�. (�̅� + 𝑌)) 𝐴. �̅� + 𝐵 = 𝐴 + 𝐵

∴ 𝑋. 𝑌 + �̅� = 𝑌 + �̅�

= �̅�. (𝑊 + �̅� + �̅�. �̅� + �̅�. 𝑌)

= �̅�. (𝑊 + �̅�. 𝑌 + �̅� + �̅�. �̅�) By rearranging terms using

commutative law

= �̅�. (𝑊 + 𝑌 + �̅� + �̅�. �̅�) 𝐴. �̅� + 𝐵 = 𝐴 + 𝐵

∴ �̅�. 𝑌 + 𝑊 = 𝑌 + 𝑊

= �̅�. (𝑊 + (𝑌 + �̅�) + �̅�. �̅�)

= �̅�. (𝑊 + 1 + �̅�. �̅�) 𝐴 + �̅� = 1

∴ 𝑌 + �̅� = 1

= �̅�. (1 + 𝑊 + �̅�. �̅�)

= �̅�. (1) 1 + 𝐴 = 1

∴ 1 + 𝑊 + �̅�. �̅� = 1

= �̅� 𝐴. 1 = 𝐴

∴ �̅�. 1 = �̅�

= R.H.S. Hence proved

Questions:

1. State De-Morgan’s theorem. [2M]

2. State and prove De Morgan’s theorem. [4M]

3. State commutative law. [2M]

4. List different Boolean laws. Also write duality theorem. [4M]

5. State associative law and distributive law of Boolean algebra. [4M]

6. State any four Boolean laws. [2M]

7. State duality theorem and prove it. [4M]

2.3 Simplification of Boolean expressions using Boolean laws

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When logic circuit is constructed (or realized) for a complex Boolean

expression, it may require more number of logic gates. If the complex Boolean

expression is simplified and then realized (or constructed), less number of logic

gates are used. This is why there is need of simplification of Boolean

expressions.

Boolean expressions may be simplified using one of the following methods

- Using Boolean laws

- Karnaugh map method

- Quine-McCluskey method

Here discussion is done on how the Boolean expressions are simplified

using Boolean laws. The discussion about Karnaugh map (K-map) method is

done in chapter 3 and Quine-McCluskey method is out of the scope of

curriculum of this subject.

A complex Boolean expression may be simplified by applying set of basic

Boolean laws discussed in 2.2. Some examples are given below.

Example 1:

Simplify 𝑌 = 𝐴𝐵̅̅ ̅̅ + �̅� + 𝐴𝐵̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅

By using law

Y = 𝐴𝐵̅̅ ̅̅ + �̅� + 𝐴𝐵̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅

= 𝐴𝐵̿̿ ̿̿ . �̿�. 𝐴𝐵̅̅ ̅̅ By applying De-Morgan’s law

= 𝐴. 𝐵. 𝐴. 𝐴𝐵̅̅ ̅̅ �̿� = 𝐴

∴ 𝐴𝐵̿̿ ̿̿ = 𝐴𝐵

= 𝐴. 𝐴. 𝐵. 𝐴𝐵̅̅ ̅̅

= 𝐴. 𝐵. 𝐴𝐵̅̅ ̅̅ 𝐴. 𝐴 = 𝐴

= 𝐴. 𝐵. (�̅� + �̅�) By applying De-Morgan’s law

= 𝐴. 𝐵. �̅� + 𝐴. 𝐵. �̅�

= 𝐴. �̅�. 𝐵 + 𝐴. 𝐵. �̅�

= 0. 𝐵 + 𝐴. 0 As, 𝐴. �̅� = 0

= 0 + 0 As, 𝐴. 0 = 0

= 0 As, 0 + 0 = 0

Therefore, 𝑌 = 0

Example 2:

Simplify 𝑌 = (𝐴 + �̅� + 𝐴𝐵)(𝐴 + �̅�)(�̅�𝐵)

By using law

Y = (𝐴 + �̅� + 𝐴𝐵)(𝐴 + �̅�)(�̅�𝐵)

= (𝐴 + 𝐴𝐵 + �̅�)(𝐴 + �̅�)(�̅�𝐵)

= (𝐴 + 𝐴 + �̅�)(𝐴 + �̅�)(�̅�𝐵) 𝐴. �̅� + 𝐵 = 𝐴 + 𝐵

∴ 𝐴. 𝐵 + �̅� = 𝐴 + �̅�

= (𝐴 + �̅�)(𝐴 + �̅�)(�̅�𝐵) 𝐴 + 𝐴 = 𝐴

= (𝐴 + �̅�)(�̅�𝐵) 𝐴 + 𝐴 = 𝐴

∴ (𝐴 + �̅�). (𝐴 + �̅�) = (𝐴 + �̅�)

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= 𝐴�̅�𝐵 + �̅��̅�𝐵 By distributive law

= 0. 𝐵 + �̅��̅�𝐵 𝐴. �̅� = 0

= 0. 𝐵 + 0. �̅� 𝐵. �̅� = 0

= 0 + 0 0. 𝐴 = 0

= 0

Therefore, 𝑌 = 0

Example 3:

Simplify 𝑌 = (𝐴 + 𝐵)(𝐴 + �̅�)(�̅� + 𝐵)

By using law

Y = (𝐴 + 𝐵) (𝐴 + 𝐵̅̅ ̅) (𝐴̅̅̅ + 𝐵)

= (𝐴. 𝐴 + 𝐴. �̅� + 𝐵. 𝐴 + 𝐵. �̅�)(�̅� + 𝐵) By using distributive law

= (𝐴 + 𝐴. �̅� + 𝐵. 𝐴 + 0)(�̅� + 𝐵) 𝐴. 𝐴 = 𝐴 and 𝐵. �̅� = 0

= (𝐴 + 𝐴. �̅� + 𝐵. 𝐴)(�̅� + 𝐵) 𝐴 + 0 = 𝐴

= (𝐴 + 𝐴. (�̅� + 𝐵))(�̅� + 𝐵) By taking A common

= (𝐴 + 𝐴. 0)(�̅� + 𝐵) 𝐵 + �̅� = 0

= (𝐴 + 0)(�̅� + 𝐵) 𝐴. 0 = 0

= 𝐴. (�̅� + 𝐵) 𝐴 + 0 = 𝐴

= 𝐴. �̅� + 𝐴. 𝐵 By using distributive law

= 0 + 𝐴. 𝐵 𝐴. �̅� = 0

= 𝐴. 𝐵 𝐴 + 0 = 𝐴

Therefore, 𝑌 = 𝐴. 𝐵

2.4 Construction of logic circuits

As already discussed previously, any Boolean expression can be realized

(or constructed or implemented or drawn) using logic gates. Before realizing a

Boolean expression, it should be simplified so that requirement of number of

gates may be reduced. Simplification of given Boolean expression can be

minimized (or simplified) using various methods. Here the simplification is done

using basic Boolean laws.

Example 1:

Draw logical circuit for following Boolean expression using basic gates 𝑌 = �̅�𝐵 + 𝐵𝐶

The expression given above is already in reduced (or simplified or

minimized) form. So, further simplification is not possible.

Logical Circuit:

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Example 2:

Simplify following expression and draw logic gate diagram.

𝑌 = (𝐴𝐵̅̅ ̅̅ + 𝐴 + 𝐵̅̅ ̅̅ ̅̅ ̅̅ )𝐴. �̅�

By using law

Y = (𝐴𝐵̅̅ ̅̅ + 𝐴 + 𝐵̅̅ ̅̅ ̅̅ ̅̅ )𝐴. �̅�

= (�̅� + �̅� + �̅�. �̅�)𝐴. �̅� By using De-Morgan’s theorem

= (�̅� + �̅�(1 + �̅�))𝐴. �̅� By taking common

= (�̅� + �̅�. 1)𝐴. �̅� 1 + 𝐴 = 1

= (�̅� + �̅�)𝐴. �̅� 𝐴. 1 = 𝐴

= �̅�. 𝐴. �̅� + �̅�. 𝐴. �̅� By using distributive law

= 0. �̅� + �̅�. 𝐴 𝐴. �̅� = 0 and 𝐴. 𝐴 = 𝐴

= 0 + 𝐴. �̅� 0. 𝐴 = 0

= 𝐴. �̅� 0 + 𝐴 = 𝐴

Therefore, 𝑌 = 𝐴. �̅�

Logic gate diagram:

Questions:

1. Prove that �̅��̅� + �̅��̅��̅� + �̅�𝑋𝑌 �̅� + 𝑊𝑌�̅� = �̅� [4M]

2. Prove [4M]

a. 𝐴 + �̅�𝐵 + 𝐴�̅� = 𝐴 + 𝐵

b. 𝐴𝐵 + �̅�𝐵 + �̅��̅� = �̅� + 𝐵

3. Reduce the following expression and implement using logic gates. [4M] 𝑌 = 𝐴𝐵 + 𝐴𝐵𝐶 + 𝐴𝐵(𝐸 + 𝐹)

4. Simplify the following Boolean expressions using Boolean laws. [4M]

a. 𝑌 = 𝐴(�̅� + 𝐶)(�̅�𝐵 + 𝐶̅)

b. 𝑌 = 𝐵𝐶̅�̅� + �̅�𝐵𝐷 + 𝐴𝐵𝐷 + 𝐵𝐶�̅� + �̅�𝐶𝐷 + �̅��̅�𝐶̅𝐷 + 𝐴�̅�𝐶̅𝐷

5. Simplify following expression and draw logic gate diagram. [4M]

𝑌 = (𝐴𝐵̅̅ ̅̅ + 𝐴 + 𝐵̅̅ ̅̅ ̅̅ ̅̅ )𝐴. �̅�

𝐵 𝐴 �̅�

𝑌 = 𝐴. �̅�

𝐴 𝐵 𝐶 �̅�

𝑌 = �̅�𝐵 + 𝐵𝐶

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6. Simplify following Boolean expressions. [4M]

a. 𝑌 = 𝐴𝐵 + 𝐴𝐵𝐶 + �̅�𝐵 + 𝐴𝐵̅̅ ̅̅ 𝐶

b. 𝑌 = (𝐴 + 𝐵)(𝐴 + �̅�)(�̅� + 𝐵)

7. Draw logical circuit for following Boolean expressions using basic gates.

[4M]

a. 𝑌 = �̅�𝐵 + 𝐵𝐶

b. 𝑌 = (𝐴 + 𝐵̅̅ ̅̅ ̅̅ ̅̅ )

8. Simplify the following expressions. [4M]

a. 𝑌 = 𝐴𝐵̅̅ ̅̅ + �̅� + 𝐴𝐵̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅̅ ̅

b. 𝑌 = (𝐴 + �̅� + 𝐴𝐵)(𝐴 + �̅�)(�̅�𝐵)