Midterm Results 1. 2 Note 5: Peer-to-Peer Protocols and Data Link Control Flow Control.
Chapter 11 Data Link Control and Protocols
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Transcript of Chapter 11 Data Link Control and Protocols
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Chapter 11 Data Link Control and Protocols
1. Flow and error control
2. Stop-and-wait ARQ
3. Go-back-N ARQ
4. Selective repeat ARQ
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Flow and Error Control
• Flow control refers to a set of procedures used to restrict the amount of data that the sender can send before waiting for acknowledgement
• Error control in the data link layer is based on automatic repeat request (ARQ), which is the retransmission of data
• Common flow and error control mechanisms
– Stop-and-wait ARQ
– Go-back-N ARQ
– Selective repeat ARQ
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Stop-and-Wait ARQ: Normal Operation
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Stop-and-Wait ARQ: Lost Frame
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Stop-and-Wait ARQ: Lost ACK
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Stop-and-Wait ARQ: Delayed ACK
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Stop-and-Wait ARQ: Piggybacking
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Sliding Window ARQ
Flow/Error Control
Stop-and-Wait ARQ Sliding Window ARQ
Go-back-N ARQ Selective Repeat ARQ
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Sliding Window: Sender
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Sliding Window: Receiver
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Sliding Window: Control Variables
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Go-Back-N ARQ: Normal Operation
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Go-Back-N ARQ: Lost Frame
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Go-Back-N ARQ: Sender Window Size
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Selective Repeat ARQ: Windows
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Selective Repeat ARQ: Lost Frame
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Selective Repeat ARQ: Sender Window Size
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Aspects of the Mechanisms
• Stop-and-wait ARQ– Numbering frames prevents the retaining of duplicate
frames– Numbered acknowledgements are needed if an
acknowledgement is delayed and the next frame is lost• Go-back-N ARQ
– The size of the sender window must be less then 2m; the size of the receiver window is always 1
• Selective repeat ARQ– The size of the sender and receiver window must be at
most one-half of 2m
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Examples
• In a Stop-and-Wait ARQ system, the bandwidth of the line is 1 Mbps, and 1 bit takes 20 ms to make a round trip. What is the bandwidth-delay product? If the system data frames are 1000 bits in length, what is the utilization percentage of the link?The bandwidth-delay product is 1 106 20 10-3 = 20,000 bitsThe system can send 20,000 bits during the time it takes for the data to go from the sender to the receiver and then back again. However, the system sends only 1000 bits. We can say that the link utilization is only 1000/20,000, or 5%. For this reason, for a link with high bandwidth or long delay, use of Stop-and-Wait ARQ wastes the capacity of the link
• What is the utilization percentage of the link in Example 1 if the link uses Go-Back-N ARQ with a 15-frame sequence?
The bandwidth-delay product is still 20,000. The system can send up to 15 frames or 15,000 bits during a round trip. This means the utilization is 15,000/20,000, or 75 percent. Of course, if there are damaged frames, the utilization percentage is much less because frames have to be resent
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HDLC: NRM
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HDLC: ABM
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HDLC: Frame
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HDLC Frame Types
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I-Frame
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S-Frame Control Field
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U-Frame Control Field
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Example
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Example
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Bit Stuffing and Removal
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Bit Stuffingin HDLC