Chap-2 Boolean Algebra - WordPress.com · Chap-2 Boolean Algebra Contents: My name My position, ......

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Chap-2 Boolean Algebra Contents: My name My position, contact information or project description Mohammed Abdul Kader Assistant Prof, Dept. of EEE, IIUC Prepared By- Outline: Basic theorem and postulate of Boolean Algebra. Boolean Algebra. Canonical and Standard form. Digital Logic Gates. Integrated circuit.

Transcript of Chap-2 Boolean Algebra - WordPress.com · Chap-2 Boolean Algebra Contents: My name My position, ......

Page 1: Chap-2 Boolean Algebra - WordPress.com · Chap-2 Boolean Algebra Contents: My name My position, ... Many different logic families of digital IC’s have been introduced commercially.

Chap-2

Boolean Algebra

Contents:

My name

My position, contact information

or project description

Mohammed Abdul Kader

Assistant Prof, Dept. of EEE, IIUC

Prepared By-

Outline:

Basic theorem and postulate of Boolean Algebra.

Boolean Algebra.

Canonical and Standard form.

Digital Logic Gates.

Integrated circuit.

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Basic theorem and Properties of Boolean Algebra

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

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Basic theorem and Properties of Boolean Algebra (Cont.)

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

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Basic theorem and Properties of Boolean Algebra (Cont.)

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

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Basic theorem and Properties of Boolean Algebra (Cont.)

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Proof of By Truth Table

Proof of By Truth Table

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Basic theorem and Properties of Boolean Algebra (Cont.)

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Venn Diagram

Venn Diagram

for two variable

Venn Diagram

illustration of

distributive law

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Boolean Function

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

A binary variable can take a value of 0 or, 1. A boolean function is an expression

formed with binary variables, the two binary operators OR and AND, unary operator

NOT, parenthesis and an equal sign. For a given value of variables, the function

either can 0 or 1.

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Boolean Function

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Here, F3 and F4 are same. Two functions of n binary variables are said to be equal

if they have same values for all possible 2^n combinations of the n variables.

Truth Table of Boolean functions

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Boolean Function: Implementation

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Implementation of Boolean functions with logic gate

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Boolean Function: Algebraic Manipulation

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

When a Boolean function is implemented with logic gates, each literal in the function

designates an input to a gate and each term is implemented with a gate. The

minimization of the number of literals and the number of terms results is a circuit with

less equipment.

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Boolean Function: Complement of a function

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Generalized theorems for finding complement-

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Boolean Function: Complement of a function

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Minterms or standard product: Each row of a truth table can be associated with a

minterm, which is a product (AND) of all variables in the function, in direct or

complemented form. A minterm has the property that it is equal to 1 on exactly one row

of the truth table.

Maxterms or standard sums : Each row of a truth table is also associated with

a maxterm, which is a sum (OR) of all the variables in the function, in direct or

complemented form. A maxterm has the property that it is equal to 0 on exactly one row

of the truth table.

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

A boolean function may be expressed algebraically from a given truth table by forming

a minterm for each combination of the variables which produces a 1 in the function and

then taking the OR of all those terms.

Expressing Boolean function by sum of minterms

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

A boolean function may be expressed algebraically from a given truth table by forming

a minterm for each combination of the variables which produces a 1 in the function and

then taking the OR of all those terms.

Expressing Boolean function by sum of minterms

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

The complement of a Boolean function can be obtained from the truth table by forming

a minterm of each combination that produces a 0 in the function and then Oring those

terms.

Finding Complement of Boolean function by sum of minterms

The complement of f1 is written as-

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

A boolean function may be expressed algebraically from a given truth table by forming

a maxterm for each combination of the variables which produces a 0 in the function

and then taking the AND of all those terms.

Expressing Boolean function by product of maxterms

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Boolean functions expressed as a sum of minterms or product of maxterms are said to be in

canonical form.

The two canonical forms of Boolean algebra are basic forms that one obtain from reading a

function from the truth table. These forms are very seldom the ones with least number of

literals, because each minterm or maxterm must contain, by defination, all the variables

either complemented or uncomplemented.

Another way to express Boolean functions is in standard form. In this configuration, the

terms that form the function may contain one, two or any number of literal.

There are two types of standard forms: the sum of products and product of sums.

Sum of products:

Product of sums:

Canonical and Standard forms

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Sum of Minterms (Example 2-4)

Solution The function has three variables, the first term A is missing two

variables B and C

Inclusion of variable B

Inclusion of variable C

The second term missing one variable

Inclusion of variable A

Combining all terms-

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Canonical and Standard forms: Minterms and Maxterms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Product of Maxterms (Example 2-5)

Solution Converting the function into OR terms using distributive law-

Including missing with each term-

Combining and avoiding the repeated terms-

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Conversion between canonical forms

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Considering a function-

Taking the complement of F

Taking the complement of F’

Similarly,

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Digital Logic Gates

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

* A buffer produces the transfer function bust does not produce any particular logic

operation, since the binary value of the output is equal to the binary value of the input. The

circuit is used merely for power amplification of the signal and is equivalent to two

inverters connected is cascade.

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Digital Logic Gates

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

The NAND and NOR gates are extensively used as standard logic gates and are in fact more

popular than the AND and OR gates. This is because NAND and NOR gates are easily

constructed with transistor circuits and because boolean functions can easily implemented

with them.

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Integrated Circuit: Levels of Integration

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Small Scale Integration (SSI) devices contain several independent gates in a single

package. The inputs and outputs of the gates are connected directly to the pins in the

package. The number of gates is usually fewer than 10 and is limited by number of pins

available in the IC.

Medium-scale integration (MSI) devices have a complexity of approximately 10 to 100

gates in a single package. They usually perform specific elementary digital operations such

as decoders, adders or multiplexers.

Large-scale integration (LSI) devices contain between 100 and a few thousand gates in a

single package. They include digital systems such as processor, memory chips and

programmable logic devices.

Very large-scale integration (VLSI) devices contain thousands of gates within a single

package. Examples are large memory arrays and complex microcomputer chips. Because of

their small size and low cost, VLSI devices have revolutionized the computer system design

technology, giving the designer the capabilities to create structures that previously were

uneconomical

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IC digital Logic Families

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

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Positive and Negative Logic

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Many different logic families of digital IC’s have been introduced commercially.

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Special Characteristics

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

The characteristics that describe the performance of IC digital logic families are: Fan-out,

power dissipation, propagation delay and noise margin.

Fan-out specifies the number of standard loads that the output of a gate can drive without

impairing its normal operation. A standard load is usually defined as the amount of current

needed by an input of another logic gate in the same IC family. Sometimes the term loading

is used instead of fan-out. This term is derived from the fact that the output pin of a gate can

supply limited current, above which it ceases to operate properly and is said to be

overloaded.

Power dissipation is the supplied power required to operate the gate. This parameter is

expressed in milliwatts (mW) and represents the actual power dissipated in the gate.

Propagation delay is the average transition delay time for a signal to propagate from input

to output when the binary signals change in value. Propagation delay is expressed in

nanoseconds (ns).

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Special Characteristics

Mohammed Abdul kader, Assistant Prof, EEE, IIUC, Email: [email protected] Webpage: www.kader05cuet.wordpress.com

Noise margin is the maximum noise voltage added to the input signal of a digital circuit that

does not cause an undesirable change in the circuit output. There are two types of noise to be

considered . DC noise is caused by a drift in the voltage level of a signal. AC noise is a

random pulse that may be created by other switching signals. Noise margin is expressed in

volts (V) and represent the maximum noise signal that can be tolerated by the gate.

Table: Typical Characteristics of IC Logic Family