Capell Valley Laptop Schematic Diagram 845(Yonah-Calistoga Mobile Platform)

www.laptop-schematics

.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SIO

EMA

Dual ChannelDDR2

SCN KB/ PS2

LVDS

Yonah 478uFCPGA

USB 2.0

Tekoa/EkronR LAN2.0

USB

0 HD AUDIO /MDC 1.5HEADER

HD AUDIO/ AC97

2.0

PCIe SLOT0

SATA PORT 0

SLEEP CONTROL

CapellValley

ICH7M

FanHeader

BATTERY CHARGER VR

Fab 5REV 1.502

LPC, 33MHz

PCIEx1

SOD

IMM

0

IMVP-6 VR

CRT(DVI-I)

USB

5

CPUThermalSensor

SDVO

PCIEx1

8 USB ports total

USB

6 PCIEDOCKING

YONAH-CALISTOGACUSTOMER REFERENCEBOARD

USB

3

IR/ SERIAL

TVOUT

LVDS/ALS/BLI

PATA

SYSTEM VR

MOBILE POWERON SEQUENCE

DDR VR

SOD

IMM

1

FSB

FWH

USB

7

SPIFlash

PCIEx1

XDP

PEG/SDVO

SMC/KSC

PCIEx1

Clocking

Calistoga1466FCBGA

PCIEx1

PCIEx1

8 Mbit

VGA

SPI

PG 39

X4 DMIinterface

TPM

USB

1

USB

4PG 3,4

PG 30,31

PG 37

PG 51, 52

CalistogaVCCP VR

PG 48PG 5

PG 5

PG6,7,8,9,10,11,12

PG21,22,23

PG 18PG 19

PG 20

PCIe SLOT1

PCIe SLOT2

PCI SLOT3

PCI SLOT4

PCIEDGE-CONN

33 Mhz PCI

2.0 2.0DOCKING BACK PANEL BACK PANEL

BACK PANELBACK PANEL

2.0

USB

2

FPIO/DB

FPIO/DB FPIO/DB

PG 43

SATACC

PG 44

SATADC

SATA PORT 2

PORT80-83

LPCSLOT LPC

DOCK

PG 13

652BGA

PG14-17

PG 27

PG 24

PG 41 PG 35 PG 42

PG 36 PG 38

PG 32PG 35

PG 57

PG 45

PG 33, 34

PG 28

PG 28

PG 28

PG 26

PG 25

PG 33

PG 25

PG 46

PG 49

PG 55

PG 50

BACK PANEL USB FPIO/DB USBPG 40 PG 29

RJ45

2.0 2.0 2.0

IPN: C75289-501

D15378 1.501

TITLE PAGE

A

1 60Wednesday, July 20, 2005

Title

Size Document Number Rev

Date: Sheet of

Capell Valley Intel Confidential


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Interrupts

Slot 4

CALISTOGA CUSTOMER REFERENCEPLATFORM

H = HostM = DDR Memory

Prefix

# = Active Low Signal

LAN

TP = Test Point (does not connect anywhere else)

D, C, F, G

REQ/GNT #AD18 C, D, B, ASlot 3

Suffix

2 2IDSEL #

AD19

(AD24 internal)

SCHEMATIC ANNOTATIONS AND BOARD INFORMATION

PCI Devices

3

Net Naming Conventions

3

Device

Default Jumper Settings For Stuffed Jumpers

4

2

2

1 1

As seen from top

SOT23-5

3

SOT-23 5

3

PCB Footprints

Wake Events

SwitchPower On/Off

ATA Activity LED

Page

SMC/KBC Scroll Lock

VID2

Reference

Reference

S5 State

VID5

Page

LEDs and Switches

VID0

LED

SMC/KBC Caps Lock

S4 StateS3 State

VID4

S0 State

SMC/KBC Num Lock

VID1

Reset

VID3

OFF

ON

ON

HIGH

SIGNAL

OFF

Full ON

HIGH

+V*

ON

SLPS4#

LOW

OFFS4 (Suspend To Disk)

ON OFF

LOW OFF

SLPS5#

+V*S

OFF

Power States

LOW

ON

STATE

ONHIGH

HIGH ON

S5 / Soft OFF

S3 (Suspend to RAM)

+V*A

OFF

ONHIGH

OFF

Clocks

State SupportedS3 S3S3S3S3S3S3S3 S3S3S3S3, S4, S5

Wake EventsRI# from serial portPME# from PCI, mini PCI slot/device, LPCslot/devicePCI Express, mini PCI Express, Newcard wake eventWake on LANLID switch attached to SMCUSBAC97/Azalia wake on ringSmLink for AOLIIHot Key from Scan matrix keyboardPS/2 Keyboard/mousePWRBTN#

LID

1101 001x

3C

1101 110x

1010 000x

Address

1001 100B

Device

SO-DIMM0

TBDTBD

0100 1100

PCI Express Docking

SMB_ICH_S2

72

Clock Generator

A0

0111 0010SMB_ICH

DC/DD*

LAN

DDR Thermal Sensor

SMB_THRM

* First address is for a write command and second is for a read command.

Buses labeled SMB_ICH_xx come out of ICH, via an I2C expander. Therest come out of EC.

I C / SMB Addresses

1100 1000

D2/D3*

011 110x

SMB_ICH_S3

1010 010xSMB_ICH_S2

SMB_ICH_A1

SMB_ICH_S3

AON_ALS

SMB_ICH_S3

Thermal Diode

A4

4C

Always ON Display

PCI Express Clock

SO-DIMM1

Ambient Light Sensor

2

Spread Spectrum Clock D4/D5*

SMB_ICH_S2

Bus

Trusted Platform Module

1101 010x

1ETBD

TBD

4CSMB_BS

Hex

PageJumper DescriptionDefault

Battery ABattery B

0001 011011110

161E SMB_BS

SMB_BS

IC2 Buss Expander 0011 xxxx 3x

14 CR7J132 CR9G132 CR9G232 CR9G3

VID6

45 CR1B145 CR1B245 CR1B345 CR1B445 CR1B545 CR1B545 CR1C155 CR3G155 CR3G255 CR3G355 CR2G1

Virtual battery

54 SW1C154 SW1C232 SW9J232 SW9J1

J6H1 1-X CMOS CLEAR 14J8H1 1-X BIOS RECOVERY 16J2J10 2-3 CRB/SV DETECT 16J9J8 MFG/TEST 16J1F4 1-2 BSEL2 30J1G1 1-2 BSEL1 30J1G2 1-2 BSEL0 30J9J2 1-2 MDO 32J9J6 1-2 MD1 32J9J4 1-X MD2 32J9J1 1-X KSC DISABLE 32J9J7 1-X VB JMPR 32J9J5 1-X LID JMPR 32J8G1 1-2 SMC RST# 32J8A1 1-X LAN PROTECT 33

J9H1 1-X NMI JMPR 38

J7E1 1-X PORT80 SEL 41J7E3 1-2 SIO RST# 42J9J3 1-2 SATA DET 44

J7A3 1-2 H8 PROG# 45

J3H1 1-X SHUTDOWN 54

J3B1 1-2 H_THERMDA 5J3B1 3-4 H_THERMDC 5

POWER PLANE+VBATA+VBAT+VBATS+V12S-V12A-V12S+V5A+V5+V5S+V3.3A+V3.3+V3.3S+V1.5S+V1.8+V0.9+V2.5S+V2.5_LAN+V1.2+1.05S+VCC_CORE

Voltage RailsDESCRIPTIONBattery Rail in Mobile Power ModeBattery Rail in Mobile Power ModeBattery Rail in Mobile Power ModeOnly on in DT Power ModeOnly on in DT Power Mode Only on in DT Power Mode

DDR coreDDR command & control pull up.

LAN RailLAN RailGMCH, ICH core, and FSB railCPU core rail

S3COLD ACTIVES0, S3, S4, S5S0, S3, S4, S5S0S0S0, S3,S4,S5S0S0, S3,S4,S5S0, S3S0S0, S3,S4,S5S0, S3S0S0S0, S3S0, S3S0S0, S3S0, S3S0S0

VOLTAGE9V-12.5V9V-12.5V9V-12.5V12V-12V-12V5V5V5V3.3V3.3V3.3V1.5V1.8V0.9V2.5V2.5V1.2V1.05V0.700V-1.77V

J9G3 1-2 BOOT BLOCK PROG 38

J7A4 1-2 H8 PROG# 45

J7J3 1-2 PATA HotSwap 39

J5H2 1-2 SATA HotSwap 44

D15378 1.501

NOTES

A


Title


Date: Sheet of



.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place testpoint onH_IERR# with a GND0.1" away

PM_THRMTRIP# should connectto ICH7 and GMCH withoutT-ing (No stub)

A#[32-39], APM#[0-1]:Leave escape routing on for future functionality

Layout note:Comp0,2 connect with Zo=27.4ohm, maketrace length shorter than 0.5".Comp1,3 connect with Zo=55ohm, maketrace length shorter than 0.5".

Layout note: Zo=55 ohm,0.5" max for GTLREF.

Layout note: no stubon H_STPCLK TP

Layout: Connecttest point TP3F1with no stub

Place SeriesResistor onH_PWRGD_XDPWithout Stub

D15378 1.501

CPU (1 of 2)

A


Title


Date: Sheet of


XDP_TDI

XDP_TMS

H_D#35

H_D#37

H_D#7

H_D#48H_D#16

COMP2

H_D#43

H_D#53

H_D#34

H_D#46

H_D#31 H_D#63

H_D#59

H_D#17

H_D#55

H_D#50

H_D#11

H_D#49

H_D#0

H_D#25

H_D#10

H_D#38

H_D#13

H_D#47

H_D#61

H_D#3

H_D#51

H_D#56

H_D#26

H_D#18

H_D#27

H_D#20

H_D#1

H_D#44

H_D#22 H_D#54H_D#21

H_D#60

H_D#52

H_D#58

H_D#36

H_D#12

H_D#6H_D#5

H_D#39H_D#8

COMP1

H_D#15

H_D#45

H_D#19

H_D#28

H_D#2

H_D#40

H_D#23

H_D#32

H_D#29H_D#62

H_D#4

H_D#33

H_D#30

H_D#24H_D#57

H_D#42H_D#9

H_D#14

COMP3

H_D#41

COMP0

XDP_TCK

XDP_BPM#5

TP_SPARE3

TP_SPARE0

H_REQ#4

H_A#7

TP_A37#

H_A#17

H_A#16

H_A#30

H_A#12

TP_SPARE1

H_A#9

H_A#6

TP_A33#

H_RS#2

TP_A34#

H_A#29

H_A#26

H_A#20

H_RS#1H_REQ#2

H_REQ#0

H_A#8

H_A#5

TP_A36#

H_RS#0

H_REQ#3

TP_APM1#

TP_A39#

H_A#11

TP_EXTBREF

H_A#3

H_A#15

H_A#13

TP_A35#

H_A#28

H_A#21

H_A#14

H_A#27

H_A#25H_A#24

H_A#18

TP_SPARE7

TP_SPARE2

TP_A32#

H_REQ#1

H_IERR#

TP_APM0#

H_A#31

H_A#23

TP_SPARE6TP_SPARE5

TP_HFPLL

TP_A38#

H_A#22

TP_SPARE4

H_A#4

H_A#19

H_A#10

DCLKPH

ACLKPH

TP_CPN_L1

TP_CPN_L3

TP_CPN_L6

TP_CPN_L8

+V1.05S4,6,9,10,14,17,30,37,45,48,53,56,58

+V1.05S4,6,9,10,14,17,30,37,45,48,53,56,58

H_DBSY# 6H_DRDY# 6

H_BREQ#0 6

XDP_BPM#3 30,58

H_HITM# 6

XDP_BPM#2 30

H_BNR# 6

XDP_BPM#1 30

H_ADS# 6

H_HIT# 6

XDP_BPM#4 37

H_LOCK# 6

XDP_BPM#0 37

H_DSTBP#3 6

H_D#[63:0] 6

H_DINV#3 6

H_DSTBN#3 6

H_DINV#2 6

H_D#[63:0] 6

H_DSTBP#2 6H_DSTBN#2 6

H_PROCHOT# 51

XDP_BPM#5 37

H_A#[31:3]6

H_REQ#[4:0]6H_ADSTB#06

H_ADSTB#16

H_A#[31:3]6

H_DINV#16

H_D#[63:0]6

H_DSTBN#16H_DSTBP#16

H_DSTBP#06H_DSTBN#06

H_D#[63:0]6

H_DINV#06

H_RS#[2:0] 6

XDP_TCK 37

H_STPCLK#14

H_CPURST# 6,37

H_INIT# 14

H_SMI#14,35,58

XDP_TMS 37

H_INTR14

H_A20M#14

H_TRDY# 6

CLK_CPU_BCLK# 30CLK_CPU_BCLK 30

H_BPRI# 6

H_IGNNE#14

XDP_TRST# 37

XDP_TDI 37

H_THERMDA 5

H_NMI14,35

H_DEFER# 6

H_GTLREF58

H_PWRGD 14,35H_DPWR# 6

H_DPRSTP# 14,35H_DPSLP# 14,35

H_CPUSLP# 6,35PSI#

XDP_TDO 37

PM_THRMTRIP# 7,14

PM_THRMTRIP# 7,14

H_FERR#14H_THERMDC 5

XDP_DBRESET# 37,54,58

CPU_BSEL130CPU_BSEL230

CPU_BSEL030

+V1.05S 4,6,9,10,14,17,30,37,45,48,53,56,58

+V1.05S4,6,9,10,14,17,30,37,45,48,53,56,58

H_STPCLK#_R

H_PWRGD_XDP 37R2U4 1K

J2G1

R2R3 54.9 1%R2T2 27.4 1%

R3T11K 1%

R3R175

DATA GRP 0

DATA GRP 1

DATA

GRP

2DA

TA G

RP 3

MISC

U2E1B

Yonah Ball-out Rev 1.0

R26U26U1V1

E22F24

J24J23H26F26K22H25

N22K25P26R23

E26

L25L22L23M23P25P22P23T24R24L26

H22

T25N24

AA23AB24V24V26W25U23U25U22

F23

AB25W22Y23AA26Y26Y22AC26AA24

AC22AC23

G25

AB22AA21AB21AC25AD20AE22AF23AD24AE21AD21

E25

AE25AF25AF22AF26

E23K24G24

D25

J26

M26

V23

AC20

E5B5D24

H23

M24

W24

AD23

G22

N25

Y25

AE24

AD26

AE6

D6D7

C26

B22B23C21

COMP[0]COMP[1]COMP[2]COMP[3]

D[0]#D[1]#

D[10]#D[11]#D[12]#D[13]#D[14]#D[15]#

D[16]#D[17]#D[18]#D[19]#

D[2]#

D[20]#D[21]#D[22]#D[23]#D[24]#D[25]#D[26]#D[27]#D[28]#D[29]#

D[3]#

D[30]#D[31]#

D[32]#D[33]#D[34]#D[35]#D[36]#D[37]#D[38]#D[39]#

D[4]#

D[40]#D[41]#D[42]#D[43]#D[44]#D[45]#D[46]#D[47]#

D[48]#D[49]#

D[5]#

D[50]#D[51]#D[52]#D[53]#D[54]#D[55]#D[56]#D[57]#D[58]#D[59]#

D[6]#

D[60]#D[61]#D[62]#D[63]#

D[7]#D[8]#D[9]#

TEST2

DINV[0]#

DINV[1]#

DINV[2]#

DINV[3]#

DPRSTP#DPSLP#DPWR#

DSTBN[0]#

DSTBN[1]#

DSTBN[2]#

DSTBN[3]#

DSTBP[0]#

DSTBP[1]#

DSTBP[2]#

DSTBP[3]#

GTLREF

PSI#

PWRGOODSLP#

TEST1

BSEL[0]BSEL[1]BSEL[2]

R3U2 1KNO_STUFF

TP3D4NO_STUFF

TP3D2NO_STUFF

R2T1 54.9 1%

ADDR GRO

UP 0ADDR G

ROUP 1

CONT

ROL

XDP/

ITP

SIG

NALS

H CL

KTH

ERM

RESE

RVED

U2E1A


N3P5P2L1P4P1R1

Y2U5R3W6U4Y5U2R4T5T3

W3W5Y4

J4

W2Y1

AA1AA4AB2AA3M4N5T2V3

L4M3K5M1N2J1

A6

H1

L2

V4

B2C3

A22A21

E2

AD4AD3AD1AC4

G5

F1

C20

E1

H5F21

A5

B25

G6E4

D20

C4

B3

C6B4

H4

AC2AC1

D21

K3H2K2J3L5

B1F3F4G3

A3

D5

AC5AA6AB3

C7

A24A25

AB5

G2

AB6

D2F6D3C1AF1D22C23C24

T22

A[10]#A[11]#A[12]#A[13]#A[14]#A[15]#A[16]#

A[17]#A[18]#A[19]#A[20]#A[21]#A[22]#A[23]#A[24]#A[25]#A[26]#A[27]#A[28]#A[29]#

A[3]#

A[30]#A[31]#

RSVD[01]RSVD[02]RSVD[03]RSVD[04]RSVD[05]RSVD[06]RSVD[07]RSVD[08]

A[4]#A[5]#A[6]#A[7]#A[8]#A[9]#

A20M#

ADS#

ADSTB[0]#

ADSTB[1]#

RSVD[09]RSVD[10]

BCLK[0]BCLK[1]

BNR#

BPM[0]#BPM[1]#BPM[2]#BPM[3]#

BPRI#

BR0#

DBR#

DBSY#

DEFER#DRDY#

FERR#

RSVD[11]

HIT#HITM#

IERR#

IGNNE#

INIT#

LINT0LINT1

LOCK#

PRDY#PREQ#

PROCHOT#

REQ[0]#REQ[1]#REQ[2]#REQ[3]#REQ[4]#

RESET#RS[0]#RS[1]#RS[2]#

SMI#

STPCLK#

TCKTDI

TDO

THERMTRIP#

THERMDATHERMDC

TMS

TRDY#

TRST#

RSVD[13]RSVD[14]RSVD[15]RSVD[16]RSVD[17]RSVD[18]RSVD[19]RSVD[20]

RSVD[12]

TP3D1NO_STUFF

TP3D6NO_STUFF

TP3D8NO_STUFF

R1R3 54.9 1%

R2R4 54.9 1%

TP3F1NO_STUFF

R3U1 51

TP3D3NO_STUFF

R1R4 54.9 1%

R3T3 27.4 1%

R3R32K 1%

TP3D5NO_STUFF

TP2F1NO_STUFF

R3T556

TP3D7NO_STUFF

R3T2 54.9 1%

R2F20


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout Note:Route VCCSENSE and VSSSENSE traces at27.4 Ohms with 50 mil spacing.Place PU and PD within 1 inch of CPU.

LAYOUT NOTE: PLACE C3T4NEAR PIN B26

D15378 1.501

CPU (2 of 2)

A


Title


Date: Sheet of


+VCC_CORE53,56,58 +VCC_CORE53,56,58

+V1.05S 3,6,9,10,14,17,30,37,45,48,53,56,58

+VCC_CORE53,56,58H_VID0 51

H_VID3 51

H_VID1 51

H_VID6 51

H_VID4 51

H_VID2 51

H_VID5 51

VCCSENSE

VSSSENSE

+V1.5S10,17,27,48,56,58

+V1.5S 10,17,27,48,56,58

U2E1C


A7A9

A10A12A13A15A17A18A20B7B9

B10B12B14B15B17B18B20C9

C10C12C13C15C17C18D9

D10D12D14D15D17D18

E7E9

E10E12E13E15E17E18E20

F7F9

F10F12F14F15F17F18F20AA7AA9

AA10AA12AA13AA15AA17AA18AA20AB9

AC10AB10AB12AB14AB15AB17AB18

AB20AB7AC7AC9AC12AC13AC15AC17AC18AD7AD9AD10AD12AD14AD15AD17AD18AE9AE10AE12AE13AE15AE17AE18AE20AF9AF10AF12AF14AF15AF17AF18AF20

B26

V6G21J6K6M6J21K21M21N21N6R21R6T21T6V21W21

AF7

AD6AF5AE5AF4AE3AF2AE2

AE7

VCC[001]VCC[002]VCC[003]VCC[004]VCC[005]VCC[006]VCC[007]VCC[008]VCC[009]VCC[010]VCC[011]VCC[012]VCC[013]VCC[014]VCC[015]VCC[016]VCC[017]VCC[018]VCC[019]VCC[020]VCC[021]VCC[022]VCC[023]VCC[024]VCC[025]VCC[026]VCC[027]VCC[028]VCC[029]VCC[030]VCC[031]VCC[032]VCC[033]VCC[034]VCC[035]VCC[036]VCC[037]VCC[038]VCC[039]VCC[040]VCC[041]VCC[042]VCC[043]VCC[044]VCC[045]VCC[046]VCC[047]VCC[048]VCC[049]VCC[050]VCC[051]VCC[052]VCC[053]VCC[054]VCC[055]VCC[056]VCC[057]VCC[058]VCC[059]VCC[060]VCC[061]VCC[062]VCC[063]VCC[064]VCC[065]VCC[066]VCC[067]

VCC[068]VCC[069]VCC[070]VCC[071]VCC[072]VCC[073]VCC[074]VCC[075]VCC[076]VCC[077]VCC[078]VCC[079]VCC[080]VCC[081]VCC[082]VCC[083]VCC[084]VCC[085]VCC[086]VCC[087]VCC[088]VCC[089]VCC[090]VCC[091]VCC[092]VCC[093]VCC[094]VCC[095]VCC[096]VCC[097]VCC[098]VCC[099]VCC[100]

VCCA

VCCP[01]VCCP[02]VCCP[03]VCCP[04]VCCP[05]VCCP[06]VCCP[07]VCCP[08]VCCP[09]VCCP[10]VCCP[11]VCCP[12]VCCP[13]VCCP[14]VCCP[15]VCCP[16]

VCCSENSE

VID[0]VID[1]VID[2]VID[3]VID[4]VID[5]VID[6]

VSSSENSE

R2R1100

1%

U2E1D


P6

AE11

A8A11A14A16A19A23A26B6B8

B11B13B16B19B21B24C5C8

C11C14C16C19C2

C22C25D1D4D8

D11D13D16D19D23D26

E3E6E8

E11E14E16E19E21E24

F5F8

F11F13F16F19F2

F22F25G4G1

G23G26

H3H6

H21H24

J2J5

J22J25K1K4

K23K26

L3L6

L21L24M2M5

M22M25

N1N4

N23N26

P3 AF24AF21AF19AF16AF13AF11AF8AF6AF3AE26AE23AE19

P21P24R2R5R22R25T1T4T23T26U3U6U21U24V2V5V22V25W1W4W23W26Y3

Y21Y24AA2AA5AA8AA11AA14AA16AA19AA22AA25AB1AB4AB8AB11AB13AB16AB19AB23AB26AC3AC6AC8AC11AC14AC16AC19AC21AC24AD2AD5AD8AD11AD13AD16AD19AD22AD25AE1AE4

Y6

A4

AE14AE16

AE8

VSS[082]

VSS[148]

VSS[002]VSS[003]VSS[004]VSS[005]VSS[006]VSS[007]VSS[008]VSS[009]VSS[010]VSS[011]VSS[012]VSS[013]VSS[014]VSS[015]VSS[016]VSS[017]VSS[018]VSS[019]VSS[020]VSS[021]VSS[022]VSS[023]VSS[024]VSS[025]VSS[026]VSS[027]VSS[028]VSS[029]VSS[030]VSS[031]VSS[032]VSS[033]VSS[034]VSS[035]VSS[036]VSS[037]VSS[038]VSS[039]VSS[040]VSS[041]VSS[042]VSS[043]VSS[044]VSS[045]VSS[046]VSS[047]VSS[048]VSS[049]VSS[050]VSS[051]VSS[052]VSS[053]VSS[054]VSS[055]VSS[056]VSS[057]VSS[058]VSS[059]VSS[060]VSS[061]VSS[062]VSS[063]VSS[064]VSS[065]VSS[066]VSS[067]VSS[068]VSS[069]VSS[070]VSS[071]VSS[072]VSS[073]VSS[074]VSS[075]VSS[076]VSS[077]VSS[078]VSS[079]VSS[080]VSS[081] VSS[162]

VSS[161]VSS[160]VSS[159]VSS[158]VSS[157]VSS[156]VSS[155]VSS[154]VSS[153]VSS[152]VSS[151]

VSS[083]VSS[084]VSS[085]VSS[086]VSS[087]VSS[088]VSS[089]VSS[090]VSS[091]VSS[092]VSS[093]VSS[094]VSS[095]VSS[096]VSS[097]VSS[098]VSS[099]VSS[100]VSS[101]VSS[102]VSS[103]VSS[104]VSS[105]

VSS[107]VSS[108]VSS[109]VSS[110]VSS[111]VSS[112]VSS[113]VSS[114]VSS[115]VSS[116]VSS[117]VSS[118]VSS[119]VSS[120]VSS[121]VSS[122]VSS[123]VSS[124]VSS[125]VSS[126]VSS[127]VSS[128]VSS[129]VSS[130]VSS[131]VSS[132]VSS[133]VSS[134]VSS[135]VSS[136]VSS[137]VSS[138]VSS[139]VSS[140]VSS[141]VSS[142]VSS[143]VSS[144]VSS[145]VSS[146]

VSS[106]

VSS[001]

VSS[149]VSS[150]

VSS[147]

C3T3

10uF

R2R2100

1%

C3T1270uF

20%

C3T4

0.01uF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Fan Power Control

Place fan connector near CPU

Layout Note:Route H_THERMDA andH_THERMDC on same layerw/ 10 mil trace & 10 milspacing. Route away fromnoise sources with groundguard tracks on each side.

Thermal Diode Conn

J3B1Default Stuffing: 1-2 3-4Option Stuffing: 1-X 3-X

CPU Thermal Sensor

Note: No-Stuff R3N5 for normaloperation. No Stuff R9G18 ifR3N5 is stuffed

D15378 1.501

CPU THERMAL SENSOR AND FAN

A


Title


Date: Sheet of


V5S_FAN

FAN

_ON

_Q FAN_ON_D#

THRM_ALERT#

ADT_THM#

THERM_DXP ADT_THERM_DXP

THERM_DXNADT_THERM_DXN SMB_THRM_DATA 32,35

SMB_THRM_CLK 32,35

FAN_ON32,35

H_THERMDC3H_THERMDA3

PM_THRM# 16,32,35

+V5S10,17,18,19,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+V3.3S7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

C2B4

1000pF

R3N610K

J3B1

2X2HDR

13

24

C3N20.1uF

C3N3

1000pF

R3N410K

C3D1

0.1uF

R2B41M

C3B2

22uFCONN2_HDR

J3C1

12

R2B3100K

R3N3 499 1%

R3N710K

R3N8 499 1%

CR3D11N4148

13

U3B2

ADT7461A-TEMP MON

1

2

3

4 5

6

7

8VDD

D+

D-

THM# GND

ALRT#/THM2#

SDATA

SCLK

Q2B3

SI7458DP

4

123

5

THERMDNTHERMDP

GND0GND1

GND2GND3

J4A13Pin_Recepticle

NO_STUFF

12

3 4 5 6

R3N5 0NO_STUFF

Q2B2BSS138

3

1

2


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Note: H_CPURST#has T topology

D15378 1.501

CALISTOGA (1 OF 6)

A


Title


Date: Sheet of


H_D#27

H_D#54

H_D#58

H_D#26

H_D#4

H_D#57

H_D#6

H_D#0

H_D#2

H_D#42

H_D#53

H_D#37

H_D#63

H_D#39

H_D#20

H_D#34

H_D#36

H_D#50H_D#51

H_D#10

H_D#1

H_D#3

H_D#48

H_D#13

H_D#55

H_D#33H_D#32

H_D#43

H_D#11

H_D#61

H_D#59

H_D#25

H_D#44

H_D#24

H_D#30

H_D#52

H_D#62

H_D#41

H_D#23

H_D#19

H_D#40

H_D#18

H_D#35

H_D#22

H_D#38

H_D#56

H_D#28

H_D#12

H_D#47

H_D#29

H_D#60

H_D#49

H_D#46

H_D#9

H_D#17

H_D#5

H_D#21

H_D#7

H_D#16

H_D#31

H_D#15

H_D#8

H_D#14

H_D#45

H_YRCOMP

H_XSWING

H_YSCOMP

H_XSCOMPH_XRCOMP

H_YSWING

H_A#31

H_A#17

H_A#24

H_A#21

H_A#19

H_A#12

H_A#15

H_A#29

H_A#25

H_A#6

H_A#3

H_A#26

H_A#30

H_A#4

H_A#27

H_A#22H_A#23

H_A#28

H_A#11

H_A#5

H_A#18

H_A#20

H_A#13

H_A#9

H_A#7

H_A#10

H_A#8

H_A#14

H_A#16

H_DINV#1H_DINV#0

H_DINV#2H_DINV#3

H_DSTBP#1

H_DSTBN#0

H_DSTBN#2

H_DSTBP#0

H_DSTBN#3

H_DSTBN#1

H_DSTBP#2H_DSTBP#3

H_REQ#2

H_REQ#4

H_REQ#1H_REQ#0

H_REQ#3

H_RS#0

H_RS#2H_RS#1

H_YSCOMP

H_YRCOMP

H_XSCOMP

H_XRCOMP

+V1.05S3,4,9,10,14,17,30,37,45,48,53,56,58

+V1.05S3,4,9,10,14,17,30,37,45,48,53,56,58

+V1.05S3,4,9,10,14,17,30,37,45,48,53,56,58

+V1.05S3,4,9,10,14,17,30,37,45,48,53,56,58

+V1.05S3,4,9,10,14,17,30,37,45,48,53,56,58

H_A#[31:3] 3

H_ADS# 3

H_BNR# 3

H_ADSTB#0 3H_ADSTB#1 3

H_BREQ#0 3

H_DBSY# 3

H_DRDY# 3

H_DINV#[3:0] 3

H_DSTBP#[3:0] 3

H_DSTBN#[3:0] 3

H_HITM# 3H_HIT# 3

H_REQ#[4:0] 3

H_DPWR# 3

H_D#[63:0]3

CLK_MCH_BCLK#30CLK_MCH_BCLK30

H_LOCK# 3

H_VREF

H_XSWING 58

H_YSWING 58

H_BPRI# 3

H_CPURST# 3,37

H_DEFER# 3

H_CPUSLP# 3,35H_TRDY# 3

H_RS#[2:0] 3

R4T324.9

1%

R4T254.91%

C4T5

0.1uF

R4T124.9

1%

C4T8

0.1uF

C5T100.1uF

R4E5100

1%

R4E2221

1%

R4T4100

1%

R4E4200

1%

R4E1100

1%

R4E8221

1%

HOST

U5E1A

CALISTOGA_1p0

H9C9E11G11F11G12F9H11J12G14D9J14H13J15F14D12A11C11A12A13E13G13F12B12B14C12A14C14D14

E8B9C13J13C6F6C7

AG1AG2

B7

E1E2E4

Y1U1W1

F1J1H1J6H3K2G1G2K9K1K7J8H4J3

K11G4

T10W11

T3U7U9

U11T11W9T1T8T4

W7U5T9

W6T5

AB7AA9W4W3Y3Y7

W5Y10AB8W2

AA4AA7AA2AA6

AA10Y8

AA1AB4AC9

AB11AC11

AB3AC2AD1AD9AC1AD7AC6AB5

AD10AD4AC8

A7C3

J7W8U3AB10

J9H8

K4T7Y5AC4

K3T6AA5AC5

D3D4B3

D8G8B8F8A8

B4E6D6

E3E7

K13

H_A#_3H_A#_4H_A#_5H_A#_6H_A#_7H_A#_8H_A#_9

H_A#_10H_A#_11H_A#_12H_A#_13H_A#_14H_A#_15H_A#_16H_A#_17H_A#_18H_A#_19H_A#_20H_A#_21H_A#_22H_A#_23H_A#_24H_A#_25H_A#_26H_A#_27H_A#_28H_A#_29H_A#_30H_A#_31

H_ADS#H_ADSTB#_0H_ADSTB#_1

H_VREFH_BNR#H_BPRI#

H_BREQ#0

H_CLKIN#H_CLKIN

H_CPURST#

H_XRCOMPH_XSCOMPH_XSWING

H_YRCOMPH_YSCOMPH_YSWING

H_D#_0H_D#_1H_D#_2H_D#_3H_D#_4H_D#_5H_D#_6H_D#_7H_D#_8H_D#_9H_D#_10H_D#_11H_D#_12H_D#_13H_D#_14H_D#_15H_D#_16H_D#_17H_D#_18H_D#_19H_D#_20H_D#_21H_D#_22H_D#_23H_D#_24H_D#_25H_D#_26H_D#_27H_D#_28H_D#_29H_D#_30H_D#_31H_D#_32H_D#_33H_D#_34H_D#_35H_D#_36H_D#_37H_D#_38H_D#_39H_D#_40H_D#_41H_D#_42H_D#_43H_D#_44H_D#_45H_D#_46H_D#_47H_D#_48H_D#_49H_D#_50H_D#_51H_D#_52H_D#_53H_D#_54H_D#_55H_D#_56H_D#_57H_D#_58H_D#_59H_D#_60H_D#_61H_D#_62H_D#_63

H_DBSY#H_DEFER#

H_DINV#_0H_DINV#_1H_DINV#_2H_DINV#_3

H_DPWR#H_DRDY#

H_DSTBN#_0H_DSTBN#_1H_DSTBN#_2H_DSTBN#_3

H_DSTBP#_0H_DSTBP#_1H_DSTBP#_2H_DSTBP#_3

H_HIT#H_HITM#

H_LOCK#

H_REQ#_0H_REQ#_1H_REQ#_2H_REQ#_3H_REQ#_4

H_RS#_0H_RS#_1H_RS#_2

H_SLPCPU#H_TRDY#

H_VREF

R4E354.91%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout Note:Place 150 Ohm terminationresistors close to GMCH

Layout Note:Place 150 Ohm terminationresistors close to GMCH

D15378 1.501

CALISTOGA (2 OF 6)

A


Title


Date: Sheet of


TP_MCH_NC8

TP_MCH_NC6

PEG_RXP12

PEG_TXP4

PEG_RXP8

MCH_RSVD_1

DMI_TXP3

MCH_CFG_16

MCH_CFG_18

PEG_TXP7

PEG_TXN11

PEG_TXN5

PEG_TXP10

MCH_RSVD_6

MCH_CFG_3

PM_EXTTS#0

TP_MCH_NC18

TP_MCH_NC7

PEG_RXP4

MCH_RSVD_10

DMI_TXN1

MCH_CFG_14

MCH_CFG_20MCH_CFG_19

MCH_RSVD_13

PM_EXTTS#1

TP_MCH_NC5

PEG_RXN4

PEG_TXP1PEG_TXP2

PEG_TXN4

MCH_RSVD_2

DMI_RXN0

MCH_CFG_13

MCH_CFG_7

L_IBG

TP_MCH_NC17

PEG_TXN13

PEG_TXN1

DMI_RXP3

DMI_TXN3

VS

YN

C

TVIREF

PEG_TXN0

DMI_RXN2

MCH_CFG_9

M_RCOMP#

TP_M_OCDCOMP_1

TP_MCH_NC1

PEG_RXN10

PEG_TXP6PEG_TXP5

PEG_RXP2

PEG_RXP10

PEG_RXN8

MCH_RSVD_11

DMI_TXN2

MCH_CFG_12

HSYNCTP_MCH_NC13

PEG_RXP15

PEG_RXP11

PEG_RXP1

PEG_TXP3

PEG_RXN13

TP_MCH_RSVD_3

DMI_RXN1

DMI_TXP0

MCH_CFG_15

MCH_CFG_5

L_IBG

PM_EXTTS#1_R

TP_MCH_NC10

PEG_RXN11

PEG_TXP9

PEG_TXN2

DMI_RXN3

M_RCOMP

TP_MCH_NC16

TP_MCH_NC11

TP_MCH_NC3

PEG_TXP8

PEG_TXN6

PEG_TXN10

PEG_RXN2

PEG_TXP11

MCH_CFG_4

L_LVBG

PM_EXTTS#1_R

PEG_RXN9

PEG_TXN8

PEG_RXP7

PEG_RXN1

MCH_RSVD_7

DMI_RXP1

PEG_COMP

RST_IN#_MCH

TP_MCH_RSVD_4

TP_MCH_NC4

PEG_TXP0

PEG_RXP3

PEG_TXN9

PEG_TXP14

MCH_CFG_6

M_RCOMP#

TP_MCH_NC12

TP_MCH_NC9

PEG_RXN0

PEG_TXP12

PEG_TXP15

PEG_RXP9

PEG_RXP6

MCH_RSVD_8

DMI_RXP0

MCH_CFG_8

MCH_CFG_10

CRTIREF

PEG_RXN14

PEG_TXP13

PEG_TXN7

PEG_TXN12

PEG_RXN3

PEG_RXP5

DMI_RXP2

DMI_TXP2

TP_MCH_NC15

PEG_RXP13

PEG_RXN5MCH_RSVD_5

TP_M_OCDCOMP_0

TP_MCH_NC0

PEG_TXN15

PEG_RXP0

PEG_RXN15

PEG_TXN3

PEG_TXN14

DMI_TXP1

M_RCOMP

TP_MCH_NC14

TP_MCH_NC2

PEG_RXP14

PEG_RXN6

PEG_RXN12

PEG_RXN7MCH_RSVD_9

DMI_TXN0

MCH_CFG_17

MCH_CFG_11

MCH_RSVD_12

MCH_RSVD_0

L_VDDEN19

LA_CLKP19

LA_DATAN019

LB_DATAP019

LA_DATAP219

M_ODT2 22,23

PM_BMBUSY#16

CLK_MCH_OE#31

+V1.8 9,21,22,34,46,47,56,58

LA_DATAN219LA_DATAN119

LA_DATAP119LA_DATAP019

TV_DACA_OUT18,20

CRT_BLUE18

M_CKE0 21,23

DMI_RXP[3:0] 15

L_DDC_CLK19

PM_EXTTS#021,23

SDVO_CTRLDATA13

LB_DATAN219

LB_DATAN019

MCH_BSEL130

DMI_TXN[3:0] 15PM_THRMTRIP#3,14

LB_DATAN119

MCH_BSEL030

MCH_BSEL230

PEG_RXN[15:0] 13

TV_DACB_OUT18,20

CRT_RED18

M_CS#2 22,23

PM_EXTTS#122,23

+V3.3S 5,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

CRT_DDC_DATA18CRT_DDC_CLK18

M_ODT1 21,23

M_ODT3 22,23

PEG_RXP[15:0] 13

CLK_PCIE_3GPLL# 31

M_CKE2 22,23

L_BKLTCTL19

MCH_CFG_[20:3]12,13

EPOT_WIPER58

CRT_HSYNC18

M_CLK_DDR#0 21

DMI_RXN[3:0] 15

M_CLK_DDR#2 22

DELAY_VR_PWRGOOD16

DREFCLK 30

CLK_PCIE_3GPLL 31

PEG_TXN[15:0] 13

M_ODT0 21,23

M_CKE1 21,23

M_CS#1 21,23

L_CLKCTLA19,37

DMI_TXP[3:0] 15

M_CLK_DDR#3 22

DREFCLK# 30

M_VREF_MCH 47,58

M_CLK_DDR2 22M_CLK_DDR3 22

L_CLKCTLB19,37

PEG_TXP[15:0] 13

M_CLK_DDR1 21

M_CS#3 22,23

MCH_ICH_SYNC#15

DREFSSCLK 30

PLT_RST#13,15,24,28,32,41,42,57

CRT_VSYNC18

M_CLK_DDR#1 21

MCH_RSVD_[2:1]

M_CS#0 21,23

M_CKE3 22,23

LB_CLKN19

SDVO_CTRLCLK13

DREFSSCLK# 30

CRT_GREEN18

M_CLK_DDR0 21

L_BKLTEN19

L_DDC_DATA19

LA_CLKN19

LB_CLKP19

LB_DATAP119LB_DATAP219

TV_DACC_OUT18,20

+V1.5S_PCIE10,58

PM_DPRSLPVR 16,35,51

TV_DCONSEL020TV_DCONSEL120

R6E4 0

TP5E1 NO_STUFF

R7N4

1.5K1%

R5R1 100

R5E7 39

R5P3 10K

R4T54.99k1%

R4T7 150 1%

R7N3 0

NO_STUFF

R5T3 150 1%

R6E5 0NO_STUFF

R5E1 24.9 1%

R4T6 150 1%

PM

MISCNC

DDR MUXING

CLK

DMI

CFG

RSVD

U5E1B

CALISTOGA_1p0

D1C41C1

BA41BA40BA39BA3BA2BA1B41B2

AY41AY1

AW41AW1A40A4

A39A3

H28H27

AY35AR1AW7AW40

AW35AT1AY7AY40

AU20AT20BA29AY29

AW13AW12AY21AW21

AL20AF10

BA13BA12AY20AU21

AV9AT9

AK1AK41

J25K27J26

K16K18J18F18E15F15E18D19D16G16E16D15G15K15C15H16G18H15

G28F25H26G6

AH33AH34

A27A26C40D41

AE35AF39AG35AH39

AC35AE39AF35AG39

AE37AF41AG37AH41

AC37AE41AF37AG41

AF33AG33

T32R32

AG11AF11

K28

J19

H32

F3F7

H7

A41A35A34D28D27

NC0NC1NC2NC3NC4NC5NC6NC7NC8NC9NC10NC11NC12NC13NC14NC15NC16NC17NC18

SDVO_CTRLCLKSDVO_CTRLDATA

SM_CK_0SM_CK_1SM_CK_2SM_CK_3

SM_CK#_0SM_CK#_1SM_CK#_2SM_CK#_3

SM_CKE_0SM_CKE_1SM_CKE_2SM_CKE_3

SM_CS#_0SM_CS#_1SM_CS#_2SM_CS#_3

SM_OCDCOMP_0SM_OCDCOMP_1

SM_ODT_0SM_ODT_1SM_ODT_2SM_ODT_3

SM_RCOMP#SM_RCOMP

SM_VREF_0SM_VREF_1

CFG_18CFG_19CFG_20

CFG_0CFG_1CFG_2CFG_3CFG_4CFG_5CFG_6CFG_7CFG_8CFG_9CFG_10CFG_11CFG_12CFG_13CFG_14CFG_15CFG_16CFG_17

PM_BMBUSY#PM_EXTTS#_0PM_EXTTS#_1PM_THRMTRIP#PWROKRSTIN#

D_REFCLKIN#D_REFCLKIN

D_REFSSCLKIN#D_REFSSCLKIN

DMI_RXN_0DMI_RXN_1DMI_RXN_2DMI_RXN_3

DMI_RXP_0DMI_RXP_1DMI_RXP_2DMI_RXP_3

DMI_TXN_0DMI_TXN_1DMI_TXN_2DMI_TXN_3

DMI_TXP_0DMI_TXP_1DMI_TXP_2DMI_TXP_3

G_CLKIN#G_CLKIN

RSVD_1RSVD_2

RSVD_5RSVD_6

LT_RESET#

RSVD_8

RSVD_0

RSVD_3RSVD_4

RSVD_7

RSVD_9RSVD_10RSVD_11RSVD_12RSVD_13

R5T5 150 1%

R5E6 39

R5P2 10K

R5T4 150 1%

R5T6 150 1%

R4R180.61%

R5E5 255 1%

R4R280.61%

LVDS

PCI-EXPRESS GRAPHICS

TVVGA

U5E1C

CALISTOGA_1p0

D40D38

F34G38H34J38L34M38N34P38R34T38V34W38Y34AA38AB34AC38

D34F38G34H38J34L38M34N38P34R38T34V38W34Y38AA34AB38

F36G40H36J40L36M40N36P40R36T40V36W40Y36AA40AB36AC40

D36F40G36H40J36L40M36N40P36R40T36V40W36Y40AA36AB40

J30H30H29G26G25B38C35F32C33C32

A33A32

C37B35A37

B37B34A36

E27E26

G30D30F29

F30D29F28

D32

A16C18A19

J20B16B18B19

E23D23

C26C25

C22B22

G23J22

A21B21

H23

K30J29

EXP_A_COMPIEXP_A_COMPO

EXP_A_RXN_0EXP_A_RXN_1EXP_A_RXN_2EXP_A_RXN_3EXP_A_RXN_4EXP_A_RXN_5EXP_A_RXN_6EXP_A_RXN_7EXP_A_RXN_8EXP_A_RXN_9

EXP_A_RXN_10EXP_A_RXN_11EXP_A_RXN_12EXP_A_RXN_13EXP_A_RXN_14EXP_A_RXN_15

EXP_A_RXP_0EXP_A_RXP_1EXP_A_RXP_2EXP_A_RXP_3EXP_A_RXP_4EXP_A_RXP_5EXP_A_RXP_6EXP_A_RXP_7EXP_A_RXP_8EXP_A_RXP_9

EXP_A_RXP_10EXP_A_RXP_11EXP_A_RXP_12EXP_A_RXP_13EXP_A_RXP_14EXP_A_RXP_15

EXP_A_TXN_0EXP_A_TXN_1EXP_A_TXN_2EXP_A_TXN_3EXP_A_TXN_4EXP_A_TXN_5EXP_A_TXN_6EXP_A_TXN_7EXP_A_TXN_8EXP_A_TXN_9

EXP_A_TXN_10EXP_A_TXN_11EXP_A_TXN_12EXP_A_TXN_13EXP_A_TXN_14EXP_A_TXN_15

EXP_A_TXP_0EXP_A_TXP_1EXP_A_TXP_2EXP_A_TXP_3EXP_A_TXP_4EXP_A_TXP_5EXP_A_TXP_6EXP_A_TXP_7EXP_A_TXP_8EXP_A_TXP_9

EXP_A_TXP_10EXP_A_TXP_11EXP_A_TXP_12EXP_A_TXP_13EXP_A_TXP_14EXP_A_TXP_15

L_BKLTENL_CLKCTLAL_CLKCTLBL_DDC_CLKL_DDC_DATAL_IBGL_VBGL_VDDENL_VREFHL_VREFL

LA_CLK#LA_CLK

LA_DATA#_0LA_DATA#_1LA_DATA#_2

LA_DATA_0LA_DATA_1LA_DATA_2

LB_CLK#LB_CLK

LB_DATA#_0LB_DATA#_1LB_DATA#_2

LB_DATA_0LB_DATA_1LB_DATA_2

L_BKLTCTL

TV_DACA_OUTTV_DACB_OUTTV_DACC_OUT

TV_IREFTV_IRTNATV_IRTNBTV_IRTNC

CRT_BLUECRT_BLUE#

CRT_DDC_CLKCRT_DDC_DATA

CRT_GREENCRT_GREEN#

CRT_HSYNCCRT_IREF

CRT_REDCRT_RED#

CRT_VSYNC



.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

D15378 1.501

CALISTOGA (3 OF 6)

A


Title


Date: Sheet of


M_A_DQ6

M_A_DQ54

M_A_DQ21

M_A_DQ18

M_A_DQ31

M_A_DQ10

M_A_DQ39

M_A_DQ5

M_A_DQ29

M_A_DQ1

M_A_DQ14

M_A_DQ49

M_A_DQ60

M_A_DQ48

M_A_DQ22

M_A_DQ46

M_A_DQ58

M_A_DQ4

M_A_DQ17

M_A_DQ11

M_A_DQ44

M_A_DQ41

M_A_DQ57

M_A_DQ32

M_A_DQ55

M_A_DQ45

M_A_DQ59

M_A_DQ3

M_A_DQ56

M_A_DQ0

M_A_DQ38

M_A_DQ61

M_A_DQ2

M_A_DQ20

M_A_DQ28

M_A_DQ50

M_A_DQ9M_A_DQ8

M_A_DQ16

M_A_DQ43

M_A_DQ63

M_A_DQ13

M_A_DQ53

M_A_DQ19

M_A_DQ7

M_A_DQ34

M_A_DQ25

M_A_DQ36

M_A_DQ26

M_A_DQ42

M_A_DQ27

M_A_DQ40

M_A_DQ62

M_A_DQ15

M_A_DQ33

M_A_DQ47

M_A_DQ37

M_A_DQ52

M_A_DQ12

M_A_DQ35

M_A_DQ30

M_A_DQ51

M_A_DQ24M_A_DQ23

M_A_DQS7

M_A_DQS4M_A_DQS3

M_A_DQS6M_A_DQS5

M_A_DQS1M_A_DQS2

M_A_DQS0

M_A_DM7

M_A_DM1

M_A_DM6

M_A_DM4

M_A_DM2

M_A_DM5

M_A_DM0

M_A_DM3

M_A_DQS#7

M_A_DQS#3

M_A_DQS#0

M_A_DQS#4

M_A_DQS#1M_A_DQS#2

M_A_DQS#6M_A_DQS#5

M_A_A10

M_A_A8

M_A_A3

M_A_A0

M_A_A6

M_A_A11

M_A_A13

M_A_A2

M_A_A12

M_A_A7

M_A_A9

M_A_A4M_A_A5

M_A_A1

TP_MA_RCVENOUT#TP_MA_RCVENIN#

M_B_DQ33

M_B_DQ46

M_B_DQ29

M_B_DQ40

M_B_DQ15

M_B_DQ44

M_B_DQ6M_B_DQ7

M_B_DQ60

M_B_DQ35

M_B_DQ21

M_B_DQ38

M_B_DQ41

M_B_DQ24

M_B_DQ61

M_B_DQ13

M_B_DQ19

M_B_DQ3

M_B_DQ14

M_B_DQ5

M_B_DQ37

M_B_DQ0M_B_DQ1

M_B_DQ8

M_B_DQ12

M_B_DQ45

M_B_DQ51

M_B_DQ43

M_B_DQ25

M_B_DQ56

M_B_DQ62

M_B_DQ49

M_B_DQ20

M_B_DQ23

M_B_DQ52

M_B_DQ27

M_B_DQ48

M_B_DQ28

M_B_DQ39

M_B_DQ16

M_B_DQ26

M_B_DQ18

M_B_DQ59

M_B_DQ55

M_B_DQ58

M_B_DQ36

M_B_DQ2

M_B_DQ34

M_B_DQ11

M_B_DQ47

M_B_DQ9

M_B_DQ57

M_B_DQ31M_B_DQ32

M_B_DQ10

M_B_DQ30

M_B_DQ63

M_B_DQ50

M_B_DQ22

M_B_DQ17

M_B_DQ4

M_B_DQ54M_B_DQ53

M_B_DQ42

TP_MB_RCVENOUT#TP_MB_RCVENIN#

M_B_DQS7

M_B_DM2

M_B_DM7

M_B_DM1

M_B_DM3

M_B_DQS3M_B_DQS2

M_B_DM0

M_B_DM4M_B_DM5

M_B_DQS5

M_B_DQS0M_B_DQS1

M_B_DQS6

M_B_DM6

M_B_DQS4

M_B_DQS#3

M_B_A12

M_B_DQS#0

M_B_A11

M_B_A13

M_B_DQS#5

M_B_A3

M_B_A0

M_B_DQS#6

M_B_A6

M_B_A2

M_B_A9

M_B_A4

M_B_DQS#4

M_B_A1

M_B_DQS#2

M_B_DQS#7

M_B_A7

M_B_A5

M_B_A10

M_B_DQS#1

M_B_A8

M_A_DQS[7:0] 21

M_A_DQS#[7:0] 21

M_A_DQ[63:0]21 M_B_DQ[63:0]22

M_B_DQS[7:0] 22

M_B_DQS#[7:0] 22

M_A_BS2 21,23M_A_BS1 21,23M_A_BS0 21,23

M_A_DM[7:0] 21

M_A_RAS# 21,23

M_A_WE# 21,23

M_A_CAS# 21,23

M_B_RAS# 22,23

M_B_WE# 22,23

M_B_BS0 22,23M_B_BS1 22,23M_B_BS2 22,23M_B_CAS# 22,23M_B_DM[7:0] 22

M_B_A[13:0] 22,23M_A_A[13:0] 21,23

DDR SYSTEM MEMORY A

U5E1D

CALISTOGA_1p0

AJ35AJ34

AM31AM33AJ36AK35AJ32AH31AN35AP33AR31AP31AN38AM36AM34AN33AK26AL27AM26AN24AK28AL28AM24AP26AP23AL22AP21AN20AL23AP24AP20AT21AR12AR14AP13AP12AT13AT12AL14AL12AK9AN7AK8AK7AP9AN9AT5AL5AY2

AW2AP1AN2AV2AT3AN1AL2AG7AF9AG4AF6AG9AH6AF4AF8

AU12AV14BA20

AY13AJ33AM35AL26AN22AM14AL9AR3

AK33AT33AN28AM22AN12AN8AP3AG5

AH4

AK32AU33AN27AM21AM12AL8AN3AH5

AY16AU14AW16BA16BA17AU16AV17AU17AW17AT16AU13AT17AV20AV12

AW14AK23AK24AY14

SA_DQ0SA_DQ1SA_DQ2SA_DQ3SA_DQ4SA_DQ5SA_DQ6SA_DQ7SA_DQ8SA_DQ9SA_DQ10SA_DQ11SA_DQ12SA_DQ13SA_DQ14SA_DQ15SA_DQ16SA_DQ17SA_DQ18SA_DQ19SA_DQ20SA_DQ21SA_DQ22SA_DQ23SA_DQ24SA_DQ25SA_DQ26SA_DQ27SA_DQ28SA_DQ29SA_DQ30SA_DQ31SA_DQ32SA_DQ33SA_DQ34SA_DQ35SA_DQ36SA_DQ37SA_DQ38SA_DQ39SA_DQ40SA_DQ41SA_DQ42SA_DQ43SA_DQ44SA_DQ45SA_DQ46SA_DQ47SA_DQ48SA_DQ49SA_DQ50SA_DQ51SA_DQ52SA_DQ53SA_DQ54SA_DQ55SA_DQ56SA_DQ57SA_DQ58SA_DQ59SA_DQ60SA_DQ61SA_DQ62SA_DQ63

SA_BS_0SA_BS_1SA_BS_2

SA_CAS#SA_DM_0SA_DM_1SA_DM_2SA_DM_3SA_DM_4SA_DM_5SA_DM_6

SA_DQS_0SA_DQS_1SA_DQS_2SA_DQS_3SA_DQS_4SA_DQS_5SA_DQS_6SA_DQS_7

SA_DM_7

SA_DQS#_0SA_DQS#_1SA_DQS#_2SA_DQS#_3SA_DQS#_4SA_DQS#_5SA_DQS#_6SA_DQS#_7

SA_MA_0SA_MA_1SA_MA_2SA_MA_3SA_MA_4SA_MA_5SA_MA_6SA_MA_7SA_MA_8SA_MA_9

SA_MA_10SA_MA_11SA_MA_12SA_MA_13

SA_RAS#SA_RCVENIN#

SA_RCVENOUT#SA_WE# D

DR SYSTEM MEMORY B

U5E1E

CALISTOGA_1p0

AK39AJ37AP39AR41AJ38AK38AN41AP41AT40AV41AU38AV38AP38AR40AW38AY38BA38AV36AR36AP36BA36AU36AP35AP34AY33BA33AT31AU29AU31AW31AV29

AW29AM19AL19AP14AN14AN17AM16AP15AL15AJ11AH10

AJ9AN10AK13AH11AK10

AJ8BA10

AW10BA4

AW4AY10AY9

AW5AY5AV4AR5AK4AK3AT4AK5AJ5AJ3

AT24AV23AY28

AR24AK36AR38AT36BA31AL17AH8BA5AN4

AM39AT39AU35AR29AR16AR10AR7AN5AM40AU39AT35AP29AP16AT10AT7AP5

AY23AW24AY24AR28AT27AT28AU27AV28AV27AW27AV24BA27AY27AR23

AU23AK16AK18AR27

SB_DQ0SB_DQ1SB_DQ2SB_DQ3SB_DQ4SB_DQ5SB_DQ6SB_DQ7SB_DQ8SB_DQ9SB_DQ10SB_DQ11SB_DQ12SB_DQ13SB_DQ14SB_DQ15SB_DQ16SB_DQ17SB_DQ18SB_DQ19SB_DQ20SB_DQ21SB_DQ22SB_DQ23SB_DQ24SB_DQ25SB_DQ26SB_DQ27SB_DQ28SB_DQ29SB_DQ30SB_DQ31SB_DQ32SB_DQ33SB_DQ34SB_DQ35SB_DQ36SB_DQ37SB_DQ38SB_DQ39SB_DQ40SB_DQ41SB_DQ42SB_DQ43SB_DQ44SB_DQ45SB_DQ46SB_DQ47SB_DQ48SB_DQ49SB_DQ50SB_DQ51SB_DQ52SB_DQ53SB_DQ54SB_DQ55SB_DQ56SB_DQ57SB_DQ58SB_DQ59SB_DQ60SB_DQ61SB_DQ62SB_DQ63

SB_BS_0SB_BS_1SB_BS_2

SB_CAS#SB_DM_0SB_DM_1SB_DM_2SB_DM_3SB_DM_4SB_DM_5SB_DM_6SB_DM_7

SB_DQS_0SB_DQS_1SB_DQS_2SB_DQS_3SB_DQS_4SB_DQS_5SB_DQS_6SB_DQS_7

SB_DQS#_0SB_DQS#_1SB_DQS#_2SB_DQS#_3SB_DQS#_4SB_DQS#_5SB_DQS#_6SB_DQS#_7

SB_MA_0SB_MA_1SB_MA_2SB_MA_3SB_MA_4SB_MA_5SB_MA_6SB_MA_7SB_MA_8SB_MA_9

SB_MA_10SB_MA_11SB_MA_12SB_MA_13

SB_RAS#SB_RCVENIN#

SB_RCVENOUT#SB_WE#


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A APLACE IN CAVITYPlace C5D1 nearpin BA15 onLayer1

D15378 1.501

CALISTOGA (4 OF 6)

A


Title


Date: Sheet of


VCCSM_LF4VCCSM_LF5

VCCSM_LF2VCCSM_LF1

+V1.5S_AUX10,58

+V1.05S 3,4,6,10,14,17,30,37,45,48,53,56,58

+V1.05S 3,4,6,10,14,17,30,37,45,48,53,56,58

+V1.8 7,21,22,34,46,47,56,58

VCC

U5E1G

CALISTOGA_1p0

AA33W33P33N33L33J33

AA32Y32

W32V32P32N32M32L32J32

AA31W31V31T31R31P31N31M31

AA30Y30

W30V30U30T30R30P30N30M30L30

AA29Y29

W29V29U29R29P29M29L29

AB28AA28

Y28V28U28T28R28P28N28M28L28P27N27M27L27P26N26L26N25M25L25P24N24M24

AB23AA23

Y23P23N23M23L23

AC22AB22

Y22W22P22N22M22L22

AC21AA21W21N21M21L21

AC20AB20

Y20W20P20N20M20L20

AB19AA19

Y19N19M19L19N18M18

AU41AT41AM41AU40BA34AY34AW34AV34AU34AT34AR34BA30AY30AW30AV30AU30AT30AR30AP30AN30AM30AM29AL29AK29AJ29AH29AJ28AH28AJ27AH27BA26AY26AW26AV26AU26AT26AR26AJ26AH26AJ25AH25AJ24AH24BA23AJ23BA22AY22AW22AV22AU22AT22AR22AP22AK22AJ22AK21AK20BA19AY19AW19AV19AU19AT19AR19AP19AK19AJ19AJ18AJ17AH17AJ16AH16BA15AY15AW15AV15AU15AT15AR15AJ15AJ14AJ13AH13AK12AJ12AH12AG12AK11BA8AY8AW8AV8AT8AR8AP8BA6AY6AW6AV6AT6AR6AP6AN6AL6AK6AJ6AV1AJ1

L18P17N17M17N16M16L16

VCC_0VCC_1VCC_2VCC_3VCC_4VCC_5VCC_6VCC_7VCC_8VCC_9VCC_10VCC_11VCC_12VCC_13VCC_14VCC_15VCC_16VCC_17VCC_18VCC_19VCC_20VCC_21VCC_22VCC_23VCC_24VCC_25VCC_26VCC_27VCC_28VCC_29VCC_30VCC_31VCC_32VCC_33VCC_34VCC_35VCC_36VCC_37VCC_38VCC_39VCC_40VCC_41VCC_42VCC_43VCC_44VCC_45VCC_46VCC_47VCC_48VCC_49VCC_50VCC_51VCC_52VCC_53VCC_54VCC_55VCC_56VCC_57VCC_58VCC_59VCC_60VCC_61VCC_62VCC_63VCC_64VCC_65VCC_66VCC_67VCC_68VCC_69VCC_70VCC_71VCC_72VCC_73VCC_74VCC_75VCC_76VCC_77VCC_78VCC_79VCC_80VCC_81VCC_82VCC_83VCC_84VCC_85VCC_86VCC_87VCC_88VCC_89VCC_90VCC_91VCC_92VCC_93VCC_94VCC_95VCC_96VCC_97VCC_98VCC_99VCC_100VCC_101VCC_102VCC_103

VCC_SM_0VCC_SM_1VCC_SM_2VCC_SM_3VCC_SM_4VCC_SM_5VCC_SM_6VCC_SM_7VCC_SM_8VCC_SM_9

VCC_SM_10VCC_SM_11VCC_SM_12VCC_SM_13VCC_SM_14VCC_SM_15VCC_SM_16VCC_SM_17VCC_SM_18VCC_SM_19VCC_SM_20VCC_SM_21VCC_SM_22VCC_SM_23VCC_SM_24VCC_SM_25VCC_SM_26VCC_SM_27VCC_SM_28VCC_SM_29VCC_SM_30VCC_SM_31VCC_SM_32VCC_SM_33VCC_SM_34VCC_SM_35VCC_SM_36VCC_SM_37VCC_SM_38VCC_SM_39VCC_SM_40VCC_SM_41VCC_SM_42VCC_SM_43VCC_SM_44VCC_SM_45VCC_SM_46VCC_SM_47VCC_SM_48VCC_SM_49VCC_SM_50VCC_SM_51VCC_SM_52VCC_SM_53VCC_SM_54VCC_SM_55VCC_SM_56VCC_SM_57VCC_SM_58VCC_SM_59VCC_SM_60VCC_SM_61VCC_SM_62VCC_SM_63VCC_SM_64VCC_SM_65VCC_SM_66VCC_SM_67VCC_SM_68VCC_SM_69VCC_SM_70VCC_SM_71VCC_SM_72VCC_SM_73VCC_SM_74VCC_SM_75VCC_SM_76VCC_SM_77VCC_SM_78VCC_SM_79VCC_SM_80VCC_SM_81VCC_SM_82VCC_SM_83VCC_SM_84VCC_SM_85VCC_SM_86VCC_SM_87VCC_SM_88VCC_SM_89VCC_SM_90VCC_SM_91VCC_SM_92VCC_SM_93VCC_SM_94VCC_SM_95VCC_SM_96VCC_SM_97VCC_SM_98VCC_SM_99

VCC_SM_100VCC_SM_101VCC_SM_102VCC_SM_103VCC_SM_104VCC_SM_105VCC_SM_106VCC_SM_107

VCC_104VCC_105VCC_106VCC_107VCC_108VCC_109VCC_110

C5R4

10uF

NCTF

U5E1F

CALISTOGA_1p0

AD27AC27AB27AA27

Y27W27V27U27T27R27

AD26AC26AB26AA26

Y26W26V26U26T26R26

AD25AC25AB25AA25

Y25W25V25U25T25R25

AD24AC24AB24AA24

Y24W24V24U24T24R24

AD23V23U23T23R23

AD22V22U22T22R22

AD21V21U21T21R21

AD20V20U20T20R20

AD19V19U19T19

AD18AC18AB18AA18

Y18W18V18U18T18

AE27AE26AE25AE24AE23AE22AE21AE20AE19AE18AC17Y17U17

R19AG18AF18R18AG17AF17AE17AD17AB17AA17W17V17T17R17AG16AF16AE16AD16AC16AB16AA16Y16W16V16U16T16R16AG15AF15AE15AD15AC15AB15

AG27AF27AG26AF26AG25AF25AG24AF24AG23AF23AG22AF22AG21AF21AG20AF20AG19AF19

AA15Y15W15V15U15T15R15

VCC_NCTF0VCC_NCTF1VCC_NCTF2VCC_NCTF3VCC_NCTF4VCC_NCTF5VCC_NCTF6VCC_NCTF7VCC_NCTF8VCC_NCTF9VCC_NCTF10VCC_NCTF11VCC_NCTF12VCC_NCTF13VCC_NCTF14VCC_NCTF15VCC_NCTF16VCC_NCTF17VCC_NCTF18VCC_NCTF19VCC_NCTF20VCC_NCTF21VCC_NCTF22VCC_NCTF23VCC_NCTF24VCC_NCTF25VCC_NCTF26VCC_NCTF27VCC_NCTF28VCC_NCTF29VCC_NCTF30VCC_NCTF31VCC_NCTF32VCC_NCTF33VCC_NCTF34VCC_NCTF35VCC_NCTF36VCC_NCTF37VCC_NCTF38VCC_NCTF39VCC_NCTF40VCC_NCTF41VCC_NCTF42VCC_NCTF43VCC_NCTF44VCC_NCTF45VCC_NCTF46VCC_NCTF47VCC_NCTF48VCC_NCTF49VCC_NCTF50VCC_NCTF51VCC_NCTF52VCC_NCTF53VCC_NCTF54VCC_NCTF55VCC_NCTF56VCC_NCTF57VCC_NCTF58VCC_NCTF59VCC_NCTF60VCC_NCTF61VCC_NCTF62VCC_NCTF63VCC_NCTF64VCC_NCTF65VCC_NCTF66VCC_NCTF67VCC_NCTF68VCC_NCTF69VCC_NCTF70VCC_NCTF71VCC_NCTF72

VSS_NCTF0VSS_NCTF1VSS_NCTF2VSS_NCTF3VSS_NCTF4VSS_NCTF5VSS_NCTF6VSS_NCTF7VSS_NCTF8VSS_NCTF9

VSS_NCTF10VSS_NCTF11VSS_NCTF12

VCCAUX_NCTF18VCCAUX_NCTF19VCCAUX_NCTF20VCCAUX_NCTF21VCCAUX_NCTF22VCCAUX_NCTF23VCCAUX_NCTF24VCCAUX_NCTF25VCCAUX_NCTF26VCCAUX_NCTF27VCCAUX_NCTF28VCCAUX_NCTF29VCCAUX_NCTF30VCCAUX_NCTF31VCCAUX_NCTF32VCCAUX_NCTF33VCCAUX_NCTF34VCCAUX_NCTF35VCCAUX_NCTF36VCCAUX_NCTF37VCCAUX_NCTF38VCCAUX_NCTF39VCCAUX_NCTF40VCCAUX_NCTF41VCCAUX_NCTF42VCCAUX_NCTF43VCCAUX_NCTF44VCCAUX_NCTF45VCCAUX_NCTF46VCCAUX_NCTF47VCCAUX_NCTF48VCCAUX_NCTF49VCCAUX_NCTF50

VCCAUX_NCTF0VCCAUX_NCTF1VCCAUX_NCTF2VCCAUX_NCTF3VCCAUX_NCTF4VCCAUX_NCTF5VCCAUX_NCTF6VCCAUX_NCTF7VCCAUX_NCTF8VCCAUX_NCTF9

VCCAUX_NCTF10VCCAUX_NCTF11VCCAUX_NCTF12VCCAUX_NCTF13VCCAUX_NCTF14VCCAUX_NCTF15VCCAUX_NCTF16VCCAUX_NCTF17

VCCAUX_NCTF51VCCAUX_NCTF52VCCAUX_NCTF53VCCAUX_NCTF54VCCAUX_NCTF55VCCAUX_NCTF56VCCAUX_NCTF57

C5T40.22uF

C4D1

0.47uF

C5D3

0.47uF

C5T710uF

C4T7270uF

2.0V, 3.3Arms

C4D2

0.47uF

C5R3

10uF

C4T6270uF

20%

C5D1

0.47uF

C5D4

0.47uF

C5T50.22uF

C5D2

0.47uF

C5T30.22uF

C5T21uF

20%

C5T610uF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NOTE: 0.1uF capsin 1.5SxPLL needto be located asedge caps within200mils

NOTE: CAPS USED IN+V3.3_TVDAC should bewithin 250mils ofedge of MCH

NOTE: CAPS USED IN+V2.5_CRTDAC shouldbe within 250mils ofedge of MCH

NOTE: CAPSUSED IN+V1.5_PCIEshould be ontop layer

NOTE: 10uF CAPSUSED IN+V1.5_3GPLLshould be placedin cavity

NOTE: .1uF CAPS USED IN+V1.5S_DLVDS, +V2.5S_ALVDS,+V2.5S_TXLVDS, +V2.5S_3GBGshould be placed within200mils of edge

PLACE INCAVITY PLACE ON

THE EDGE

NOTE: CAPS USED IN+V1.5_TVDAC and+V1.5_QTVDAC should bewithin 250mils of edge

D15378 1.501

CALISTOGA (5 OF 6)

A


Title


Date: Sheet of


VCCGFOLLOW

PCIE_L

3GPLL_FB_L3GPLL_R_L

V1_5SFOLLOW

TVDAC_FB

QTVDAC_FB

TVDAC_ADJ2

VTTLF_CAP3

VTTLF_CAP1

+V3.3S_ATVBG

VTTLF_CAP2

VCCA_CRTDAC

PM

_SLP

_S3_

SH

DN

2

+V2.5S 18,20,49,56,58

+V1.5S4,17,27,48,56,58

+V1.5S4,17,27,48,56,58

+V1.5S_AUX 9,58

+V3.3S_TVDAC_LDO

+V1.5S4,17,27,48,56,58

+V3.3S_TVDAC47,56

+V3.3S_TVDAC47,56

+V1.5S4,17,27,48,56,58

+V1.5S_AUX 9,58

+V2.5S18,20,49,56,58

+V1.5S4,17,27,48,56,58

+V1.5S 4,17,27,48,56,58

+V1.5S4,17,27,48,56,58

+V1.05S3,4,6,9,14,17,30,37,45,48,53,56,58

+V1.05S3,4,6,9,14,17,30,37,45,48,53,56,58

PM_SLP_S3#32,35,47,48,49,55,56

+V2.5S_CRTDAC58

+V1.5S_MPLL

+V1.5S_HPLL

+V1.5S_3GPLL

+V3.3S 5,7,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S_TVDACC

+VCCA_TVDAC +V3.3S_TVDACA

+V1.5S_QTVDAC

+V5S5,17,18,19,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+V1.5S_DPLLA

+V1.5S_DPLLB

+V3.3S_TVDACB

+V1.5S_TVDAC58

+V3.3S_TVDACC

+V3.3S_TVDACB

+V1.5S_DPLLA

+V1.5S_MPLL

+V1.5S_HPLL

+V1.5S_3GPLL

+V2.5S_CRTDAC58

+V1.5S_QTVDAC

+V1.5S_TVDAC58

+V3.3S_TVDACA

+V3.3S5,7,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.5S_DPLLB

+V1.05S3,4,6,9,14,17,30,37,45,48,53,56,58

+V1.5S_PCIE7,58

+V1.5S_PCIE7,58

+V1.5S4,17,27,48,56,58

+V1.5S4,17,27,48,56,58

+V2.5S18,20,49,56,58

+V2.5S18,20,49,56,58

+V2.5S18,20,49,56,58

+V2.5S18,20,49,56,58

+V2.5S18,20,49,56,58

+V5S5,17,18,19,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+V3.3S_TVDAC_LDO

C5T11

0.01uF

L5E1

91nH

20%

POWER

U5E1H

CALISTOGA_1p0

C30B30A30

R13N13M13L13AB12AA12Y12W12V12U12T12R12P12N12M12L12R11P11N11M11R10P10N10M10P9N9M9R8P8N8M8P7N7M7R6P6M6A6R5P5N5M5P4N4M4R3P3N3M3R2P2M2D2AB1

AJ41AB41

Y41V41R41N41

G41AC33

F21E21

B26C39AF1

A38

AF2

H20

E19F19C20D20E20F20

AH1AH2

A28B28C28

D21

A23B23B25

H19

AK31AF31AE31AC31AL30AK30AJ30AH30AG30AF30AE30AD30

W13V13U13T13

AB13AA13Y13

H22

L41

AC14AB14W14

T14R14P14N14M14L14AD13AC13

AC30AG29AF29AE29AD29AC29AG28AF28AE28AH22AJ21AH21AJ20AH20AH19

P19P16

AH15P15

AH14AG14AF14AE14

R1P1N1M1

V14

Y14AF13

G21

B39

G20

H41

AE13AF12AE12AD12

VCC_TXLVDS0VCC_TXLVDS1VCC_TXLVDS2

VTT_19VTT_20VTT_21VTT_22VTT_23VTT_24VTT_25VTT_26VTT_27VTT_28VTT_29VTT_30VTT_31VTT_32VTT_33VTT_34VTT_35VTT_36VTT_37VTT_38VTT_39VTT_40VTT_41VTT_42VTT_43VTT_44VTT_45VTT_46VTT_47VTT_48VTT_49VTT_50VTT_51VTT_52VTT_53VTT_54VTT_55VTT_56VTT_57VTT_58VTT_59VTT_60VTT_61VTT_62VTT_63VTT_64VTT_65VTT_66VTT_67VTT_68VTT_69VTT_70VTT_71VTT_72

VCC3G0VCC3G1VCC3G2VCC3G3VCC3G4VCC3G5

VCCA_3GBGVCCA_3GPLL

VCCA_CRTDAC0VCCA_CRTDAC1

VCCA_DPLLAVCCA_DPLLBVCCA_HPLL

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG

VCCA_TVDACA0VCCA_TVDACA1VCCA_TVDACB0VCCA_TVDACB1VCCA_TVDACC0VCCA_TVDACC1

VCCD_HMPLL0VCCD_HMPLL1

VCCD_LVDS0VCCD_LVDS1VCCD_LVDS2

VCCD_TVDAC

VCC_HV0VCC_HV1VCC_HV2

VCCD_QTVDAC

VCCAUX0VCCAUX1VCCAUX2VCCAUX3VCCAUX4VCCAUX5VCCAUX6VCCAUX7VCCAUX8VCCAUX9VCCAUX10VCCAUX11

VTT_15VTT_16VTT_17VTT_18

VTT_12VTT_13VTT_14

VCCSYNC

VCC3G6

VTT_0VTT_1VTT_2

VTT_4VTT_5VTT_6VTT_7VTT_8VTT_9

VTT_10VTT_11

VCCAUX12VCCAUX13VCCAUX14VCCAUX15VCCAUX16VCCAUX17VCCAUX18VCCAUX19VCCAUX20VCCAUX21VCCAUX22VCCAUX23VCCAUX24VCCAUX25VCCAUX26VCCAUX27VCCAUX28VCCAUX29VCCAUX30VCCAUX31VCCAUX32VCCAUX33VCCAUX34

VTT_73VTT_74VTT_75VTT_76

VTT_3

VCCAUX35VCCAUX36

VSSA_CRTDAC

VSSA_LVDS

VSSA_TVBG

VSSA_3GBG

VCCAUX37VCCAUX38VCCAUX39VCCAUX40

C4F2

0.1uF

C5F122nF

1

2

3

R4U210K1%

C5D5

10uF

C5E622nF

1

2

3

C4T9

0.22uF

C4F3

0.1uF

R4F310

12

C5U2470uF 20%

FB4F1

180ohm@100MHz

C5F30.1uF

C5F40.1uF

C5F710uF

C5F64.7uF

C5E422nF

1

2

3

C5T160.1uF

CR5F1 BAT5413

C5T12

0.1uF

C5T13

0.1uF

C5F5

0.1uF

R4U310K

U4F1 SC1563

1

54

2 3

SHDN

INOUT

GND ADJ

CR4F1

BAT5413

C4E322nF

1

2

3

C5T17

10uF

C4F610uF+80-20%

L5F1

10uH 10%1 2

R4F2 0.002 1%

R4U4100

NO_STUFF

L5D1

1uH

20%1 2

C5T1

10uF

C5T15

0.1uF

C4T10

0.47uF

C4E1

270uF 20%

C5R5

0.1uF

C4T3

0.47uF

C5E3

0.1uF

C4R5

0.1uF

C4T4

2.2uF

C5E2

10uF

R4U117.8K1%

C4F7

22uF

C5E1220uF

C6F1470uF 20%

FB5E1

180ohm@100MHz

L6F1

10uH 10%1 2

FB4D2

120ohm@100MHz

1 2

C5T14

0.1uF

C5F2

0.1uF

R5D1 0.5 1%

C5T8 0.1uF

Q4U1BSS138

3

1

2

C4T122uF

20%

C4R322uF

20%

C4F51.0uF

C4F4

0.1uF

R5U5

10

1 2

C5E522nF

1

2

3

R6D8

0.002 1%

FB5F1

180ohm@100MHz

C5U1

0.1uF

FB4D1

120ohm@100MHz

1 2

C4R4

0.1uF

C4E4

22nF1

2

3

R5E20.002

1%

C4F1

0.1uF

C4T2

4.7uF

C4E522nF

1

2

3

C5R6

0.1uF

R5F30.002

1%

C4E2

0.22uF

R6D6

0.002

1%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

D15378 1.501

CALISTOGA (6 OF 6)

A


Title


Date: Sheet of


VSS

U5E1I

CALISTOGA_1p0

AC41AA41W41T41P41M41J41F41

AV40AP40AN40AK40AJ40AH40AG40AF40AE40

B40AY39

AW39AV39AR39AN39AJ39AC39AB39AA39

Y39W39V39T39R39P39N39M39L39J39H39G39F39D39

AT38AM38AH38AG38AF38AE38

C38AK37AH37AB37AA37

Y37W37V37T37R37P37N37M37L37J37H37G37F37D37

AY36AW36AN36AH36AG36AF36AE36AC36

C36B36

BA35AV35AR35AH35AB35AA35

Y35W35V35T35R35P35

AF34AE34AC34C34AW33AV33AR33AE33AB33Y33V33T33R33M33H33G33F33D33B33AH32AG32AF32AE32AC32AB32G32B32AY31AV31AN31AJ31AG31AB31Y31AB30E30AT29AN29AB29T29N29K29G29E29C29B29A29BA28AW28AU28AP28AM28AD28AC28W28J28E28AP27AM27AK27J27G27F27C27B27AN26M26K26F26D26AK25P25K25H25E25D25A25BA24AU24AL24AW23

N35M35L35J35H35G35F35D35

AN34

AK34AG34VSS_0

VSS_1VSS_2VSS_3VSS_4VSS_5VSS_6VSS_7VSS_8VSS_9VSS_10VSS_11VSS_12VSS_13VSS_14VSS_15VSS_16VSS_17VSS_18VSS_19VSS_20VSS_21VSS_22VSS_23VSS_24VSS_25VSS_26VSS_27VSS_28VSS_29VSS_30VSS_31VSS_32VSS_33VSS_34VSS_35VSS_36VSS_37VSS_38VSS_39VSS_40VSS_41VSS_42VSS_43VSS_44VSS_45VSS_46VSS_47VSS_48VSS_49VSS_50VSS_51VSS_52VSS_53VSS_54VSS_55VSS_56VSS_57VSS_58VSS_59VSS_60VSS_61VSS_62VSS_63VSS_64VSS_65VSS_66VSS_67VSS_68VSS_69VSS_70VSS_71VSS_72VSS_73VSS_74VSS_75VSS_76VSS_77VSS_78VSS_79VSS_80VSS_81VSS_82VSS_83VSS_84VSS_85VSS_86VSS_87

VSS_99VSS_100VSS_101VSS_102VSS_103VSS_104VSS_105VSS_106VSS_107VSS_108VSS_109VSS_110VSS_111VSS_112VSS_113VSS_114VSS_115VSS_116VSS_117VSS_118VSS_119VSS_120VSS_121VSS_122VSS_123VSS_124VSS_125VSS_126VSS_127VSS_128VSS_129VSS_130VSS_131VSS_132VSS_133VSS_134VSS_135VSS_136VSS_137VSS_138VSS_139VSS_140VSS_141VSS_142VSS_143VSS_144VSS_145VSS_146VSS_147VSS_148VSS_149VSS_150VSS_151VSS_152VSS_153VSS_154VSS_155VSS_156VSS_157VSS_158VSS_159VSS_160VSS_161VSS_162VSS_163VSS_164VSS_165VSS_166VSS_167VSS_168VSS_169VSS_170VSS_171VSS_172VSS_173VSS_174VSS_175VSS_176VSS_177VSS_178VSS_179

VSS_88VSS_89VSS_90VSS_91VSS_92VSS_93VSS_94VSS_95VSS_96

VSS_97VSS_98

VSS

U5E1J

CALISTOGA_1p0

AT23AN23AM23AH23AC23W23K23J23F23C23

AA22K22G22F22E22D22A22

BA21AV21AR21AN21AL21AB21

Y21P21K21J21H21C21

AW20AR20AM20AA20

K20B20A20

AN19AC19W19K19G19C19

AH18P18H18D18A18

AY17AR17AP17AM17AK17AV16AN16AL16

J16F16C16

AN15AM15AK15

N15M15L15B15A15

BA14AT14AK14AD14AA14

U14K14H14E14

AV13AR13AN13AM13AL13AG13

P13F13D13B13

AY12AC12

K12H12E12

AD11AA11

Y11

J11D11B11AV10

AW9AR9AH9AB9Y9R9G9E9A9AG8AD8AA8U8K8C8BA7AV7AP7AL7AJ7AH7AF7AC7R7G7D7AG6AD6AB6Y6U6N6K6H6B6AV5AF5AD5AY4AR4AP4AL4AJ4Y4U4R4J4F4C4AY3AW3AV3AL3AH3AG3AF3AD3AC3AA3G3AT2AR2AP2AK2AJ2AD2AB2Y2U2T2N2J2

AG10AC10W10U10BA9

AL10AJ10

AP10

H2F2C2AL1

VSS_180VSS_181VSS_182VSS_183VSS_184VSS_185VSS_186VSS_187VSS_188VSS_189VSS_190VSS_191VSS_192VSS_193VSS_194VSS_195VSS_196VSS_197VSS_198VSS_199VSS_200VSS_201VSS_202VSS_203VSS_204VSS_205VSS_206VSS_207VSS_208VSS_209VSS_210VSS_211VSS_212VSS_213VSS_214VSS_215VSS_216VSS_217VSS_218VSS_219VSS_220VSS_221VSS_222VSS_223VSS_224VSS_225VSS_226VSS_227VSS_228VSS_229VSS_230VSS_231VSS_232VSS_233VSS_234VSS_235VSS_236VSS_237VSS_238VSS_239VSS_240VSS_241VSS_242VSS_243VSS_244VSS_245VSS_246VSS_247VSS_248VSS_249VSS_250VSS_251VSS_252VSS_253VSS_254VSS_255VSS_256VSS_257VSS_258VSS_259VSS_260VSS_261VSS_262VSS_263VSS_264VSS_265VSS_266VSS_267VSS_268VSS_269VSS_270VSS_271VSS_272

VSS_273VSS_274VSS_275VSS_276

VSS_285VSS_286VSS_287VSS_288VSS_289VSS_290VSS_291VSS_292VSS_293VSS_294VSS_295VSS_296VSS_297VSS_298VSS_299VSS_300VSS_301VSS_302VSS_303VSS_304VSS_305VSS_306VSS_307VSS_308VSS_309VSS_310VSS_311VSS_312VSS_313VSS_314VSS_315VSS_316VSS_317VSS_318VSS_319VSS_320VSS_321VSS_322VSS_323VSS_324VSS_325VSS_326VSS_327VSS_328VSS_329VSS_330VSS_331VSS_332VSS_333VSS_334VSS_335VSS_336VSS_337VSS_338VSS_339VSS_340VSS_341VSS_342VSS_343VSS_344VSS_345VSS_346VSS_347VSS_348VSS_349VSS_350VSS_351VSS_352VSS_353VSS_354VSS_355VSS_356

VSS_280VSS_281VSS_282VSS_283VSS_284

VSS_278VSS_279

VSS_277

VSS_357VSS_358VSS_359VSS_360


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MCH_CFG_5 Low = DMIx2High = DMIx4

Low = RSVDHigh = Mobile CPU

MCH_CFG_7(CPU Strap)

Low = Dynamic ODTDisabledHigh = Dynamic ODTEnabled

MCH_CFG_16(FSB DynamicODT)

MCH_CFG_9PCIE GraphicsLane

Low = Reverse LaneHigh = Normaloperation

Low = ReservedHigh = Calistoga

MHC_CFG_11PSB 4x CLKENABLE

MCH_CFG_10HOST PLL VCOSELECT

Low = RESERVEDHigh = MOBILITY

Low = 1.05VHigh = 1.5V

Low = Only SDVO or PCIE x1 isoperational (defaults)High = SDVO and PCIE x1 are operatingsimultaneously via the PEG port

MCH_CFG_20(PCIe Backward Interpoerabilitymode)

MCH_CFG_18(VCCSelect)

MCH_CFG_19(DMI LANE REVERSAL)

Low = NormalHigh = LANES REVERSED

Layout Note:Location of all MCH_CFG strap resistorsneeds to be close to trace to minimize stub

MCH_CFG_6 (DDR)

LOW = Moby Dick

HIGH = Calistoga

NO_STUFF

NO_STUFFNO_STUFF

D15378 1.501

CALISTOGA STRAPPING

A


Title


Date: Sheet of


MCH_CFG_57

MCH_CFG_77 MCH_CFG_167

MCH_CFG_97

MCH_CFG_117

MCH_CFG_107

MCH_CFG_187

MCH_CFG_207,13

MCH_CFG_197

+V3.3S5,7,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S

5,7,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

MCH_CFG_137

MCH_CFG_127

MCH_CFG_67

R1E82.2K

R1E22.2KNO_STUFF

R1E122.2K

R5U31KNO_STUFF

R1D32.2K

NO_STUFF

R1E12.2K

NO_STUFF

R5F11KNO_STUFF

R1E112.2K

R6F11KNO_STUFF

R1E32.2K

NO_STUFF

R1D52.2K

R1D42.2K

NO_STUFF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

For D3 HOT/ D3 ON: Stuff R6N7, R6C3, and R6C4, unstuff R6N6,R6C2 and R6C5.

Layout Note: placeAC coupling capsclose to GMCH. AllAC coupling caps are0603 size.

D15378 1.501

PCIE GRAPHICS

A


Title


Date: Sheet of


PEG_TXN13

PEG_RXN6

PEG_TXN15

PEG_TXP3

PEG_TXP9

PEG_RXP0

PEG_TXP5

PEG_TXP11

PEG_RXN10

PEG_C_TXP13

PEG_RXN13

PEG_RXP1

PEG_TXN0

PEG_TXN2

PEG_RXN5

PEG_RXN8

PEG_C_TXP0

PEG_RXN0

PEG_TXN4

PEG_C_TXN12

PEG_RXP10

PEG_RXP13

PEG_C_TXN11

PEG_C_TXP5

PEG_TXP1

PEG_RXN1

PEG_RXP7

PEG_TXN6

PEG_TXN3

PEG_TXN5

PEG_C_TXN8

PEG_TXP7

PEG_C_TXP11

PEG_C_TXN10

PEG_RXN14

PEG_RXN7

PEG_TXN11

PEG_RXP9PEG_TXN9

PEG_C_TXP14

PEG_C_TXN0

PEG_RXP3

PEG_C_TXN9

PEG_C_TXP12

PEG_TXP4

PEG_TXP12

PEG_TXN10

PEG_RXN9

PEG_C_TXN14PEG_TXP14

PEG_C_TXN15

PEG_RXN3

PEG_RXP14

PEG_C_TXN13

PEG_C_TXN3

PEG_RXP5

PEG_C_TXP4

PEG_C_TXP9

PEG_TXP6

PEG_RXP8

PEG_TXP15

PEG_C_TXP10

PEG_RXP4

PEG_C_TXP15

PEG_RXN2

PEG_C_TXN4

PEG_TXP8

PEG_C_TXN5

PEG_TXN7

PEG_C_TXP8

PEG_RXP12

PEG_RXN15

PEG_C_TXN6

PEG_C_TXN7

PEG_C_TXN1

PEG_RXP2

PEG_TXP13

PEG_TXN8

PEG_C_TXN2

PEG_C_TXP1

PEG_RXN12

PEG_C_TXP7

PEG_TXN12

PEG_RXP6

PEG_TXN14

PEG_RXP15

PEG_C_TXP3

PEG_TXP10

PEG_TXP2 PEG_C_TXP2

PEG_RXN11PEG_RXP11

PEG_RXN4

PEG_TXN1

PEG_TXP0

PEG_C_TXP6

PEG_SLT_RST#

SDVO_CTRLDATA7

SMB_DATA_S414,35

SDVO_CTRLCLK7

CLK_PCIE_PEG 30PEG_TXP[15:0]7PEG_TXN[15:0]7 CLK_PCIE_PEG# 30

PLT_GATED_RST# 32,33,36

PLT_RST# 7,15,24,28,32,41,42,57

SMB_CLK_S414,35

PEG_RXN[15:0] 7

PCIE_WAKE#16,28,33

PEG_RXP[15:0] 7

+V3.314,15,17,25,27,32,33,34,35,36,38,45,46,55,56

+V3.3S_PEG

+V12S_PEG

+VBATS18,19,27,55,56

+V3.3A14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S_PEG

+V12S_PEG

+V12S_PEG

+V3.3S5,7,10,12,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S_PEG

+VBAT_S455,56

MCH_CFG_207,12C6D13 0.1uF

C6B422UF

C6D8 0.1uF

C6B722UF

C6D11 0.1uF

R6C20.002

1%

C6E3 0.1uF

C6C70.1uF

C6D9 0.1uF

C6D4 0.1uF

C6C12 0.1uF

C6E2 0.1uF

C6C6 0.1uF

C6C30.1uF

C6C10 0.1uF

C6C13 0.1uF

C6D7 0.1uF

C6N80.1uF10%

C6E12 0.1uF

R6N70.002

NO_STUFF1%

C6D3 0.1uF

C6C40.1uF

C6B1122UF

C6B622UF

C6C2

22uF

C6B80.1uF10%

C6E4 0.1uF

C6C8 0.1uF

R6C4 0NO_STUFF

C6E10 0.1uF

C6D10 0.1uF

C6E6 0.1uF

C6C11 0.1uF

C6D6 0.1uF

C6D16 0.1uF

C6C9 0.1uF

R6C5 0

C6E13 0.1uF

R6N60.002

1%

R6C30.002

NO_STUFF1%

C6E8 0.1uF

C6C10.1uF

C6E7 0.1uF

C6D17 0.1uF

C6E5 0.1uF

C6D14 0.1uF

+ C6C5100uF

C6E1 0.1uF

C6E11 0.1uF

Key

J6C1

PCIE_X16

B1B2B3B4B5B6B7B8B9

B10B11

B12B13B14B15B16B17B18

A1A2A3A4A5A6A7A8A9A10A11

A12A13A14A15A16A17A18

B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49B50B51B52B53B54B55B56B57B58B59B60B61B62B63B64B65B66B67B68B69B70B71B72B73B74B75B76B77B78B79B80B81B82

A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49A50A51A52A53A54A55A56A57A58A59A60A61A62A63A64A65A66A67A68A69A70A71A72A73A74A75A76A77A78A79A80A81A82

+12V1+12V2+12V3GND1SMCLKSMDATGND2+3.3V1JTAG13.3VAUXWAKE#

RSVD2GND3HSOP_0HSON_0GND4PRSNT2#GND5

PRSNT1#+12V4+12V5GND6

JTAG2JTAG3JTAG4JTAG5+3.3V2+3.3V3

PWRGD

GND7REFCLK+REFCLK-

GND8HSIP_0HSIN_0

GND9HSOP_1HSON_1GND10GND11HSOP_2HSON_2GND12GND13HSOP_3HSON_3GND14RSVD3PRSNT2#1GND15HSOP_4HSON_4GND22GND23HSOP_5HSON_5GND24GND25HSOP_6HSON_6GND26GND27HSOP_7HSON_7GND28PRSNT2#2GND29HSOP_8HSON_8GND38GND39HSOP_9HSON_9GND40GND41HSOP_10HSON_10GND42GND43HSOP_11HSON_11GND44GND45HSOP_12HSON_12GND46GND47HSOP_13HSON_13GND48GND49HSOP_14HSON_14GND50GND51HSOP_15HSON_15GND52PRSNT2#3RSVD4

RSVD5GND16HSIP_1HSIN_1GND17GND18HSIP_2HSIN_2GND19GND20HSIP_3HSIN_3GND21RSVD6RSVD7GND30HSIP_4HSIN_4GND31GND32HSIP_5HSIN_5GND33GND34HSIP_6HSIN_6GND35GND36HSIP_7HSIN_7GND37RSVD8GND54HSIP_8HSIN_8GND55GND56HSIP_9HSIN_9GND57GND58

HSIP_10HSIN_10

GND59GND60

HSIP_11HSIN_11

GND61GND62

HSIP_12HSIN_12

GND63GND64

HSIP_13HSIN_13

GND65GND66

HSIP_14HSIN_14

GND67GND68

HSIP_15HSIN_15

GND69


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Cap values depend on Xtal

Short pins AH10 andAG10 at the package. Place R7H1 within 500mils of ICH7 ball

RTC Circuitry

CMOS Settings J6H1Clear CMOS ShuntKeep CMOS Open

Layout note: R6V12 needs to placedwithin 2" of ICH7, R6V14 must be placedwithin 2" of R6V12 w/o stub.

Distance between the ICH-7 Mand cap on the "P" signal shouldbe identical distance betweenthe ICH-7 M and cap on the "N"signal for same pair.

INTVRMEN

ICH7 internal VR enable strap

UNSTUFFSTUFF

0

1

R7V2R7V1

Enable (default)

Disable UNSTUFF STUFF

D15378 1.501

ICH7-M (1 of 4)

A


Title


Date: Sheet of


TP_EEP_ORG

LED_R

BAT

BAT_D

TP_EEP_DC

SATA_RXN2_C

SATA_TXP2_C

SATA_TXN0_CSATA_TXP0_C

SATA_RXN0_C

SMB_DATA_S4

IDE_PDD2

IDE_PDD0

EEP_DOUT

SM_INTRUDER#

IDE_PDD7

SATA_RXP0_C

LPC_AD2

SATA_RBIAS_PN

EEP_SK

RTC_X1

H_THERMTRIP_R

IDE_PDD9

LPC_AD1

IDE_PDD13

IDE_PDD5

LPC_AD3

IDE_PDD6

EEP_CS

IDE_PDA1

H_SMI#_R

IDE_PDD15

IDE_PDD8

IDE_PDD1

LPC_AD0

IDE_PDD12

IDE_PDD3

RTC_X2

SATA_RXP2_C

EEP_DIN

H_DPSLP#_R

IDE_PDD11

IDE_PDD4

SATA_TXN2_C

IDE_PDD14

IDE_PDA2

RTC_RST#

IDE_PDD10

IDE_PDA0

H_DPRSTP#_R

ICH_INTVRMEN

ICH_INTVRMEN

ACZ_SDATAOUT

ACZ_SDATAOUT

SMB_CLK_S3

SMB_CLK_S4

SMB_CLK_S2SMB_DATA_S2

SMB_DATA_S3

TP_H_CPUSLP#

SMB_DATA_A1

SMB_CLK_A1

I2C_EN1

I2C_EN3I2C_EN4

I2C_EN2

CL2CL1

DA1DA2

ICH_SATA_LED#

IDE_PDD[15:0] 39

SMB_DATA_S3 30,31

SMB_CLK_S4 13,35SMB_DATA_S4 13,35

SMB_CLK_A1 25,26,28SMB_DATA_A1 25,26,28

SMB_CLK_S2 21,22,23SMB_DATA_S2 21,22,23

SMB_CLK_S3 30,31

RSVD9 15

LPC_AD[3:0] 24,32,35,41,42

SMB_DATA16,33,58SMB_CLK16,33,58

LAN_JCLK33

IDE_PDIORDY39

LAN_RXD233

LAN_RXD033LAN_RXD133 H_FERR# 3

PM_THRMTRIP# 3,7

H_A20GATE 32,35

H_RCIN# 16,32,35

ICH_DRQ#0 42

INT_IRQ1439

IDE_PDDREQ39

ACZ_SDATAIN227

IDE_PDACTIVE# 39CLK_PCIE_SATA31CLK_PCIE_SATA#31

ACZ_SDATAIN127ACZ_SDATAIN027

ICH_DRQ#1 42

SATA_RXP043

SATA_RXN244

SATA_RXN043

SATA_RXP244

IDE_PDIOR#39

LAN_TXD133

IDE_PDDACK#39

LAN_TXD033

LAN_RSTSYNC33

LAN_TXD233

H_DPSLP# 3,35

H_SMI# 3,35,58

IDE_PDA[2:0] 39

H_A20M# 3

H_INIT# 3H_INTR 3

H_PWRGD 3,35

H_STPCLK# 3

H_NMI 3,35

H_IGNNE# 3

IDE_PDCS1# 39

IDE_PDIOW#39

IDE_PDCS3# 39

H_DPRSTP# 3,35

ACZ_SYNC27

ACZ_RST#27

ACZ_SDATAOUT27

ATA_LED#54

ACZ_BITCLK27

LPC_FRAME# 24,32,35,41,42

FWH_INIT# 24

SATA_TXN043

SATA_TXP244

SATA_TXP043

SATA_TXN244

+V3.3A_RTC17

+V3.313,15,17,25,27,32,33,34,35,36,38,45,46,55,56

+V3.3A 13,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V1.05S3,4,6,9,10,17,30,37,45,48,53,56,58

+V3.3A13,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A_RTC17

+V3.3S 5,7,10,12,13,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.05S 3,4,6,9,10,17,30,37,45,48,53,56,58

+V3.3S 5,7,10,12,13,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A 13,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S 5,7,10,12,13,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.05S 3,4,6,9,10,17,30,37,45,48,53,56,58

+V3.3S5,7,10,12,13,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

R6H11 20K

R7P24 10K

R7J310K

R6V13 0

CR6H2

BAT54

1 3

J6H1

C7H3 3900pF

R7P23 10K

CR6H1

BAT54

1 3

C6H51uF

R7U131KNO_STUFF

C7C6

0.1uF

R6V1156

NO_STUFF

R6H101M

C7J12

0.1uF

R7D1 10K

C7H4 3900pF

C8U1

0.1uF

R6H91K

R6V1456

R7V1332K1%

R7V20NO_STUFF

C7W1 3900pF

RTC

LAN

AC-97/AZALIA

SATA

IDE

LPC

CPU

U7G1A

ICH7M REV 1.02 EDS

AB1AB2

W4Y5

W1Y1Y2

W3

V3

U3

U5V4T5

U7V6V7

U1R6

R5

T2T3T1

T4

AF18

AF3AE3AG2AH2

AF7AE7AG6AH6

AF1AE1

AH10AG10

AH17AE17AF17

AE16AD16

AB15AE14AG13AF13AD14AC13AD12AC12AE12AF12AB13AC14AF14AH13AH14AC15

AE15AG16AH16AF16AH15AF15

AA6AB5AC4Y6

AC3AA5

AB3

AE22AH28

AG27

AF24AH25

AG26

AG24

AG22AG21AF22AF25

AG23

AF23AH24

AH22

AF26

AA3

RTXC1RTCX2

INTVRMENINTRUDER#

EE_CSEE_SHCLKEE_DOUTEE_DIN

LAN_CLK

LAN_RSTSYNC

LAN_RXD0LAN_RXD1LAN_RXD2

LAN_TXD0LAN_TXD1LAN_TXD2

ACZ_BIT_CLKACZ_SYNC

ACZ_RST#

ACZ_SDIN0ACZ_SDIN1ACZ_SDIN2

ACZ_SDOUT

SATALED#

SATA0RXNSATA0RXPSATA0TXNSATA0TXP

SATA2RXNSATA2RXPSATA2TXNSATA2TXP

SATA_CLKNSATA_CLKP

SATARBIASNSATARBIASP

DA0DA1DA2

DCS1#DCS3#

DD0DD1DD2DD3DD4DD5DD6DD7DD8DD9

DD10DD11DD12DD13DD14DD15

DDREQIORDYIDEIRQDDACK#DIOW#DIOR#

LAD0LAD1LAD2LAD3

LDRQ0#LDRQ1#/GPIO23

LFRAME#

A20GATEA20M#

CPUSLP#

TP1/DPRSTP#TP2/DPSLP#

FERR#

GPIO49/CPUPWRGD

IGNNE#INIT3_3V#

INIT#INTR

RCIN#

SMI#NMI

STPCLK#

THERMTRIP#

RTCRST#

R7H124.91%

R6V1756

R7R2 10K

C6H7

1uF

R8V510M

R6D7 10K

R7H1110K

Y8G132.768KHZ

41

R6V160

U8F3

AT88SC153NO_STUFF

1234

8765

CSSKDI

DO

VCCDCORGGND

C7H5 3900pF

R6D5 10K

R7P28 10K

C7W43900pF

U7J1

74AHC1G081

24

53

CR7J1

GREEN

12

R5V956

NO_STUFF

R9D2 10KR7D2 10K

R8G81KNO_STUFF

R9A6 10K

C7H6 3900pF

R9A5 10K

R7R6 10K

C7W2 3900pF

C8V1 10pF

BT5H1Battery_Holder

13

2

C7W3 3900pF

R7C23 10K

R7J5330

R6V12 24.9 1%

R5G5 0

R7D11 10K

R7R5 10K

R9D1 10K

U7C4

EXP. 5-CH-I2C HUB

12

1819

34

711141710

20

56

89

1213

1516

EXPSCL1EXPSCL2EXPSDA1EXPSDA2

SCL0SDA0

EN1EN2EN3EN4VSS

VCC

SCL1SDA1

SCL2SDA2

SCL3SDA3

SCL4SDA4

C8V2 10pF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout note: PCIE AC coupling capsneed to be within 250 mils of thedriver.

Place within 500mils of ICH

Place within 500mils of ICH

R7U18 - A16 swap overrideNO_STUFF by defaultSTUFF for A16 swap override

STUFF

GNT5#

PCI

R8U2

UNSTUFF

STUFF

11

10

R7F7

ICH7 Boot BIOS select

UNSTUFF

GNT4#

LPC (default)

SPI

STRAP

01 UNSTUFF

UNSTUFF

Buffer to reduceloading onPLT_RST#

NOTE: R7F3-5 are not neededwhen sharing SPI flash withICH7M and Tekoa

D15378 1.501

ICH7-M (2 of 4)

A


Title


Date: Sheet of


PCI_AD4

PCI_AD13

PCI_AD24

PCI_AD29

PCI_AD1

PCI_AD14

PCI_AD7

PCI_AD11

PCI_AD23

PCI_AD28

PCI_AD3

TP_ICH_RSVD7

PCI_AD16

PCI_AD20

PCI_AD30

PCI_AD26

PCI_AD18

PCI_AD12

PCI_AD19

PCI_AD9

PCI_AD21

PCI_AD17

PCI_AD2

PCI_AD5

PCI_AD25

PCI_AD31

PCI_AD22

PCI_AD15

PCI_AD27

PCI_AD10

TP_ICH_RSVD6

PCI_AD6

PCI_AD8

PCI_AD0

TP_ICH_RSVD8

TP_ICH_RSVD1

PCIE_TXN3_C

PCIE_TXN2_C

DMI_IRCOMP_R

PCIE_TXP4_CPCIE_TXN4_C

PCIE_TXN1_CPCIE_TXP1_C

PCIE_TXP3_C

USB_RBIAS_PN

PCIE_TXP2_C

PCI_GNT#5_R

TP_ICH_RSVD2TP_ICH_RSVD3TP_ICH_RSVD4TP_ICH_RSVD5

PCIE_RXN3_SLOT2PCIE_RXP3_SLOT2

PCIE_RXP3_RPCIE_RXN3_R

PCIE_RXN4_SLOT0PCIE_RXP4_SLOT0PCIE_TXN4_SLOT0PCIE_TXP4_SLOT0

PCIE_TXP6_C

PCIE_TXP5_C

PCIE_TXP3_SLOT2PCIE_TXN6_C

PCIE_TXN5_C

PCIE_TXN3_SLOT2

PCIE_RXP5_R

PCIE_RXN6_RPCIE_RXP6_R

PCIE_RXN5_R

PLT_RST#

PCIE_RXN4_RPCIE_RXP4_R

INT_PIRQF# 16,25,26INT_PIRQC#16,25

RSVD9 14

INT_PIRQB#16,25,26

INT_PIRQD#16,25

INT_PIRQE# 16,26INT_PIRQA#16,25

INT_PIRQG# 16,25,26INT_PIRQH# 16,26

USB_PP0 40

USB_PP4 29

USB_PP7 40

USB_PN1 40

USB_PN3 40

USB_PN0 40

USB_PP5 40

USB_PP3 40

USB_PN5 40

USB_PN7 40

USB_PN6 29

USB_PN2 29

USB_PN4 29

USB_PP2 29

USB_PP1 40

USB_PP6 29

SPI_SCLK33SPI_CE#33SPI_ARB33

SPI_SI33SPI_SO33

PCI_C/BE#3 25,26

PCI_IRDY# 16,25,26PCI_PAR 25,26

PCI_C/BE#2 25,26

PCI_AD[31:0]25,26

PCI_C/BE#0 25,26

PCI_PME# 25,26,35

PCI_C/BE#1 25,26

PCI_SERR# 16,25,26

PCI_DEVSEL# 16,25,26PCI_PERR# 16,25,26

PCI_STOP# 16,25,26PCI_TRDY# 16,25,26

PCI_LOCK# 16,25,26

PCI_FRAME# 16,25,26

CLK_PCIE_ICH 30

PCIE_RXN2_SLOT128

DMI_RXP0 7

DMI_RXP3 7

CLK_PCIE_ICH# 30

PCIE_RXP3_SLOT228

PCIE_RXN4_SLOT028 DMI_RXN3 7

DMI_RXN1 7

DMI_RXN0 7

DMI_RXP2 7PCIE_RXN3_SLOT228

PCIE_RXP2_SLOT128

DMI_RXN2 7

DMI_RXP1 7

PCIE_RXP4_SLOT028

MCH_ICH_SYNC# 7

PCI_REQ#0 16,26

PCI_REQ#3 16,25

CLK_PCIF_ICH 31

PCI_REQ#1 16,26

PCI_REQ#2 16,25

PCI_REQ#5 16,26

USB_OC#340

USB_OC#4_R

USB_OC#040

USB_OC#6_R

USB_OC#540

USB_OC#5_R

USB_OC#140

USB_OC#740

USB_OC#7_R

USB_OC#1_RUSB_OC#0_R

USB_OC#2_RUSB_OC#3_R

USB_OC#229

USB_OC#429

USB_OC#629

PCIE_RXN1_LAN33PCIE_RXP1_LAN33

FWH_TBL# 24,35

DMI_TXP0 7

DMI_TXP3 7

DMI_TXN0 7

DMI_TXP1 7

DMI_TXN2 7

DMI_TXN1 7

DMI_TXN3 7

DMI_TXP2 7

PCI_GNT#5 26

FWH_WP# 24,35

PCI_GNT#5_R

PCI_GNT#3 25

PCI_GNT#1 26

PCI_RST# 25,26,32

PCI_GNT#0 26

PCIE_TXN1_LAN33

PCIE_TXN2_SLOT128

PCIE_TXN3_SLOT228

PCIE_TXN4_SLOT028

PCIE_TXP1_LAN33

PCIE_TXP2_SLOT128

PCIE_TXP3_SLOT228

PCIE_TXP4_SLOT028

PCI_GNT#2 25

BUF_PLT_RST#32,33,35

PLT_RST# 7,13,24,28,32,41,42,57

+V1.5S_PCIE_ICH 17

+V3.3S 5,7,10,12,13,14,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3 13,14,17,25,27,32,33,34,35,36,38,45,46,55,56

GNT5_SPI 29

C6V2 0.1uF

R6G4 0 NO_STUFF

C6U2 0.1uF

R8U41K

NO_STUFF

R7F71K

NO_STUFF

R6V6 0

C6F6 0.1uF

R7F15 0

C6F5 0.1uF NO_STUFFR7F510K

NO_STUFF

C6G7 0.1uF NO_STUFF

R7F410K

NO_STUFF

R7F310K

NO_STUFF

PCI-Express

Direct Media Interface

USBSPI

U7G1D

ICH7M REV 1.02 EDS

F26F25E28E27

H26H25G28G27

K26K25J28J27

M26M25L28L27

P26P25N28N27

T25T24R28R27

V26V25U28U27

Y26Y25W28W27

AB26AB25AA28AA27

AD25AD24AC28AC27

AE28AE27

C25D25

D3C4D5D4E5C3A2B3

F1F2G4G3H1H2J4J3K1K2L4L5M1M2N4N3

D2D1

R2P6P1

P5P2

PERn1PERp1PETn1PETp1






DMI0RXNDMI0RXPDMI0TXNDMI0TXP




DMI_CLKNDMI_CLKP

DMI_ZCOMPDMI_IRCOMP

OC0#OC1#OC2#OC3#OC4#OC5#/GPIO29OC6#/GPIO30OC7#/GPIO31

USBP0NUSBP0PUSBP1NUSBP1PUSBP2NUSBP2PUSBP3NUSBP3PUSBP4NUSBP4PUSBP5NUSBP5PUSBP6NUSBP6PUSBP7NUSBP7P

USBRBIAS#USBRBIAS

SPI_CLKSPI_CS#SPI_ARB

SPI_MOSISPI_MISO

C6F7 0.1uF

R6V8 0

R6G5 0 NO_STUFF

R8U522.61%

R7F10 0

C6G5 0.1uF

C6V1 0.1uF

R7F13 0

C6G6 0.1uF NO_STUFF

R8U21K

C6V3 0.1uF

R6G3 0 NO_STUFF

R7F11 0

C6G3 0.1uF

C7T4

0.1uF

R6V4 0

R8U3 0

R7F9 0

R6G2 0 NO_STUFF

U8E2

74AHC1G081

24

53

R8B3100K

R7F8 0

R6V5 0

PCI

Interrupt I/F

MISC

U7G1B

ICH7M REV 1.02 EDS

E18C18A16F18E16A18E17A17A15C14E14D14B12C13G15G13E12C11D11A11A10F11F10E9D9B9A8A6C7B6E6D6

D7E7C16D16C17D17E13F13A13A14C8D8

B15C12D12C15

A7E10B18A12C9E11B10F15F14F16

C26A9B19

A3B4C5B5 G7

F8F7G8

AE5AD5AG4AH4AD9 AH20

F21AH8AG8AE9

AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31

REQ0#GNT0#REQ1#GNT1#REQ2#GNT2#REQ3#GNT3#

REQ4#/GPIO22GNT4#/GPIO48GPIO1/REQ5#

GPIO17/GNT5#

C/BE0#C/BE1#C/BE2#C/BE3#

IRDY#PAR

PCIRST#DEVSEL#

PERR#PLOCK#

SERR#STOP#TRDY#

FRAME#

PLTRST#PCICLK

PME#

PIRQA#PIRQB#PIRQC#PIRQD# GPIO5/PIRQH#

GPIO4/PIRQG#GPIO3/PIRQF#GPIO2/PIRQE#

RSVD[1]RSVD[2]RSVD[3]RSVD[4]RSVD[5] MCH_SYNC#

RSVD[9]RSVD[8]RSVD[7]RSVD[6]

C6G1 0.1uF NO_STUFF R7U924.91%

R7F12 0

R7F14 0


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH7 Pullups

R7F16 - No Reboot StrapNO_STUFF by defaultSTUFF for No Reboot

Default is 1-Xfor BIOS recovery 1-2

D15378 1.501

ICH7-M (3 of 4)

A


Title


Date: Sheet of


PM_STPPCI_ICH#

SMB_LINK_ALERT#

PM_RSMRST#_R

PM_STPCPU_ICH#

PM_ICH_PWROK

SLP_S3#_RSLP_S4#_R

PM_BATLOW#_R

PM_ICH_PWROK

SMC_EXTSMI#_RSMC_RUNTIME_SCI#_R

SMC_WAKE_SCI#_R

PM_BATLOW#_R

SMB_LINK_ALERT#

SATA0_R3

SATA0_R0

PM_DPRSLPVR_R

SMLINK0

SMLINK1SMLINK0

SMLINK1

CRB_SV_DET_RCRB_SV_DET

FWH_MFG_MODE

BIOS_REC

PATA_PWR_EN#_R

SMC_EXTSMI#_R

SMC_WAKE_SCI#_R

SMC_RUNTIME_SCI#_R

FWH_MFG_MODE_R

BIOS_REC_R

PCIE_SLOT1_CARD_ID#1 29

SATA0_R1SATA0_R2

SV_SET_UP



CRB_SV_DET_R

PATA_PWR_EN#35,39PATA_PWR_EN#_R

PM_CLKRUN#25,26,32,35,42

INT_SERIRQ25,32,35,42

SMB_CLK14,33,58SMB_DATA14,33,58

PCIE_WAKE#13,28,33

SMB_DATA14,33,58


SMB_CLK14,33,58

PCIE_SLOT0_CARD_ID#129

PCI_STOP#15,25,26

INT_PIRQF#15,25,26

PCI_DEVSEL#15,25,26

INT_PIRQD#15,25

INT_PIRQH#15,26

PCI_FRAME#15,25,26

INT_PIRQB#15,25,26

PCI_IRDY#15,25,26

INT_PIRQC#15,25

INT_PIRQG#15,25,26

PCI_TRDY#15,25,26

PCI_LOCK#15,25,26

INT_PIRQA#15,25

INT_PIRQE#15,26

PCI_SERR#15,25,26

PCI_PERR#15,25,26

PM_CLKRUN#25,26,32,35,42

FWH_MFG_MODE_RBIOS_REC_R

VR_PWRGD_CK41031

PM_THRM#5,32,35

PM_RSMRST# 32,35

PM_BATLOW# 32,35

CLK_REF_ICH 31CLK_USB48 30

PM_PWRBTN# 32,35

PM_LAN_ENABLE 32,34,35

ALL_SYS_PWRGD 32,35,48

DELAY_VR_PWRGOOD 7

SATA_DET#2 32,44

IDE_PATADET 35,39

PM_BMBUSY#7

PM_RI#35,42

PM_SYSRST#54

PCIE_WAKE#13,28,33

SMB_ALERT#33

ALL_SYS_PWRGD32,35,48

PM_RI#35,42

PM_THRM#5,32,35

PM_RSMRST#32,35

PCI_REQ#215,25

PCI_REQ#015,26

PCI_REQ#515,26

PCI_REQ#115,26

PCI_REQ#315,25

CLK_PCIE_SATA_OE#31

SMC_EXTSMI#_RSMC_EXTSMI# 32,35,42,57

SMC_WAKE_SCI#_RSMC_WAKE_SCI# 32,35

SMC_RUNTIME_SCI#_R

SMB_ALERT#33

PM_SUS_STAT#32,35,42,57

PM_SLP_S5# 55

PM_STPCPU#30,35

PM_SLP_S4# 26,32,35,46,55,56

ACZ_SPKR27

PM_DPRSLPVR 7,35,51

PM_SLP_S3#_UNBUF 47

PM_STPPCI#30,35

SUS_CLK 35,41

DOCK_AZ_EN#_RDOCK_AZ_RST#27

CLK_PCIE_SATA_OE# 31SATA_PWR_EN#0_R

SMC_RUNTIME_SCI# 32,35

SATA_PWR_EN#2 44

DOCK_AZ_EN#27

SATA_PWR_EN#043

H_RCIN#14,32,35

PCI_REQ64#25PCI_ACK64#25

+V3.3S 5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A13,14,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S 5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A13,14,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S 5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58+V3.3S5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A 13,14,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S 5,7,10,12,13,14,15,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A13,14,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

R7N1 2.2K

R8G12 10K

R8B4 10K

RP9B1B 8.2K2 7

R7H9 100

RP9B3B 8.2K2 7

R9Y110K

RP9B2A 8.2K1 8

R8F118.2K

RP9D2A 8.2K1 8

RP9C1C 8.2K3 6

R6W410K

NO_STUFF

R3P12K

1%

R8V2 0

R9Y3 0

RP9B3A 8.2K1 8

R8G5 0R8H310K

R7F161KNO_STUFF

R9E1 1K

R9W4 8.2K

R6W310K

NO_STUFF

R8G7 100

R9W12 8.2K

R7T8 10K

R6U3 10K

R7W4 0

RP9C1A 8.2K1 8

R6U2 10K

RP9B1D 8.2K4 5

RP9B2B 8.2K2 7

RP9D2C 8.2K3 6

R7W6 100

R7W7 0

RP9C1B 8.2K2 7

R8H2 0

RP9D1A 8.2K1 8

J8H1

R8F9 0

R7V3 10K

R8V4 10K

RP9B3D 8.2K4 5

R7N2 2.2K

R8G11 10K

R8C810K

RP9B1C 8.2K3 6

RP9B2C 8.2K3 6

RP9D2B 8.2K2 7

RP9D1B 8.2K2 7

R6U1 10K

RP9D1D 8.2K4 5

CON3_HDR

J2J10

32

1

R7W3 100

R7H12 0

R7W8 0

RP9B1A 8.2K1 8

R8G2 100

RP9D2D 8.2K4 5

U8C1

74AHC1G081

24

53

RP9D1C 8.2K3 6

R8V6 0

RP9C1D 8.2K4 5

RP9B2D 8.2K4 5

R7T6 10K

R7H13 0

R7W5 100

SATA

SMB

SYS

GPIO

GPIO

GPIO

Cloc

ksPower MGT

U7G1C

ICH7M REV 1.02 EDS

AF19AH18AH19AE19

C22B22A26B25A25

A19A27A22

AB18

AC21AC18

E21

E20A20

B23

F19E19R4E22

AC20AF21

R3D20

AG18

AC19U2

AD21AD20AE20

F20AH21AF20

AD22

AC1B2

C20

B24D23F22

AA4

AC22

C21

C23

C19

Y4

A28

A21

B21E23

GPIO21/SATA0GPGPIO19/SATA1GPGPIO36/SATA2GPGPIO37/SATA3GP

SMBCLKSMBDATALINKALERT#SMLINK0SMLINK1

SPKRSUS_STAT#SYS_RST#

GPIO0/BM_BUSY#

GPIO6GPIO7GPIO8

GPIO9GPIO10

GPIO11/SMBALERT#

GPIO12GPIO13GPIO14GPIO15

GPIO18/STPPCI# GPIO20/STPCPU#

GPIO24GPIO25

GPIO32/CLKRUN#

GPIO33/AZ_DOCK_EN#GPIO34/AZ_DOCK_RST#

GPIO35GPIO38GPIO39

WAKE#SERIRQTHRM#

VRMPWRGD

CLK14CLK48

SUSCLK

SLP_S3#SLP_S4#SLP_S5#

PWROK

GPIO16/DPRSLPVR

TP0/BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

RI#

GPIO26

GPIO27GPIO28

RP9B3C 8.2K3 6

R7P22 10K

R8G14 100

J9J8

NO_STUFF

21

R7W2 100


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place within 100 milsof ICH on the bottomside or 140 mils onthe top near pin AG5

Place within 100 mils of ICH onthe bottom side or 140 mils onthe top near AG9

Place within 100 mils ofICH on the bottom sideor 140 mils on the top

Place within 100 mils ofICH on the bottom side or140 mils on the top

Layout note: Place aboveCaps within 100 mils ofICH on the bottom sideor 140 mils on the topnear D28, T28, AD28

Layout note: C7V15 needs be placedwithin 100mils of pin AD17 of ICH7on the bottom side or 140 mils onthe top

Layout note: C7V2 needs be placedwithin 100mils of pin F6 of ICH7 on thebottom side or 140 mils on the top

Place within 100 mils ofICH on the bottom sideor 140 mils on the top

Place within 100mils of ICH onthe bottom sideor 140 mils onthe top near pin

Place within 100 mils ofICH7 on the bottom sideor 140 mils on the topnear pin

Layout Note:Place at MCH edge

Layout Note: Distribute in PCI section

Layout Note:Place onsecondaryside underMCH

Place within 100mils of ICH on thebottom side or 140mils on the top

D15378 1.501

ICH7-M (4 of 4)

A


Title


Date: Sheet of


GPLL_R GPLL_R_L

TP_ICHVCCSUS3TP_ICHVCCSUS2

TP_ICHVCCSUS1

V5REF_SUS

TP_VCCSUSLAN1TP_VCCSUSLAN2

VCC5REF

+V1.5S4,10,27,48,56,58

+V1.5S 4,10,27,48,56,58

+V1.5S4,10,27,48,56,58

+V3.3S5,7,10,12,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.5S 4,10,27,48,56,58

+V1.5S_PCIE_ICH15+V1.5S4,10,27,48,56,58

+V3.3A13,14,16,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V5S 5,10,18,19,20,25,26,39,41,43,44,45,47,51,52,54,55,56+V3.3S 5,7,10,12,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5A 29,40,46,47,48,49,54,55,57

+V1.05S 3,4,6,9,10,14,30,37,45,48,53,56,58

+V3.3A

13,14,16,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S5,7,10,12,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S

5,7,10,12,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A_RTC14

+V1.5S4,10,27,48,56,58

+V3.3A/1.5A_AZ_IO 27

+V1.5S 4,10,27,48,56,58

+V1.5S 4,10,27,48,56,58

+V3.3A 13,14,16,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V1.5S4,10,27,48,56,58

+V1.5S4,10,27,48,56,58

+V1.05S3,4,6,9,10,14,30,37,45,48,53,56,58

+V3.3S/1.5S_AZ_IO 27

+V3.3A 13,14,16,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V1.5S 4,10,27,48,56,58

+V3.313,14,15,25,27,32,33,34,35,36,38,45,46,55,56

C7H210uF

6.3V20%

C7V180.1uF

10V10%

SMC0402

C7V200.1uF

10V10%

SMC0402

C6G9220uF4V20%

C7V190.1uF

10V10%

SMC0402

C7V214.7uF

10%SMC1206

10V

C7V80.1uF

10V10%

SMC0402

C7H11UF 20%

C7V10.1uF

10V10%

SMC0402

FB6G1

100ohm@100MHz

C7V130.1uF

10V10%

SMC0402

C7V101uF

20%

C7V140.1uF

10V10%

SMC0402

C7U70.1uF

10V10%

SMC0402

CORE

VCCA3GP

VCC PAUX

USB

ATXARX

IDE

USB

CORE

PCI

U7G1F

ICH7M REV 1.02 EDS

G10

AD17

F6

AA22AA23AB22AB23AC23AC24AC25AC26AD26AD27AD28

D26D27D28E24E25E26F23F24G22G23H22H23J22J23K22K23L22L23M22M23N22N23P22P23R22R23R24R25R26T22T23T26T27T28U22U23V22V23

W22W23Y22Y23

B27

AG28

AB7AC6AC7AD6AE6AF5AF6AG5AH5

AD2

AH11

AB10AB9

AC10AD10AE10AF10AF9AG9AH9

C1

AA2Y7

L11L12L14L16L17L18M11M18P11P18T11T18U11U18V11V12V14V16V17V18

V5V1W2W7

U6

R7

AE23AE26AH26

AA7AB12AB20AC16AD13AD18AG12AG15AG19

A5B13B16B7C10D15F9G11G12G16

W5

P7

A24C24D19D22G19

K3K4K5K6L1L2L3L6L7M6M7N7

AB17AC17

T7F17G17

AB8AC8

K7

C28G20

A1H6H7J6J7

E3

V5REF[1]

V5REF[2]

V5REF_Sus

Vcc1_5_B[1]Vcc1_5_B[2]Vcc1_5_B[3]Vcc1_5_B[4]Vcc1_5_B[5]Vcc1_5_B[6]Vcc1_5_B[7]Vcc1_5_B[8]Vcc1_5_B[9]Vcc1_5_B[10]Vcc1_5_B[11]Vcc1_5_B[12]Vcc1_5_B[13]Vcc1_5_B[14]Vcc1_5_B[15]Vcc1_5_B[16]Vcc1_5_B[17]Vcc1_5_B[18]Vcc1_5_B[19]Vcc1_5_B[20]Vcc1_5_B[21]Vcc1_5_B[22]Vcc1_5_B[23]Vcc1_5_B[24]Vcc1_5_B[25]Vcc1_5_B[26]Vcc1_5_B[27]Vcc1_5_B[28]Vcc1_5_B[29]Vcc1_5_B[30]Vcc1_5_B[31]Vcc1_5_B[32]Vcc1_5_B[33]Vcc1_5_B[34]Vcc1_5_B[35]Vcc1_5_B[36]Vcc1_5_B[37]Vcc1_5_B[38]Vcc1_5_B[39]Vcc1_5_B[40]Vcc1_5_B[41]Vcc1_5_B[42]Vcc1_5_B[43]Vcc1_5_B[44]Vcc1_5_B[45]Vcc1_5_B[46]Vcc1_5_B[47]Vcc1_5_B[48]Vcc1_5_B[49]Vcc1_5_B[50]Vcc1_5_B[51]Vcc1_5_B[52]Vcc1_5_B[53]

Vcc3_3[1]

VccDMIPLL

Vcc1_5_A[1]Vcc1_5_A[2]Vcc1_5_A[3]Vcc1_5_A[4]Vcc1_5_A[5]Vcc1_5_A[6]Vcc1_5_A[7]Vcc1_5_A[8]Vcc1_5_A[9]

VccSATAPLL

Vcc3_3[2]

Vcc1_5_A[10]Vcc1_5_A[11]Vcc1_5_A[12]Vcc1_5_A[13]Vcc1_5_A[14]Vcc1_5_A[15]Vcc1_5_A[16]Vcc1_5_A[17]Vcc1_5_A[18]

VccUSBPLL

VccSus1_05/VccLAN1_05[1]VccSus1_05/VccLAN1_05[2]

Vcc1_05[1]Vcc1_05[2]Vcc1_05[3]Vcc1_05[4]Vcc1_05[5]Vcc1_05[6]Vcc1_05[7]Vcc1_05[8]Vcc1_05[9]

Vcc1_05[10]Vcc1_05[11]Vcc1_05[12]Vcc1_05[13]Vcc1_05[14]Vcc1_05[15]Vcc1_05[16]Vcc1_05[17]Vcc1_05[18]Vcc1_05[19]Vcc1_05[20]

VccSus3_3/VccLAN3_3[1]VccSus3_3/VccLAN3_3[2]VccSus3_3/VccLAN3_3[3]VccSus3_3/VccLAN3_3[4]

Vcc3_3/VccHDA

VccSus3_3/VccSusHDA

V_CPU_IO[1]V_CPU_IO[2]V_CPU_IO[3]

Vcc3_3[3]Vcc3_3[4]Vcc3_3[5]Vcc3_3[6]Vcc3_3[7]Vcc3_3[8]Vcc3_3[9]

Vcc3_3[10]Vcc3_3[11]

Vcc3_3[12]Vcc3_3[13]Vcc3_3[14]Vcc3_3[15]Vcc3_3[16]Vcc3_3[17]Vcc3_3[18]Vcc3_3[19]Vcc3_3[20]Vcc3_3[21]

VccRTC

VccSus3_3[1]

VccSus3_3[2]VccSus3_3[3]VccSus3_3[4]VccSus3_3[5]VccSus3_3[6]

VccSus3_3[7]VccSus3_3[8]VccSus3_3[9]

VccSus3_3[10]VccSus3_3[11]VccSus3_3[12]VccSus3_3[13]VccSus3_3[14]VccSus3_3[15]VccSus3_3[16]VccSus3_3[17]VccSus3_3[18]

Vcc1_5_A[19]Vcc1_5_A[20]

Vcc1_5_A[21]Vcc1_5_A[22]Vcc1_5_A[23]

Vcc1_5_A[24]Vcc1_5_A[25]

VccSus1_05[1]

VccSus1_05[2]VccSus1_05[3]

Vcc1_5_A[26]Vcc1_5_A[27]Vcc1_5_A[28]Vcc1_5_A[29]Vcc1_5_A[30]

VccSus3_3[19]

C7V40.1uF

10V10%

SMC0402

C7V150.1uF

10V10%

SMC0402

C6G100.1uF

10V10%

SMC0402

U7G1E

ICH7M REV 1.02 EDS

A4

A23

B1

B8

B11

B14

B17

B20

B26

B28

C2

C6

C27

D10

D13

D18

D21

D24

E1

E2

E4

E8

E15

F3 F4 F5 F12

F27

F28

G1

G2

G5

G6

G9

G14

G18

G21

G24

G25

G26

H3

H4

H5

H24

H27

H28

J1 J2 J5 J24

J25

J26

K24

K27

K28

L13

L15

L24

L25

L26

M3

M4

M5

M12

M13

M14

M15

M16

M17

M24

M27

M28

N1

N2

N5

N6

N11

N12

N13

N14

N15

N16

N17

N18

N24

N25

N26

P3

P4

P12

P13

P14

P15

P16

P17

P24

P27

P28

R1

R11

R12

R13

R14

R15

R16

R17

R18

T6 T12

T13

T14

T15

T16

T17

U4

U12

U13

U14

U15

U16

U17

U24

U25

U26

V2

V13

V15

V24

V27

V28

W6

W24

W25

W26

Y3

Y24

Y27

Y28

AA

1A

A24

AA

25A

A26

AB

4A

B6

AB

11A

B14

AB

16A

B19

AB

21A

B24

AB

27A

B28

AC

2A

C5

AC

9A

C11

AD

1A

D3

AD

4A

D7

AD

8A

D11

AD

15A

D19

AD

23A

E2

AE

4A

E8

AE

11A

E13

AE

18A

E21

AE

24A

E25

AF2

AF4

AF8

AF1

1A

F27

AF2

8A

G1

AG

3A

G7

AG

11A

G14

AG

17A

G20

AG

25A

H1

AH

3A

H7

AH

12A

H23

AH

27

VS

S[1

]V

SS

[2]

VS

S[3

]V

SS

[4]

VS

S[5

]V

SS

[6]

VS

S[7

]V

SS

[8]

VS

S[9

]V

SS

[10]

VS

S[1

1]V

SS

[12]

VS

S[1

3]V

SS

[14]

VS

S[1

5]V

SS

[16]

VS

S[1

7]V

SS

[18]

VS

S[1

9]V

SS

[20]

VS

S[2

1]V

SS

[22]

VS

S[2

3]V

SS

[24]

VS

S[2

5]V

SS

[26]

VS

S[2

7]V

SS

[28]

VS

S[2

9]V

SS

[30]

VS

S[3

1]V

SS

[32]

VS

S[3

3]V

SS

[34]

VS

S[3

5]V

SS

[36]

VS

S[3

7]V

SS

[38]

VS

S[3

9]V

SS

[40]

VS

S[4

1]V

SS

[42]

VS

S[4

3]V

SS

[44]

VS

S[4

5]V

SS

[46]

VS

S[4

7]V

SS

[48]

VS

S[4

9]V

SS

[50]

VS

S[5

1]V

SS

[52]

VS

S[5

3]V

SS

[54]

VS

S[5

5]V

SS

[56]

VS

S[5

7]V

SS

[58]

VS

S[5

9]V

SS

[60]

VS

S[6

1]V

SS

[62]

VS

S[6

3]V

SS

[64]

VS

S[6

5]V

SS

[66]

VS

S[6

7]V

SS

[68]

VS

S[6

9]V

SS

[70]

VS

S[7

1]V

SS

[72]

VS

S[7

3]V

SS

[74]

VS

S[7

5]V

SS

[76]

VS

S[7

7]V

SS

[78]

VS

S[7

9]V

SS

[80]

VS

S[8

1]V

SS

[82]

VS

S[8

3]V

SS

[84]

VS

S[8

5]V

SS

[86]

VS

S[8

7]V

SS

[88]

VS

S[8

9]V

SS

[90]

VS

S[9

1]V

SS

[92]

VS

S[9

3]V

SS

[94]

VS

S[9

5]V

SS

[96]

VS

S[9

7]

VS

S[9

8]V

SS

[99]

VS

S[1

00]

VS

S[1

01]

VS

S[1

02]

VS

S[1

03]

VS

S[1

04]

VS

S[1

05]

VS

S[1

06]

VS

S[1

07]

VS

S[1

08]

VS

S[1

09]

VS

S[1

10]

VS

S[1

11]

VS

S[1

12]

VS

S[1

13]

VS

S[1

14]

VS

S[1

15]

VS

S[1

16]

VS

S[1

17]

VS

S[1

18]

VS

S[1

19]

VS

S[1

20]

VS

S[1

21]

VS

S[1

22]

VS

S[1

23]

VS

S[1

24]

VS

S[1

25]

VS

S[1

26]

VS

S[1

27]

VS

S[1

28]

VS

S[1

29]

VS

S[1

30]

VS

S[1

31]

VS

S[1

32]

VS

S[1

33]

VS

S[1

34]

VS

S[1

35]

VS

S[1

36]

VS

S[1

37]

VS

S[1

38]

VS

S[1

39]

VS

S[1

40]

VS

S[1

41]

VS

S[1

42]

VS

S[1

43]

VS

S[1

44]

VS

S[1

45]

VS

S[1

46]

VS

S[1

47]

VS

S[1

48]

VS

S[1

49]

VS

S[1

50]

VS

S[1

51]

VS

S[1

52]

VS

S[1

53]

VS

S[1

54]

VS

S[1

55]

VS

S[1

56]

VS

S[1

57]

VS

S[1

58]

VS

S[1

59]

VS

S[1

60]

VS

S[1

61]

VS

S[1

62]

VS

S[1

63]

VS

S[1

64]

VS

S[1

65]

VS

S[1

66]

VS

S[1

67]

VS

S[1

68]

VS

S[1

69]

VS

S[1

70]

VS

S[1

71]

VS

S[1

72]

VS

S[1

73]

VS

S[1

74]

VS

S[1

75]

VS

S[1

76]

VS

S[1

77]

VS

S[1

78]

VS

S[1

79]

VS

S[1

80]

VS

S[1

81]

VS

S[1

82]

VS

S[1

83]

VS

S[1

84]

VS

S[1

85]

VS

S[1

86]

VS

S[1

87]

VS

S[1

88]

VS

S[1

89]

VS

S[1

90]

VS

S[1

91]

VS

S[1

92]

VS

S[1

93]

VS

S[1

94]

CR8U1BAT54

1

3

C7U60.1uF

10V10%

SMC0402

L6H1 1uH1 2

CR7F1BAT54

1

3

C7V120.1uF

10V10%

SMC0402

C7U40.1uF

10V10%

SMC0402

C7V160.1uF

10V10%

SMC0402

C7V50.1uF

10V10%

SMC0402

C6H10.01UF 10% 50VSMC0603

C7V90.1uF

10V10%

SMC0402

C7V20.1uF

10V10%

SMC0402

C7V110.1uF

10V10%

SMC0402

C6V4270uF

20%

C7V30.1uF

10V10%

SMC0402

C8G20.1uF

10V10%

SMC0402

C7V60.1uF

10V10%

SMC0402C6F40.1uF

10V10%

SMC0402

R6H3 1

C6G80.1uF

10V10%

SMC0402

C7V70.1uF

10V10%

SMC0402

C6U10.1uF

10V10%

SMC0402

R7F6100

C7U20.1uF

10V10%

SMC0402

R8U610

C7U50.1uF

10V10%

SMC0402


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Buffers providevoltage translationfrom 2.5 to 3.3V

Note:For video bandwidths > 200MHz:C3B1, C3A4, C2B1, C2A5, C2B2, C2B3 = 3.3pFC3A1, C2A4, C2A6 = No_StuffFB3A1, FB2A5, FB2B2 = Short

D15378 1.501

CRT

A


Title


Date: Sheet of


CRT_Q_HSYNC

CRT_Q_BLUE

CRT_L2_RED

CRT_Q_BLUE

CRT_R_VSYNC

CRT_Q_RED

CRT_Q_GREEN

TP_DOCK_Q_HSYNCCRT_Q_HSYNC

TP_DOCK_Q_VSYNC

DDC_SRC

DDC_GATE

CRT_BLUECRT_GREENCRT_RED

CRT_Q_VSYNC

CRT_DDC_DATA_ISO

CRT_DDC_CLK_ISO

CRT_L_BLUE

CRT_Q_RED CRT_L_RED

CRT_Q_GREEN CRT_L_GREEN CRT_L2_GREEN

CRT_L2_BLUE

CRT_R_HSYNC

CRT_EN#

+V5S

_L_D

AC

TP_DOCK_VGA_RED

TP_DOCK_VGA_GRN

TP_DOCK_VGA_BLUE

DOCK_VGA_EN#

CRT_Q_VSYNC

CRT_Q_VSYNCCRT_Q_HSYNC

CRT_DDC_DATA7

CRT_DDC_CLK7

CRT_VSYNC7

CRT_HSYNC7

CRT_RED7

CRT_GREEN7

CRT_BLUE7

TV_DACC_OUT7,20

TV_DACA_OUT7,20TV_DACB_OUT7,20

+V2.5S10,20,49,56,58

+V2.5S10,20,49,56,58

+V2.5S10,20,49,56,58

+V3.3S 5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S_F_DAC+VBATS13,19,27,55,56

+V5S5,10,17,19,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+V2.5S10,20,49,56,58

+V3.3S 5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

R8E12.2K

C2A522pF

5%

C7R9

0.1uF

U7E1

SN74LVC2G125

1234 5

678OE1#

1A2YGND 2A

1YOE2#VCC

C2B210pF

CR7D1 ESD DIODE ARRAY

124

865

73

I/O1I/O2I/O3

I/O6I/O5I/O4

Vp

Vn

FB2B347ohm@100MHz

FB2A547ohm@100MHz

U7D8

74CB3Q330

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

R2B12.2k

C3B110pF

U7D7INVERTER

2 4

5

3

R2M8100K

U7D11

SN74LVC2G125

1234 5

678OE1#

1A2YGND 2A

1YOE2#VCC

FB3A147ohm@100MHz

U7D9

74CB3Q330

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

C7D133pF

NO_STUFF5%

C6D150.1uF

FB2B247ohm@100MHz

Q8E3

BSS138

3

1

2

C3A422pF

5%

Q8E1

BSS138

3

1

2

CR7T1 ESD DIODE ARRAY

124

865

73

I/O1I/O2I/O3

I/O6I/O5I/O4

Vp

Vn

Q2B1

BSS138

3

1

2R7R1310K

NO_STUFF5%

R8E22.2K

C7E133pF

NO_STUFF5%

GND1REDGND2GRNGND3BLUVCCNC1GND4GND5 CLK

VSYNC

HSYNC

DATA

NC2

J2A2B

2IN1

19141813171216111510 20

21

22

23

24

R2B2150

1%

+F2A1

1.1A

C7T2

0.1uF

C7R11

0.1uFU7D6

74CB3Q330

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

C7R7

0.1uF

C2A410pF

C7R12

0.1uF

R2A52.2k

C2B110pF

C7T10.1uF

R3B2150

1%

FB3B247ohm@100MHz

C2A610pF

C2B322pF

5%

R7R1210K

5%

C6D120.1uF

R7E1 39

R7E2 39

R2M71K

C3A110pF

FB2A350OHM

FB3B147ohm@100MHz

R3B1150

1%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LVDS Panel BacklightBIOS Note: Disable bothBKLTSEL lines beforeenabling one.

Option

5-6

Description

J5F1 Pin-16 gets +VBATS

1-2J6E1

LPP Jumper J6E1 Key

J6E1

Jumper

4-5

Default

J5F1 Pin-16 gets +V3.3S

2-3 J5F1 Pin-17 gets +V3.3SJ5F1 Pin-17 gets +VBATS

GM_CLK_D Support

GM_Data_D Support

GMCH_PWM Support

D15378 1.501

LVDS

A


Title


Date: Sheet of


L_BRIGHTNESS

L_VDD_VDL2L_VDD_VDL1

L_VDDEN_LPP_D#

L_VBATS_LPP

L_V

DD

EN

_LP

P#

L_VDD_VDL2

L_VDD_VDL1L_VDD_VDL

L_V

DD

EN

#

L_VDDEN_D#

L_VDDEN

L_VBATS_LPP

DBL_CLK

L_VDDEN

EMA_ALS_DATA32,36EMA_ALS_CLK32,36

LA_CLKP7

LB_DATAN17

LA_CLKN7

L_BKLTSEL0#35,42

LA_DATAP07LA_DATAN07

LB_DATAP07

L_BKLTCTL7

L_BKLTEN7

LB_DATAP27LB_DATAN27

L_BKLTSEL1# 35,42

LA_DATAP27

LB_CLKN7

LB_DATAP17

LA_DATAN17LA_DATAP17

LA_DATAN27

LB_DATAN07

LB_CLKP7

L_VDDEN7

L_DDC_CLK7L_DDC_DATA7

L_CLKCTLB 7,37 L_BKLTSEL1#35,42

L_CLKCTLA7,37

KBC_PROG_TX#32,45

+V3.3S5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S5,10,17,18,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+V5S 5,10,17,18,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+VBATS13,18,27,55,56

+V3.3S5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S 5,10,17,18,20,25,26,39,41,43,44,45,47,51,52,54,55,56

+V3.3S5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+VBAT 52,54,55,56

+VBAT 52,54,55,56

Q5G2

SI4425DY

4

123 8

765

C7E5

0.1uF

C7E6

0.1uF

J5F1

LVDS,CONN44

123456789

1011121314151617181920212223242526272829303132333435363738394041424344

VDD_BLIVSS_BLIVSS_DBCVDD_DBCDBL_CLKDBL_DATAENA_BLNCVDD_ALSVSS_ALSALS_CLKALS_DATAALS_INTRVDD_LPPVSS_VDLVDD_VDL1VDD_VDL2VDD_VCLRSVDVCL_CLKVCL_DATAA0MA0PVSS_SHIELD1A1MA1PVSS_SHIELD2A2MA2PVSS_SHIELD3VDL_CLKAMVDL_CLKAPVSSB0MB0PVSS_SHIELD4B1MB1PVSS_SHIELD5B2MB2PVSS_SHIELD6VDL_CLKBMVDL_CLKBP

R5V121M

C6F2

0.1uF

R6F210K

Q6E2BSS138

3

1

2

C7T11

0.1uF

R6V10

100K

U6F1

74CBTLV1G125

1

2

3 4

5OE#

A

GND Y

VCC

C6G40.1uF10%

Q6G1BSS138

3

1

2

R5V11 100K

J6E1

6Pin_HDR

123456

C6E14

22uF

C6F30.1uF10%

R7T1010K

C5G222UF

R6E21M

SI2

307D

S

Q6E1

1

32

R6E3 100K

C6E91000pF

C5V51000pF

U7E5

74CBT3306

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

C6G2

0.1uF

R6V3 100K

R6V210K

R6V1

10K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout Note:Place 150 Ohm terminationresistors, ferrite beads andcapicators close toconnector

Note:Pins 12 & 14 are shortedinside D-Connector plug.

Note:ESD Diode Array for the TVDAC A, DAC B, DAC C signalslocated on CRT page.

0V

0V0 0 1b

5V

1125p (1080)

0V

Format

1 0 1b

0 0 Xb

525i (480)

525p (480)

0V

0 1 0b 5V525i (480)

5V1 0 0b

525p (480)

5V

5V

4:35V

5V

Aspect Ratio

4:3

525i (480)

X 1 0b

0V

2.2V

0V

4:3

5V

16:9

16:9

2.2V750p (720)

0 0 0b

2.2V

Port Value

525p (480)

4:3

5V

1125i (1080)

Line3

0V

0V

Letterbox

5V

1125i (1080)

5V

0V

4:3

0V

1 1 1b

16:9

2.2V

5V

4:35V

Letterbox

16:9

4:3

0V

0V

0V

5V

Line1

X 1 1b

0V

0V

0V

5V

Line2

5V1125p (1080)

Voltage

0 1 1b

1 1 0b

750p (720) 16:9

0 1 Xb

IO2 IO1 IO0

D15378 1.501

TV

A


Title


Date: Sheet of


DACB_L

DACC DACC_L

DACA_L

DOCK_TV_EN#

DACA

TV_EN#

DACB

TP_DOCK_TV_DACA_OUT

TP_DOCK_TV_DACB_OUT

TP_DOCK_TV_DACC_OUT

I2C

_RS

T#

DLINE1_IO

DLINE3_IODLINE2_IO

DLINE3DLINE2DLINE1

TV_DACC_OUT7,18

TV_DACA_OUT7,18

+V3.3S5,7,10,12,13,14,15,16,17,18,19,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V2.5S10,18,49,56,58

+V2.5S10,18,49,56,58

+V2.5S10,18,49,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

TV_DACB_OUT7,18


+V5S5,10,17,18,19,25,26,39,41,43,44,45,47,51,52,54,55,56

+V5S5,10,17,18,19,25,26,39,41,43,44,45,47,51,52,54,55,56

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

J2A1

CON14_DCONN-CP4120

1234567

891011121314

FB2A1150ohm@100MHz

U2A2

I2C - PCA9537

123456

789

10 IO_0IO_1IO_2IO_3VSSRESET#

INT#SCLSDAVDD R2A17 10K

R2A122.2K

R2A194.7K

C6M11

0.1uF

C2A7

1.0uF

R2A204.7K

R2M61501%

R2A14

5.90K1%

U6A4INVERTER

2 4

5

3

FB2A2150ohm@100MHz

C1A35.6pF

4.5%

C1A15.6pF

4.5%

U6A2

74CB3Q330

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

R2A16 10K

R6M1210K

NO_STUFF5%

C1A45.6pF

4.5%

R1M21501%

R1M11501%

U6B1

74CB3Q330

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

C1A25.6pF

4.5%

R2A112.2K

C2A25.6pF

4.5%

R2A1310K

C6N1

0.1uF

R6M1010K

5%

C6M90.1uF

C6M7

0.1uF

U6A5

74CB3Q330

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

FB1A1150ohm@100MHz

R2A15

5.90K1%

C2A35.6pF

4.5%

R2A18 10K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout Note: Place these Caps near So-Dimm0.


D15378 1.501

DDR SODIMM 0

A


Title


Date: Sheet of


SA0_DIM0

M_A_DQS5

M_A_DQS2

M_A_DQS#1

M_A_DM5

M_A_A3

M_A_A10

M_A_DQS#0

M_A_A1

M_A_A9

M_A_DM1

M_A_DQS7

M_A_A12

M_A_DQS#3

M_A_DM3

M_A_A6

M_A_DM4

M_A_A0

M_A_A7

M_A_DQS0

M_A_A8

M_A_DM2

M_A_DQS6

M_A_DQS3

M_A_DQS#6

M_A_DM0

M_A_DQS#7

M_A_A4

M_A_DQS#5

M_A_DQS1

M_A_A5

M_A_DM6

M_A_A2

M_A_DQS#2

M_A_DM7

M_A_A13

M_A_DQS#4

M_A_A11

M_A_DQS4

SA1_DIM0

M_A_DQ18

M_A_DQ26

M_A_DQ57

M_A_DQ30

M_A_DQ37

M_A_DQ48

M_A_DQ16M_A_DQ15

M_A_DQ56

M_A_DQ0M_A_DQ1

M_A_DQ32

M_A_DQ3

M_A_DQ31

M_A_DQ55

M_A_DQ39

M_A_DQ2

M_A_DQ43

M_A_DQ5

M_A_DQ7

M_A_DQ29

M_A_DQ35

M_A_DQ12

M_A_DQ54

M_A_DQ60

M_A_DQ27

M_A_DQ14

M_A_DQ53

M_A_DQ59

M_A_DQ19

M_A_DQ9

M_A_DQ20

M_A_DQ47

M_A_DQ44

M_A_DQ62

M_A_DQ36

M_A_DQ63

M_A_DQ34

M_A_DQ25

M_A_DQ33

M_A_DQ6

M_A_DQ40

M_A_DQ10

M_A_DQ4

M_A_DQ8

M_A_DQ22

M_A_DQ13

M_A_DQ51

M_A_DQ49

M_A_DQ21

M_A_DQ58

M_A_DQ23

M_A_DQ52

M_A_DQ45

M_A_DQ38

M_A_DQ17

M_A_DQ50

M_A_DQ61

M_A_DQ28

M_A_DQ24

M_A_DQ46

M_A_DQ11

M_A_DQ41M_A_DQ42

M_A_A[13:0]8,23M_A_DQ[63:0] 8

M_CLK_DDR17

M_A_CAS#8,23

M_A_DQS[7:0]8

M_CLK_DDR07

M_A_BS18,23

M_A_DM[7:0]8M_ODT17,23M_ODT07,23

M_A_DQS#[7:0]8

SMB_CLK_S214,22,23

M_A_WE#8,23

M_A_BS08,23

M_CKE17,23

M_CLK_DDR#07

M_CLK_DDR#17

SMB_DATA_S214,22,23

M_CS#17,23M_CS#07,23

M_A_BS28,23

M_A_RAS#8,23

M_CKE07,23

M_VREF_DIMM047,58

PM_EXTTS#07,23

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.87,9,22,34,46,47,56,58

+V1.87,9,22,34,46,47,56,58

+V1.87,9,22,34,46,47,56,58

C6P12.2uF

R4C17

10K

C5R1

0.1uF

C5C122.2uF

C5C102.2uF

R4C25

10K

C4C102.2uF

C5C42.2uF

C4C11

0.1uF

J5P1A CON200_DDR2-SODIMM-STAN10210110099989794929391

1059089

116868485

107106110115

114119

3032

1641667980

113108109198200197195

10265267

130147170185

13315170

13114816918811294968

129146167186

571719461416232535372022363843455557444656586163737562647476123125135137124126134136141143151153140142152154157159173175158160174176179181189191180182192194

A0A1A2A3A4A5A6A7A8A9A10/APA11A12A13A14A15A16_BA2

BA0BA1S0#S1#

ODT0ODT1

CK0CK0#CK1CK1#CKE0CKE1CAS#RAS#WE#SA0SA1SCLSDA

DM0DM1DM2DM3DM4DM5DM6DM7

DQS0DQS1DQS2DQS3DQS4DQS5DQS6DQS7DQS#0DQS#1DQS#2DQS#3DQS#4DQS#5DQS#6DQS#7

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14DQ15DQ16DQ17DQ18DQ19DQ20DQ21DQ22DQ23DQ24DQ25DQ26DQ27DQ28DQ29DQ30DQ31DQ32DQ33DQ34DQ35DQ36DQ37DQ38DQ39DQ40DQ41DQ42DQ43DQ44DQ45DQ46DQ47DQ48DQ49DQ50DQ51DQ52DQ53DQ54DQ55DQ56DQ57DQ58DQ59DQ60DQ61DQ62DQ63

C6P2

0.1uF

C4C12

0.1uF

C5C9

0.1uF

C4C152.2uF

C5C52.2uF

J5P1B CON200_DDR2-SODIMM-STAN

1179695

118818287

10388

104

199

831205069

163

1

47133183771248

184787172

121122196193

8

182441534254596560661271391281451651711721771871781909213315534132144156168231527391491612840138150162

112111

202201

VDD3VDD4VDD5VDD6VDD7VDD8VDD9VDD10VDD11VDD12

VDDSPD

NC1NC2NC3NC4NCTEST

VREF

VSS1VSS2VSS3VSS4VSS5VSS6VSS7VSS8VSS9VSS10VSS11VSS12VSS13VSS14VSS15

VSS16VSS17VSS18VSS19VSS20VSS21VSS22VSS23VSS24VSS25VSS26VSS27VSS28VSS29VSS30VSS31VSS32VSS33VSS34VSS35VSS36VSS37VSS38VSS39VSS40VSS41VSS42VSS43VSS44VSS45VSS46VSS47VSS48VSS49VSS50VSS51VSS52VSS53VSS54VSS55VSS56VSS57

VDD1VDD2

GND1GND0

C5B17

0.1uF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SO-DIMM 1 is placed farther fromthe GMCH than SO-DIMM 0



D15378 1.501

DDR2 SODIMM 1

A


Title


Date: Sheet of


M_B_DQS4M_B_DQS5

M_B_A11

M_B_DM2

M_B_A12

M_B_DQS0

M_B_A9

M_B_DQS#5

SA0_DIM1

M_B_DQS2

M_B_A4

M_B_DQS#6

M_B_DM5

M_B_DQS1

M_B_A7

M_B_DQS7

M_B_A10

M_B_A5M_B_A6

M_B_DQS6

M_B_DQS#2

M_B_DQS#0

M_B_DQS#3

M_B_A2

M_B_DM4

M_B_A13

M_B_DM1

M_B_A3

SA1_DIM1

M_B_A0

M_B_DQS#4

M_B_DM0

M_B_DM6

M_B_DQS3

M_B_A8

M_B_A1

M_B_DQS#7

M_B_DQS#1

M_B_DM7

M_B_DM3

M_B_DQ21

M_B_DQ49

M_B_DQ2

M_B_DQ44

M_B_DQ5

M_B_DQ42

M_B_DQ53

M_B_DQ10

M_B_DQ36

M_B_DQ24

M_B_DQ38

M_B_DQ20

M_B_DQ1

M_B_DQ34

M_B_DQ18

M_B_DQ50

M_B_DQ19

M_B_DQ25

M_B_DQ45

M_B_DQ3

M_B_DQ40

M_B_DQ7

M_B_DQ37

M_B_DQ39

M_B_DQ16

M_B_DQ0

M_B_DQ26

M_B_DQ59

M_B_DQ8

M_B_DQ56

M_B_DQ52

M_B_DQ14

M_B_DQ51

M_B_DQ47

M_B_DQ35

M_B_DQ27

M_B_DQ13

M_B_DQ54M_B_DQ55

M_B_DQ17

M_B_DQ6

M_B_DQ12

M_B_DQ61

M_B_DQ43

M_B_DQ15

M_B_DQ11

M_B_DQ33

M_B_DQ23

M_B_DQ28

M_B_DQ31

M_B_DQ48

M_B_DQ30

M_B_DQ62

M_B_DQ9

M_B_DQ4

M_B_DQ29

M_B_DQ22

M_B_DQ57

M_B_DQ60

M_B_DQ58

M_B_DQ32

M_B_DQ46

M_B_DQ63

M_B_DQ41

M_B_A[13:0]8,23M_B_DQ[63:0] 8

M_B_WE#8,23

M_B_BS18,23

SMB_CLK_S214,21,23

M_CS#27,23

SMB_DATA_S214,21,23

M_B_DQS[7:0]8

M_B_BS28,23

M_ODT27,23

M_CLK_DDR#27

M_B_CAS#8,23

M_CKE27,23

M_B_RAS#8,23

M_CLK_DDR37

M_ODT37,23M_B_DM[7:0]8

M_CLK_DDR#37

M_B_BS08,23

M_B_DQS#[7:0]8

M_CS#37,23

M_CKE37,23

M_CLK_DDR27

M_VREF_DIMM147,58PM_EXTTS#17,23

+V1.87,9,21,34,46,47,56,58

+V1.87,9,21,34,46,47,56,58

+V3.3S

5,7,

10,1

2,13

,14,

15,1

6,17

,18,

19,2

0,21

,23,

24,2

5,26

,27,

28,2

9,30

,31,

32,3

3,35

,37,

39,4

2,43

,44,

45,4

7,48

,49,

51,5

4,55

,56,

57,5

8

+V1.87,9,21,34,46,47,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

R4B1910K

J5N1ACON200_DDR2-SODIMM-REV

10210110099989794929391

1059089

116868485

107106110115

114119

3032

1641667980

113108109198200197195

10265267

130147170185

13315170

13114816918811294968

129146167186

571719461416232535372022363843455557444656586163737562647476123125135137124126134136141143151153140142152154157159173175158160174176179181189191180182192194

A0A1A2A3A4A5A6A7A8A9A10/APA11A12A13A14A15A16_BA2

BA0BA1S0#S1#

ODT0ODT1

CK0CK0#CK1CK1#CKE0CKE1CAS#RAS#WE#SA0SA1SCLSDA

DM0DM1DM2DM3DM4DM5DM6DM7

DQS0DQS1DQS2DQS3DQS4DQS5DQS6DQS7DQS#0DQS#1DQS#2DQS#3DQS#4DQS#5DQS#6DQS#7

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

DQ10DQ11DQ12DQ13DQ14DQ15DQ16DQ17DQ18DQ19DQ20DQ21DQ22DQ23DQ24DQ25DQ26DQ27DQ28DQ29DQ30DQ31DQ32DQ33DQ34DQ35DQ36DQ37DQ38DQ39DQ40DQ41DQ42DQ43DQ44DQ45DQ46DQ47DQ48DQ49DQ50DQ51DQ52DQ53DQ54DQ55DQ56DQ57DQ58DQ59DQ60DQ61DQ62DQ63

C4C132.2uF

C5C11

0.1uF

C4B132.2uF

C4R1

0.1uFR4B20

10K

C4B122.2uF

C6B10

0.1uF

C5B142.2uF

C4B11

0.1uF

C4R2

0.1uF

C5B15

0.1uF

C4C142.2uF

C6B92.2uF

C4B152.2uF

J5N1B CON200_DDR2-SODIMM-REV

1179695

118818287

10388

104

199

831205069

163

1

47133183771248

184787172

121122196193

8

182441534254596560661271391281451651711721771871781909213315534132144156168231527391491612840138150162

112111

202201

VDD3VDD4VDD5VDD6VDD7VDD8VDD9VDD10VDD11VDD12

VDDSPD

NC1NC2NC3NC4NCTEST

VREF

VSS1VSS2VSS3VSS4VSS5VSS6VSS7VSS8VSS9VSS10VSS11VSS12VSS13VSS14VSS15

VSS16VSS17VSS18VSS19VSS20VSS21VSS22VSS23VSS24VSS25VSS26VSS27VSS28VSS29VSS30VSS31VSS32VSS33VSS34VSS35VSS36VSS37VSS38VSS39VSS40VSS41VSS42VSS43VSS44VSS45VSS46VSS47VSS48VSS49VSS50VSS51VSS52VSS53VSS54VSS55VSS56VSS57

VDD1VDD2

GND1GND0


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout note: Place one cap close to every 2 pullup resistors terminated to +V0.9

DDR2 Thermal Sensor So-Dimm 0 & 1

Layout Note:Place Q5N2under DIMM0

Layout Note:Place U5P1under DIMM1

D15378 1.501

DDR2 TERMINATION AND THERMAL SENSOR

A


Title


Date: Sheet of


M_B_A13

M_A_A11

M_B_A6

M_A_A13

M_B_A2

M_A_A3

M_A_A6

M_B_A11

M_A_A9

M_B_A1

M_A_A12

M_A_A2

M_B_A3

M_A_A1

M_A_A5

M_B_A4

M_B_A9

M_A_A4

M_A_A10

M_A_A0

M_B_A7

M_A_A7

M_B_A8

M_B_A10

M_B_A0

M_A_A8

M_B_A5

M_B_A12

PM_EXTTS#0_D

DDR_THERM2

PM_EXTTS#1_D

DDR_THERM1

M_A_CAS# 8,21

M_A_BS2 8,21

M_A_BS0 8,21

M_ODT2 7,22

M_B_BS2 8,22

M_CKE1 7,21

M_CKE3 7,22

M_CS#1 7,21

M_B_A[13:0] 8,22

M_ODT3 7,22

M_B_CAS# 8,22

M_A_BS1 8,21

M_B_BS1 8,22

M_B_WE# 8,22

M_CS#2 7,22

M_B_RAS# 8,22

M_B_BS0 8,22

M_CS#3 7,22

M_A_RAS# 8,21

M_CS#0 7,21

M_A_WE# 8,21

M_CKE2 7,22

M_ODT0 7,21

M_CKE0 7,21

M_A_A[13:0] 8,21

M_ODT1 7,21

SMB_CLK_S2 14,21,22

SMB_DATA_S2 14,21,22

PM_EXTTS#0 7,21

PM_EXTTS#17,22

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V0.9 46,56,58

+V0.9 46,56,58

R5C10 56

C4B70.1uF

R4B14 56

R4C13 56

C4B80.1uF

C4C60.1uF

R5C15 56

R5B10 56

R5C4 56

C4C30.1uF

R5C2 56

R4C20 56

R4B9 56

C5B90.1uF

R5C9 56

R5B12 56

R4C8 56

C5B100.1uF

R4B11 56

R5C3 56R5B14 56

C4C90.1uF

R4C18 56

R4C23 56

R5P4 0

C4B90.1uF

C5C60.1uF

C5C140.1uF

R4C4 56

R4C10 56

C4C10.1uF

R4C7 56

R4C5 56C4C40.1uF

R4C21 56

C4C80.1uF

C5C70.1uF

R5C12 56

R4B17 56

C4C170.1uF

R5B13 56

Q5N2

2N39041

3

2

R4C9 56

R5P1 0

R4B16 56

C5C20.1uF

C5B80.1uF

R4B15 56

C4C70.1uF

R4C14 56

C5B120.1uF

R5C11 56

R4C11 56

R5B11 56

R4B10 56

R5C7 56

U5P1

ADM1032AR

1

3

4 5

8

7

6

2

Vdd

D-

THERM# GND

SCLK

SDATA

ALERT#

D+

R4C22 56

C4C180.1uF

R4C6 56

R4B12 56

R4B13 56

R5C5 56

C4B60.1uF

R4C12 56

R5C8 56

R4C16 56

C4C160.1uF

R5C6 56

R4C19 56

R5C14 56

R4C15 56

C4C20.1uF

R4C3 56

C5C130.1uF

C5C10.1uF

R4C24 56

R5C13 56

R4C1 56

R5C1 56

C5C80.1uF

R4C2 56


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FWH sits in theFWH_TSOP_Socket,Not on the board

8-bit I/O Port Expander

FAB REVISION

fixed

0 0 1 1 A2 A1 A0 R/W

PCA9557 Addressprogrammable

slave address

BOARD REVISION

1

0

14

0

1

1

0

00

0

15

0

0

1

2

1

1

0

0

0

1

0

1

13

1

0

1

1

1

0

1

0

0

0

0

1

0

0

1

1

0

1

0

0

1

FAB_REV

Capell Valley

0

0

1

FAB ID Strapping Table

0 4

1

1

0

1

3

0

0

BOARD ID

0

1

BOARD REVISION Strapping Table

0

0 0

1

0

0

5

1

6

0

1

0

1

1

0

11

1

0

1

1

1

BOARD FAB

1

3

0

0

0 0

0

0

0

1

1

7

2

1

1

1

3

BOARD REVISION

1

0

1

8

0

1

1

1

1

0

0

12

1

1

1

1

1

1

0

10

0

1

1

1

1

1

0

11

1

1

0

0

0

1

0

1

1

9

0

TBD

1

00

1

0

0

0

0

1

16

2

1

0

1

0

TBD

TBDTBDTBD

TBDTBDTBDTBD

TBD

TBDTBD

TBD

ReservedReserved

D15378 1.501

FWH and I/O Port Expander

A


Title


Date: Sheet of


TP_FWH_NC1

PLT_RST#_D

TP_FWH_NC4TP_FWH_RSVD3

TP_FWH_NC6

TP_FWH_ID0

TP_FWH_NC3

WP#TBL#

TP_FWH_NC5

TP_FWH_NC7

TP_FWH_NC2TP_FWH_RSVD4

TP_FWH_ID3

TP_FWH_RSVD2

TP_FWH_ID2

IC_R

TP_FWH_RSVD1

TP_FWH_NC8

TP_FWH_ID1

TP_FWH_RSVD5

FGPI4FGPI3FGPI2FGPI1FGPI0

PCA9557_RST#

REV_FAB_ID0REV_FAB_ID1

REV_FAB_ID3

BOARD_ID0

BOARD_ID2BOARD_ID1

BOARD_ID3

BOARD_ID0BOARD_ID1

BOARD_ID3BOARD_ID2



A0_RA1_RA2_R

REV_FAB_ID2

LPC_AD3 14,32,35,41,42

LPC_AD1 14,32,35,41,42LPC_AD0 14,32,35,41,42

LPC_AD2 14,32,35,41,42

SMB_BS_DATA32,35,50SMB_BS_CLK32,35,50

LPC_FRAME# 14,32,35,41,42

FWH_TBL# 15,35FWH_WP# 15,35

PLT_RST#7,13,15,28,32,41,42,57

CLK_PCIF_FWH31

FWH_INIT#14

+V3.3A13,14,16,17,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

R9V9 0

R9G1110KNO_STUFF

R9G1610K

R8W6 100

R8V11

10K

R8W2

10K

R8W9

10K

R9V310K

NO_STUFF

R9H510K

NO_STUFF

C8W210UF

R9H210K

R9V410KNO_STUFF

R9V510K

R8W7 100

R9V610K

R9G1010KNO_STUFF

R8W310K

R9H610K

NO_STUFF

R9H410K NO_STUFF

U9G2

PCA9557PW

168

12

6

3

54

791011121314

15VDDVSS

SCLKSDATA

I/O0

A0

A2A1

I/O1I/O2I/O3I/O4I/O5I/O6I/O7

RESET#

R9G1510K

R9H310K

C8W10.1uF

R8V10

10K

C9G20.1uF

R9G1410K

R9G1310K

R8W1

10K

C8W30.1uF

R9G61.40K

1%

R9V8 0

R9G910KNO_STUFF

R9V7 0

U8G1

FWH

15

33

16

32

7

173818

37

31

30

39

40

2

26

11

27

12

29

28

363534

1920

21222324

25

9

10

1345681314

FGPI3

RSVD1

FGPI2

RSVD2

FGPI4

FGPI1FWH4FGPI0

INIT#

VCC1

GND1

VCCA

GNDA

IC

FWH1

VPP

FWH2

RST#

GND2

FWH3

RSVD3RSVD4RSVD5

WP#TBL#

ID3ID2ID1ID0

FWH0

CLK

VCC2

NC1NC2NC3NC4NC5NC6NC7NC8

R8F4 100


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place close to PCI Slot 3

Slots 1&2&6 are on theExtension Board toOptimize routing

Place close to PCI Slot 3Place close to PCI Slot 4

Place close to PCI Slot 4

SLOT4

PCI Slot 4 is farthest from processor

SLOT3

Note: To Power PCI Slot 3 in suspend,Stuff R8A4, R8B2, R8B10and Unstuff R9B3, R8B5, R8C1

Note: Place one 0.1uF capnext to each PCI Slotand the Goldfinger

D15378 1.501

PCI Slot 3 & 4


Title


Date: Sheet of


SLT4_PRSNT1#

SLT4_PRSNT2#

SLT4_IDSEL

SLT3_PRSNT1#

SLT3_PRSNT2#

PCIRST#

SLT3_IDSEL

S3_PCI_GNT#2

V3.3S

_PC

I_D

PCI_STOP# 15,16,26

SMB_CLK_A1 14,26,28

PCI_PAR 15,26

PCI_AD4 15,26

SMB_DATA_A1 14,26,28

PCI_AD11 15,26

PCI_AD6 15,26

PCI_FRAME# 15,16,26

PCI_TRDY# 15,16,26

PCI_C/BE#0 15,26

PCI_AD9 15,26

PCI_AD16 15,26

PCI_AD13 15,26

PCI_AD15 15,26

PCI_AD22 15,26PCI_AD20 15,26

PCI_AD2 15,26PCI_AD0 15,26

PCI_AD18 15,26

PCI_STOP# 15,16,26

SMB_CLK_A1 14,26,28

PCI_PAR 15,26

PCI_AD4 15,26


PCI_AD11 15,26

PCI_AD6 15,26

PCI_FRAME# 15,16,26

PCI_TRDY# 15,16,26

PCI_C/BE#0 15,26

PCI_AD9 15,26

PCI_AD16 15,26

PCI_AD13 15,26

PCI_AD15 15,26

PCI_AD22 15,26PCI_AD20 15,26

PCI_AD2 15,26PCI_AD0 15,26

PCI_AD18 15,26PCI_AD18 15,26

PCI_AD19 15,26

INT_PIRQC# 15,16INT_PIRQB# 15,16,26

PM_CLKRUN# 16,26,32,35,42

PCI_AD30 15,26

PCI_AD28 15,26PCI_AD26 15,26

PCI_AD24 15,26

INT_PIRQD# 15,16INT_PIRQF# 15,16,26

PM_CLKRUN# 16,26,32,35,42

PCI_AD24 15,26

PCI_AD28 15,26PCI_AD26 15,26

PCI_AD30 15,26

PCI_C/BE#115,26

PCI_AD515,26PCI_AD315,26

PCI_AD2115,26PCI_AD1915,26

PCI_LOCK#15,16,26

PCI_AD1415,26

PCI_AD2915,26

PCI_C/BE#215,26

PCI_AD715,26

PCI_AD1715,26

PCI_SERR#15,16,26

PCI_PERR#15,16,26

PCI_C/BE#315,26

PCI_AD2515,26

PCI_AD3115,26

PCI_AD1215,26

PCI_DEVSEL#15,16,26

PCI_AD2315,26

PCI_AD115,26

PCI_AD1015,26

PCI_IRDY#15,16,26

PCI_AD2715,26

PCI_AD815,26

PCI_C/BE#115,26

PCI_AD515,26PCI_AD315,26

PCI_AD2115,26PCI_AD1915,26

PCI_LOCK#15,16,26

PCI_AD1415,26

PCI_AD2915,26

PCI_C/BE#215,26

PCI_AD715,26

PCI_AD1715,26

PCI_SERR#15,16,26

PCI_PERR#15,16,26

PCI_C/BE#315,26

PCI_AD2515,26

PCI_AD3115,26

PCI_AD1215,26

PCI_DEVSEL#15,16,26

PCI_AD2315,26

PCI_AD115,26

PCI_AD1015,26

PCI_IRDY#15,16,26

PCI_AD2715,26

PCI_AD815,26



INT_PIRQD#15,16INT_PIRQA#15,16

INT_PIRQG#15,16,26INT_PIRQC#15,16

PCI_REQ64# 16

PCI_REQ64# 16

PCI_GATED_RST# 32

PCI_RST# 15,26,32

PCI_GNT#2 15

PCI_GATED_RST# 32

PCI_RST# 15,26,32

PCI_GNT#3 15

PCI_ACK64#16

PCI_ACK64#16

CLK_PCI_PCISLOT331

CLK_PCI_PCISLOT431

PCI_PME# 15,26,35

PCI_PME# 15,26,35

PCI_REQ#215,16

PCI_REQ#315,16

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5_PCISLT3

-V12S26,55

+V3.3 13,14,15,17,27,32,33,34,35,36,38,45,46,55,56

+V5S39,41,43,44,45,47,51,52,54,55,56

+V526,27,35,38,47,54,55,56,58

+V3.3A 13,14,16,17,24,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V5_PCISLT3+V3.3_PCISLT3

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S5,10,17,18,19,20,26,39,41,43,44,45,47,51,52,54,55,56

-V12S26,55

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3_PCISLT3

+V5_PCISLT3

+V3.3_PCISLT3

-V12S26,55

+V5S 5,10,17,18,19,20,26,39,41,43,44,45,47,51,52,54,55,56

+V3.3A 13,14,16,17,24,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V5S 5,10,17,18,19,20,26,39,41,43,44,45,47,51,52,54,55,56+V5 26,27,35,38,47,54,55,56,58

+V526,27,35,38,47,54,55,56,58

+V3.3_PCISLT3

+V12S26,28,35,39,43,44,55,56,58

+V12S 26,28,35,39,43,44,55,56,58

+V12S26,28,35,39,43,44,55,56,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

C8B3

0.1uF

R8A40.002 NO_STUFF

1%

C9B9 0.01uF

KEY

J8B1 CON120_PCI

B1B2B3B4B5B6B7B8B9

B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49

B52B53B54B55B56B57B58B59B60B61B62

A52A53A54A55A56A57A58A59A60A61A62

-12VTCKGND1TDO+5V (1)+5V (2)INTB#INTD#PRSNT1#RSV1PRSNT2#GND2GND3RSV2GND4CLKGND5REQ#+5V (3)AD31AD29GND6AD27AD25+3.3V (1)C/BE3#AD23GND8AD21AD19+3.3V (2)AD17C/BE2#GND9IRDY#+3.3V (3)DEVSEL#GND10LOCK#PERR#+3.3V (4)SERR#+3.3V (5)C/BE1#AD14GND11AD12AD10GND12

TRST#+12VTMSTDI

+5V (7)INTA#INTC#

+5V (8)RSV3

+5V (9)RSV4

GND14GND15

3.3VAUXRST#

+5V (10)GNT#

GND16PME#AD30

+3.3V (7)AD28AD26

GND17AD24

IDSEL+3.3V (8)

AD22AD20

GND18AD18AD16

+3.3V (9)FRAME#

GND19TRDY#GND20STOP#

+3.3V (10)SMBCLKSMBDAT

GND21PAR

AD15+3.3V (11)

AD13AD11

GND22AD09

AD08AD07+3.3V (6)AD05AD03GND13AD01+5V (4)ACK64#+5V (5)+5V (6)

C/BE0#+3.3V (12)

AD06AD04

GND23AD02AD00

+5V (11)REQ64#+5V (12)+5V (13)

C8B90.01uF

C8B8

0.1uF

C9B5

0.1uF

C8B4

0.1uF C9E1

0.1uF

C8E1

0.1uF

R8C6 680

R8C41K

C8N1

22uF

C9C1

0.01uF

C9B10

0.1uF

C9D1

22uF

R8B100 NO_STUFF

C9B8

0.1uF

C9E3

0.1uF

C9D5

0.1uF

C8C40.01uF

C9C3

0.1uF

C9B3

10uF

C8C6

0.1uF

R8B20.002 NO_STUFF

1%

C9N1

22uF

C8D3

0.1uF

R9B3 0.0021%

Q8C12N3904

1

3

2

C9E2

0.1uF

C8E4

0.1uF

R8C1 0

C8C10

22uF

C9B4

0.1uF

C8B122uF

C9B6

0.1uF

KEY

J9B1 CON120_PCI

B1B2B3B4B5B6B7B8B9

B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49

B52B53B54B55B56B57B58B59B60B61B62

A52A53A54A55A56A57A58A59A60A61A62

-12VTCKGND1TDO+5V (1)+5V (2)INTB#INTD#PRSNT1#RSV1PRSNT2#GND2GND3RSV2GND4CLKGND5REQ#+5V (3)AD31AD29GND6AD27AD25+3.3V (1)C/BE3#AD23GND8AD21AD19+3.3V (2)AD17C/BE2#GND9IRDY#+3.3V (3)DEVSEL#GND10LOCK#PERR#+3.3V (4)SERR#+3.3V (5)C/BE1#AD14GND11AD12AD10GND12

TRST#+12VTMSTDI

+5V (7)INTA#INTC#

+5V (8)RSV3

+5V (9)RSV4

GND14GND15

3.3VAUXRST#

+5V (10)GNT#

GND16PME#AD30

+3.3V (7)AD28AD26

GND17AD24

IDSEL+3.3V (8)

AD22AD20

GND18AD18AD16

+3.3V (9)FRAME#


+3.3V (10)SMBCLKSMBDAT

GND21PAR

AD15+3.3V (11)

AD13AD11

GND22AD09

AD08AD07+3.3V (6)AD05AD03GND13AD01+5V (4)ACK64#+5V (5)+5V (6)

C/BE0#+3.3V (12)

AD06AD04

GND23AD02AD00

+5V (11)REQ64#+5V (12)+5V (13)

C8C8

0.1uF

C9D3

22uF

C9C5

0.1uF

C8D5

0.1uF

C9C4

0.1uF

C8C7

0.1uF

R8C310K

R8B5 0.0021%

C8C5

0.1uF C9B7

0.1uF

R9C3 680

C9E4

22uF

C9C2

0.1uF

C9D2

0.1uF

C9D4

0.1uF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Stuff R9C1and unstuff R9C2 ifusing ATX power supplydirectly on extension board. DONOT STUFF BOTH R9C1 ANDR9C2 AT THE SAME TIME

(GOLDFINGER)PCI - EDGE CONNECTOR

NOTE: Default is to usepin A11 as a +V5S powerpin (R9C2 stuffed)

D15378 1.501

PCI Edge Connector (Goldfinger)


Title


Date: Sheet of


PM_SLP_S4#_R

PCI_AD22 15,25PCI_AD20 15,25

PCI_AD18 15,25PCI_AD16 15,25

PCI_AD6 15,25

PCI_C/BE#0 15,25

PCI_AD9 15,25

PCI_AD2 15,25

PCI_AD11 15,25PCI_AD13 15,25


PCI_AD15 15,25PCI_PAR 15,25

SMB_CLK_A1 14,25,28

PCI_STOP# 15,16,25

PCI_TRDY# 15,16,25

PCI_AD4 15,25

PCI_AD0 15,25

PCI_AD30 15,25

PCI_AD26 15,25PCI_AD28 15,25

PCI_AD24 15,25

PCI_FRAME# 15,16,25

INT_PIRQB# 15,16,25INT_PIRQG# 15,16,25

PM_CLKRUN# 16,25,32,35,42

INT_PIRQH# 15,16

PCI_AD2315,25

PCI_IRDY#15,16,25

INT_PIRQF#15,16,25

PCI_C/BE#315,25

PCI_PERR#15,16,25PCI_LOCK#15,16,25

PCI_AD2115,25

PCI_AD115,25

PCI_AD2915,25

PCI_AD1715,25

PCI_AD1415,25

PCI_AD1915,25

PCI_AD315,25

PCI_AD2715,25

PCI_DEVSEL#15,16,25

PCI_SERR#15,16,25

PCI_AD3115,25

PCI_AD715,25

PCI_AD1015,25

PCI_AD2515,25

PCI_C/BE#115,25

PCI_C/BE#215,25

PCI_AD515,25

INT_PIRQE#15,16

PCI_AD1215,25

PCI_AD815,25

PCI_RST# 15,25,32

PCI_GNT#5 15

PM_SLP_S4# 16,32,35,46,55,56

PCI_GNT#0 15

CLK_PCI_PCIGOLDF31

PCI_GNT#115

PCI_PME# 15,25,35

PCI_REQ#115,16

PCI_REQ#515,16

PCI_REQ#015,16

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S5,10,17,18,19,20,25,39,41,43,44,45,47,51,52,54,55,56

-V12S25,55

+V3.3A 13,14,16,17,24,25,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V5S 5,10,17,18,19,20,25,39,41,43,44,45,47,51,52,54,55,56

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S 5,10,17,18,19,20,25,39,41,43,44,45,47,51,52,54,55,56

+V525,27,35,38,47,54,55,56,58 +V12S25,28,35,39,43,44,55,56,58

5V KEY

PCI_EXTENSION_GOLDFINGERS_5V

S9C1

NO_STUFF

B1B2B3B4B5B6B7B8B9

B10B11

B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49

B52B53B54B55B56B57B58B59B60B61B62

A52A53A54A55A56A57A58A59A60A61A62

A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49


B12B13

A12A13

-12VGND(TCK)GND1REQ#0(TDO)+5V_1+5V_2INTB#INTD#REQ#1(PRSNT1#)RSV1GNT#1(PRSNT2#)

+3.3V(RSV2)GND4CLKGND5REQ#5(REQ#)+5V(+V_I/O1)AD31AD29GND6AD27AD25+3.3V_2C/BE3#AD23GND7AD21AD19+3.3V_3AD17C/BE2#GND8IRDY#+3.3V_4DEVSEL#GND9LOCK#PERR#+3.3V_5SERR#+3.3V_6C/BE1#AD14GND10AD12AD10GND11

AD08AD07+3.3V_7AD05AD03GND12AD01+5V(+V_I/O2)+5V(ACK64#)+5V_3+5V_4

C/BE0#+3.3V_16

AD06AD04

GND22AD02AD00

+5V(+V_I/O5)+5V(REQ64#)

+5V (7)+5V (8)

3.3VauxRST#

+5V(+V_I/O4)GNT#5(GNT#)

GND15PME#AD30

+3.3V_11AD28AD26

GND16AD24

+3.3V(IDSEL)+3.3V_12

AD22AD20

GND17AD18AD16

+3.3V_13FRAME#


+3.3V_14SMBCLKSMBDAT

GND20PAR

AD15+3.3V_15

AD13AD11

GND21AD09

GND(TRST#)+12V

INT#(TMS)GNT#0(TDI)

+5V_5INTA#INTC#+5V_6RSV3

+5V(+V_I/O3)+5V(RSV4)

GND2GND3

GND13GND14

R9C2 0

R9C10 NO_STUFF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout Note:Place all seriesresistors 0.6 to 2.6inches from the ICH

Layout Note:Place both headersin-line and exactly200 mils fromeach other,pin-to-pin. Drawone silkscreen boxaround both parts.

Option to powerAz I/O w/ 1.5for LV signaling

MDC Interposer Header

Option to powerAz I/O w/ 1.5Sfor LV signaling

D15378 1.501

AC'97-AZALIA

A


Title


Date: Sheet of


AZ_IO_ADJ

ACZ_MDC_BITCLK

ACZ_AUDIO_PWRDN_NET

SC

1563

_SH

DN

ACZ_MDC_SYNCACZ_MDC_SDO

ACZ_MDC_RST#

ACZ_SYNC14 VR_ALW_ENABLE49,54ACZ_RST#14

ACZ_SDATAOUT14

ACZ_SPKR 16

DOCK_AZ_EN# 16DOCK_AZ_RST#16

ACZ_SDATAIN114

ACZ_BITCLK14

ACZ_SDATAIN214

ACZ_SDATAIN014

+V1.5A_AZ_IO 47

+V3.3A13,14,16,17,24,25,26,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S/1.5S_AZ_IO 17

+V525,26,35,38,47,54,55,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A13,14,16,17,24,25,26,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V1.5A_AZ_IO 47

+V3.3A/1.5A_AZ_IO 17

+V1.5S 4,10,17,48,56,58

+VBATS13,18,19,55,56

+V3.3A13,14,16,17,24,25,26,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A/1.5A_AZ_IO17

+V3.313,14,15,17,25,32,33,34,35,36,38,45,46,55,56

+V3.3A13,14,16,17,24,25,26,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

R8D40.002

NO_STUFF

1%

R8F100.002

NO_STUFF

1%

C8E21.0uF

R8T310K1%

C8T1

0.1uF

C8E3

22uF

Q8T1BSS138

3

1

2

R8F2 39

U8E1 SC1563

1

54

2 3

SHDN

INOUT

GND ADJ

R8F1 39

R8F80.002

1%

R8D30.002 1%

R8F3 39

R8E510K

R7F2 39

J8E28Pin HDR

1 23 45 67 8

R8T42.55K

1%

J8E12X8_HDR_KEY12

2468

13

79111315

10121416 R8T2

100

R8T110K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SLOT 0

SLOT 2

SLOT 1

NOTE: SLOTS0 AND 2 AREPHYSICALYIN-LINE

D15378 1.501

PCIE


Title


Date: Sheet of


PRSNT#0

PRSNT#1

PRSNT#2

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V12S25,26,35,39,43,44,55,56,58

+V12S25,26,35,39,43,44,55,56,58

+V12S25,26,35,39,43,44,55,56,58

+V12S25,26,35,39,43,44,55,56,58

+V12S25,26,35,39,43,44,55,56,58

+V3.3S12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5

+V3.3S3,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V12S25,26,35,39,43,44,55,56,58

+V3.3S3,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5

+V12S25,26,35,39,43,44,55,56,58

+V12S25,26,35,39,43,44,55,56,58

+V12S25,26,35,39,43,44,55,56,58

+V3.3A13,14,16,17,24,25,26,27,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,29,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5

+V3.3S30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5

+V3.3S0,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

SMB_CLK_A114,25,26SMB_DATA_A114,25,26



CLK_PCIE_SLOT1 31

CLK_PCIE_SLOT2 31PCIE_TXP3_SLOT215

CLK_PCIE_SLOT1# 31

PCIE_TXN3_SLOT215

CLK_PCIE_SLOT0# 31CLK_PCIE_SLOT0 31

CLK_PCIE_SLOT2# 31

PLT_RST# 7,13,15,24,32,41,42,57

PLT_RST# 7,13,15,24,32,41,42,57

PLT_RST# 7,13,15,24,32,41,42,57

PCIE_TXP4_SLOT015PCIE_TXN4_SLOT015

PCIE_TXN2_SLOT115PCIE_TXP2_SLOT115

PCIE_WAKE#13,16,33

PCIE_WAKE#13,16,33

PCIE_WAKE#13,16,33

PCIE_RXP3_SLOT2 15PCIE_RXN3_SLOT2 15

CLK_SLOT0_OE#31

CLK_SLOT1_OE#31

CLK_SLOT2_OE#31

PCIE_RXN2_SLOT1 15PCIE_RXP2_SLOT1 15

PCIE_RXP4_SLOT0 15PCIE_RXN4_SLOT0 15

R8B90

C8B70.1uF10%

C7B50.1uF

10%

Key

J8C1

PCIE_X1

B1B2B3B4B5B6B7B8B9

B10B11

B12B13B14B15B16B17B18


A12A13A14A15A16A17A18

+12V1+12V2RSVD1GND1SMCLKSMDATGND2+3.3V1JTAG3.3VauxWAKE#

RSVD2GND3HSOp_0HSOn_0GND4PRSNT2#GND5



PWRGD

GND7REFCLK+REFCLK-

GND8HSLp_0HSLn_0

GND9

C8D9

22uF

C7B6

22uF

C7C10.1uF

10%

C8C10.1uF

10%

R7D30

C8B100.1uF

10%

C8B60.1uF10%

C8C20.1uF

10%

Key

J8D1

PCIE_X1

B1B2B3B4B5B6B7B8B9

B10B11

B12B13B14B15B16B17B18


A12A13A14A15A16A17A18





PWRGD

GND7REFCLK+REFCLK-

GND8HSLp_0HSLn_0

GND9

C7B20.1uF10%

C7C3

22uF

C7B70.1uF

10%

R8D210K

R7C110K

C8B5

22uF

C8D80.1uF

10%

C7B4

22uF

C8C9

22uF

C7B30.1uF10%

C8D60.1uF

10%

C8C3

22uF

C8D70.1uF

10%

C7C2

22uF

C8D4

22uF

R7B160

R8C210K

C8D20.1uF10%

Key

J7C1

PCIE_X1

B1B2B3B4B5B6B7B8B9

B10B11

B12B13B14B15B16B17B18


A12A13A14A15A16A17A18





PWRGD

GND7REFCLK+REFCLK-

GND8HSLp_0HSLn_0

GND9

C8D10.1uF10%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Decoupling caps for oneUSB port are already onthe daughter card

USB FPIO 2x5 Header

USB and Sideband header for PCIE Slot 1USB FPIO and Sideband header for PCIE Slot 0 and Slot 2

CARD ID Definition on Napa PlatformCARD_ID#0 CARD_ID#1 CARD PRESENT----------------------------------------------------------------------- 0 0 Duck Bay 2 0 1 Upham II 1 0 RSVD 1 1 Empty

NOTE: To enable SPI as theboot BIOS destination, shuntpins 8 and 10. This willprevent use of Duck Bay FPIOheader J7E2

D15378 1.501

USB FPIO and Sideband Header


Title


Date: Sheet of


EN2_C

EN1_DUSBPWR_HEADER

USBPWR_FPIO USBPWR_FPIO_FREN1_C

EN2_D

BT_ON

TP_DUCK_BAY_1

BT_WAKE

USBPWR_HEADER_FRUSBPWR_FPIO_FR


BT_DETACH BT_DETACH

TP_DUCK_BAY_0


BT_WAKEBT_ON





USBPWR_HEADER_FR

PCIE_SLOT1_CARD_ID#0 PCIE_SLOT1_CARD_ID#1

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

USB_PN2 15USB_PP2 15

USB_PN415USB_PP415

USB_OC#6 15

USB_OC#2 15

USB_OC#4 15

BT_WAKE 32,35


BT_ON 32,35

PCIE_SLOT0_CARD_ID#0 16BT_DETACH 32,35

PCIE_SLOT1_CARD_ID#0 16PCIE_SLOT0_CARD_ID#1 16

+V5A 17,40,46,47,48,49,54,55,57 +V5A 17,40,46,47,48,49,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,32,35,38,40,42,45,46,47,48,49,50,54,55,57

+V5A 17,40,46,47,48,49,54,55,57

+V5A 17,40,46,47,48,49,54,55,57

USB_PN6 15USB_PP6 15

GNT5_SPI 15

R6W6 1K

FB6J150 OHM

+ C6H6220uF10%

12

R9A2100K

RP6Y1D

10K4 5

R7A2

10KNO_STUFF

FB6E150 OHM

R7A5

10KNO_STUFF

R7T3 1K

+ C7E4220uF10%

12

C7E3

470PF

J9A1

8Pin_HDR

12345678

J6H2

USB_2X5-Header

13 4

2

57

1086

R9A1

10KNO_STUFF

C6H8

470PF

R7A4100K

R6W5 1K

R9A3

10KNO_STUFF

J7E2

USB_2X5-Header

13 4

2

57

1086

R9A4100K

C6T10.1uF

C9A34.7uF

10%

C9A40.1uF

U7E2

TPS2052

1234 5

678GND

INEN1EN2 OC2#

OUT2OUT1OC1#

C6Y1

0.1uF

R7T4 1K

C9A74.7uF

10%

RP6Y1A10K

18

RP6Y1B10K

27

R7A1100K

U6J1

TPS2052

1234 5

678GND

INEN1EN2 OC2#

OUT2OUT1OC1#

C9A50.1uF

J7A1

8Pin_HDR

12345678

RP6Y1C10K

36


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Host Clock frequency

BSEL2

133

1661

0

FSC

0

BSEL0 BSEL1

FSA

0

1

1

FSB

CK410MTSSOP56

FSB Frequency Select:

J1G2 -> 2 - 3J1G1 -> 2 - 3J1F4 -> 2 - 3

533

667

FSBFreq(MHz)

CK-SSCDTSSOP16

CK_SSCD Spread Select:S1 S2 S3 Spread0 0 0 -0.8%0 0 1 -1.25%0 1 0 -1.75%0 1 1 -2.5%1 0 0 0.3%1 0 1 0.5%1 1 0 0.8%1 1 1 1.25%

CK_SSCD REF OUT SELECTPIN 6 PULLED UP 100MhzPIN 6 PULLED down 96Mhz

J1G2 -> 2 - 3J1G1 -> OPENJ1F4 -> 2 - 3

For Intel XDP (Stuff RP1D1 andR1D1, NO_STUFF RP1E1 and R1T1)For Arium XDP (NO_Stuff RP1D1and R1D1, STUFF RP1E1 and R1T1)

J1G2 -> 1 - 2J1G1 -> 1 - 2J1F4 -> 1 - 2

CPUDRIVEN

NOTE: For PPV builds only:NO_STUFF J1F4, Stuff J1F9

D15378 1.501

CK-410M

A


Title


Date: Sheet of


VDD_PCI

XTAL_OUT CPU2_ITP

CLK_PCIE_PEGCLK_BSEL0

VDD_REF

VDD_SRC_CPU

SRC0#

CPU#1

CLK_MCH_BCLKCLK_MCH_BCLK#

CPU2_ITP#

DREFCLK

SRC0

SRC1

CLK_SRC_DB800

CLK_PCIE_PEG#

DREFCLK#

CLK_CPU_BCLK#

CLK_XDP#

PCIF0/ITP_EN

CPU0

DOT96

CLK_CPU_BCLK

CLK_SRC_DB800#

CLK_PCIE_XDP_3GPLL#

CLK_PCIE_ICH#

IREF

CLK_XDP

VDD_A

VDD_48

CLK_PCIE_ICH

SRC1#

DOT96#

CLK_PCIE_XDP_3GPLL

CPU#0

FSA

PCI2

PCIF1

CLK_BSEL2

CPU1

CLK_BSEL1

CLK_BSEL1

VDD_A VDD_SRC_CPU

VDD_REF

VDD_PCIVDD_48

SSCD_VDDA

REFOUT/SEL

SSCD_IREF

SSC_S1

SSC_S3

SS_CLKOUTSS_CLKOUT#

SSC_S2

XTAL_IN

XTAL_IN_D

XTAL_OUT

XTAL_IN

SRC4SRC4#

SRC2#SRC2

CLK_PCIE_DMI_LAI#CLK_PCIE_DMI_LAI

CLK_BSEL0

BS

EL0

_PU

LLU

P

SRC5SRC5#

CLK_BSEL2

SMB_DATA_S314,31

MCH_BSEL0 7

MCH_BSEL1 7

MCH_BSEL2 7

SMB_DATA_S314,31

PM_STPCPU# 16,35PM_STPPCI# 16,35

SMB_CLK_S314,31

VR_PWRGD_CK410# 31

CPU_BSEL03

XDP_BPM#1 3

XDP_BPM#2 3

CPU_BSEL13

XDP_BPM#3 3,58

CPU_BSEL23

VR_PWRGD_CK410#31

SMB_CLK_S314,31

CLK_SSCD_IN31

CLK_XDP 37

CLK_CPU_BCLK# 3

CLK_MCH_BCLK# 6

CLK_CPU_BCLK 3

CLK_XDP# 37

CLK_MCH_BCLK 6

CLK_PCI31

CLK_PCIF31

CLK_USB4816

CLK_PCIE_XDP_3GPLL# 37

DREFCLK# 7

CLK_PCIE_XDP_3GPLL 37

CLK_SRC_DB800# 31CLK_SRC_DB800 31

DREFCLK 7

CLK_REF14 31

XDP_OBS237

XDP_OBS137

XDP_OBS037

DREFSSCLK 7DREFSSCLK# 7

CLK_PCIE_ICH 15CLK_PCIE_ICH# 15

CLK_PCIE_DMI_LAI#CLK_PCIE_DMI_LAI

+V1.05S 3,4,6,9,10,14,17,37,45,48,53,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.05S 3,4,6,9,10,14,17,37,45,48,53,56,58

CLK_PCIE_PEG 13CLK_PCIE_PEG# 13

AGND_SSCD

C6G110.1uF10%

R5H20 49.9 1%

U7D3

CK_SSCD

9

8

6

1413

1211

10

34

5

1

2

7

16

15

VDD

SDATA

REFOUT/SEL

IREFVSSIREF

CLKOUTCLKOUT#

VSS

S2S1

PWRDWN

CLKIN

S3

SCLOCK

VDDA

VSSA

R5G9 49.9 1%

R5H17 33

RP1E1D 0NO_STUFF

45

R5H23 49.9 1%

R6G10 33

R7R9 0

R7D2510K

C6H233pF5%

R7D2310KNO_STUFF

R7R1110K

R5H12 33

C6D522uF

RP1D1D 045

R6H1 0NO_STUFF

R5H10 33

R7D21 33

R5H16 33

C6W10.1uF10%

R1G156

R6W2 0NO_STUFF

R7D24 33

R5G17 33

R7D2210KR1T3

1K

R5W1 2.2

C5W10.1uF10%

RP1E1A 0NO_STUFF

18

R5H7 33

R5G13 49.9 1%

R5G16 33

R5H24 49.9 1%

RP1E1B 0NO_STUFF

27

CON3_HDR

J1F4

32

1

R5H21 49.9 1%

R6H8 33

R5G19 33

R5H31 2.2K5%

C5V7

10uF

C5H10.1uF10%

R1E5 1K

R7D1410KNO_STUFF

R7R7 1

R5H26 49.9 1%

CON3_HDR

J1G1

32

1

R5G12 49.9 1%

R5G14 49.9 1%

R6D4 49.9 1%

R5H22 49.9 1%

R5G8 49.9 1%

R5H11 33

RP1D1A 018

C5W60.1uF10%

R5H25 49.9 1%

R5G21 33

C7R50.1uF

FB5H1 120ohm@100MHz

CON3_HDR

J1F9

NO_STUFF

32

1

FB5H2 120ohm@100MHz

R5H18 33

R6G11 33

R5H8 33

Y6H1

14.318MHZ

21

RP1D1B 027

R5G18 33

C5W70.1uF10%

R7D1210KNO_STUFF

R1T41K

R6H610K

R5H9 33

R6D3 49.9 1%

R7R8475

R5H30 49.9 1%

C5W4

10uF

R5G20 33

C5W5

10uF

C5W80.1uF10%

R5G11 49.9 1%

R6G8 49.9 1%

R5H19 49.9 1%

R7R1010K

NO_STUFF

R5H29 49.9 1%

R1E6 1K

C6D20.1uF

R5W3 2.2

R5G15475

R6W1 1

RP1D1C 036

R6H7 33

CON3_HDR

J1G2

32

1

C6W20.1uF10%

R1T21K

C6H433pF5%

R5H13 33

C5W30.1uF10%

J6G2

SMA CON NO_STUFF

354

1

2

RP1E1C 0NO_STUFF

36

R1E4 1K

R7D410K

R5G22 33

C5W2

10uF

R5G10 49.9 1%

U6H1

CK-410M

2

3

4

5

53

16

21

6

13

11

12

1415

10

1718

1

1920

2223

2425

29

2627

3130

7

3233

3536

39

38

37

4344

42

4041

45

5455

48

46

47

5251

49

50

28

8

9

56

34

VSS_PCI0

PCI3

PCI4

PCI5

FSC/TEST_SEL

FSB/TEST_MODE

VDD_SRC0

VSS_PCI1

VSS_48

VDD_48

FSA/USB_48

DOT96DOT96#

VTT_PWRGD#/PD

SRC0SRC0#

VD

D_P

CI0

SRC1SRC1#

SRC2SRC2#

SRC3SRC3#

VSS_SRC

SRC4SRC4#

SRC5SRC5#

VD

D_P

CI1

SRC6#SRC6

CPU2_ITP/SRC7#CPU_2_ITP/SRC_7

IREF

VSS_A

VDD_A

CPU0#CPU0

VDD_CPU

CPU1#CPU1

VSS_CPU

CPU_STOP#PCI_STOP#

VDD_REF

SCLOCK

SDATA

REFVSS_REF

XTAL_OUT

XTAL_IN

VDD_SRC1

PCIF0/ITP_EN

PCIF1

PCI2

VDD_SRC2


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

High BandwidthOuput frequency = SRC_INPLL Bypass mode

NOTE:OE pull-ups are on clockdestination pages

Decoupling caps for bothCDCVF2310 devices

For DB800 rev 1 stuff R7P19For rev 2 stuff R7P21

Place C7C4near CPU

NOTE: To Enable clocksfor XDP Interposer,STUFF R7P27, NO STUFFR7R1

D153781.501

DB800M AND CK-SSCD

A


Title


Date: Sheet of


CLK_PCIE_SLOT1CLK_PCIE_SLOT0#CLK_PCIE_SLOT0

CLK_PCIE_3GPLL#

CLK_PCIE_SLOT2#CLK_PCIE_SLOT2

CLK_PCIE_3GPLL

CLK_PCIE_SLOT1#

DIF2

DIF1

DIF0

DIF#1+V3.3S_DB800_VDDA

DB800_IREF

DIF#0

DIF#2

DIF5DIF5#DB800_BYPASS#/PLL

PCIF_2Y2

PCIF_2Y0

CLK3CLK2

CLK4

CLKOUT

PCIF_2Y3

PCIF_OE1_DIS

PCIF_OE2_EN

PCI_OE1_EN

PCI_OE2_EN

PCI_1Y0

PCI_1Y1

PCI_1Y2

PCI_1Y3

PCI_2Y4

PCI_2Y0

PCI_2Y1

PCI_2Y2

PCI_2Y3

DIF#4DIF4

CLK_XDP_CPUCLK_XDP_CPU#

OE4

CLK_PCIE_SATA#CLK_PCIE_SATA

PCIF_2Y1

PCIF_2Y4

CLK_XDP_CPUCLK_XDP_CPU#

DB800_HIGH_BW#DB800_SRC_DIV#

DB800_SRC_STOPDB800_PD

DB800_OEINV

DIF6DIF6#

OE3#

DIF7DIF7#

CLK_PCIE_LAN#CLK_PCIE_LAN

SMB_DATA_S314,30

CLK_SLOT0_OE# 28

CLK_SLOT1_OE# 28

CLK_SLOT2_OE# 28

CLK_PCIF 30 CLK_REF1430

CLK_PCI 30

CLK_MCH_OE#

CLK_PCIE_SATA_OE# 16

SMB_CLK_S314,30

CLK_SRC_DB80030CLK_SRC_DB800#30

VR_PWRGD_CK410#30

CLK_PCIE_SLOT0 28

CLK_PCIE_SLOT1# 28CLK_PCIE_SLOT1 28

CLK_PCIE_SLOT0# 28

CLK_PCIE_SLOT2 28CLK_PCIE_SLOT2# 28

CLK_PCIE_3GPLL# 7CLK_PCIE_3GPLL 7

CLK_PCI_PCIGOLDF 26

CLK_PCI_SIODOCK 42

CLK_PCI_SIO 42

CLK_PCI_XDP

CLK_PCIF_PORT80 41

CLK_PCIF_ICH 15

CLK_REF_ICH 16CLK_REF_SIO 42CLK_REF_LPC 35

CLK_SSCD_IN 30

CLK_PCIF_FWH 24

CLK_PCI_PCISLOT325

CLK_PCI_KBC32

CLK_PCI_LPC35

CLK_PCI_TPM35

CLK_PCI_PCISLOT425

VR_PWRGD_CK41016

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58+V3.3S

5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

CLK_PCIE_SATA 14CLK_PCIE_SATA# 14

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

CLK_REQ#_LAN 33

CLK_PCIE_LAN 33CLK_PCIE_LAN# 33

AGND_DB800

R7D9 33

C7P160.1uF

R7D8 33

C7P80.1uF10%

R7C20 33

C7P100.1uF10%

R7P17 10K

C7P120.1uF10%

R7D5 33

R7C18 33

R6D33 49.9 1%

R7D15 49.9 1%

R6D30 33

R7D6 33

U7D2INVERTER

2 4

5

3

C7P14

0.1uF

C7P110.1uF10%

R7P2 33

C7R10.1uF

R7C4 49.9 1%

R7P10 10K

U7D1

DB800

8

12

16

20

30

34

38

42

9

13

17

21

29

33

37

41

6

14

15

7

43

35

36

44

211193139

310182532

4048

47

1

45

22

2324

2627

2845

46

DIF0

DIF1

DIF2

DIF3

DIF4

DIF5

DIF6

DIF7

DIF#0

DIF#1

DIF#2

DIF#3

DIF#4

DIF#5

DIF#6

DIF#7

OE0#

OE1#

OE2#

OE3#

OE4#

OE5#

OE6#

OE7#

VDD1VDD2VDD3VDD4VDD5

GND1GND2GND3GND4GND5

OE_INVVDDA

GNDA

SRC_DIV#

SRC_INSRC_IN#

BYPASS#/PLL

SCLKSDATA

PWRDWNSRC_STOP

HIGH_BW#LOCK

IREF

R7C5 49.9 1%

R7P1 33

R7P20 0

C7P20.1uF10%

R7C12 33

C7P90.1uF10%

R7C2410K

R7P18 680

C7P70.1uF10%

R7P12 33

R7C15 33

R7D18 49.9 1%

R7P2510KNO_STUFF

C7R30.1uF

R7P8 33

R7R410K

R7P27 10K

NO_STUFF

C7P170.1uF

C7R40.1uF

R7D7 33R7D19 49.9 1%

R7D10 33

C7R20.1uF

R7P13 680

R7P6 33

R7P3 15 1%

R7P21 0

R7P9 10K

C7P30.1uF10%

R6D31 33

C7C5

22uF

R7P7 33

R7D16 49.9 1%

R7D1310K

R7C26 33

R7R310KNO_STUFF

R7R1 10K

R7C6 49.9 1%

R7P26

10K

C7P150.1uF

R7C7 49.9 1%

R7C14 10K

R7C22 33

R7C17 33

R7C16 33

R7C21 33

U7C2

CDCVF2310

21

20

22

18

17

24

13

14

16

10

11

9

2

1

19

3

4

5

6

7

23

8

12

15

2Y0

2Y1

VDD5

GND4

2Y2

CLK

2G

VDD3

2Y3

VDD2

1G

1Y4

VDD1

GND1

GND5

1Y0

1Y1

1Y2

GND2

GND3

VDD6

1Y3

2Y4

VDD4

R7P15 33

R7C13475

R7P16 10K

R7P5 33

R7C19 33

C7P60.1uF10%

R7D17 49.9 1%

R7C11 1

U7C1

CDCVF2310

21

20

22

18

17

24

13

14

16

10

11

9

2

1

19

3

4

5

6

7

23

8

12

15

2Y0

2Y1

VDD5

GND4

2Y2

CLK

2G

VDD3

2Y3

VDD2

1G

1Y4

VDD1

GND1

GND5

1Y0

1Y1

1Y2

GND2

GND3

VDD6

1Y3

2Y4

VDD4

R7P19 0NO_STUFF

C7P40.1uF10%

R7C2510KNO_STUFF

R7P4 33

R7C10 49.9 1%

R7P29 10K

C7C41UFNO_STUFF

R7D20 49.9 1%

R7C27

10K

C7P50.1uF10%

R7C9 49.9 1%

R7P11 33

C7P130.1uF10%

U7C3

ICS9112-16

1 23

4

6

7

85

REF CLK2CLK1

GND

VDD

CLK4

CLKOUTCLK3

R7P14 33

R6D32 49.9 1%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KSC EnableDisable

Boot Mode Programming StrapsP90-P92 needs to be at VCC for boot mode programming. They arealready pulled up in the design. MD0, MD1 needs to be at Vss.System needs to supply +V3.3A to flash connector.

J8G1 1-2 (Default)2-3

NOTE: Shunt both J9J2 andJ9J6 as default and forexternal programming.

NOTE: Stuff R9F1 forwrite protect

J9J41-X1-2

MD2 Normal Operation

LAYOUT NOTE: Bringtest point to edge ofboard

LID JUMPER & SWITCH

J9J7 1-X (Default)SW9J1 1-2 (Default)

VIRTUAL BATTERY JUMPER & SWITCH

J9J5 1-X (Default)SW9J2 1-2 (Default)

J9J1 1-X(Default)

NOTE: Place C9W2 decoupling capclose to VCL pin 13

R2B5Non-stuffedStuffed

R2B8StuffedNon-stuffed

Thermal Monitoring Enabled (Default)Disabled

MODE TYPE MD0 MD1 MD2 NMI J9H1(p38) J9G3 (page38)

Run Mode

Program Boot Block

Program Flash

0

0

0

0

0

0

01

1

1

1

1

x

Stuffed

Stuffed

Stuffed

x

Open

Advanced Single Chip Mode

D15378 1.501

H8 2104 KBC

A


Title


Date: Sheet of


LED

D3

LED

_NU

MLED

_CA

PS

LED

D1

LED

_SC

RO

LLLE

DD

2

SMC_MD0

SMC_RSTGATE#

INH#_TP

SMC_MD1

KBC_SCANOUT1

TP_KBC_PE4

SMC_LID

KBC_SCANIN5

ALL_SYS_PWRGD_R

KBC_SCANOUT6

KBC_SCANIN0

BT_ON

KBC_SCANOUT9

TP_KBC_PE2

VIRTUAL_BATTERY

PLT_RST_R

KBC_SCANOUT3KBC_SCANOUT4

KBC_SCANOUT14

VCL

TP_KBC_PE3

VCORE_IN_R

KBC_SCANIN1

SMC_RES#

SMC_RSTGATE#

FAN_ON

KBC_DISABLE#

TP_KBC_PE0

KBC_MDE

KBC_SCANIN4

H8_P91_IRQ1#

KBC_SCANOUT7

KBC_SCANOUT10

KBC_SCANOUT12

TP_KSC_RES0

KBC_SCANOUT0

SMC_XTAL

TP_KBC_PE1

KBC_SCANOUT5

SMC_STBY#

FAN_ON

KBC_SCANIN2

KBC_SCANOUT2

RSMRST#_PWRGD

TP_TV_DCON_MODE

KBC_SCANIN6NMI_R

SMC_EXTAL

KBC_NUMLOCKKBC_SCROLLOCK

TP_KBC_PE5KBC_FWE

P73/EXIRQ3#/AN3

KBC_SCANOUT8

MD0

KBC_SCANOUT13

KBC_SCANOUT15

KBC_SCANIN7

KBC_SCANIN3

KBC_SCANOUT11

MD1 KBC_CAPSLOCK

VCL

TP_PF1

TP_PF5TP_PF4

TP_PF2

TP_PF7TP_PF6

TP_PF3

VCORE_IN_R

ICORE_IN_R

ICORE_IN_R

RSMRST#_PWRGD

PM_THERM#_R

H_A20GATE_R

KBC_PROG_TX#

BT_ON

INT_SERIRQ 16,25,35,42PM_CLKRUN# 16,25,26,35,42

SMB_BS_DATA 24,35,50

LPC_AD1 14,24,35,41,42

LPC_FRAME# 14,24,35,41,42LPC_AD3 14,24,35,41,42LPC_AD2 14,24,35,41,42

SMB_BS_CLK 24,35,50LPC_AD0 14,24,35,41,42

EMA_ALS_DATA 19,36EMA_ALS_CLK 19,36

KBC_GP_DATA 38

KBC_MOUSE_DATA 38

KBC_KB_CLK 38

KBC_MOUSE_CLK 38

KBC_KB_DATA 38

EMA_ALS_CLK 19,36

KBC_GP_CLK 38

EMA_ALS_DATA 19,36

SMB_THRM_CLK5,35

SMB_BS_DATA24,35,50SMB_BS_CLK24,35,50

SMB_THRM_DATA5,35

SMC_WAKE_SCI# 16,35

BUF_PLT_RST# 15,33,35CLK_PCI_KBC 31

KBC_SCANIN[7:0] 38

SATA_DET#2 16,44

SMC_RUNTIME_SCI# 16,35

SMC_EXTSMI# 16,35,42,57

PLT_RST# 7,13,15,24,28,41,42,57 PCI_RST# 15,25,26

EMA_DISP_UP 36

KBCPROG_RX# 45

PM_SUS_STAT# 16,35,42,57

KSC_LPC_DOCK# 42

EMA_DISP_DOWN 36EMA_DISP_SEL 36

EMA_DISP_GESC 36EMA_DISP_ESC 36

SMB_BS_ALRT#35,50

ALL_SYS_PWRGD16,35,48

SMC_INITCLK38

PM_SLP_S4#16,26,35,46,55,56

SMC_ONOFF#35,54

KBC_PROG_TX#19,45

SIO_VID145

SMC_RST#38

SIO_VID245

SIO_VID045

BC_ICHG35,50BC_IINP35,50

BT_WAKE29,35ATX_DETECT#35,54

SIO_VID345

SIO_VID545SIO_VID645

SIO_VID445

BC_ACOK35,50

PM_SLP_S3#10,35,47,48,49,55,56

VCORE_IN

5130_PWRGD49

ATX_PWROK54

VRPWRGD_1_5A_R47

ICORE_IN

KBC_SCANOUT[15:0] 38

NMI_GATE 38

SMC_LID35

BS_DISB# 35,50BC_SHDN 35,50

VIRTUAL_BATTERY35

FAN_ON5,35

BS_CLR_LTCH#35,50

RSMRST#_PWRGD 35

PM_THRM#5,16,35

SMC_WAKE_SCI#16,35

PM_PWRBTN#16,35

PM_RSMRST#16,35

SMC_RUNTIME_SCI#16,35

PM_LAN_ENABLE16,34,35

H_A20GATE14,35

SMC_EXTSMI#16,35,42,57

PM_BATLOW#16,35

SMC_RSTGATE#35H_RCIN#14,16,35

NMI_GATE38

PLT_GATED_RST#13,33,36 PCI_GATED_RST#25

IMVP_VR_ON35

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S

5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.313,14,15,17,25,27,33,34,35,36,38,45,46,55,56+V3.313,14,15,17,25,27,33,34,35,36,38,45,46,55,56

+V3.313,14,15,17,25,27,33,34,35,36,38,45,46,55,56

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3S4,25,26,27,28,29,30,31,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,5SMC_SHUTDOWN35,54

BS_CHGA# 35,50BS_CHGB# 35,50

BT_DETACH 29,35

+V3.3A13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

BS_DISA#35,50

BT_ON29,35

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,35,38,40,42,45,46,47,48,49,50,54,55,57R9H11 10K

R9W5 1.40K

1%

R9H1 100

R9F7 4.7K

SW9J2

SPDT_SLIDE

21

3

J9J2Q9G3BSS138

3

1

2

R9H12 10K

R8G13 10KNO_STUFF

R2B8

100K

R9G18 0

C9W10.1uF

C9W30.1uF

R9W18.2K

R8W8

10K

CR9G3GREEN

12

R9F9 4.7K

R9H8 10K

J9J6

R9F6 4.7K

R9F110

NO_STUFF

C9H218PF

R9G2 0

C9W40.1uF

R9G310K

R9F10 4.7K

R9F2 4.7K

R9W90

R9W16 10K

Y8G2

10MHZ NO_STUFF

412 3VDDINH#

GND OUT

R9W3 1.40K 1%

CON3_HDR

J8G1

32

1

J9J5

C8H222uF

R9J4 10K

R9H14 0NO_STUFF

TP8G1NO_STUFF

R7M3 10K

Q8H2BSS138

3

1

2

C9W20.1uF

R9W17 10KR9W2 1.40K 1%

C9H40.1uF

NO_STUFF10%

R9F10

NO_STUFF

J9J1

Q9G2BSS138

3

1

2

R8H1 8.2K

R9G410K

C9H30.1uF

NO_STUFF10%

R5H50

J9J7

R9F4 4.7K

R2B5100KNO_STUFF

U9H1

H8S/2104

138

2

8

34

143

56

144

113114

36

1

96

9

9798

10

99100

11

101102

12

103

115

13

116

42

33

95

104

34

105106

14

107108

15

109110

16

112

117

7

118

121

17

122123

18

124125

19

126127

20

128

119

35

120

111

37

129130

21

131132

22

133

134

23

135

142

24

3839

7776

6869707172737475

67

4041

136137

7879808182838485

8788899091929394

5960616263646566

5152535455565758

4344454647484950

2526272829303132

139

86

140141

P42/EXIRQ7#/TMRI0/SCK2/SDA1

P43/TMCI1

RES#

P44/TMO1P45/TMRI1

XTAL

P46/PWX0P47/PWX1

EXTAL

PB7/WUE7#/DLAD0PB6/WUE6#/DLAD1

VCC2

VCC1

P27/PW15

MD1

P26/PW14P25/PW13

MD0

P24/PW12P23/PW11

NMI

P22/PW10P21/PW9

STBY#

P20/PW8

PB5/WUE5#/DLAD2

VCL

PB4/WUE4#/DLAD3

VSS2

PA7/KIN15#/PS2CD

VSS3

P17

PA6/KIN14/PS2CC

P16P15

P52/EXIRQ6#/SCL0

P14P13

P51/TMOY

P12P11

P50/EXEXCL

P10

PB3/WUE3#/DLFRAME#

VSS1

PB2/WUE2#

P30/LAD0

P97/IRQ15#/SDA0

P31/LAD1P32/LAD2

P96/0/EXCL

P33/LAD3P34/LFRAME#

P95/IRQ14#

P35/LRESET#P36/LCLK

P94/IRQ13#

P37/SERIRQ

PB1/WUE1#/LSCI

PA5/KIN13#/PS2BD

PB0/WUE0#/LSMI#

VSS4

PA4/KIN12#/PS2BC

P80/PME#P81/GA20

P93/IRQ12#

P82/CLKRUN#P83/LPCPD#

P92/IRQ0#

P84/IRQ3#/TXD1/IRTXD

P85/IRQ4#/RXD1/IRRXD

P91/IRQ1#

P86/IRQ5#/SCK1/SCL1

RESO#

P90/IRQ2#/ADTRG#

PA3/KIN11#/PS2ADPA2/KIN10#/PS2AC

AVREFAVCC

P70/EXIRQ0#/AN0P71/EXIRQ1#/AN1P72/EXIRQ2#/AN2P73/EXIRQ3#/AN3P74/EXIRQ4#/AN4P75/EXIRQ5#/AN5P76/AN6P77/AN7

AVSS

PA1/KIN9#PA0/KIN8#P40/TMCI0/TXD2/DSERIRQP41/TMO0/RXD2/DCLKRUN#

P60/KIN0#/FTCI/TMIXP61/KIN1#/FTOA

P62/KIN2#/FTIA/TMIYP63/KIN3#/FTIBP64/KIN4#/FTICP65/KIN5#/FTID

P66/IRQ6#/KIN6#/FTOBP67/IRQ7#/KIN7#/TMOX

PC7/WUE15#/DLDRQPC6/WUE14#/LDRQ

PC5/WUE13#PC4/WUE12#PC3/WUE11#PC2/WUE10#PC1/WUE9#PC0/WUE8#

PD7/TIOCB2/TCLKDPD6/TIOCA2

PD5/TIOCB1/TCLKCPD4/TIOCA1

PD3/TIOCD0/TCLKBPD2/TIOCC0/TCLKA

PD1/TIOCB0PD0/TIOCA0

PG7/EXIRQ15#/EXSCLBPG6/EXIRQ14#/EXSDABPG5/EXIRQ13#/EXSCLAPG4/EXIRQ12#/EXSDAAPG3/EXIRQ11#/EXTMIYPG2/EXIRQ10#/EXTMIXPG1/EXIRQ9#/EXTMCI1PG0/EXIRQ8#/EXTMCI0

PF7/EXPW15PF6/EXPW14PF5/EXPW13PF4/EXPW12PF3/IRQ11#/EXTMOXPF2/IRQ10#PF1/IRQ9#PF0/IRQ8#

MD2FWE

ETRST#PE4/ETMSPE3/ETDOPE2/ETDI

PE1/ETCKPE0/LID3#

VSS5

VCC3

X1X2

R9G8240

C9H118PF

Y8H1

10MHZ

21

R9G17 100

R9J1 10K

R9H13 0

R9H7 10K

R9H1610K

5%

R9H19 10K

Q8H1BSS138

3

1

2

R9W11 1.40K

1%

C9W50.1uF

R9A1010K

5%

R9W19 10K

R8W10

10K

SW9J1SPDT_SLIDE

21

3

R9W6 10K

R9W710K

R9G5240

Q9G1BSS138

3

1

2

R9H9 0

J9J4

R9H10 10K

R9W80

R9G7240

R9W18 10K

R9H15 0NO_STUFF

R9F5 4.7K

R9W15 10K

CR9G1GREEN

12

CR5W1BAT54

1

3

CR9G2GREEN

12

R9F8 4.7K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

For Tekoa, stuff R7A7,R7A10,R7A12, R7A13 with 49.9_1%For EkronR, stuff R7A7, R7A10,R7A12, R7A13 with 54.9_1%

Place termination resistorsand caps as close to LANcontroller as possible

TT

T T

T

Stuffed for TekoaStuffed for EkronR

Default is 1-X Protection ModeOverride NVM Protection 1-2

T

R8A1,R8M7, and R8M11should be placed lessthan 0.5" from theSPI Flash

These capacitors should be placed lessthan 0.5" from the LAN Controller.

T

TInstall whensharing SPI Flashwith the ICH7

T

Place this cap closeto RJ45 connector.

Place Cap close toRJ45 connector.

T T

T

T

ACTIVITY LEDGreen = LINK UPBLINKING = TX/RX ACTIVITY

SPEED LEDOff = Link 10 MbpsGreen = Link 100 MbpsOrange = Link 1000 Mbps

Install to use SPIFLASH (Tekoa only)

T

T

Default: No_Stuff R8B8. It is forTekoa’s Validation support only,and will not be used on CRB.

NOTE: R8M3 is not needed when sharingSPI flash with ICH7M and Tekoa

STUFF:

Note:LAN controller symbol pin-out naming convention is (Tekoa-EkronR). Ex: PER-NC.Stuffing option: T for Tekoa, and E for EkronR.

R7A7, R7A10, R7A12, R7A13 = 54.9_1%

EkronR

TP8A1,TP8A2, TP8B2, TP8B5, TP8B4, TP8B3, TP8B1, J7A2, J7B1, J8A1, R8M5, R8M6, R8M9, R8M10, R8M11, R8A1,R8M7, R7A14, R7A16, R7A18, R7A19, R7A20, R5A2, R8M1, R7B1, R8A2, R7M2, R4M7, R5A6, R5B1, R7M7,C7A1,C8A1, C8M1, C8A2, C7M5, C7M4, C7M7, C7M11

Tekoa

NO_STUFF:R7A3, R7M4, R7B2, R7B3, R7B4, R7B5, R7B9, R7B8, R7B7, R7B6, R5A3, R5M1, R5A5, R7M1,R8N1, R7A6, R7A22, R7M6, R7M8, R7M9, R7M10, R7M11, R7M12, Q7M1

STUFF:

R7A8 = 3.3K

U8A2 = TEKOA = 82573E, IPN = C88180-003J5A1 = 10/100 BASE-T, IPN: A74314-002J5A1 = 1000 BASE-T, IPN: A74307-003

R7A7, R7A10, R7A12, R7A13 = 49.9_1%

NO_STUFF:

U8A2 = EKRON-R = 82562GZ, IPN = C78326-001

R7A3, R7M4, R7B2, R7B3, R7B4, R7B5, R7B9, R7B8, R7B7, R7B6, R5M1, R5A5, R7M1, R8N1, R7A6, R7A22, R7M6,R7M8, R7M9, R7M10, R7M11, R7M12, Q7M1

R7A8 = 200

TP8A1,TP8A2, TP8B2, TP8B5, TP8B4, TP8B3, TP8B1, J7A2, J7B1, J8A1, R8M5, R8M6, R8M9,R8M10,R8M11, R8A1, R8M7, R7A14, R7A16, R7A18, R7A19, R7A20, R5A2, R8M1, R7B1, R8A2,R7M2, R4M7, R5A6, R5B1, R7M7, C7A1,C8A1, C8M1, C8A2, C7M5, C7M4, C7M7, C7M11

E

E

E

E

E

E

EEEE

E

E

E

E

T T T

T T T T

T TT

TT

T

T

D15378 1.501

LAN (1 of 2)

A


Title


Date: Sheet of


PCIE_RXN1_LAN_C

LANMDI2N_R

LAN_MDI3N

LANMDI1P_R

LAN_MDI2PLAN_MDI2N

LANMDI3P_R

LAN_MDI1N

LAN_MDI3P

PCIE_RXP1_LAN_C

LAN_RXD2_R

LAN_JCLK_R

LAN_MDI0N

LAN_RSTSYNC_R

LAN_MDI0P

LANMDI2_R

LAN_MDI1N

LANMDI3_R

LAN_MDI2P

LAN_MDI0P

LAN_MDI3P

LANMDIO_RLANMDI1_R

LAN_MDI0N

LAN_MDI2N

VCC0

LAN_THER_TESTPLAN_THER_TESTN

LAN_XTAL1LAN_XTAL2

LAN_SMBA#

LAN_RXD1_RLAN_RXD0_R

LAN_TXD2_R

AUX_PRESENT

TP_LAN_NC1TP_LAN_NC2TP_LAN_NC3TP_LAN_NC4TP_LAN_NC5TP_LAN_NC6TP_LAN_NC7TP_LAN_NC8

TP_LAN_TEST15

TP_LAN_TEST13

LAN_XTAL1

LAN_XTAL2

LAN_MDI3N

LAN_MDI1P

LAN_MDI1P

TP_LAN_SDP3TP_LAN_SDP2TP_LAN_SDP1TP_LAN_SDP0

TP_ALT_CLK125

SPI_SOSPI_CE#SPI_SCLK

SPI_SI

HS_DAS_TOUT

NVM_PROTNVM_TYPE

NVM_SHRD

SPI_SI

SPI_SCLK

NVM_TYPE

NVM_SHRDTP_LAN_TEST16

TP_LAN_TEST12TP_LAN_TEST11

TP_LAN_TEST2

TP_LAN_TEST8

TP_LAN_TEST3TP_LAN_TEST4TP_LAN_TEST5

TP_LAN_TEST0

TP_LAN_TEST9

TP_LAN_TEST6

TP_LAN_TEST10

TP_LAN_TEST1

TP_LAN_TEST7

LINK/ACT-ACT_LED#_R

LINK_100_LED#

LINK1000_PU_ALT

LINK_1000-LINK_UP_LED#

LINK_1000-LINK_UP_LED#

LINK/ACT-ACT_LED#

LINK_1000-LINK_UP_LED#_R

LAN_TXD0_R

DOCK_IND-NC

LANMDI1N_R

LANMDI0P_R

LANMDI2P_R

LANMDI0N_R

LINK/ACT-ACT_LED#LINK_1000-LINK_UP_LED#

LINK_100_LED#

LANMDI3N_R

LAN_TXD1_R

SPI_HOLD#

SPI_WP#

SO_R SPI_SOSPI_CE#

SI_R

SCLK_RSPI__CE#

RBIAS100RBIAS10

LAN_PWRGD_IN

VLAN_PWRGD

VLAN_PWRGD

LAN_RXD2 14

SMB_CLK 14,16,58

LAN_RXD0 14LAN_RSTSYNC 14

LAN_TXD2 14

SMB_DATA 14,16,58SMB_ALERT# 16

LAN_RXD1 14

LAN_TXD0 14


LAN_JCLK 14

BUF_PLT_RST# 15,32,35

CLK_PCIE_LAN#31

PCIE_TXN1_LAN15

CLK_PCIE_LAN31

PCIE_TXP1_LAN15

PCIE_RXP1_LAN15PCIE_RXN1_LAN15

PCIE_WAKE#13,16,28

SPI_ARB15

+V2.5_LAN 34

+V3.3 13,14,15,17,25,27,32,34,35,36,38,45,46,55,56+V3.3 13,14,15,17,25,27,32,34,35,36,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,34,35,36,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,34,35,36,38,45,46,55,56

SPI_SO15SPI_SI15

SPI_CE#15SPI_SCLK15

LAN_TXD1 14

+V3.3 13,14,15,17,25,27,32,34,35,36,38,45,46,55,56

+V3.313,14,15,17,25,27,32,34,35,36,38,45,46,55,56

CLK_REQ#_LAN 31

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3 13,14,15,17,25,27,32,34,35,36,38,45,46,55,56

C8M11 0.1uF

C7M50.1uF

R7A3 649 NO_STUFF

1%

C7M4

0.1uF

R6A8 0

R7A13

49.9_1%

U7B11

MAX809

1

2

3G

ND

RST#

VC

C

R7A10

49.9_1%R8M7 47

J7A2

R7M1 0

NO_STUFF

R8M103.3K

R6A12 0

R7B22 0

R7A1449.91%

R5A6 0

R7B21 0 NO_STUFF

C7M11

0.1uF

R8M43.3K

R7B2 0 NO_STUFF

R8M83.3K

R7A1649.91%

R5A30

NO_STUFF

R5B1 0

J7B1

R5A20

R7B7 0 NO_STUFF

R5A5 0

NO_STUFF

R8M53.3K

C8M70.1uF

R7B10

R8B83.3KNO_STUFF

R6A14 0

J8A1

R7M4 619 1% NO_STUFF

R7B9 0 NO_STUFF

R8M63k

R7A1849.91%

R7B4 0 NO_STUFF

R8M11 47

R5M1 0

NO_STUFF

R7B5 0 NO_STUFF

R7B6 0 NO_STUFF

R6A5 0

R4M7 0

TP8A1 R6A16 0

U8A2A

DUAL_LAN_TEKOA_EKR_REV 0.5

D1C1

F2F1

G1G2

K1L1

J2J3

J14K14

L14

L13

B12

P5

P7

N9

P9

A8B8C8C7

M7

M12

M13

N13P13

L8

M8

C6

A6A5B4

C3

M11N11

P11

P10

L3L2

A9B9

B10C9

C13C14E13E14F13F14H13H14

M3M1

M5

B11C11A12

M9

M14

N14

B14B13

N2

P14

N3P1

A14

J13

D11

N10

J1

H1H2H3

D3

E3

PE_T0p-NCPE_T0n-NC

PE_R0p-NCPE_R0n-NC

PE_CLKp-NCPE_CLKn-NC

TEST6-NCTEST7-NC

TEST4-NCTEST5-NC

XTAL2-X2XTAL1-X1

CLK_VIEW-LAN_TXD[2]

NC-LAN_TXD[1]

PHY_HSDACp-TOUT

LAN_PWR_GOOD-NC

PE_RST#-NC

NC-NC2

TEST14-NC

SDP[0]-NCSDP[1]-NCSDP[2]-NCSDP[3]-NC

NC-NC3

NC-LAN_RXD[2]

NC-LAN_RSTSYNC

NC-LAN_RXD[1]NC-LAN_RXD[0]

NC-NC4

TEST13-NC

AUX_PRESENT-NC

NVM_TYPE-NCNVM_PROT-NCNVM_REQ-NC

DOCK_IND-NC

SMB_DATA-NCSMB_ALRT#-NC

SMB_CLK-NC

PE_WAKE#-NC

THERMp-NCTHERMn-NC

NVM_SI-NCNVM_SO-NCNVM_CE#-NCNVM_SK-NC

MDI0p-TDPMDI0n-TDNMDI1p-RDPMDI1n-RDN

MDI2p-NCMDI2n-NCMDI3p-NCMDI3n-NC

TEST9-NCTEST8-NC

NC-NC7

LED0#-SPDLEDLED1#-ACTLED

LED2#-LILED

NC-NC1

NC-LAN_TXD[0]

NC-LAN_CLK

PHY_TSTPT-RBIAS10PHY_HSDACn-RBIAS100

TEST10-NC

NC-NC5

TEST12-NCTEST11-NC

TEST16-NC

NC-NC6

NC-NC8

ALT_CLK125-NC

TEST3-NC

TEST0-NCTEST1-NCTEST2-NC

NVM_SHARED-NC

TEST15-NC

R7B8 0 NO_STUFF

R7B3 0 NO_STUFF

R7A12

49.9_1%

C8M133pF5%

R7B1910K

NO_STUFF

R6A4 0

R6A10 0

C7M12

22pF

Y7A1

25MHZ

41C7M14

22pF

U8A1

SST SPI FLASH Skt

12

3

4

5

6

7

8

CE#SO

WP#

VSS

SI

SCK

HOLD#

VDD

C8A133pF5%

TP8A2

R8A1 47R7A1949.91%

R8M93.3K

C8A233pF5%

R7A7

49.9_1%

C5A2470pF

5%

J5A1A

RJ45 1000 WITH DUAL USB

1011121314151617

22

9

18

192021

0+0-1+1-2+2-3+3-

LED_1000#

VCC0

GND0

LED_LINK#LED_ACTLED_100#

C7M7

0.1uF

C5A10.01uF

C7A133pF5%

R7B2010K

C5B1470pF

5%

R8M310KNO_STUFF

R6B1 0


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

T

TPs provideaccess toTekoa's JTAGsignals.

T

T

Q8A1 RequiresHeat-Sinksurface pad of1cm x 1cm min.

Q8A2 RequiresHeat-Sinksurface pad of1cm x 1cm min.

T

NOTE: StuffR8M2 forinternal 2.5 onTekoa

Note: Defaultstuff R8M1 forexternal 2.5 onTekoa

NOTE: Place nearthe TP'sfor JTAGsignals

Resistor Value:82573E = 3.3K82562GZ = 200

TStuff for 82562 only, notfor 82562 enhanced mode

LAN DISABLE CIRCUIT

NOTE: STUFF R7A15,R7A11, R7A17, and R7A9for Full Power DownMode, 82562GX/GZ

Note: Stuff R7M11 andUn-stuff R7A20 to disableTekoa LAN Controller.

E

E

E

EE

EEE

T

E

T

E

D15378 1.501

LAN (2 of 2)

A


Title


Date: Sheet of


LAN_JTDI

LAN_JTMSLAN_JTCK

LAN_JTDO

LAN_ADV10

LAN_RST#_R

LAN_PWR_CTRL1.2

LAN_TI_R

LAN_TEST-TEST_EN

EN2.5_REGLAN_PWR_CTRL2.5

LAN_TCK_RLAN_EXEC_R

LAN

_ISO

L


+V3.3 13,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+V1.2_LAN

+V3.313,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+VLAN_2.5-3.3

+V3.3 13,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+V3.313,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+V1.2_LAN

+V2.5_LAN 33

+V3.3 13,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+VLAN_1.2-3.3

+V2.5_LAN 33

+V2.5_LAN33+V1.87,9,21,22,46,47,56,58

+V3.313,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,35,36,38,45,46,55,56

+V3.313,14,15,17,25,27,32,33,35,36,38,45,46,55,56

R8M23.3K

NO_STUFF

TP8B4

R8N10.002

NO_STUFF1%

R7M6 100 NO_STUFF

R7M8 100 NO_STUFF

C8M130.01uF

R7A60.002

NO_STUFF1%

R7A2310K Q7M1

BSS138

NO_STUFF

3

1

2

R7A20 0

R7M121K NO_STUFF

Q8A1

PBSS5540Z1

3

2 4

C8M104.7uF

10%

TP8B1

R7M111K

NO_STUFF

C8M170.01uF

R7M20.002

1%

R7M10 100 NO_STUFF

C8M60.1uF

10%

C7M130.01uF

C8M20.1uF

10%

U8A2B

DUAL_LAN_TEKOA_EKR_REV 0.5

K7K8L5H8J9

J11K9K10L9L10

A3

A7

N8

J5

K6

L12

K11

K3

G6H6H7J6J7J8K4K5

A1C2D2

D4

E4

F3

F4F5

G4

H4

C12D13

E10F11F10

G14

G11

H10

G5H5

B3

C10D6D7D8E6E7E8

F6F7F8

G7G8

P8

M6

P2

N1

L6

D5

E5

J12

K13

G13

G10

H11

J10E9

F9

G9H9

A13

A11

E1

F12H12G12

A2

M10

B7

K2E2

L11K12

N12

P3

C5C4

A4B5

M4N7

J4

P12

G3

B2B1

D9

M2

L4E11E12

D12D14D10

L7

N4N5P4P6

N6

A10

B6

VCC1.2-VCC3.3-9VCC1.2-VCC3.3-10VCC1.2-VCC3.3-11VCC1.2-VCC3.3-12VCC1.2-VCC3.3-13

VCC1.2-VCC3.3-15VCC1.2-VCC3.3-16VCC1.2-VCC3.3-17VCC1.2-VCC3.3-18VCC1.2-VCC3.3-19

IREG2.5_IN-VCC3.3

VCC3.3-VCC3.3-3

VCC3.3-VCC3.3-5

VCC2.5-VCC3.3-1

VCC1.2-VCC3.3-21

VCC2.5-NC7

VCC1.2-VCC3.3-20

VCC1.2-VCC3.3-23

VCC1.2-VCC3.3-1VCC1.2-VCC3.3-2VCC1.2-VCC3.3-3VCC1.2-VCC3.3-4VCC1.2-VCC3.3-5VCC1.2-VCC3.3-6VCC1.2-VCC3.3-7VCC1.2-VCC3.3-8

VSS1-NCVSS2-NCVSS3-NC

VSS5-VSS

VSS8-VSS

VCC3.3-NC3

VSS17-VSSVSS16-VSS

VSS4-NC

VCC2.5-NC1

VSS2-VSSVSS3-VSS

VSS10-VSSVSS11-VSSVSS12-VSS

VSS-VSS17

VSS13-VSS

VSS15-VSS

VCC2.5-VCC3.3-2VCC2.5-VCC3.3-3

VSS7-VSS

VSS-VSS1VSS-VSS2VSS-VSS3VSS-VSS4VSS-VSS5VSS-VSS6VSS-VSS7

VSS-VSS9VSS-VSS10VSS-VSS11

VSS-VSS13VSS-VSS14

VSS1-VSS

NC2-VSS

VCC3.3-VCC3.3-1

VSS-VSS20

NC3-VSS

VSS6-VSS

VSS9-VSS

VCC2.5-NC6

VCC2.5-VCC3.3-4

VCC1.2-VCC3.3-24

VSS14-VSS

VCC1.2-VCC3.3-22

VCC1.2-VCC3.3-14VSS-VSS8

VSS-VSS12

VSS-VSS15VSS-VSS16

TEST_EN-TEST_EN

VCC2.5-VCC3.3

NC-VCC3.3-1

VCC1.2-NC1VCC1.2-NC2VCC1.2-NC3

IREG2.5_IN-NC5

VCC3.3-NC1

NC1-VSS

VSS-VSS18VSS-VSS19

NC5-VSSNC4-VSS

VSS4-VSS

CTRL_1.2-NC

VCC1.2-NC4VCC1.2-NC5

CTRL_2.5-NCEN2.5REG-NC

VCC2.5-NC3VCC2.5-NC2

VCC3.3-NC2

VCC3.3-VCC3.3-4

VCC2.5-NC4

2.5V_OUT-NC12.5V_OUT-NC2

VCC3.3-NC4

FUSEV-NC6

NC-VCC3.3-2NC-VCC3.3-3NC-VCC3.3-4

PHY_REF-ISOL_TINC-ISOL_TCKNC-ISOL_TXEDEVICE_OFF#-LAN_DIS#

JTAG_TMS-NCJTAG_TCK-NCJTAG_TDI-NCJTAG_TDO-NC

VCC3.3-VCC3.3-2

VCC1.2-NC6

VCC2.5-NC5

R8M13.3K

C8A40.1uF

10%

C7M100.01uF

R7A22470NO_STUFF

C8M910uF

C8M180.01uF

C8M144.7uF

10%

C8M1510uF

C8A30.1uF

10%

C7M110uF

R7M7

4.99k1%

C7M80.01uF

TP8B3

C8M1610uF

R7A15200

NO_STUFF 5%

R7A11200

NO_STUFF

5%

C7M20.01uF

R7A9200

NO_STUFF5%

TP8B5

C8M124.7uF

10%R7A8

3.3K

C8B210uF

C8M30.1uF

10%

R8A20.002

1%

C8M80.1uF

10%

C8M40.01uF

TP8B2

C8M510uF

R7M9 100 NO_STUFF

Q8A2PBSS5540Z

1

3

2 4

R7A17200

NO_STUFF

5%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place close to LPC Slot J8F1

TPM HEADER

Place close to TPM Header J9A2

LPC SLOT

CAD NOTE:

CAD NOTE:

LPC SIDEBAND HEADER

NOTE: SBH definintion pending

D15378 1.501

LPC SLOT, TPM and FPH HEADERS

A


Title


Date: Sheet of


PPV_EEPROM_A1PPV_EEPROM_A0

LPC_AD2 14,24,32,41,42

LPC_AD014,24,32,41,42

LPC_AD214,24,32,41,42

IDE_PATADET 16,39

LPC_AD3 14,24,32,41,42

INT_SERIRQ 16,25,32,42


LPC_AD014,24,32,41,42

LPC_AD1 14,24,32,41,42LPC_AD314,24,32,41,42

SMB_DATA_S4 13,14

LPC_AD1 14,24,32,41,42

SMB_THRM_DATA5,32SMB_BS_CLK24,32,50SMB_BS_DATA24,32,50

SMB_THRM_CLK5,32

L_BKLTSEL0# 19,42

RSMRST#_PWRGD 32

L_BKLTSEL1# 19,42

LPC_FRAME#14,24,32,41,42CLK_PCI_TPM31

SUS_CLK16,41

PM_SUS_STAT# 16,32,42,57

LPC_FRAME#14,24,32,41,42

PM_SUS_STAT#16,32,42,57

PM_DPRSLPVR 7,16,51

PM_CLKRUN# 16,25,26,32,42

PM_CLKRUN# 16,25,26,32,42

BUF_PLT_RST#15,32,33

CLK_REF_LPC31

TPM_DRQ#0 42

BUF_PLT_RST#15,32,33CLK_PCI_LPC 31

BT_DETACH 29,32

SMB_CLK_S413,14

PM_DPRSLPVR7,16,51

PM_SLP_S3#10,32,47,48,49,55,56PM_SLP_S4#16,26,32,46,55,56

SMC_ONOFF#32,54

SMB_BS_ALRT#32,50

SMC_LID32

BC_IINP 32,50BC_ICHG 32,50BC_ACOK 32,50

ATX_DETECT# 32,54


VIRTUAL_BATTERY 32

H_DPRSTP# 3,14

H_CPUSLP# 3,6H_DPSLP# 3,14

PM_RI# 16,42PM_STPCPU# 16,30PM_STPPCI# 16,30PM_CLKRUN# 16,25,26,32,42PCI_PME# 15,25,26

BC_SHDN 32,50

BS_CLR_LTCH# 32,50

BS_CHGB# 32,50BS_CHGA# 32,50

FAN_ON 5,32

BS_DISA# 32,50BS_DISB# 32,50

FWH_TBL# 15,24

LPC_DRQ#142

H_RCIN#14,16,32

BT_WAKE29,32

PATA_PWR_EN#16,39

H_A20GATE14,32

LPC_DRQ#0 42

FWH_WP#15,24

LPCS_PME# 42


H_NMI3,14H_SMI#3,14,58H_PWRGD3,14

PM_PWRBTN#16,32PM_RSMRST#16,32PM_THRM#5,16,32PM_BATLOW#16,32


SMC_RUNTIME_SCI#16,32SMC_WAKE_SCI#16,32SMC_RSTGATE#32

SMC_SHUTDOWN32,54

BT_ON 29,32

IMVP_VR_ON 32

+V5 25,26,27,38,47,54,55,56,58

+V5 25,26,27,38,47,54,55,56,58

+V525,26,27,38,47,54,55,56,58

+V5 25,26,27,38,47,54,55,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.313,14,15,17,25,27,32,33,34,36,38,45,46,55,56

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,38,40,42,45,46,47,48,49,50,54,55,57

+V3.3A17,24,25,26,27,28,29,32,38,40,42,45,46,47,48,49,50,54,55,57

+V12S25,26,28,39,43,44,55,56,58

+V3.3 13,14,15,17,25,27,32,33,34,36,38,45,46,55,56+V3.313,14,15,17,25,27,32,33,34,36,38,45,46,55,56

+V12S25,26,28,39,43,44,55,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A13,14,16,17,24,25,26,27,28,29,32,38,40,42,45,46,47,48,49,50,54,55,57

+V5 25,26,27,38,47,54,55,56,58

SMB_CLK_S413,14

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,38,40,42,45,46,47,48,49,50,54,55,57

SMB_DATA_S4 13,14

TP6H2NO_STUFF

C8G10.1uF

C8G30.1uF

C9A20.1uF

U9N1

AT24C02

123

48

76 5

A0A1A2

GNDVCC

WPSCL SDA

R9B71K

J3F2

8Pin HDR

1 23 45 67 8

TP6H1NO_STUFF C9A10.1uF

C8F322uF

C9A60.1uF

C8G40.1uF

R9B61K

C8F10.1uF

C9N20.1uF

J9A2

2x10-HDR_P4KEY

2

68

13579

111315

10121416

17 1819 20

TP8F1NO_STUFF

KEY

J8F1

60Pin_CardCon

B1 A1B2 A2B3B4

A3

B5A4

B6B7

A5

B8

A6

B9B10

A7

B11

A8

B12B13

A9

B14

A10

B15B16

A11

B17

A12

B18

B20

A13

B21

A14

B22B23

A15

B19

B24

A16

B25B26

A17

B27

A18

B28B29B30

A20

A19

A21A22A23A24A25A26A27A28A29A30

+V12S_1 +12VS_2SUSCLK_32KHz NC(-12V)GND1BT_WAKE

GND2

+V3_3PM_DPRSLPVR

NC3GND3

+V3_1

FWH_WP#

NC1

NC4GND4

GND5

IDE_SPWR_EN#

FWH_TBL#

NC5GND6

BT_DETACH

+V3ALWAYS

GND7

NC6CPU_RESET#

IDE_PATA_DET

KBC_A20_GATE

IDE_SATA_DET

GND8

+V53

+V5_1

LDRQ1#

NC2

LFRAME1#GND9

GND10

LSMI#

LAD2

SERIRQ

LAD0GND11

CLKRUN#

LRST#

GND12

GND13OSC_14MHz+V3_4

+V52

NC7

LDRQ0#GND14

LAD3LAD1

GND15LCLK

LPCPD#GND16

PME#+V3_2

TP8C1NO_STUFF

TP7E1NO_STUFF

C8F422uF

J9G2

LPC Sideband Header - Napa

13579

11131517192123252729313335 36

343230282624222018161412108642

3739

3840

PM_PWRBTN#PM_RSMRST#PM_THRM#PM_BATLOW#PM_SLP_S3#PM_SLP_S4#PM_LAN_ENABLEGND1SMC_RUNTIME_SCI#SMC_WAKE_SCI#SMC_RSTGATE#SMC_ONOFF#SMC_LIDSMC_SHUTDOWNGND2SMB_THRM_CLKSMB_THRM_DATASMB_BS_CLK BS_DISA#

BS_CHGB#BS_CHGA#

RSMRST#_PWRGDBS_CLR_LTCH

GND4BC_SHDNBC_ACOKBC_ICHGBC_IINP

GND3BKLTSEL1#BKLTSEL0#

ATX_DETECT#BT_ON

FAN_ONIMVP_VR_ON

ALL_SYS_PWRGD

SMB_BS_DATASMB_BS_ALRT#

BS_DISB#VIRTUAL_BATTERY


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

D15378 1.501

EMA

A


Title


Date: Sheet of


PSAVE2VLCD1PSAVE1

VLCD2

EMA_ALS_CLK 19,32EMA_ALS_DATA 19,32


EMA_DISP_SEL 32

EMA_DISP_UP 32

EMA_DISP_DOWN 32

EMA_DISP_GESC 32

EMA_DISP_ESC 32

+V3.3 13,14,15,17,25,27,32,33,34,35,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,34,35,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,34,35,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,34,35,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,34,35,38,45,46,55,56

+V3.3 13,14,15,17,25,27,32,33,34,35,38,45,46,55,56

C7J100.1uF

R8W410K

R8V810K

R8V1210K

R8V710K

R8G1010K

J9G1

6Pin_HDR

123456

Mole

x 52

746_

1090

VDD1VDD2RST#SCLSDAVSS

P_SAVE1VLCD1

P_SAVE2VLCD2

J7J2

A05477-005

12345678910 C7J13

0.1uF

C7J111uF

C7J80.1uF

C7J91uF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XDP

CAD NOTE:

Layout note: R3T9 shouldconnect to H_CPURST# withno stub.

Place the XDP connector on theprimary side of the CRB and placeall components near theconnector.

For Intel XDP (Stuff RP1D1 andR1D1, NO_STUFF RP1E1 and R1T1)For Arium XDP (NO_Stuff RP1D1and R1D1, STUFF RP1E1 and R1T1)

D15378 1.501

XDP

A


Title


Date: Sheet of


XDP_OBS3_R

RST_SNS1

XDP_OBS5

XDP_OBS9

XDP_OBS10

XDP_OBS6

L_CLKCTLB7,19

XDP_OBS14

XDP_OBS17

XDP_OBS7

XDP_OBS16

XDP_OBS8

XDP_OBS12XDP_OBS4

XDP_OBS3

XDP_BPM#43

XDP_OBS11

XDP_OBS13

XDP_OBS15

XDP_BPM#03

XDP_BPM#53

XDP_OBS030

XDP_OBS230

XDP_OBS130

CLK_XDP# 30

L_CLKCTLA7,19

CLK_XDP 30

CLK_PCIE_XDP_3GPLL30CLK_PCIE_XDP_3GPLL#30

XDP_TDO 3

H_CPURST# 3,6

XDP_TRST# 3

XDP_TMS 3XDP_TDI 3

XDP_DBRESET# 3,54,58

XDP_TCK3

+V1.05S 3,4,6,9,10,14,17,30,45,48,53,56,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V1.05S3,4,6,9,10,14,17,30,45,48,53,56,58

XDP_OBS20

+V1.05S3,4,6,9,10,14,17,30,45,48,53,56,58

H_PWRGD_XDP3R1R2 54.9 1%

R6Y1 1K

J1E1

CONN60_ITP-XDP

8

14

13

2

75

911

1517

13

19

25

313335

2729

2123

47

3739414345

495153555759

20

26

38

50

60

32

46

2224

1012

1618

2830

3436

4042444648

52545658

GND3

GND5

GND0OBSFN_A0

GND1

GND2OBSFN_A1

OBSDATA_A0OBSDATA_A1

OBSDATA_A2OBSDATA_A3

GND4

GND6

GND8

GND10OBSDATA_B2OBSDATA_B3

OBSDATA_B0OBSDATA_B1

OBSFN_B0OBSFN_B1

HOOK3

GND12PWRGOOD/HOOK0HOOK1VCC_OBS_ABHOOK2

GND14SDASCLTCK1TCK0GND16

GND7

GND9

GND13

GND15

GND17

GND11

OBSFN_C0OBSFN_C1

OBSFN_D0OBSFN_D1

OBSDATA_C0OBSDATA_C1

OBSDATA_C2OBSDATA_C3

OBSDATA_D0OBSDATA_D1

OBSDATA_D2OBSDATA_D3

ITPCLK/HOOK4ITPCLK#/HOOK5

VCC_OBS_CDRESET#/HOOK6

DBR#/HOOK7

TDOTRSTn

TDITMS

R1T1 0NO_STUFF

R2R554.91%

C1R20.1uF

R1D1 0

C1R10.1uF

R1R1 54.9 1%

R3T9 1K 1%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Circuitry provides an interrupt to the SMC every1s while in suspend (this allows the SMC tocomplete housekeeping functions whilesuspended)

Spare gates

CBTD has integrateddiode for 5V to 3.3Vvoltage translation

NMI JumperNOTE: Shunt J9H1 forSMC Programming

1Hz Clock DisableEnable

J9H1 ShuntNo Shunt (Default)

Scan Matrix Key Board

Spare

Boot BlockProgrammingNORMAL SHUNT (DEFAULT)

Program NO SHUNT

J9G3

D15378 1.501

PS2

A


Title


Date: Sheet of


GP_DATAGP_CLK

TP_INVD2

PS

2_P

WR

_L

SMC_INIT_CLK2

SMC_RST SMC_INITCLK#

MOUSE_DATA

INVD2

SMC_INIT_CLK1

SMC_INIT_CLK4

L_PS2_PWR KBD_DATA

SMC_RST#_D

MOUSE_CLK

KBD_CLK

OE#_PS2

KBC_SCANIN0KBC_SCANIN3 KBC_SCANIN2

KBC_SCANIN7KBC_SCANIN4KBC_SCANIN5KBC_SCANIN6

KBC_SCANIN1

KBC_SCANOUT6

KBC_SCANOUT1 KBC_SCANOUT0

KBC_SCANOUT13

KBC_SCANOUT2KBC_SCANOUT4

KBC_SCANOUT9

KBC_SCANOUT12

KBC_SCANOUT3

KBC_SCANOUT14

KBC_SCANOUT5

KBC_SCANOUT11 KBC_SCANOUT10

KBC_SCANOUT7

KBC_SCANOUT15

KBC_SCANOUT8

L_K

BD

_CLK

KBD_CLK

MOUSE_CLK

L_GP_CLK

L_MOUSE_CLK

GP_CLK

L_K

BD

_DA

TA

KBD_DATA

L_MOUSE_DATA

GP_DATA

MOUSE_DATA

L_GP_DATA

SMC_INIT_CLK3 SMC_INITCLK_J

KBC_GP_CLK32

KBC_KB_CLK32

KBC_MOUSE_CLK32

KBC_GP_DATA32

KBC_KB_DATA32

KBC_MOUSE_DATA32

NMI_GATE32

KBC_SCANOUT[15:0] 32

KBC_SCANIN[7:0] 32

SMC_RST# 32

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,40,42,45,46,47,48,49,50,54,55,57

+V5 25,26,27,35,47,54,55,56,58

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,40,42,45,46,47,48,49,50,54,55,57

+V525,26,27,35,47,54,55,56,58

+V5 25,26,27,35,47,54,55,56,58

+V5 25,26,27,35,47,54,55,56,58

+V5 25,26,27,35,47,54,55,56,58

+V5 25,26,27,35,47,54,55,56,58

+V5 25,26,27,35,47,54,55,56,58

+V525,26,27,35,47,54,55,56,58

+V5 25,26,27,35,47,54,55,56,58

+V3.313,14,15,17,25,27,32,33,34,35,36,45,46,55,56 +V3.3 13,14,15,17,25,27,32,33,34,35,36,45,46,55,56

SMC_INITCLK 32

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,40,42,45,46,47,48,49,50,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,40,42,45,46,47,48,49,50,54,55,57

U9G1C74HC04

5 6

7

14

C1A522uF

J9G3

RP1B1D4.7K

45

FB1A260ohm@100MHz

C7M1547pF5%

R9G12100K

CP1B1A47PF

1

8

CP1B1C

47PF

3

6

CP1B1D47PF

4

5

R9V2

4.7K

R9J21M

+

F1B11.1A

C1A647pF

U9G1F74HC04

13 12

7

14

C9V1

0.1uF

J9H1

FB1A560ohm@100MHz

R9F3 100

J9E1

2x15-SHD-HDR

135791113151719

2468

10121416

202123252729

22

18

24262830

C7B10.1uF

RP1B1B4.7K

27

FB1A460ohm@100MHz

Q9W2

BSS138

3

1

2

U9G1E74HC04

11 10

7

14

FB1A860ohm@100MHz

U9V1

MAX809

1

2

3G

ND

RST#

VC

C

RP1B1C4.7K

36

RP1B1A4.7K

18

RP1B2B4.7K

27

U9G1D74HC04

9 8

7

14

FB1A631Ohm@100MHz

FB1A760ohm@100MHz

C9G1

4.7uF

FB1A360ohm@100MHz

CP1B1B

47PF

2

7

Q9J2

BSS138

3

1

2

C1B1

0.1uF

RP1B2C4.7K

3 6

R9V1100K

R7A21100

U9G1B74HC04

3 4

7

14

RP1B2D4.7K

4 5

RP1B2A4.7K

18

U7B1

SN74CBTD3384

3

7

11

17

21

4

8

14

18

22

113

2

6

10

16

20

5

9

15

19

23

24

12

1A1

1A3

1A5

2A2

2A4

1A2

1A4

2A1

2A3

2A5

1OE#2OE#

1B1

1B3

1B5

2B2

2B4

1B2

1B4

2B1

2B3

2B5

VCC

GND

J1A1

DUAL_PS2

1

2

3

4

5

6

7

8

9

10

12

11

131415 16

17

U9G1A74HC04

1 2

7

14


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Spare 74HC14 Inverter

J7J3Shunt (Default)No Shunt

Hotswap StatusEnabled Disabled

D15378 1.501

IDE


Title


Date: Sheet of


IDE_PDD9

PATA_PWR_EN#_J

IDE_PDD11

PATA_PWR_EN_2#

IDE_PDD6IDE_PDD7

IDE_PDD14

IDE_PDD10IDE_PDD5

IDE_PDD13

IDE_PDD15

IDE_PDD2

IDE_PD_CSEL

IDE_PDD1PATA_PWR_EN_2

IDE_PDD4IDE_PDD12IDE_PDD3

IDE_PDD8IDE_D_PRST#_R

IDE_PDD0

PATA_PWR_EN_1#

PATA_12V_EN_2

IDE_D_PRST# IDE_D_PRST#_R

PATA_5V_EN_2PATA_5V_EN_1

74HC14_SP9

PATA_PWR_EN#_J

PATA_12V_EN_1

PATA_PWR_EN_1#

IDE_PDD[15:0] 14IDE_PDD[15:0]14

IDE_PDIOR#14

IDE_PDDACK#14

IDE_PDA114IDE_PDA014IDE_PDCS1#14

IDE_PDCS3#14

IDE_PDIOW#14

IDE_PDA214

PATA_PWR_EN#16,35

IDE_PATADET 16,35INT_IRQ1414

IDE_PDACTIVE#14

IDE_PDDREQ14

IDE_PDIORDY14

+V5S5,10,17,18,19,20,25,26,41,43,44,45,47,51,52,54,55,56

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,42,43,44,45,47,48,49,51,54,55,56,57,58

+V5S 5,10,17,18,19,20,25,26,41,43,44,45,47,51,52,54,55,56

+V5S 5,10,17,18,19,20,25,26,41,43,44,45,47,51,52,54,55,56

+V12S_PATA

+V5S_PATA

+V5S_PATA

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,42,43,44,45,47,48,49,51,54,55,56,57,58

+V12S25,26,28,35,43,44,55,56,58+V5S5,10,17,18,19,20,25,26,41,43,44,45,47,51,52,54,55,56

+V5S 5,10,17,18,19,20,25,26,41,43,44,45,47,51,52,54,55,56

C4J5

0.1uF

SI4925DY

Q5J1A

1

2

7 8

R7H24.7K

R6J2

470

C4H70.1uF20%

R5J7

1M

C4J6

0.1uF

R5J61M

C4J7

22uF

C5J11000pF

10%

Q4H13SI3433DV

3

1

42 5 6

74HC14

U4H1D

9 8

147

C4J2

0.1uF

+ C5J2

100uF

R4Y3100K

+ C4J315uF

Q4H15BSS138

3

1

2

R7J121M

R4W71M

R7J1110K

R4W91M

Q4H12BSS138

31

2

R7W98.2K

C4J10.1uF10%

C4W21000pF10%

R7J2

47

74HC14

U4H1C

5 6

147

R4Y61M

74HC14

U4H1A1 2

147

J7J1

20x2-HDR

214368

5

107

1214

9

16

11

18

13

22

15

2426

17

28

19

3032

21

34

23

3638

25

40

27293133353739

Q4H14BSS138

3

1

2

C4J4

0.1uF 12V

GND1

GND2

5V

J4J2

4Pin_HD_PWR-CON

1

2

3

4

74HC14

U4H1B3 4

147

J7J3

R4W6100K

R6J110K

SI4925DY

Q5J1B

3

4

5 6

R4J2100K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Back of ChassisBack of Chassis FPIO/Duckbay Back of Chassis FPIO/DuckbayBack of Chassis FPIO/Duckbay Back of Chassis

USB Port Location

Table: USB Port Routing Locations

USB Port 0USB Port 1 USB Port 2 USB Port 3 USB Port 4USB Port 5 USB Port 6 USB Port 7

RJ45 10/100 with DualUSB Connector

Spare

Triple USBConnector

D15378 1.501

USB 2.0


Title


Date: Sheet of


USBD+

USBE+

USBD_VCC

USBE-

USBD-

USBE_VCC

USBPWR_CONND

EN2_EEN1_E USBPWR_CONNE

USBA-

EN1_B

USBPWR_CONNA

USBC-

EN1_A

USBC_VCC

USBC+

USBB+USBB-

USBPWR_CONNC

USBB_VCC

USBA_VCC

USBA+

EN2_A

EN2_B

USBPWR_CONNB

USB_PN515

USB_PP715

USB_PN715

USB_PP515

USB_PN115

USB_PN315

USB_PN015

USB_PP315

USB_PP115

USB_PP015

USB_OC#7 15

USB_OC#5 15

USB_OC#3 15

USB_OC#1 15

USB_OC#0 15

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,42,45,46,47,48,49,50,54,55,57

+V5A 17,29,46,47,48,49,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,42,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,42,45,46,47,48,49,50,54,55,57

+V5A 17,29,46,47,48,49,54,55,57

+V5A 17,29,46,47,48,49,54,55,57

L5A2

90@100MHz

2 3

1 4

R4M4 1K

C4A4

0.1uF

+ C3A3220uF10%

12

Clamping-Diode

CR3A4

21

RP3B1A

10K

18

+ C4A5220uF10%

12

TOPPORT

MIDDLEPORT

BOTTOMPORT

J3A1

3_stack_USB

1234

5678

9101112

13141516

VCC1P#0P0GND1

VCC2P#1P1GND2

VCC3P#2P2GND3

GND4GND5GND6GND7

L3B2

90@100MHz

2 3

1 4

U4M2

TPS2052

1234 5

678GND

INEN1EN2 OC2#

OUT2OUT1OC1#

R4A4 1K

R3N2 1K

FB4A350OHM

FB4A150OHM

L5A1

90@100MHz

2 3

1 4

FB3B350OHM

R4A3 1K

RP3B1B

10K

27

+ C4A1220uF10%

12

U4A2

TPS2052

1234 5

678GND

INEN1EN2 OC2#

OUT2OUT1OC1#

+ C3A2220uF10%

12

Clamping-Diode

CR3A2

21

J5A1B

RJ45 1000 WITH DUAL USB

1234

5678

VCC1P0#P0GND1

VCC2P1#P1GND2

R4M5 1K

Clamping-Diode

CR5A1

21

Clamping-Diode

CR5A2

21

R4A210K

Clamping-Diode

CR5A3

21

L3B1

90@100MHz

2 3

1 4

C3M2

470PF

R3N1 1K

RP3B1C

10K

36

+ C4B2220uF10%

12

FB3B450OHM

Clamping-Diode

CR3A6

21

C3M3

470PF

C3M1

470PF

C3N1

0.1uF

L3B3

90@100MHz

2 3

1 4

Clamping-Diode

CR3A1

21

R4A110K

Clamping-Diode

CR3A3

21

RP3B1D

10K

4 5

C4A2

470PF

Clamping-Diode

CR3A5

21

Clamping-Diode

CR5A4

21

FB4A250OHM

C4A3

470PF

C4M5

0.1uF

U3B1

TPS2052

1234 5

678GND

INEN1EN2 OC2#

OUT2OUT1OC1#


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Low Nibble (Right)

Low Nibble (Right)

PORT 80-83 DISPLAY

High Nibble (Left)

PORT 80, 82

High Nibble (Left)

PORT 81, 83

J7E1Shunt

Port82 - 83

80 - 81 No Shunt (Default)

One 0.1uf cap per Display Segment

D15378 1.501

PORT 80-83

A


Title


Date: Sheet of


LED_SEGF

7SE

G_L

ED

_CT3

LED_SEGC

LED_SEGG

LED_SEGC

LED_MUX_LO80_D

LED_SEGELED_SEGE

LED_SEGDP

SU

S_C

LK_Q

LED_SEGB

LED_SEGD

LED_SEGF LED_SEGF

LED_SEGA

LED_SEGDP

LED_SEGD

LED_SEGBLED_SEGDP

PLD_PD

LED_SEGD

LED_MUX_HI80_DLED_MUX_HI80

LED_MUX_HI80

LED_SEGG

LED_SEGA

LED_MUX_HI81

LED_SEGB

LED_MUX_LO81

LED_SEGE

LED_SEGB

7SE

G_L

ED

_CT4

7SE

G_L

ED

_CT2

LED_MUX_LO80

LED_SEGC

LED_SEGG

LED_SEGALED_SEGA

LED_MUX_HI81

LED_MUX_LO80

LED_SEGF

LED_SEGD

LED_SEGDP

LED_SEGD

LED_SEGB

LED_SEGG

LED_MUX_LO81

LED_MUX_LO81_D

LED_SEGE

LED_SEGA

LED_SEGE

LED_SEGDP

7SE

G_L

ED

_CT1

LED_SEGF

LED_SEGC

PORT82_EN#

LED_SEGC

LED_SEGG

LED_MUX_HI81_D

OE#_PORT80

OE#_PORT80LPC_AD0_D

OE#_PORT80

OE#_PORT80

OE#_PORT80LPC_AD2_D

LPC_AD1_D

LPC_AD3_D

LPC_AD1_D

LPC_AD3_DLPC_AD2_D

LPC_AD0_D

LED_SEGF

LED_SEGD

LED_SEGA

LED_SEGC

LED_SEGE

LED_SEGB

LED_SEGG

LED_SEGDP

LPC_FRAME# 14,24,32,35,42

LPC_AD214,24,32,35,42

LPC_AD014,24,32,35,42 LPC_AD1 14,24,32,35,42

LPC_AD3 14,24,32,35,42

SUS_CLK16,35

CLK_PCIF_PORT8031PLT_RST#7,13,15,24,28,32,42,57

+V5S5,10,17,18,19,20,25,26,39,43,44,45,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,43,44,45,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,43,44,45,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,43,44,45,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,43,44,45,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,43,44,45,47,51,52,54,55,56

RP7A1A 330

1 8

RP6A2A 1501 8

R7T1100

RP6A2B 1502 7

U7D10

EPM7064STC

444342353433323130282726252322212019181514131211108765321

4162436

9172941

3739

3840

IO32IO31IO30IO29IO28IO27

TDO/IO26IO25IO24IO23IO22

TCK/IO21IO20IO19IO18IO17IO16IO15IO14IO13IO12IO11IO10IO9IO8IO7

TMS/IO6IO5IO4IO3IO2

TDI/IO1

GND1GND2GND3GND4

VCC1VCC2VCC3VCC4

GCLK1GCLR#

OE1OE2/GCLK2

CR6A4

7-SEG-LED-DISPLAY

11085423

6

7

9

ABCDEFG

AN_DP

CT_DP

CT_COM

RP7A1C 330

3 6

RP6A1C 330

3 6

J7E1

RP6A2C 1503 6

R7T51K

RP6A1D 330

4 5

Q7E1BSS138

3

1

2

C6M10.1uF20%

CR6A3

7-SEG-LED-DISPLAY

11085423

6

7

9

ABCDEFG

AN_DP

CT_DP

CT_COM

RP6A1B 3302 7

Q6A42N3904

1

3

2

RP7A1D 330

4 5

U7D4

SN74CBTD3306

1234

8765

1OE#1A1BGND

VCC2OE#

2B2A

C6M20.1uF 20%

C6M30.1uF 20%

R7T2 10K

C7R100.1uF20%

CR6A2

7-SEG-LED-DISPLAY

11085423

6

7

9

ABCDEFG

AN_DP

CT_DP

CT_COM

RP6A1A 330

1 8

RP7A1B 3302 7

Q6A12N3904

1

3

2

C7H810uF20%

U7D5

SN74CBTD3306

1234

8765

1OE#1A1BGND

VCC2OE#

2B2A

C6M40.1uF 20%

Q6A32N3904

1

3

2

C7R60.1uF20%

Q6A22N3904

1

3

2

RP6A2D 1504 5

C7R80.1uF20%

CR6A1

7-SEG-LED-DISPLAY

11085423

6

7

9

ABCDEFG

AN_DP

CT_DP

CT_COM


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LPC HOT DOCKING

Default:1 - 2

Default:

00 = 0x002E01 = 0x004E10 = 0x162E11 = 0x164E

Base Address:

11= 0x164E

SMSC PORT-SWITCH

D15378 1.501

SIO

A


Title


Date: Sheet of


SIO_RST#RST_PD

SER_DTRA#

SER_RTSA#

SER_DTRA#

AND_DRQ#0

SER_RTSA#

LPCD_OPNREQ_OUT#

D_LDRQ1

D_CLK_33

D_LAD_1

D_SER_IRQ

LPCD_OPNREQ#

D_CLK_14

D_LFRAME

D_CLKRUN

LPCD_OPNREQ#

D_LAD_0 D_LAD_2D_LAD_3

LPCD_PWREN#

D_LDRQ1D_LFRAME

D_LAD_2

TP_GPIO32

TP_SIO_GPIO13

D_CLK_14

SIO_DRQ#1

LPCD_OPNREQ_OUT#

D_CLKRUN

D_LAD_1

LPCD_PWREN#

D_LAD_0

D_SER_IRQ

SIO_DRQ#0

D_LAD_3

SIO_RST#

TP_GPIO33D_CLK_33

LPC_AD0 14,24,32,35,41LPC_AD1 14,24,32,35,41LPC_AD2 14,24,32,35,41LPC_AD3 14,24,32,35,41


IR_MODE45

LPCD_PWRGD57

LPC_FRAME# 14,24,32,35,41

PM_CLKRUN# 16,25,26,32,35

CLK_REF_SIO 31CLK_PCI_SIODOCK 31

LPCD_PD# 57

PM_SUS_STAT# 16,32,35,57

LPCD_RST# 57

PLT_RST#7,13,15,24,28,32,41,57

IR_RXD45

RS232_RI#45LPCS_PME#35LPCD_RI#57

SER_SINA 45

CLK_PCI_SIO 31

LPC_DRQ#135

SER_RIA# 45

LPC_DRQ#035

SER_DCDA# 45

SER_DTRA# 45SER_RTSA# 45

TPM_DRQ#035

LPCD_LPCPD#57

PM_RI# 16,35

LPCD_PCI_PME# 57

LPCD_LPCRST#57

IR_TXD45


RS232_EN45

L_BKLTSEL1#19,35

ICH_DRQ#1 14

SER_CTSA# 45SER_DSRA# 45

ICH_DRQ#0 14

SER_SOUTA 45

LPCD_PWRGD57

LPCD_SMC_EXTSMI#57

KSC_LPC_DOCK#32

IRDA_CIR_SLT45

L_BKLTSEL0#19,35

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,45,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,45,46,47,48,49,50,54,55,57

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,43,44,45,47,48,49,51,54,55,56,57,58

CON3_HDR

J7E3

32

1

C7V170.1uF

C7T90.1uF

R7E6 10K

R7E7 10K

NO_STUFF

U9F1

MAX6816

4

3

1

2

VCC

OUT

GND

IN

R7E5 10K

R9G1100K

C7T70.1uF

R7T78.2K

C7T100.1uF

R9E2100K

C7T50.1uF

C7E222UF

R9F12100K

U8E4

74AHC1G08

1

24

53

C9F1

0.1uF

R8E410K

GENERAL PURPO

SE I/O

UART2IR

POW

ER & GRO

UND

LPC

INTE

RFAC

EDO

CKIN

G L

PCIN

TERF

ACE

UART

1

U7E4

LPC47N207-JN_Follow-On

517314260

82029374562

48

27283032333435363839404143444661

495051

64247142412222516

21

1947

1023

63136131115

918

26

53

5557

56

52

54

5958

VCC1VCC2VCC3VCC4VCC5

VSS1VSS2VSS3VSS4VSS5VSS6

VTR

GPIO10GPIO11GPIO12/IO_SMI#GPIO13/IRQIN1GPIO14/IRQIN2GPIO15GPIO16GPIO17GPIO30GPIO31GPIO32GPIO33GPIO34GPIO35GPIO36GPIO37

IRTX2IRRX2IRMODE/IRRX3

LAD(0)LAD(1)LAD(2)LAD(3)

LFRAMELDRQ0LDRQ1

PCI_RESETLPCPD

CLKRUN

PCI_CLK

SER_IRQIO_PME

LPC_CLK_33SIO_14M

DLAD(0)DLAD(1)DLAD(2)DLAD(3)

DLFRAMEDLDRQ1

DCLKRUN

DLPC_CLK_33DSER_IRQ

DSIO_14M

TXD1

RTS1#/SYSOPT0DTR1#/SYSOPT1

CTS1

RXD1

DSR1

DCD1RI1

C7T60.1uF

R8T510K

U8F1

74AHC1G08

1

24

53

C7T80.1uF

U8E3

74AHC1G08

1

24

53

R7E8 10K

NO_STUFF

R7F110K

C7U10.1uF

J9E2

2X12-HDR_SHRD

13 4

2

579

86

1011131517192123 24

222018161412

R8E310K

R7T910K

C7U30.1uF

R8T610K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SATA Port 0, Cable Connect_Power

D15378 1.501

SATA (1 of 2)


Title


Date: Sheet of


SATA_12V_EN0_2

SATA_3.3V_EN0_1

SATA_5V_EN0_1

SATA_12V_EN0_1

SATA_5V_EN0_2SATA_PWR_EN#0_5V

SATA_PWR_EN#0_5V

SATA_PWR_EN#0_5V

SATA_3.3V_EN0_2

SATA_TXN014

SATA_PWR_EN#016

SATA_TXP014

SATA_RXP014SATA_RXN014

+V12S25,26,28,35,39,44,55,56,58

+V12S_SATA_P0

+V3.3S_SATA_P0

+V5S5,10,17,18,19,20,25,26,39,41,44,45,47,51,52,54,55,56

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,44,45,47,48,49,51,54,55,56,57,58

+V5S5,10,17,18,19,20,25,26,39,41,44,45,47,51,52,54,55,56

+V5S_SATA_P0

C7H91000pF

R7H171M

C7J2

0.1uF

74HC14

U4H1E

11 10

147

SI4925DY

Q8H3B

3

4

5 6

R6H21M

C8W40.1uF

SI4925DY

Q8H3A

1

2

7 8

+ C7H7

100uF

C6H922uF

J7H1

SATA_Signal_Plug

23

56

14

7

TXTX#

RX#RX

GND1GND4

GND7

C7J1

22uF

C7J30.1uF

R8J5

1M

C6J10.1uF

Q4H7BSS138

3

1

2

J6H3

SATA_POWER_CONNECTOR

12

34

5

67

89

10

V_3.3_1V_3.3_2

V_5_1V_5_2

V_12_1

GND_1GND_2

GND_3GND_4

GND_5R8J71M

SI2307DSQ6H1

1

32

Q7H1

BSS138

3

1

2

+ C8H115uF

Q6H2SI3433DV

3

1

4256

R6H41M

C8J21000pF

C7J5

0.1uF

R7H161M

C6H31000pF

C7J40.1uF

R4W4100K

Q7H22N7002

3

1

2


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CAD Note: Place thisconnector on the edge ofCRB for hot plug support

SATA Device Status PresenceRemoved

J9J3 Shunt (Default)No Shunt

Hot plug implemented on Port 2 only

This jumper simulates the drive status. For proper functionof the hot plug, this jumper must be "No Shunt" when driveis removed and "Shunt" after the drive is plugged in.

+V12S is only for desktop type SATA devices

SATA Port 2,DirectConnect

J5H2Shunt (Default)No Shunt

Hotswap StatusEnabled Disabled

D15378 1.501

SATA (2 of 2)


Title


Date: Sheet of


TP_SATA_RESEV

SATA_5V_EN2_1

SATA_3.3V_EN2_3SATA_3.3V_EN2_2

SATA_5V_EN2_2

SATA_PWR_EN#2_5V

SATA_12V_EN2_2

SATA_PWR_EN#2_5V

SATA_12V_EN2_1

V_3.3_3_PC

V_5.0_7_PC

V_12_13_PC

SATA_PWR_EN#2_J

SATA_TXN214SATA_TXP214

SATA_RXN214

SATA_DET#216,32

SATA_RXP214

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,45,47,48,49,51,54,55,56,57,58

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,45,47,48,49,51,54,55,56,57,58

+V5S_SATA_P2

+V5S 5,10,17,18,19,20,25,26,39,41,43,45,47,51,52,54,55,56

+V3.3S_SATA_P2

+V12S25,26,28,35,39,43,55,56,58

+V5S5,10,17,18,19,20,25,26,39,41,43,45,47,51,52,54,55,56

+V12S_SATA_P2

SATA_PWR_EN#216

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,45,47,48,49,51,54,55,56,57,58

R8J61M

R8J41M

Q9Y1SI3433DV

3

1

4256

R5H441M

C8J5

22uFR4W5100K

C8J11000pF

C9J11000pF

+ C9J215uF

C8Y11000pF

C8J9

0.1uF

R8J11M

J9J3

C8J10

0.1uF Q4H10

BSS138

3

1

2

Q8J1BSS138

3

1

2

R8Y3 1

TP9H1 NO_STUFF

R8J31M

R8J21M

R8J9 4.3

R9Y25.1

5%

SI2307DSQ9J3

1

32

J5H2

Q9J12N7002

3

1

2

R9J51M

C8J8

0.1uF

R5H4310K

C9J3

0.1uF

SI4925DY

Q8H4B

3

4

5 6

U4H1F

74HC14

13 12

147

J8J2

Serial ATA Recepticle

2356

89

10

1516

14

18

2122

20

17

19

147

1213

11

TXTX#RX#RX

V_3.3_1V_3.3_2V_3.3_3_PC

V_5.0_8V_5.0_9

V_5.0_7_PC

P_Reserve_11

V_12_14V_12_15

V_12_13_PC

GND_2m_P_10

GND_1m_P_12

GND_2m_S_1GND_2m_S_4GND_2m_S_7

GND_2m_P_5GND_2m_P_6

GND_1m_P_4

SI4925DY

Q8H4A

1

2

7 8

C9J4

0.1uF

C8Y2

22uF

+ C8J4

100uF

R9H2043K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RS-232 TRANSCEIVER

SERIAL PORT CONNECTOR

SIO VID VOLTAGE TRANSLATION

IR

CAD NOTE:Place nearU1B1 &U1B3

In Ckt H8 Programming DisableEnable

J7A3 and J7A41-2 (Default)2-3 (In Ckt Programming)

Spare

D15378 1.501

Legacy Support

A


Title


Date: Sheet of


SERBUF_DTRA

VID_COMP

SERBUF_RTSA

SERBUF_SINA#

SERBUF_C2-

VID_COMP

SERBUF_V-

SERBUF_V+

SERBUF_C2+

SERBUF_CTSA

SERBUF_SOUTA#

SERBUF_DCDA

VID_COMP

SERBUF_DSRA

SERBUF_RIA

VID_COMP LED

_VID

0

LED

_VID

1

LED

_VID

2

LED

_VID

3

LED

_VID

4

LED_A

SER_ON

SER_RIA

CIR_TXD

IRDA_TXD

SER_KBCPROG_RX_IN

TX_OUTSERBUF_SOUTA#

SERBUF_SINA#RX_IN

SER_TX_OUT

TX_OUT

SERBUF_DTRASERBUF_RIA

SERBUF_DSRA

SERBUF_CTSA

RX_IN

SERBUF_DCDA

SERBUF_RTSASERPRT_RX_IN

SERPRT_TX_OUTSERPRT_CTSA

SERPRT_RIASERPRT_DTRA

SERPRT_DCDASERPRT_DSRA

SERPRT_RTSA

SERBUF_C1+

SERBUF_C1-

C2+4

C1-3

V_C_6

SER_KBCPROG_RX_IN

SER_TX_OUT

C2-5

V_C_2

C1+1

VID_0_D

VID_COMP

VID_COMP

SIO_VID1

VID_COMP

LED

_VID

5

LED

_VID

6

SIO_VID6

VID_1_D

VID_2_D

VID_3_D

VID_4_D

VID_5_D

VID_6_D

SIO_VID0 SIO_VID3

SIO_VID4

SIO_VID5

SIO_VID6

SIO_VID4

SIO_VID3SIO_VID2

SIO_VID5

SIO_VID2

SIO_VID1

SIO_VID0

U1C1D_SPARE

VID_COMP

IR_MODE42

VR_VID051

SER_SOUTA42SER_DTRA#42

SER_RTSA#42

IR_TXD42

RS232_EN42

IRDA_CIR_SLT42

KBC_PROG_TX#19,32

VR_VID151

VR_VID251

VR_VID351

VR_VID451

VR_VID551

VR_VID651

RS232_RI#42

SIO_VID0 32

SIO_VID1 32

SIO_VID2 32

SIO_VID3 32

SIO_VID4 32

SIO_VID5 32

SIO_VID6 32

SER_SINA42

SER_DCDA#42SER_DSRA#42

SER_RIA#42

IR_RXD42

SER_CTSA#42

KBCPROG_RX#32

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,47,48,49,51,54,55,56,57,58

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V1.05S 3,4,6,9,10,14,17,30,37,48,53,56,58

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V3.3 13,14,15,17,25,27,32,33,34,35,36,38,46,55,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,47,48,49,51,54,55,56,57,58

+V3.313,14,15,17,25,27,32,33,34,35,36,38,46,55,56

+V5S 5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,46,47,48,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,46,47,48,49,50,54,55,57

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,47,51,52,54,55,56

+

-

U1B1B

LM339

7

61

3

12

U4M1

NON-INV DMUX

123 4

56S

GNDA Y1

VCCY0

CR1C1GREEN

12

R1N1810K

R1N24330

C7M922UF

FB2A4A60OHM-100MHZ

1 8

R1N2210K

CR1B4GREEN

12

C7A4 0.1uF

+

-

U1B1C

LM339

9

814

3

12

R1P21K

1%

+

-

U1B3D

LM339

11

1013

3

12

U7A1

MAX3232_RS232_TRNCVR

161

3

4

5

2

6

11

12

14

13

1510 7

9 8

VCCC1+

C1-

C2+

C2-

V+

V-

T1IN

R1OUT

T1OUT

R1IN

GNDT2IN T2OUT

R2OUT R2IN

C1N10.1uF

R1N7330

FB2A4D4 5

R4M210K

C6B50.1uF

CR1B6GREEN

12

R1N28

1K

R1N10330

Q7C1

BSS138

31

2

R1P8

1K

+

-

U1B1D

LM339

11

1013

3

12

+

-

U1B1A

LM339

5

42

3

12

+

-

U1B3B

LM339

7

61

3

12

C7M6 0.1uF

R1P6

1K

1%

R1P3330

C6B30.1uF

C6B10.1uF

FB2B1D

60OHM-100MHZ

4 5

R1N17330

R4M110K

R1P7

1K

FB2B1A1 8

R7M510K

R1N810K

+ C4M46.8uF

C6N70.1uF

FB2B1B2 7

C6B222UF

R4M32.74 1%

U4A1

HSDL-3003#007

78

654321 9

TXD_RCGND

VCCSDRXD_IRDATXD_IRDANCLED_A MNT

R7C21K

C7M30.1uF

C6N60.1uF

FB2A4B2 7

U6B2

MAX3243

26

28

24

1

2

27

3

141312

20

18171615

19

91011

45678

232221 25

VC

C

C1+

C1-

C2+

C2-

V+

V-

T1INT2INT3IN

R2OUTB

R2OUTR3OUTR4OUTR5OUT

R1OUT

T1OUTT2OUTT3OUT

R1INR2INR3INR4INR5IN

FORCEONFORCEOFF#INVALID# GND

R1N16

1K

C4M30.47uF

C4M10.1uF

10%

CON3_HDR

J7A3

32

1

R1N19

1K

CR1B3GREEN

12

CR1B1GREEN

12

CON3_HDR

J7A4

32

1

R1N1110K

R1N26330

R1N21330

C1P10.1uF

C7A3 0.1uF

FB2B1C3 6

CR1B2GREEN

12

+ C4M26.8uF

CR1B5GREEN

12

R1P5 10K

R1N2710K

R1N13

1K

+

-

U1B3A

LM339

5

42

3

12

+

-

U1B3C

LM339

9

814

3

12

R1N12

1K

C1N40.1uF

GNDRIDTRCTSTXDRTSRXDDSRDCD

J2A2A

2IN1

594837261

R1P410K

C7A2 0.1uF

FB2A4C3 6

R1N2510K

R6N81K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR2 VREG

Vout = 1.8VIout = 10A


D15378 1.501

DDR VR (1 of 2)

A


Title


Date: Sheet of


DDR_DCS1P

DDR_HDR2

DDR_DCS1N

DDR_DCS1N

DDR_DCS1PDDR_SKIP1

DDR_SKIP2

DDR_BST1

DDR_DCS2P

1.8PWRGD

0.9_VIN

DDR_LX1

DDR_HDR1_RDDR_HDR1

DDR_DCS2P

DDR_LDR1

DDR_VSET1

DDR_DCS2N

DDR_DCS2N

1.8PWRGD

DDR_SLEW1

DDR_SLEW2

ON2

DDR_VDDA

DDR_VIN

1.8PWRGD

0.9PWRGD

DDR_VSET1

DDR_VSET2

DDR_VSET2

DDR_LX2

DDR_HDR2_R

DDR_LDR2

1.8_VIN

DDRVR_PWRGD

DDR_BST_VDD

DDR_BST2

DDR_EVMC_V_CNTL 58

PM_SLP_S4#16,26,32,35,55,56

PM_SYS_PWRGD47,49PM_PWROK 48

+V0.9 23,56,58

+V5A17,29,40,47,48,49,54,55,57

+V1.87,9,21,22,34,47,56,58

+DDR_VREF

+V5A17,29,40,47,48,49,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,47,48,49,50,54,55,57

+V5A 17,29,40,47,48,49,54,55,57

+VBATA 48,49,54,55

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,47,48,49,50,54,55,57+V3.313,14,15,17,25,27,32,33,34,35,36,38,45,55,56

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,47,48,49,50,54,55,57

+DDR_VREF+V1.87,9,21,22,34,47,56,58

+VBATA48,49,54,55

+VBATA48,49,54,55

+V5A17,29,40,47,48,49,54,55,57

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

AGND_DDR

R5M2

0.002 1%

R5B6 0 NO_STUFF

C5N21000pF

C4B10

150uF6.3V, 3Arms

CR4N1BAT54A

2

1

3

R4B651.1_1%

C5N1

10uF25V

R5B91K

Q5N1IRF7811A

4

5 6 7 831 2

R5N60NO_STUFF

U5N1

74AHC1G08

1

24

53

C4C19

150uFNO_STUFF6.3V, 3Arms

DC-DC CONTROLLER

EU4B1

OZ824345678

9 10 11 12 13 14 1617181920

2221

2324

2526272829303132

15

21

33

VINVREFGNDA1VDDACEON1

VS

ET1

SK

IP1

SLE

W1

CS

1NC

S1P

PW

RG

D1

HD

R1

BST1GNDP1

LDR1VDDP1

LDR2VDDP2

GNDP2BST2

HD

R2

LX2

PW

RG

D2

CS

2PC

S2N

SLE

W2

SK

IP2

VS

ET2

LX1

SP1ON2

GN

DA

2

TP5B1NO_STUFF

R4N510K

L4B1 2.2uH1 2

C4B11uF10%

C5B2

10uF25V

TP4B1NO_STUFF

R5N2

0.002 1%

CR5B1

MBR0530

21

C4N61uF10%

C5N30.1uF 10%16V

R5B3121K 1%

202286-393

1 2

Q4B1ASi4966DY2

1

78

C5B60.1uF16V

R4N6 0

Q5B1IRF7811A

4

5 6 7 831 2

R4B1 0

R4B181K

R4N2 60.4k_1%

C5B13330uF2.5V

C4N40.047UF16V

R5B710K

C5B7 0.1uF10%10V

R5N11K

R5N4255K

1%

C5B5 4700pF1%

C5B30.1uF 10%

16V

U5B1

74AHC1G08

1

24

53

C4N50.01uF10% 040225V

C5C3330uF 2.5V

R5B8100K1%

R4B410K1%

C4N3 3300pF

R5B4 33.2K

1%

L5B1 1.0uH1 2

R4B50NO_STUFF

R5N5 0

Q4B1BSi4966DY4

3

56

C5N50.01uF10% 040225V

R5B51K

C4B5

150uF6.3V, 3Arms

C4B30.1uF 10%

16V

R4N310K1%

C4B41uF10%

C4N21000pF

R4B810

R5N7 0NO_STUFF

R4N4

0.002

1%

R5B2 0

R5N351.1_1%

C4C5

150uFNO_STUFF6.3V, 3ArmsCR4B1

MBR0530

21

C5B18330uF2.5V

R4B3 100K1%

C5B4

10uF25V

C4N110uF25V

R4N1

1K

C5N60.01uF10% 0402

25Vwww.laptop-schematics

.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VREF = 1.221V

D15378 1.501

DDR VREF

A


Title


Date: Sheet of


VREF_DIMM1_MARGOPAMP2_SHTDN#

OPAMP4_SHTDN#

VREF_MCH_MARGOPAMP3_SHTDN#

OPAMP1_SHTDN#

+V2.5S_PWRGD+V5S_PWRGD

PP_REFIN

+V3.3S_PWRGD

PP_HYST

+V1.5A_PWRGD

M_VREF_DIMM_A58

PM_SLP_S3#_UNBUF16

M_VREF_MCH_A58

M_VREF_DIMM_B58

M_VREF_DIMM1 22,58

M_VREF_DIMM0 21,58

M_VREF_MCH 7,58

PM_SLP_S3# 10,32,35,48,49,55,56

PM_SYS_PWRGD 46,49

VRPWRGD_1_5A_R32

+V1.87,9,21,22,34,46,56,58

+V525,26,27,35,38,54,55,56,58

+V1.87,9,21,22,34,46,56,58

+V1.87,9,21,22,34,46,56,58

+V5A17,29,40,46,48,49,54,55,57

+V5A17,29,40,46,48,49,54,55,57

+V525,26,27,35,38,54,55,56,58

+V525,26,27,35,38,54,55,56,58

+V525,26,27,35,38,54,55,56,58

+V525,26,27,35,38,54,55,56,58

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,48,49,50,54,55,57+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,48,49,51,54,55,56,57,58

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,51,52,54,55,56

+V1.5A_AZ_IO27+V3.3S_TVDAC10,56

R6M5 0NO_STUFF

R5H22.4M

R6A1310K1%

R6A1510KNO_STUFF

R6A310K1%

C6A1220pF10%

C5H2

0.1uF

R6M710KNO_STUFF

R6A210K

R4H110K1%

R6M210K1%

C6M80.1uF

R6M1 0

R6M1110K1%

VDD+

GND

-

+

U6A3A

TLV2463 1

3

2

4

5

10

R5H6100K

1%

R6B210K

R4H31K1%

R6N10 0

R6M610K

R6A710K

R5H113K1%

VDD+

GND

-

+

U6A1B

TLV2463 9

7

8

4

6

10

U5H1

LTC1444

12345678

161514131211109

OutBOutAV+InA-InA+InB-InB+Ref

OutCOutDHystInD+InD-InC+InC-

V-

R5A1 0NO_STUFF

R6M310K1%

VDD+

GND

-

+

U6A1A

TLV2463 1

3

2

4

5

10

C6M10220pF

10%

C6M5220pF10%

R4H210K1%

R5H410K

TP5G1NO_STUFF

R6A1110KNO_STUFF

R5V1510K1%

C6M60.1uF

R5H324.9K1%

R4H410K1%

R5V1413K1%

R6A610K1%

VDD+

GND

-

+

U6A3B

TLV2463 9

7

8

4

6

10


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

This is system powergood representing powergood for all S railsCombined 1.5V & 1.05V

VR Power Good

CALISTOGA / ICH7-M

VREG



NOTE: VREG = 2.525V D15378 1.501

PWRGD & DDR2 VREF

A


Title


Date: Sheet of


SLE

W1

BST2

DCS1P

HDR2

SKIP1

DCS2N

VSET1

SKIP2

BST1

SLEW2

VIN

CHP_BST_VDD

LX1

LDR1

HDR1_RHDR1

DCS2P

V1_

5PW

RG

D

VSET2

HDR2_R

1.5_1.05_PWRGDV1_5PWRGD_R

V1_05PWRGD

DCS2P

DCS2N

DCS1P

LDR

2

LX2

1.05_VIN

DCS1N

DCS1N

VSET1 VSET2

VDDA

1.5_VIN

V1_05PWRGD_R

V1_5PWRGD_R

V1.05_EVMC_V_CNTL 58

V1.5_EVMC_V_CNTL 58

PM_PWROK46

PM_SLP_S3#10,32,35,47,49,55,56


1.5_1.05_PWRGD_R

+VBATA46,49,54,55

+V5A17,29,40,46,47,49,54,55,57

+GMCH_VREF

+V5A17,29,40,46,47,49,54,55,57

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,49,51,54,55,56,57,58

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,49,50,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,49,50,54,55,57

+GMCH_VREF

+V1.05S3,4,6,9,10,14,17,30,37,45,53,56,58

+V1.5S 4,10,17,27,56,58

+V5A17,29,40,46,47,49,54,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,49,50,54,55,57

+V5A17,29,40,46,47,49,54,55,57

+VBATA46,49,54,55

+VBATA 46,49,54,55

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

AGND_CAVR

C4U2

10uF25V

C5V60.1uF16V

R4F5 0

R4G320k_1%

C4G1 4700pF1%

R5V10 0

L4F1 1.0uH1 2

C5F910uF25V

R5G110K1%

R4G4 33.2K

1%

C5V2 4700pF1%

R5V6 0NO_STUFF

C8V30.1uF16V

R4G210K

C5G1270uF2.0V, 3.3Arms

R5U10 0

Q4F2IRF7822

4

5 6 7 831 2

C5F110.1uF 10%

16V

R4V3 0

R4U51K

DC-DC CONTROLLER

EU5F1

OZ824345678

9 10 11 12 13 14 16

17181920

2221

2324

2526272829303132

15

21

33VINVREFGNDA1VDDACEON1

VS

ET1

SK

IP1

SLE

W1

CS

1NC

S1P

PW

RG

D1

HD

R1

BST1GNDP1

LDR1VDDP1

LDR2VDDP2

GNDP2BST2

HD

R2

LX2

PW

RG

D2

CS

2PC

S2N

SLE

W2

SK

IP2

VS

ET2

LX1

SP1ON2

GN

DA

2

C5U5

MBR0530

21

R4F6 121K1%

202286-393

1 2

C4U50.047UF16V

R4G151.1_1%

C4F9270uF2.0V, 3.3ArmsNO_STUFF

R3T81K

CR4U1

BAT54A

2

1

3

R5V310K

R4V4

0.002 1%

R5V81K

C4U1

10uF25V

R4V10

L5F2 1.0uH1 2

R5V451.1_1%

R5V710

R5F7 0

C5F810uF25V

TP4F1NO_STUFF

R5V1 33.2K

1%

R4V214.7K

1%

C4U3

10uF25V

C4G21uF10%

C5V10.01uF10% 040225V

U8V1

74AHC1G08

1

24

53

R5F4

0.002 1%

R5U9

1K

R4G5 0NO_STUFF

C5U60.047UF16V

C4U41000pF5%

R5V515K1%

C5F101uF10%

R5U80.002 1%

Q5F1IRF7811A

4

5 6 7 831 2

C4F100.47uF10%16V

U5G2

74AHC1G08

1

24

53

R5V16

1K

C5U70.01uF10% 0402

25V

Q5U1IRF7811A

4

5 6 7 831 2

C5U41000pF5%

R5V13 0

C5V31uF10%

C4V10.01uF10% 040225V

TP6G1NO_STUFF

Q4F3IRF7811A

4

5 6 7 831 2

R5V2 121K1%

202286-393

1 2

C4F8

MBR0530

21

R5U110

C5U310uF25V

C5V4270uF

2.0V, 3.3Arms


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VR ALW ENABLE goes high with insertion of AC or button pressto turn on +V3.3A

Mobile 5V Rail

2.5SV Rail

3.3AV Rail

D15378 1.501

TPS5130 System Power

A


Title


Date: Sheet of


3.3_VIN

5130VREFON

V3SW_L1

V3S_INV

5130PWMSEL

V3A

_FBV

3A_IN

V

V5A_FB

V5O

CP

V3.3A_ON_INV

V5FBRC

3.3A

TG

4N1_5ON

V5RC

5130

_PW

RG

D_Q

3VTG

V5S

W

5VREF

4N1_

LH1

V3BG

4N1_

FLT

V3.3ATG

4N1_LH

3

5130_5VIN

5VTG

V2.5G

V3TG

3VREF5130VIN

V3.3AVRON

V3.3A

_OC

P5130P

GD

ELAY

V5T

G

V3.3ASW

V5BST

V3S_FB

V5VRON

4N1_2.5G

V5A_INV

V3S

W

V5A_INV

V3ABST

V3.3ABG

V5B

G

V3O

CP

V3A_FB

V3A_INVV3ARC

V3FBRC

5ONG

4IN1_3ON_TP

4IN1_3ON

V3SFBRC

V3S_INVV3SRC

V3S_FB

VR_ALW_ENABLE

V3VRON

5130REF

5130CT

5130VREFON_3

4_IN1_LDO_EN

V3.3ASS

VR_ALW_ENABLE

V5A_FB

5.0_VIN

V3BST4N1_LH2

V3.3AOUT

V2.5SNS-

V2.5OUT

2.5V_EV 58

VR_ALW_ENABLE27,54

PM_SLP_S3#10,32,35,47,48,55,56

5130_PWRGD32

+V5REF

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,50,54,55,57

+V5A_MBL54,58

+V5REF

+V3.3A_MBL54

+VBATA 46,48,54,55

+V5REF+V3REF

+V5REF

+V5A 17,29,40,46,47,48,54,55,57

+V5REF

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,50,54,55,57

+V2.5S 10,18,20,56,58

+V3REF

+VBATA46,48,54,55

+V5A_MBL54,58

+V5REF

+VBATA 46,48,54,55

+V5REF

+V3.3A_MBL54

+V5REF

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,51,54,55,56,57,58

+VBATA46,48,54,55

+VBATA46,48,54,55

+VBATA 46,48,54,55

+VBATA46,48,54,55

ATX_PWR_CNTRL 54,55

PM_SYS_PWRGD46,47

+V5REF

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

AGND_5130

Q4H11

BSS138

3

1

2

C2W100.1uF

C3J3

0.1uF

R4H170NO_STUFF

Q4H9BSS138

3

1

2

Q3V2IRF7811A

4

5 6 7 831 2

CR3G5B320ANO_STUFF

21

R4H1410K

R4H16100K

CR3G4B320A

21

R4H10

29.4K 1%

R3V40.002

1%

R4H2510K

R4H21 10K

C3H6

3300pF

C3H13

3300pF

R4H22100K

R4H24 100

R3W1010K

5%

R3W91.00

R4H13332

Q4H4BSS138

3

1

2

R4H73321%

Q3G7IRF7811ANO_STUFF

4

5 6 7 831 2

C4H20.1uF

C3W8 1000pFNO_STUFF

C3H1010uF

+ C3J4330uF20%

R4H92.49K

R4W30

R3W312.1K

Q3H3IRF7822

4

5 6 7 831 2

C3W9

0.1uF

CR3W1

MBR0530

2 1

+ C3G1220uF10%NO_STUFF

12

C3H11

0.01uF

R4H180

R3H90.01

+C4G5220uF10%

12

R3H102.2

C3W6

1000pF

NO_STUFF

R4H810K1%

C3W5 0.22uF

C3H12 0.1uF

C3H20.1uF

C3J2

0.1uF

R2H31.00

C3W20.01uF

C4H45600pF

C3H50.1uFNO_STUFF

C2J122uFNO_STUFF

Q4H6BSS138

3

1

2

L3H1

3.3uHNO_STUFF

1 2

R4H152.49K

R4H230

R4H20 10K5%

R4H1110K

R4H1910K

TP4H1NO_STUFF

C3G222uF

R4H282.49K

R3H32.2

C3H3

3300pF

C3W3

0.01uF

CR4H1

BAR43

1

3

C3V20.1uF

R3W416.9K

1%

C3W71000pF

C3H933pF

C3V10.1uFNO_STUFF

R4H29

28.7K

R4H549.9K1%

+ C3J5330uF20%

L3J1

3.3uH1 2

R3H20

TP3G1NO_STUFF

C3W100.01uF

C2W1122UF

R4H6100K

C3J1

22uF

C4H5

0.1uF

Q3G6IRF7811A

4

5 6 7 831 2

C3H80.1uF

CR3W5

BAR43

1

3

C4H65600pF

R3H110

R3W616.9K

1%

Q3J1IRF7811A

4

5 6 7 831 2

+C2H5

100uF

R3H710K

R3J1

0.002

R4W8

0

Q4H8

BSS138

3

1

2

C4G60.1uF

C3H710uF

R4H2710K

CR3W2

MBR0530NO_STUFF

21

CR3H2

BAR43

13

Q4H5

BSS138

3

1

2

C3H4 0.1uFNO_STUFF

R4H26332

Q3H2IRF7811ANO_STUFF

4

5 6 7 831 2

CR3H1

BAR43NO_STUFF

13

C2W610uF

CR3W4MBR0530

21

R3W71.00

L4G1

3.3uH

1 2

Q4H1

BSS138

3

1

2

C4H35600pF

R4Y10.002 1%

CR3H3

B320A

21

R3H52.2 NO_STUFF

R3W5 1.00

R2H20.05

Q2H5

SI3442BDV3

46521

C3W4

0.01uF

R2W8 2.2

C3H10.1uF

TPS5130PT 4 IN 1 Controller

U3H1

TPS5130PT

17

48

2625

44

3

20

45

30

2

31

9

45

21

1

43

19

6

1346 42

78

35

18

34

2928

41

10

14

1211

40

27

33

36

47

32

39

15

3822 2423

37

16P

G_D

ELA

Y

INV

1

LDO_OUTINV_LDO

LL1

INV2

LH3

FB2SS_STBY2

REG5V_IN

SS_STBY1

VREF5

REF

OU

T1_U

OU

T3_U

FB1

OU

T1_D

VIN

_SE

NS

E3

PWM_SEL

SS

_STB

Y3

LH1

OU

TGN

D1

CTGND

OUT2_U

TRIP

3

LH2

LDO_VINLDO_CUR

TRIP

1

STBY_VREF5

FB3

STBY_LDOSTBY_VREF3_3

VIN

_SE

NS

E12

LDO_GATE

VIN

LL2

FLT

VREF3.3

TRIP

2

INV

3

OU

TGN

D2

LL3

OU

TGN

D3

OU

T3_D

OU

T2_D

PG

OU

T

R3H40

NO_STUFF

R3H85.11K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Batt A

SMBUS Address for Battery A = 16

11200

2700

22

1020

4900

820

11000

Battery Charging Current (Vcls) --> 2.1A

2000

7000

Charging Voltage (Vvctl) -->12.6V

14Address

ACOK# Trip point when AC adpater = ~15.6V

Battery Address Key

1800

REF Voltage = 4.096V

Battery Charging plus System Current (Victl) --> 11A

2900

6800

Discontinuous Mode --> Imin = 0.75A

4700

9300

MAX8724 Set Points Table

4100

16

Continuous-Conduction Mode 9.3V < Vbatt < 11.088V

1C

20

1A

Total (Host + 200)

LDO Voltage = 5.4V

MAX809 TripPoint = 2.93VVBS Trip Point= 8.7V

18

CELLS --> Floating = 3 cells

HostResistor

3900

Batt B

1E9100

SMBUS Address for Battery B = 1E

13A

D15378 1.501

System Charger VR (1 of 2)

A


Title


Date: Sheet of


ACOK#_R

BC_LX

BC_ACOK#

BC_VCTL

BC_BST_R

BC_CSSP

BC_CSIN

DISB#

BC

_CC

V_C

BC_THERMB

BC_DHI

VAC_BRCK_IN

BC_SHDN#

BC_ICHG

FLIPFLOP_Q#

BC_CSIP

BC_ACOK#BC_ACIN

BC_THERMB

FLIPFLOP_Q

PRE_L

BC_DLO

BC_DLOV

BC_THERMA

BRCK_IN_GND

BC_THERMA

BC_ICTL

BC_BST

BC_DHI_R

BC_CSSN

BC_BATT

BC

_CC

S_C

BC_CCS

BC

_CC

I_C

BC_CCI

BC_CCV

BC_IINP

BC

_RE

FIN

_D

BC_CELLS

DISA#

BC_CLS

BC_CSSN

BC_CSIP

BC_BATT

BC_CSIN

BC_CSSP

BC_DLO_R

BC_DCIN

BC_BATT

BC_REFIN

VBS_DIV

VBS_TRIP#VBS_TRIP

CHGB

CHGA

SMB_BS_CLK 24,32,35SMB_BS_DATA 24,32,35

SMB_BS_CLK 24,32,35SMB_BS_DATA 24,32,35

BC_SHDN32,35

BS_DISB# 32,35

BS_DISA# 32,35

BS_CHGA# 32,35BS_CLR_LTCH# 32,35

BS_CHGB# 32,35

BC_ACOK_BATT54

BC_IINP32,35

BC_ACOK32,35

BC_ICHG32,35

SMB_BS_ALRT#32,35

+VBS54

+V_BC_OUT

+VBS54

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,54,55,57

+VAC_IN+V3.3A3,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,54,55,57

+VAC_IN_L

+VCHGR_OUT

+VBC_REF

+VBC_LDO

+VBC_REF

+VBC_LDO

+VBC_LDO

+VBC_LDO+VBC_LDO

+VBC_LDO +VBC_REF

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,54,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,54,55,57+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,54,55,57

AGND_BC

AGND_BC

AGND_BC

AGND_BCAGND_BCAGND_BCAGND_BC

AGND_BCAGND_BC

AGND_BC AGND_BC

AGND_BC

AGND_BC AGND_BC

AGND_BC

AGND_BC

C2G322uF

25V

CR2W1MBRS130LT3

21

C1W20.1uF 10%16V

Q2G6BSS138

3

1

2

R1V2100K1%

C1H110UF25V

R1W9 10K

R1Y1 0NO_STUFF

C2W3 0.1uF10%

16V

R3H149.9K

1%

R1W1 100K

R1W4 10K

C2G122uF

25V

C1W40.1uF 10%16V

Q3H1BSS138

3

1

2

C2W70.1uF10%

16V

U1H574AHC1G02

1

2

5

4

3

C1W50.1uF 10%16V

R2G1 10K

R2V15 10K

L1G1

1k@100MHz4A, 50V, DCresist=12mohm(1 line)

23

14

R2W61781%

R1W5 100K

R2W2 1K 1%

R2V1210_1%

R1H2 0.020 1%

C2W10.1uF10%

J1G3

AC_JACK

3

1

2

SHUNT

GND

+AC_INPUT

CR2G4BAT54WT11 3

R3W2 10K

C2V6 0.1uF10%

16V

R2V11 10KNO_STUFF1%

R1Y3 100K

J1H11234567

1234567

U1H274AHC1G08

1

24

53

G

S

D

Q2H1HAT2168H

4

25

31

R2W949.9K1%

R3G40

C2W2 0.1uF10%

16V

C2G41uF10%

R2W325.5K1%

R3W120k_1%

R1W2 0NO_STUFF

R2W410_1%

G

S

D

Q2H3HAT2164H

4

25

31

C2H41uF10%

R2W70

U1H174AHC1G02

1

2

5

4

3

U1H674AHC1G08

1

24

53

C2V322uF

25V

R2H4 0.0051%

C2W80.01uF10% 0402

R2W510_1%

R1W612.4K1%

C2W4220pF

10%

C1H247uF 20%

U1H3

MAX809 1

2

3G

ND

RST#

VC

C

R2V16 0

C2V7 0.1uF10%

16V

CR1V1 RB081L-202 1

C2V80.1uF10%

C1V30.1uF

10%

R3V549.9K1%

C2H610UF25V

J1J1

1234567

1234567

R2V140

C1W10.1uF 10%16V

R1W10 100K

C2G222uF

25V

C2H747uF 20%

G

S

D

Q2H2HAT2168HNO_STUFF

4

25

31

C2V5 0.1uF10%

16V

R1H310K

5%

C2V4 0.1uF NO_STUFF16V

C1J110UF25V

Q2G8SI7458DP

4

123

5

R2V10 10KNO_STUFF1%

R1Y2 1.74K1%

C2H1022uF

25V

C3W10.1uF10%16V

R3G141.2K

1%

R3H12100K

5%

R1W81K

C2H20.1uF10%

R1W724.3K

1%

R2W1124.9K

1%

Q1H2BSS138

3

1

2

C2G5 1uF80%16V

R2G2 33

C1W60.1uF 10%16V

R1H410K

U1H4

1G D-FLIP FLOP

12345

678 CLK

DQ#

GNDQCLR#PRE#VCC

C1V20.1uF10%

R1J1 10K

R1W3 6.81K1%

C1V122uF

25V

R3G249.9K

1%

EU2W1

MAX8724

1

2

3

20

19

18

17

16

8

9

5

10

22

24

23

13

14

6

4

11

12

7

1521

25

26

27

28

29

DCIN

LDO

CLS

PGND

CSIP

CSIN

CELLS

BATT

SHDN#

ICHG

CCS

ACIN

DLOV

BST

LX

ICTL

GN

D

CCI

REF

ACOK#

REFIN

CCV

VCTLDLO

DHI

CSSN

CSSP

IINP

GN

D2

R3G3 10K

L2H13.3uH

12

CR3G6BAT54

1 3

R1H1 10K

Q2G7BSS138

3

1

2

C2W50.022uF10% 0402

C1W30.1uF 10%16V

R2W1045.3K

1%

R2G3 0

C2W90.1uF10%16V

C2H10.1uF16V

R2V18 0

Q1H1BSS138

3

1

2

C2V90.01uF10% 0402

R2G4130K

5%

R1V1100K1%

CR2V1

BAT54

1 3

C2H1147uF 20%

R2V1737.4k_1%

G

S

D

Q2H4HAT2164HNO_STUFF

4

25

31

R2V1310_1%

C2H34.7uF80%16V

C1Y10.1uF 10%16V

R2W1 6.65K 1%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1

1S2

1

IMVP6CPU CoreVRController

11

S0

1

A

1

Temperature Monitor

1C

D1

Output

B 0

0S1

A

CPU VCC_Core VR and MUX Buffer

B1

D

InputC

D13073 1.501

IMVP-6

A


Title


Date: Sheet of


IMVP-4STRAP_VID1

S2_S1

IMVP-4STRAP_VID0

V5_S0

IMVP-4STRAP_VID4IMVP-4STRAP_VID3IMVP-4STRAP_VID2

DPRSLPVR

IMVP-4STRAP_VID6IMVP-4STRAP_VID5

DELAY_VR_PWRGOOD7,16

PHASE_2

VR_VID045

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,54,55,56,57,58

1.5_1.05_PWRGD_R48

PWM2

PWM3

VR_VID1 45

VR_VID4 45

VR_VID245VR_VID145

H_DPRSTP#3,14,35

FCCM

VR_VID6 45

+V5S_IMVP652

VR_VID5 45

H_VID24

VR_PWRGD_CK410#30,31

VR_VID345

VSSSENSE4

VR_VID0 45

+VDC_PHASE52

VR_VID545

H_VID34

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,52,54,55,56

VR_VID445

VSUM

VCC_PRM

PWM1

PHASE_3

H_VID04

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,52,54,55,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,52,54,55,56

H_PROCHOT# 3

H_VID64

PSI#3

VR_VID2 45

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,52,54,55,56

VR_VID3 45

IMVP_VR_ON32,35

H_VID44

PHASE_1VR_VID645

PM_DPRSLPVR7,16,35

H_VID14

H_VID54

VCCSENSE4

AGND_VCORE

AGND_VCORE

AGND_VCORE

AGND_VCORE

R2B1410_1%

R1N1

8.2K

C2B121.0uF10% 25V

C1N2.01uF

C2B13

1.0uF10%

25V

R2N13 0

R1N14

8.2K

R1C1 499 1%

R1N4

8.2K R1N6

8.2K

R1N3

8.2K

R1N15

10K

R1N5

8.2K

J2B1

2X8_HDR

2468

13579111315

10121416

C2C122.2uF

10%

C2C50.1uF

10%10V

U1B2

74CBT16209A

258

1113

369

1214

148

4644413836

4543403735

74

16182123

17192224

33312826

32302725

47 101520

3439

2942

A0A1A2A3A4

B0B1B2B3B4

S0S1

C0C1C2C3C4

D0D1D2D3D4

VCCGND0

A5A6A7A8

B5B6B7B8

C5C6C7C8

D5D6D7D8

S2 GND1GND2GND3

GND5GND6

GND4GND7

R1N9

8.2K

Q2C5

MAX6501

43

12

5

VCCHYST

GND1GND2

TOVER#

C2C130.1uF

10%

10V

R1N2

8.2K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IMVP6CPU CoreVRController

D13073 1.501

IMVP-6 Core VR

A


Title


Date: Sheet of


+V5S_IMVP6 51

+V5S_IMVP6 51

FCCM

+VCC_CORE4,53,56,58

PHASE_1

VCC_PRM 51

FCCM

PWM1

PWM2

+VBAT 19,54,55,56

PWM3

PHASE_2

PHASE_3

FCCM

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,51,54,55,56

+VDC_PHASE51

VSUM

R1B3 .0021W

R1B2 .0021W


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

South Side Secondary

Place these inside socketcavity on L8 ( South sideSecondary)

Vcc Core Decoupling

Place these inside socketcavity on L1 ( North sidePrimary)

Place these inside socketcavity on L8 ( North sideSecondary)

Place these inside socketcavity on L1 ( South sidePrimary)

North Side Secondary

Vccp Core Decoupling

Place these inside socketcavity on L8 ( North sideSecondary)

D15378 1.501

CPU Decoupling

A


Title


Date: Sheet of


+VCC_CORE4,56,58

+V1.05S3,4,6,9,10,14,17,30,37,45,48,56,58

C2T2222uF

20%

C2E1222uF

NO_STUFF 20%

C2R522uF

20%

C2E622uF

NO_STUFF20%

C2E222uF

NO_STUFF 20%

C2E522uF

NO_STUFF 20%

C2E1022uF

NO_STUFF 20%

+ C2U2330uF20%

12

3

C2T322uF

20%

C2T110.1uF 10%

C2E822uF

NO_STUFF 20%

C2E922uF

NO_STUFF 20%

C2T1622uF

20%

C2T130.1uF 10%

C2R422uF

20%

C2T622uF

20%

+ C2U3330uF20%

12

3

C2T2122uF

20%

C2T222uF

20%

C2T90.1uF 10%

C2E322uF

NO_STUFF 20%

C2T2322uF

20%

C2T522uF

20%

C2T1722uF

20%

C2T422uF

20%

+ C2R2330uF20%

12

3

C2E722uF

NO_STUFF 20%

+ C2U1330uF20%

12

3

C2T120.1uF 10%

C2T1822uF

20%

C2T1922uF

20%

C2T1422uF

20%

C2E422uF

NO_STUFF 20%

C2T2022uF

20%

C2E122uF

NO_STUFF 20%

+ C2R1330uF20%

12

3

C2T1522uF

20%

C2T122uF

20%

C2T722uF

20%

C2E1122uF

NO_STUFF 20%

C3T20.1uF 10%

C2T100.1uF 10%

+ C2R3330uF20%

12

3

C2T822uF

20%


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MOBILE OPTION

POWER ONand S5ENTER/EXITButton

RESETBUTTON

ATX ALWAYS ONDT OPTION

Active high meansbutton press detect andlatch from start upcircuit 100K pull up to+VBATA on this page

5V MIN CURRENTDUMMY LOAD: Gives0.5A min currentload

Force Shutdown

Either insertion of ACor button press latchwill assert enable of1.5A & V3.3A

3V MIN CURRENTDUMMY LOAD:Gives 0.5A mincurrent load

ATX POWER

Active highmeans AC presentfrom the Batterycharger

TO H8 TO INDICATEPRESENCE OF ATX SUPPLY.VTYP=3.0 WHEN ATX ISPRESENT AND ON.

ATX Spec dictates ATXsupply has internal pullup to 3.3V

Front Panel Header

Shunt pins 13 & 15for SV forcing ATXon and VBAT on forpower cycling

Stuff R3H6 onlyfor G3 Mobilepower cycling

D15378 1.501

Start Up Sequence

A


Title


Date: Sheet of


FRONT1

PWR_CONN_D

PWRONLATCHG

PS_ON_SW#

PS_LATCH#

RST_PUSH#_D

PS_LATCH#

FRONT2

PS

_PW

RB

TN

SHUTDWN#

PS_ON_SW#

PS_ON#

MASTER_RESET#

PS_ACENABLE

V12ATXSW

ATXPWR

VBSGT

ADAPT_PRES_R

RSTBTNDB

PS_LATCH#

5SB

_ATX

A_R

+V3.3_DL_Q

+V5_DL_Q

SHUTDWN#

+5V_DL_R

PS

_ATX

SE

NS

PS_ON_SW#

+5V

_DL

+3.3

V_D

L

+3.3V_DL_R

ATA_LED#14

XDP_DBRESET#3,37,58

SMC_SHUTDOWN32,35

BC_ACOK_BATT50

PM_SYSRST# 16

ATX_DETECT# 32,35

ATX_PWR_CNTRL 49,55

ATX_PWROK 32

VR_ALW_ENABLE 27,49

SMC_ONOFF# 32,35

+V5 25,26,27,35,38,47,55,56,58

+VBATA46,48,49,55

+V5A17,29,40,46,47,48,49,55,57

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

+VBATA46,48,49,55

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

+VBATA46,48,49,55

+VBAT19,52,55,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,51,52,55,56

+V5A17,29,40,46,47,48,49,55,57

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,55,56,57,58

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

+VBATA46,48,49,55

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,51,52,55,56

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

+V5SB_ATXA

+V5A_MBL49,58+V5A 17,29,40,46,47,48,49,55,57

+VBATA46,48,49,55

+V3.3A_MBL49

+VBS50

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

+V5SB_ATXA

+V5SB_ATXA

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,55,57

-V12A55

+VBATA46,48,49,55+V5SB_ATXA

C3F10.1uF10%

C6J20.1uF

R2W14100K NO_STUFF

R4W11K

R2Y2100K

R9W1010K

SW1C2

Push_Button

12

34

Q2G2BSS138

3

1

2

Q2W2

SI4425DY

4

123 8

765

CR8J1

BAT54

13

R2H1100K

C7J7470pF

Q2J1SI7453DP

4

123

5

R5J33.0

5%

Q3G2IRF7811A

4

5678

3

12

C8J6

470pFC8J7470pF

Q4V3IRF7811A

4

5678

3

12

+C2H9

15uFC2V2 0.33uF

R2V2

43K

+ C4G8220uF10%

12

CR2G2

BAR43S

13

2

R4W2

0

R4Y51K 5%NO_STUFF

+ C4G4220uF10%

12

Q3J2SI3442BDV

3

46521

R3Y410K

+C2W12

15uF

R2W13 0

J4J1

CON20_PWR

11121314151617181920

123456789

10

J8J113579

111315

24681012

16

R3J33.0

5%

R2V71M

J3H1

C7J6470pF

Q9W1BSS138

3

1

2

C2V11000PF

Q4H2BSS138

3

1

2

+C5B11

15uFR3F1100K

+ C4H1220uF10%

12

+ C4G3220uF10%

12

Q2G5BSS138

3

1

2

Q2G4BSS138

3

1

2

R2V9100K

CR4Y1BAT54A

2

1

3

R2V6100K

R6J5 100K

R2V4100K

R2W12

100K

R2V3390K

SW1C1

Push_Button

1 23 4

C6J3

0.01uF

R5W43.0

5%

R3Y13.0

5%

Q3G1IRF7811A

4

5678

3

12

R2V8100K

CR3W3BAT54C

1

3

2

R3Y510K

Q3W1

BSS138

3

1

2

C2Y10.1uF

Q5H2SI3442BDV

3

46521

Q2V1BSS138

3

1

2

R7J4330

Q2G1BSS138

3

1

2

R9W1410K

R9W1310K

R7J1330

R3H6 0NO_STUFF

CR5J1BAT54

1

3

C8J3470pF

U6J3

MAX6816

4

3

1

2

VCC

OUT

GND

IN

R2Y110K

R5J23.0

5%

U6J2

74AHC1G08

1

24

53

Q2W1BSS138

3

1

2

+C2H8

15uF

CR2G3

BAR43

13

Q4G2IRF7811A

4

5678

3

12

R6J410K

R2V5100K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S4

S3

75 ohms chosen for~16mA of LED current

SO

S5

D15378 1.501

Sleep control

A


Title


Date: Sheet of


PS_S4CNTRL

PP_S4LEDSW2

PM_S3#_AND

PS

_VB

ATSG

PP_S0LED

PP_S3CLEDSW

PP_S4LED

PS_12SSW

PP_S3CLED

PS_VBATSW

PS_-12SSW

PP_S0LEDSW

PS_12SG

PP_S5LED

PP_S5LEDSW

PS_VBAT_S4_D

PS_-12OPTSW

PP_S4LEDSW1

PS_S3CNTRL

PS

_VB

AT_S

4_G

ATX_PWR_CTRL_1

SLPS4#_CONTROL

SLPS3#_CONTROL

PM_SLP_S4#16,26,32,35,46,56PM_SLP_S3#10,32,35,47,48,49,56

PM_SLP_S5#16

PM_SLP_S3#10,32,35,47,48,49,56PM_SLP_S3#10,32,35,47,48,49,56

PM_SLP_S5#16

PM_SLP_S4#16,26,32,35,46,56

PM_SLP_S3#10,32,35,47,48,49,56

ATX_PWR_CNTRL49,54

PM_SLP_S4#16,26,32,35,46,56

PM_SLP_S3#10,32,35,47,48,49,56

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,51,52,54,56 +V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,57

+VBAT19,52,54,56

-V12S25,26

+V3.3 13,14,15,17,25,27,32,33,34,35,36,38,45,46,56

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,56,57,58

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,51,52,54,56

+VBATA46,48,49,54

+V5A17,29,40,46,47,48,49,54,57

+VBAT19,52,54,56

+V525,26,27,35,38,47,54,56,58

+V3.313,14,15,17,25,27,32,33,34,35,36,38,45,46,56

+VBAT_S413,56

+VBATA46,48,49,54

+VBATS13,18,19,27,56

+V12S25,26,28,35,39,43,44,56,58

+V3.3A 13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,57

-V12A54

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,57+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,57

+V3.3S 5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,56,57,58

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,57

C4W10.1uF

C9B20.1uF

CR2G1

GREEN

12Q4V4

IRF7811A

4

5678

3

12

Q6N1BSS138

3

1

2

C6N30.33uF

Q4G3

IRF7811A

4

5678

3

12

SI2307DS

Q2G3

1

32

R4H12

10K

Q5H3BSS138

3

1

2

Q5H1

SI4425DY

4

123 8

765

R5H32100K

R6N4100K

R3V275

Q4G4BSS138

3

1

2

CR3G3

GREEN

12

C5H30.1uF

Q6B1

SI4425DY

4

123 8

765

Q3G3BSS138

3

1

2

Q4H3BSS138

3

1

2

R4V6100K

C4G70.01UF

10%

Q4G1IRF7822

4

5678

3

12

R6N1100K

C6N20.33uF

C5W90.33uF SI2307DS

Q3G4

1

32

C7P1 0.1uF10%

R6N3100K

Q4V5BSS138

3

1

2

U9B1

TLP280

4

32

1

CR3G1

GREEN

12

R4G6100K

Q6B2

SI4425DY

4

123 8

765

R9B410K

R9B1

330

R3V375

Q4G5BSS138

3

1

2

CR3G2

GREEN

12

R4G7100K

C9B1

0.1uF

Q3V1BSS138

3

1

2

U5G1

74AHC1G08

1

24

53

R3V175

R6N2100K

C6N40.1uF

R2V175

Q4W1BSS138

3

1

2

R4V7100K

C6N50.33uF

SI2307DS

Q3G5

1

32

Q4V2IRF7822

4

5678

3

12

R5H34100K

Q6B3BSS138

3

1

2

Q9A1

SI4420DY4

1 2 38765


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SLP_S3# DISCHARGE CKTDESIGNED FOR ~100msDISCHARGE ON ALL S3RAILS.

SLP_S4# DISCHARGE CKTDESIGNED FOR ~100msDISCHARGE ON ALL S4RAILS.

ATX Mounting Holes

D15378 1.501

DISCHARGE CIRCUITS

A


Title


Date: Sheet of


PP_V5SDIS PP_V2.5SDIS

PP_VIMVPDIS

PP_V12SDIS

PP_V1.8DIS

PP_V3SDIS

PP_V1.5SDIS

PP_V3DIS

PP_V5DIS

PP_S4GT

PP_BATS4DIS

PP_V3STVDIS

PP_12DIS

PP_VGMCHDIS

PP_V0.9DIS

VBATA_DISCHARGE

PM_SLP_S3

PM_SLP_S4#16,26,32,35,46,55

PM_SLP_S3#10,32,35,47,48,49,55

+V5 25,26,27,35,38,47,54,55,58

+V12S25,26,28,35,39,43,44,55,58

+V5S5,10,17,18,19,20,25,26,39,41,43,44,45,47,51,52,54,55

+VCC_CORE4,53,58

+V3.313,14,15,17,25,27,32,33,34,35,36,38,45,46,55

+V1.87,9,21,22,34,46,47,58

+VBAT19,52,54,55

+V1.5S4,10,17,27,48,58

+V2.5S10,18,20,49,58 +VBAT_S413,55

+V3.3S_TVDAC10,47

+VBATS13,18,19,27,55

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,57,58

+V1.05S3,4,6,9,10,14,17,30,37,45,48,53,58

+V0.923,46,58

Q3D1BSS138

3

1

2

Q3U1

BSS138

3

1

2

R6N5180

12

R3U6100K

Q4D1BSS138

3

1

2

R3U41M

Q5G4BSS138

3

1

2

Q3Y1BSS138

3

1

2

Q7N1BSS138

3

1

2

Q4C1BSS138

3

1

2

R4F14.87K

1%

MT9J1

MT156

NO_STUFF

45

23

6789

R4V597.6

R4B7220

MT1J1

MT156

NO_STUFF

45

23

6789

Q7B1BSS138

3

1

2

Q5V1BSS138

3

1

2

R3U3

470

C3U1

22UF

Q4F1BSS138

3

1

2

R5G3180

12

R5G797.6

Q4U2BSS138

3

1

2

CR3U1BAT54

1

3

R9A91M

MT9A1

MT156

NO_STUFF

45

23

6789

Q4V1BSS138

3

1

2

Q4B2BSS138

3

1

2

MT5A1

MT156

NO_STUFF

45

23

6789

MT5J1

MT156

NO_STUFF

45

23

6789

R3U5100K

Q3Y2BSS138

3

1

2

R4C2668

R5W297.6

R3Y2470

Q5G1BSS138

3

1

2

MT9G1

MT156

NO_STUFF

45

23

6789

R5G497.6

MT1B1

MT156

NO_STUFF

45

23

6789

MT1G1

MT156

NO_STUFF

45

23

6789

R3J247

R3D147

Q5G3BSS138

3

1

2

R7B13180

12


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LPC Docking Logic

D15378 1.501

LPC Docking

A


Title


Date: Sheet of


LPCD_QSEN#

LPCD_QSEN#

LPCD_QSEN#

LPCD_SMC_EXTSMI# 42

LPCD_LPCRST#42

PM_SUS_STAT#16,32,35,42

LPCD_LPCPD#42

LPCD_PWRGD42

LPCD_PCI_PME#42

PLT_RST#7,13,15,24,28,32,41,42

SMC_EXTSMI# 16,32,35,42

LPCD_PD# 42

LPCD_RST# 42

LPCD_RI#42

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,58

+V5A17,29,40,46,47,48,49,54,55

+V3.3A13,14,16,17,24,25,26,27,28,29,32,35,38,40,42,45,46,47,48,49,50,54,55

+V3.3S5,7,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,58

U8F2

74AHC1G08

1

24

53

U7E3

74AHC1G08

1

24

53

R7E4 0

NO-STUFF

R8E610K

C8F2

0.1uF

U7F1

74CBT3306

1234 5

678OE1#

1A1BGND 2A

2BOE2#VCC

C7T3

0.1uF

C7F10.1uF

Q8E2BSS138

3

1

2


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

7

VR_ALW_ENABLE

1AC

VR

MP

WR

GD

H_CPURST#

+VCC_GMCH_CORE,+VCCP

H_PWRGD

1

4

IMVPCOREVR

SM

CO

NO

FF#

11

2

9

+VCC_CORE,+VCCP

AC case waitshere for step5AC

+V3.3A

10

BS_ACAD_PRES

SLP_S3#

PM_RSMRST#

ICH

MAX-809

Startup

CPU

SLP_S3#

ChargerCircuit

12

Circuit

14

PWROK

PM_PWRBTN#

5AC

CALISTOGA

ALL

_SY

S_V

RP

WR

GD

PLT

_RS

T#

5AC

PS_ON_SW#

PM_PWROK

13

+V1.5SVR

VR_PWRGD_CK111#

16

8

IMVP_VR_ON

Battery casewaits here forstep 1BATbefore step 1

VR_PWRGD_CK410

PG 50

SMCRES#

15

+V1.5S

PM_SYS_PWRGD

SYSTEMVR

PWROK

1BAT

SystemClock

DELAY_VR_PWRGD

5b

6

6SLP_S4#

+V1.05SVR

+V1.05S_VRPWRGD

+V1.5S_VRPWRGD

+V1.05S

+VCC_CORE IMVP_VR_ON

5a

VCCP ,VCC MCH,VCC ICH,MCH GFX,

ICHLOGIC

9

11

18

17

7

8

+V3S_TVDAC

+V3S

+V2.5S

SYSTEMVR POWERGOODMONITOR

SLP_S4#

+V5A

+V3.3A

6

LDO+V3.3A+V1.5A_AZ_IO

H8 SMC

+V1.5A_AZ_IO

DDR VR

+VBAT

+V3

+V5 +V5A

+VBAT_S4 +VBAT

+V3.3A

SLP_S4SWITCHES

DD

R_V

R_P

WR

GD

8

8

LDO+V3.3A

7

+VBAT

+V3S_TVDAC

+V3S

+V3S

+V5SSLP_S3SWITCHES

+VBATS

+V5A

+V2.5S

SLP_S3#

SLP_S4#

SLP_S4#

+V1.8

+V0.97

7

77

7

7

7

3

3

3

Steps 1AC(leads to step 1), 5AC (leads to step5) for AC Only case (i.e. AC case detectsbrick and requires button press)

CAPPELL VALLEY MobilePower On Sequence

+VBATA

+VBATA

Step 1BAT (leads to step1) forbattery only case (i.e. BATT caserequires button press to beginpower up)

7

7

V1.05_V1.5_PWRGD

99ms DELAY

D15378 1.501

POWER SEQUENCING TIMING BLOCK DIAGRAM

A


Title


Date: Sheet of



.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Page 18: Removed docking functionality for CRT, test pointed docking signals, removed Q7D1, addedstuffing option for turning on/off docking switches.Page 20: Removed the docking functionality for TV_Out, test pointed docking signals, removed Q97, C4U4, CR591, added stuffing option for turningon/off docking switches.Page 27: Removed the docking circuitry forHD_Audio. This includes removing U11, U12, R9787,R2604, R2606, R2605, R2607, R9788, R9785, J25, andshorting R9786 and R9789.

P27 Changed R8T2 to stuff

P10 Moved C4E6 to pin U5E1-D2

P15 Implemented SPI shared topology

P14 Removed R6V10, changed R6V9 to 56, R6V7 to 24.9

P7,15 Added # to net MCH_ICH_SYNC

P30 Changed R9700 to a PD

P50 CHANGED R9946 TO 130K

P34 Changed note by R9756, Moved R9756 to right side of R7A16

P31 Removed CLK going to dock

P16 Removed ICHGPIO_25 off-page connection

P37 Change R3T9 to 1K

P3 Added header for ACLKPH and DCLKPH

P15 Added 100k PD to BUF_PLT_RST#

P8 REMOVED # FROM M_B_BS#[2:0]

PG 50: Added off page connector for BS_VBS_TRIP#

P17 Removed PD BOM notes

P33 Changed IPN for J5A1

P30 Changed +V3.3S_CLKRC to +V3.3SPG09: Moved C3T1 Vccp Bulk Cap to Page 10near Vccp railPG15: Changed stuffing option so PCIE lanes4 & 5 can be routed to PCIE slots 0 & 2

P47 Moved R9922 to P32

P17 moved R2463P32,51 Removed R9955P32,35 Removed BS_VBS_TRIP# and add RSMRST#_PWRDP54 change R4j2 to 1k 5%P41 port 80 notes changedP32,35,50 change +V3REF to +3.3A, delete U3 and two FETs, renamed BS_CLR_LTCH#, add 10k 5% pulldown to J1H1 and J1J1P50 notes changed on C2E1 and C2E7

Page 9: Replace C5T2 0805 @ 10uFwith a 0603 @ 1uFcap. Part name of the 1uF cap is(CAPC,X5R,0603,6.3V,20%,1UF). Replace C5T4, C5T5 and C5T3 (0.1uF caps) with0.22uF caps. Part name is(CAPC,X5R,0402,6.3V,_20%,0.22uF).Page 10: Replace C4D5 and C4D3 (10uF caps) with22uF caps.Page 10: Replace L5U1 and L6E1 (10uH inductor)with different 10uH inductors.

P50 Change C2W4 to 603275-124

P3,37 changed CPU PWRGD topology

P35 removed L_BKLTSEL on LPC slot

P32 added 0 ohm res to PM_THERM#

P34 Changed R7A4 to stuff

P50 CHANGED R9947 TO 49.9K

P32-33 Updated LAN symbol to 0.25

P21 Added PM_EXTTS#0

P50 Changed the value of R1Y2, R2Y2

P10 Moved C4E8 to pin U5E1-AB1

P17 moved R6G10

P33 Updated stuffing table

P10 CHANGED +V3.3S_ATVBG TO +VCCA_TVDAC

PG 50: Changed C2H1 from 2220 to 1210 footprint

P35 Moved layout note closer to TPM header

P34 Removed T symbol by R2824

P32 Moved BT_DETACH, BS_DISA# to new pins

P42 Added 8.2k PU to RS232_RI#P32 Changed BS_CHGA#, CHGB# to outputs

P5 removed R2437, modified no_stuff note

P45 Changed note

P22 Added PM_EXTTS#0

P50 CHANGED R3W4 TO 20K

P37 Changed R3T9 to 1%

P45 removed off page con VID_COMP

PG34.Please delete U7D9 and its associatecomponents, off pages around it in the currentcircle.PG32: Removed LAN_VGA_OVERRIDE and left it as an TPPG38: Changed the power rail on the two invertersto +V3.3A.Update the note table for CFG20 on page 12 Low = Only SDVO or PCIE x1 is operational(defaults) High = SDVO and PCIE x1 are operatingsimultaneously via the PEG port

P10 Stuffed R4F2

P3,37 Updated H_PWRGD circuit

P50 STUFFED C2H9, C2H12, C2H8, C2H7, C2H11

P10 CHANGED VCCA_TVBG TO +V3.3S_ATVBG

PG 52: Changed IMVP-6 input decoupling to correct poscaps

P7 DELETED NETS L_VREFH, L_VREFL

P10 Swapped C4E6 with C4E8

P34 Removed R9750

P54 Pulled Q100pin3 up to +V5SB_ATXA

P32 Changed R14-5 to caps

P48 DELETED R5U8, R4U9

P29 Moved USB_PN6, PP6 to rt side off J7E2

P32,35,38 Changed KBC_A20GATE to H_A20GATE

PG33. Remove U8,C6M4,C9063 and updated whole ckt.Deleted PE_PWRGD off page that goes to pin C3 ofU8A3A symbol. Kept the No-stuff 3.3K pull down asit is right now.

P50 CHANGED R3W8 TO 24.9K

P10 Delete FB4F1, FB5F1, FB5F2

P10 Replaced C6D1, C6F1, C542 WITH 724613-036

P3,37 Moved R33 and note to Page 3P32 Added diode to ARX_PWROK

P30 Updated FSB freq notes

P50 CHANGED C2W5, C2W4 TO .022UF

P51 Conected R2B9 to +VDC_PHASE

P12 UPDATED MCH_CFG_10,18,20

PG 46: Added 0O from 0.9PWRGD to DDRVR_PWRGD for stuffing option

P8 REMOVED # FROM M_A_BS#[2:0]

P10 Moved C4E5 to pin U5E1-A6

P32,50 Removed extra PU for SMB_BS_ALERT#

P54 Pulled R9W8 up to +V5SB_ATXA

P5 Removed J103,R9708,R9710

P10 Swapped C4E3 with C4E5

p128 Added 0 OHM RES TO P9 J1F3

P3 Swapped connections on pins A21,A22

P10 connect all four lines on that +V3.3S_TVDAC together, then add 10uF cap for the shared rail

P16 Changed R9E1 to 8.2K

P33 Implemented SPI shared topology

P30 Updated FSB Freq table

P46 Put Power measurement res back on

P32 NO_STUFFED C9058

P50 Changed VBS_TRIP# to BS_VBS_TRIP#

P14-17 Updated ICH symbol to rev 1P02

P35 Added L_BKLTSEL to LPC sideband header

P29 Fixed shorts on U6, U3A1

P48 Implemented changed to U5F1 power

P15 Added note for SPI flash sharing

PG 31: Update DB800 pinout to rev 2 & fixed all connections

P32 Changed R9881-6 to 10K and pulled up to +V3.3A

P34 Added notes for stuffing options


P50 Changed R2G2 to a 0402

P14 Changed R2380 to 332K


P51 Changed DPRSTP# to H_DPRSTP#

P38 CONNECTED PIN19,20 J9E2 TO +V3.3

P42 Updated SIO symbol

P30 Updated FSA table

P63 Updated MCH_RSVD 12-15 circuit and notes

ALL PAGES Named all unnamed nets

P17 Moved R2460

P48 Implemented changed to U4B1 power

P30,37 Added note for XDP stuffing

P5-10 UPdated Calistoga symbol

PG 49 & 54: Replaced 3456 FETs with 3442BDV FETs

P38 Removed R9G5, Added J1,R2, note


P31 Changed R7C17-18 to 0402

P35 Updated Symbol J5


P50 CHANGED R2H3 TO 41.3K

P17 Connected pin E3 to +V3.3A

P2 added port expander info to charts

P45 Removed R7 and shorted pins 10,11 (spare gate)

P58 Removed R2996,3001, and 3007

P10 Added BSS138 to V3S_TVDAC_LDO

P46 DELETED R5N1, R4N1

P46 changed loadline on 1.8 VR

P10 Replaced C4T2, C4T4 with C25529-001

P32 Changed net connected to R7A2 to KBC_PROG_TX#

PG 50: Changed battery charger output caps from ceramic to poscaps

P17 Removed C7U5, C7V7, C8484-7, C8492-6, C9005, C8512, C8525, C8527

P Replaced C9046 with 470uF

P50 Changed PU rail for R1V2 to +VAC_IN_L

P20 Cleaned up resistor properties, added table

P50 CHANGED R2H2 TO 49.9K

P30 Added PD option for p6 U7D2

P40 Added new page with triple stack USB

P21-2, Changed conection of PM_EXTTS#[0:1] from pin 120 to pin 50

P3,37 Updated H_PWRGD topology

P14 Removed notes

P48 Changed R5U9 to 14.7k

P17 CHANGED C8482 to 1uF

PG 50: Changed OCP resistors in batterycharger to correct values (R2W4 & R2W13)

P29 Removed notes from rt corner

P33-34 Deleated library notes

P32 Added 10kPU to pins 49 and 69 U9H1

P33 Removed CE#_R

Changed R3Y3 to R3J1Changed C1U1 to C1F2Changed R2Y3 to R3Y6

ALL UPDATED CACHE

P32: Rename off page connectorTV_DCON_DETECT# to TV_DCON_MODE and change tooutput.

P33,34 Stuffed R7B1,R8M1, removed NO_STUFF boxes.P13 Connected MCH_CFG_20 to J6C1.B48.P32 Added R9A10.P16 Connected R8B4 to +V3.3A.

P50 Changed R2W2 to 1k.

P10 Changed R6D8 to STUFF.

P50 Changed notes for MAX8724.

P50 Changed R1W5, R1W10 to 100K.

P50 Changed R2W1 to 6.65k.

P49 Renamed +VBS, +VBATA.

P50 Moved R1V1 to other side of FET.

P49 Moved Q4H1 to connect to U3H1p16, Added CR3W5.

P24 Changed R9G11 (stuff) and R9G16 (no_stuff)

P21 Removed C4B14, C4B16, C5B16, C5R2.

P30 Changed BSEL notes.

P50 Added 100k PD (R3H12) to BC_SHDN.

P50 Added C1V3.

P33 Changed U8A1 to XU8A1.

P49 Added CR4H1.PG14: No_Stuff U8F3.

P34 Changed Q7M1 to BSS138, Added R7A23.

PG55: C4G7 change from 0.1uF to 0.01uF (603269-020 CAPC,X7R,0603,50V,10%,.01UF.Normal).

P33-34 Changed stuffing notes for R7A20, R7M11.P32 Changed ref des in mode note.

P2 Corrected SMBUS address for Batt B.

P10 Changed C4T10 to .47uF, C4E2 to .22uF.

P3-4,14,21-2,24,26 Added X prefix to BT5H1, U8G1, J5P1, J5N1, U2E1.P26 Changed S9C1 to NO_STUFF.P2 Added J3B1 to jumper list.

P15,29 Added GNT5_SPI net.

P34 Stuffed R7A23P33 Updated IPN for new Tekoa rev.

P2 Changed Voltage rail table.

P7 Nostuffed R4R3, R5R2.

PG17: Changed ICH7 LAN powerrail change from +V3.3A to +V3.3.

P14 and P16: Updated symbol name for DPRSLPVR, STP_PCI#,STP_CPU#, CLKRUN#, BATLOW#, DPSLP# and DPRSTP#.P31. Changed R7P3 from 33 ohm to 15ohm.P30: Updated FSB Frequency Select table for the 667 MHzoption.

P23 Changed V rail in note to +V0.9

P11 Moved FB5D1, C6D1

P16 Changed R9E1 to 8.2k.

P33 Deleted R8M6,R8A4,R8A5,R8M5

P46 Changed R5N1 and R4N1 from 10K to 1K. IPN=202285-049.

P32 Changed Stuffing notes for MD0-2

P3 Changed R3R1 to 75 ohm.

P21 Swapped C4B14, C4B16, C5R1 with C4C11, C5C9,C5B17.

P46 Renamed C5N4-C5B18

P18 Changed video bandwidth stuffing note.

P31 Changed R7C27 to PD

P33 Replaced U8A1 with C79969-001.

P20 Changed U2M1, U2A1 to TLV2462.

P15,28,33 Renamed PCIE nets.

P3 Added no stuff TPs for impedance coupons

P31 Added 10PU (+V3.3S) to CLK_MCH_OE#

ALL Updated IRF7822 symbol.

P52 Renamed R1B3-R2P16

P44 NO_STUFFED TP9H1 ECO 214

P31 Removed # from DB800_SRC_STOP#, DB800_PD#

P32,24 Changed R9W2-3, R9G6 to 1.4k.

P54 Added R5W4, R3J3.

P33,34 Placed E and T marks for stuffing options

P18 Changed stuffing in Video bandwidth table.

P31 Updated U7D1 symbol.

P4,9,48 Unstuffed C4F7, Swapped C3T1 and C4T3, Added C3T5

P20: Deleted TV_DCON_DETECT# and its PU R1A1. NoConnect pin 14 of J2A1. Connect pin 8 of U2M1A,U2M1B, U2A1A, and U2A1B to +V5S from VBAT. Addedtwo decoupling caps to U2M1 and U2A1. Added aBSS138 FET to TV_DCON_MODE and DL1 net on U2M1A. Updated the table.

P49 Changed R4H10 to 29.4K. IPN= C63246-124.

P33 and 34 Updated stuffing optoin to supportTekoa.

P48 Changed C5G1 to Stuffed

P32 REfreshed U9H1 symbol.

P56 Changed R3J1 to R3J2

P9 Changed connection for C4D1-3, C5D2-3.

P48 Changed R5U9 and R5V16 from 10K to 1K. IPN=202285-049.

P26 Added warning about stuffing R9C1,R9C2 at the same time

P33 Removed _R from nets SPI_SI,SPI_SO, SPICE#, SPIS_CLK

P17 Moved C7H2 to other side of L6H1.

P20 Add R2A6 (IPN A36093-027, 0402 5% ,100K) pulldown on TV_DCONSEL0. ADD R2M9(IPN A36093-027,0402, 5%, 100K)) ON TV_DCONSEL1.

P30 Added a 56 ohm PU to pin3 J99

PG33: Replaced the SPI socket XU8A1(IC,SPI_FLASH_SKT,C79969-001) by the SPI solder downpart SIOC8 (IC,SST25LF080A,FLASH,SKT-PT, and IPN isC81985-001).: Changed ICH7 LAN power rail changefrom +V3.3A to +V3.3.

Rev 0.93

P7: Disclosed RSVD signals K30 and J29 as TV_DCONSEL0 andTV_DCONSEL1

P20 Inplemented new DCON curcuit

P44 Added SATA Hotswap note

P15 Changed R7U9 pu to +V1.5S_PCIE_ICH

P33 Updated IPN for new Tekoa rev

P32 Inplemented new DCON curcuit

P5 Changed R3N3, R3N8 TO 499 OHM

P2 Changed Voltage rail table

P39 Implemented changes to PATA_PWR_EN#

ALL Removed the X designation for sockets

PG55: C4G7 change from 0.1uF to 0.01uF (603269-020 CAPC,X7R,0603,50V,10%,.01UF.Normal).

P51 Changed values of C2N3,C2B6,C2N4,R2N9,R2N3,C2C3P44 Implemented changes to SATA_PWR_EN#

ALL Replaced 679195-003 with 108426-131, 10UF caps

P49 Added CR4H1

P31 Changed ref desig R5H14 = R6D30, R5H15 = R6D31, R5H27 = R6D32, R5H28 = R6D33

P34 Changed Q7M1 to BSS138, Added R7A23

P54 Changed C2V2 to .33UF

P33-34 Changed stuffing notes for R7A20, R7M11

P2 Added J9G3 to jumper table

P7 Removed R4R3, R5R2 created TP's

P32 Changed ref des in mode note

P24 Changed the fab ID to fab 3

P33 Removed probing notes

P10 Changed C4T10 to .47uF, C4E2 to .22uF

P5 Changed R9H9 to R9G18 in note

P15,29 Added GNT5_SPI net

P30 Moved SRC6, SRC6# to SRC5, SRC5#

P33 Changed R8M6 to 3k and pulled up to +V3.3

P30 Added J1F9

P52 Added R2C6, R2P17 for Phase2 operationP52 Changed R2C6 to R2C7

P51 Added J2B2

P7 Added R6E4, R8E5

P30,31,33 Changed the conection of CLK_REQ#_LAN, CLK_PCIE_LAN, CLK_PCIE_LAN#

P51 Changed C2B8 to 0.01uF

P51 Added R1C1

PG14: No_Stuff U8F3.

P52 Changed note to 2-phase from phase2

P39 Added PATA Hotswap note

P31 Changed R7P3 to 15 ohm

P30 Added J1F9

Changes from R1.301 to 1.401

P30 Moved SRC6, SRC6# to SRC5, SRC5#

P44 Added SATA Hotswap note

P20 Swapped location of Dline1/Dline3, Dline1_IO/Dline3_IOP20 Changed the note for the d-connector

P39 Added PATA Hotswap note

P7 Removed R4R3, R5R2 created TP's

P24 Changed R9G11 to STUFF, Changed R9G16 to NO_STUFF

P24 Changed the fab ID to fab 3

P54 Changed C2V2 to .33UF

P16 Changed R3P1 to 2K 1%

ALL Reved to 1.301

P31 Updated DB800 rev note

P24 Changed Fab ID to 5

P51 Changed R2B15 to 121K, added J? and 200k res R?

5/24: PG51: Changed R2N8 from 13.7kOhm to 15.4kOhm(iPN: 202286-685 , RESD, 0603, 1%, 1/16W, 15.4K)

P51 Implemented DLL curcuitP35 Added PPV EEPROM CircuitP33 Added R7B21, R7B22, U7B11

Changes from 1.401 to 1.501

D13073 1.501

REV HISTORY

A


Title


Date: Sheet of



.com


.com

ww.

Calistoga 1.5V GMCH_CORE NOTE The following two pages are shown as a reference to configure Calistoga for 1.5V GMCH_CORE. This is only a reference for the Calistoga connections for the Napa platform and does not detail the full procedure such as current requirements for the VR. Replacing the Capell Valley pages with the following pages is not sufficient to enable Calistoga for 1.5V operation. For complete details, consult the Napa Design Guide.

R


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A APLACE IN CAVITYPlace C5D1 nearpin BA15 onLayer1

D15378 1.501

CALISTOGA (4 OF 6)

A


Title


Date: Sheet of


VCCSM_LF4VCCSM_LF5

VCCSM_LF2VCCSM_LF1

+V1.5S_AUX10,58

+V1.5S 3,4,6,10,14,17,30,37,45,48,53,56,58

+V1.5S 3,4,6,10,14,17,30,37,45,48,53,56,58

+V1.8 7,21,22,34,46,47,56,58

VCC

U5E1G

CALISTOGA_1p0

AA33W33P33N33L33J33

AA32Y32

W32V32P32N32M32L32J32

AA31W31V31T31R31P31N31M31

AA30Y30

W30V30U30T30R30P30N30M30L30

AA29Y29

W29V29U29R29P29M29L29

AB28AA28

Y28V28U28T28R28P28N28M28L28P27N27M27L27P26N26L26N25M25L25P24N24M24

AB23AA23

Y23P23N23M23L23

AC22AB22

Y22W22P22N22M22L22

AC21AA21W21N21M21L21

AC20AB20

Y20W20P20N20M20L20

AB19AA19

Y19N19M19L19N18M18

AU41AT41AM41AU40BA34AY34AW34AV34AU34AT34AR34BA30AY30AW30AV30AU30AT30AR30AP30AN30AM30AM29AL29AK29AJ29AH29AJ28AH28AJ27AH27BA26AY26AW26AV26AU26AT26AR26AJ26AH26AJ25AH25AJ24AH24BA23AJ23BA22AY22AW22AV22AU22AT22AR22AP22AK22AJ22AK21AK20BA19AY19AW19AV19AU19AT19AR19AP19AK19AJ19AJ18AJ17AH17AJ16AH16BA15AY15AW15AV15AU15AT15AR15AJ15AJ14AJ13AH13AK12AJ12AH12AG12AK11BA8AY8AW8AV8AT8AR8AP8BA6AY6AW6AV6AT6AR6AP6AN6AL6AK6AJ6AV1AJ1

L18P17N17M17N16M16L16

VCC_0VCC_1VCC_2VCC_3VCC_4VCC_5VCC_6VCC_7VCC_8VCC_9VCC_10VCC_11VCC_12VCC_13VCC_14VCC_15VCC_16VCC_17VCC_18VCC_19VCC_20VCC_21VCC_22VCC_23VCC_24VCC_25VCC_26VCC_27VCC_28VCC_29VCC_30VCC_31VCC_32VCC_33VCC_34VCC_35VCC_36VCC_37VCC_38VCC_39VCC_40VCC_41VCC_42VCC_43VCC_44VCC_45VCC_46VCC_47VCC_48VCC_49VCC_50VCC_51VCC_52VCC_53VCC_54VCC_55VCC_56VCC_57VCC_58VCC_59VCC_60VCC_61VCC_62VCC_63VCC_64VCC_65VCC_66VCC_67VCC_68VCC_69VCC_70VCC_71VCC_72VCC_73VCC_74VCC_75VCC_76VCC_77VCC_78VCC_79VCC_80VCC_81VCC_82VCC_83VCC_84VCC_85VCC_86VCC_87VCC_88VCC_89VCC_90VCC_91VCC_92VCC_93VCC_94VCC_95VCC_96VCC_97VCC_98VCC_99VCC_100VCC_101VCC_102VCC_103

VCC_SM_0VCC_SM_1VCC_SM_2VCC_SM_3VCC_SM_4VCC_SM_5VCC_SM_6VCC_SM_7VCC_SM_8VCC_SM_9

VCC_SM_10VCC_SM_11VCC_SM_12VCC_SM_13VCC_SM_14VCC_SM_15VCC_SM_16VCC_SM_17VCC_SM_18VCC_SM_19VCC_SM_20VCC_SM_21VCC_SM_22VCC_SM_23VCC_SM_24VCC_SM_25VCC_SM_26VCC_SM_27VCC_SM_28VCC_SM_29VCC_SM_30VCC_SM_31VCC_SM_32VCC_SM_33VCC_SM_34VCC_SM_35VCC_SM_36VCC_SM_37VCC_SM_38VCC_SM_39VCC_SM_40VCC_SM_41VCC_SM_42VCC_SM_43VCC_SM_44VCC_SM_45VCC_SM_46VCC_SM_47VCC_SM_48VCC_SM_49VCC_SM_50VCC_SM_51VCC_SM_52VCC_SM_53VCC_SM_54VCC_SM_55VCC_SM_56VCC_SM_57VCC_SM_58VCC_SM_59VCC_SM_60VCC_SM_61VCC_SM_62VCC_SM_63VCC_SM_64VCC_SM_65VCC_SM_66VCC_SM_67VCC_SM_68VCC_SM_69VCC_SM_70VCC_SM_71VCC_SM_72VCC_SM_73VCC_SM_74VCC_SM_75VCC_SM_76VCC_SM_77VCC_SM_78VCC_SM_79VCC_SM_80VCC_SM_81VCC_SM_82VCC_SM_83VCC_SM_84VCC_SM_85VCC_SM_86VCC_SM_87VCC_SM_88VCC_SM_89VCC_SM_90VCC_SM_91VCC_SM_92VCC_SM_93VCC_SM_94VCC_SM_95VCC_SM_96VCC_SM_97VCC_SM_98VCC_SM_99

VCC_SM_100VCC_SM_101VCC_SM_102VCC_SM_103VCC_SM_104VCC_SM_105VCC_SM_106VCC_SM_107

VCC_104VCC_105VCC_106VCC_107VCC_108VCC_109VCC_110

C5R4

10uF

NCTF

U5E1F

CALISTOGA_1p0

AD27AC27AB27AA27

Y27W27V27U27T27R27

AD26AC26AB26AA26

Y26W26V26U26T26R26

AD25AC25AB25AA25

Y25W25V25U25T25R25

AD24AC24AB24AA24

Y24W24V24U24T24R24

AD23V23U23T23R23

AD22V22U22T22R22

AD21V21U21T21R21

AD20V20U20T20R20

AD19V19U19T19

AD18AC18AB18AA18

Y18W18V18U18T18

AE27AE26AE25AE24AE23AE22AE21AE20AE19AE18AC17Y17U17

R19AG18AF18R18AG17AF17AE17AD17AB17AA17W17V17T17R17AG16AF16AE16AD16AC16AB16AA16Y16W16V16U16T16R16AG15AF15AE15AD15AC15AB15

AG27AF27AG26AF26AG25AF25AG24AF24AG23AF23AG22AF22AG21AF21AG20AF20AG19AF19

AA15Y15W15V15U15T15R15

VCC_NCTF0VCC_NCTF1VCC_NCTF2VCC_NCTF3VCC_NCTF4VCC_NCTF5VCC_NCTF6VCC_NCTF7VCC_NCTF8VCC_NCTF9VCC_NCTF10VCC_NCTF11VCC_NCTF12VCC_NCTF13VCC_NCTF14VCC_NCTF15VCC_NCTF16VCC_NCTF17VCC_NCTF18VCC_NCTF19VCC_NCTF20VCC_NCTF21VCC_NCTF22VCC_NCTF23VCC_NCTF24VCC_NCTF25VCC_NCTF26VCC_NCTF27VCC_NCTF28VCC_NCTF29VCC_NCTF30VCC_NCTF31VCC_NCTF32VCC_NCTF33VCC_NCTF34VCC_NCTF35VCC_NCTF36VCC_NCTF37VCC_NCTF38VCC_NCTF39VCC_NCTF40VCC_NCTF41VCC_NCTF42VCC_NCTF43VCC_NCTF44VCC_NCTF45VCC_NCTF46VCC_NCTF47VCC_NCTF48VCC_NCTF49VCC_NCTF50VCC_NCTF51VCC_NCTF52VCC_NCTF53VCC_NCTF54VCC_NCTF55VCC_NCTF56VCC_NCTF57VCC_NCTF58VCC_NCTF59VCC_NCTF60VCC_NCTF61VCC_NCTF62VCC_NCTF63VCC_NCTF64VCC_NCTF65VCC_NCTF66VCC_NCTF67VCC_NCTF68VCC_NCTF69VCC_NCTF70VCC_NCTF71VCC_NCTF72

VSS_NCTF0VSS_NCTF1VSS_NCTF2VSS_NCTF3VSS_NCTF4VSS_NCTF5VSS_NCTF6VSS_NCTF7VSS_NCTF8VSS_NCTF9

VSS_NCTF10VSS_NCTF11VSS_NCTF12

VCCAUX_NCTF18VCCAUX_NCTF19VCCAUX_NCTF20VCCAUX_NCTF21VCCAUX_NCTF22VCCAUX_NCTF23VCCAUX_NCTF24VCCAUX_NCTF25VCCAUX_NCTF26VCCAUX_NCTF27VCCAUX_NCTF28VCCAUX_NCTF29VCCAUX_NCTF30VCCAUX_NCTF31VCCAUX_NCTF32VCCAUX_NCTF33VCCAUX_NCTF34VCCAUX_NCTF35VCCAUX_NCTF36VCCAUX_NCTF37VCCAUX_NCTF38VCCAUX_NCTF39VCCAUX_NCTF40VCCAUX_NCTF41VCCAUX_NCTF42VCCAUX_NCTF43VCCAUX_NCTF44VCCAUX_NCTF45VCCAUX_NCTF46VCCAUX_NCTF47VCCAUX_NCTF48VCCAUX_NCTF49VCCAUX_NCTF50

VCCAUX_NCTF0VCCAUX_NCTF1VCCAUX_NCTF2VCCAUX_NCTF3VCCAUX_NCTF4VCCAUX_NCTF5VCCAUX_NCTF6VCCAUX_NCTF7VCCAUX_NCTF8VCCAUX_NCTF9

VCCAUX_NCTF10VCCAUX_NCTF11VCCAUX_NCTF12VCCAUX_NCTF13VCCAUX_NCTF14VCCAUX_NCTF15VCCAUX_NCTF16VCCAUX_NCTF17

VCCAUX_NCTF51VCCAUX_NCTF52VCCAUX_NCTF53VCCAUX_NCTF54VCCAUX_NCTF55VCCAUX_NCTF56VCCAUX_NCTF57

C5T40.22uF

C4D1

0.47uF

C5D3

0.47uF

C5T710uF

C4T7270uF

2.0V, 3.3Arms

C4D2

0.47uF

C5R3

10uF

C4T6270uF

20%

C5D1

0.47uF

C5D4

0.47uF

C5T50.22uF

C5D2

0.47uF

C5T30.22uF

C5T21uF

20%

C5T610uF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MCH_CFG_5 Low = DMIx2High = DMIx4

Low = RSVDHigh = Mobile CPU

MCH_CFG_7(CPU Strap)

Low = Dynamic ODTDisabledHigh = Dynamic ODTEnabled

MCH_CFG_16(FSB DynamicODT)

MCH_CFG_9PCIE GraphicsLane

Low = Reverse LaneHigh = Normaloperation

Low = ReservedHigh = Calistoga

MHC_CFG_11PSB 4x CLKENABLE

MCH_CFG_10HOST PLL VCOSELECT

Low = RESERVEDHigh = MOBILITY

Low = 1.05VHigh = 1.5V

Low = Only SDVO or PCIE x1 isoperational (defaults)High = SDVO and PCIE x1 are operatingsimultaneously via the PEG port

MCH_CFG_20(PCIe Backward Interpoerabilitymode)

MCH_CFG_18(VCCSelect)

MCH_CFG_19(DMI LANE REVERSAL)

Low = NormalHigh = LANES REVERSED

Layout Note:Location of all MCH_CFG strap resistorsneeds to be close to trace to minimize stub

MCH_CFG_6 (DDR)

LOW = Moby Dick

HIGH = Calistoga

NO_STUFF

NO_STUFFNO_STUFF

D15378 1.501

CALISTOGA STRAPPING

A


Title


Date: Sheet of


MCH_CFG_57

MCH_CFG_77 MCH_CFG_167

MCH_CFG_97

MCH_CFG_117

MCH_CFG_107

MCH_CFG_187

MCH_CFG_207,13

MCH_CFG_197

+V3.3S5,7,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S5,7,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

+V3.3S

5,7,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,37,39,42,43,44,45,47,48,49,51,54,55,56,57,58

MCH_CFG_137

MCH_CFG_127

MCH_CFG_67

R1E82.2K

R1E22.2KNO_STUFF

R1E122.2K

R5U31KNO_STUFF

R1D32.2K

NO_STUFF

R1E12.2K

NO_STUFF

R5F11KNO_STUFF

R1E112.2K

R6F11K

R1E32.2K

NO_STUFF

R1D52.2K

R1D42.2K

NO_STUFF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

Block Diagram

A

1 12Monday, February 28, 2005UPHAM II

BT Antenna802.11

Antenna

mPCIe Slot 2mPCIe Slot 0

Bluetooth

module

Power and

Reset Logic

PCI-E Slot 2PCI-E Slot 0

CRB PCIE Slot 0 CRB PCIE Slot2

USB

FPIO

Side Band

Header

USB Type B

Header

BT/Calexico

Coexistence

header

miniPCIe

Connector

miniPCIe

Connector

Bluetooth

header

UPHAM II

PCIe mini card Interposer for Napa/Sonama Platform

UPHAM IIPBA# C72470-101


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

Notes

A


Stuffing options table based upon SiWave BT spin:======================================= First Spin Second Spin----------------------------------------------------------------R72 27 ohm 0 ohmR74 27 ohm 0 ohmR77 1.5K ohm No_StuffR91 10K ohm 10K ohmR87 Stuff No_StuffR88 No_Stuff StuffR89 Stuff No_StuffR84 No_Stuff StuffR92 Stuff No_StuffR93 No_Stuff StuffR86 No_Stuff StuffR96 Stuff No_stuff=======================================This schematic is designed with the assumption that thesecond SiWave BT spin will be used on first build ofFishhook. The table above is to be used as a referenceif the first spin of the BT module is to be used.

Default Jumper settings:=========================================== Default Description Pg-----------------------------------------------------------------J6 1-2 Power to BT LDO from USB 8J10 1-X Channel data to Slot2 4J14 2-3 H/w Shutdown for BT 8J11 1-X BT clk to Slot2 4J12 1-X Channel data to slot0 3J13 1-X BT/Pri_Clk to Slot0 3J5 1-X Power to BT LDO from V3.3A 8SW1 1-2 Power to BT 8SW2 1-2 RF_KILL 7===========================================.

Stuffing options for Sonoma & Napa platform======================================= Sonoma Napa----------------------------------------------------------------R61 No_stuff 0 ohmR54 No_stuff 0 ohmR97 0 ohm No_StuffR98 0 ohm No_Stuff.

To Disconnect SMBUS==================No_stuff-------------R44 R45 R62 R63-------------


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PET+_T1PET-_T1

PER+_T1PER-_T1

REFCLK+_T1REFCLK-_T1

RCLKREQ_T1

WAKE#_T1

PER+_T1PET-_T1

REFCLK-_T1

WAKE#_T1

PER-_T1

REFCLK+_T1PET+_T1

SMB_DATA_T1 SMDATA_PCIE_T1SMCLK_PCIE_T1

SMCLK_PCIE_T1

V3.3AUX_T1_SLOT

SMDATA_PCIE_T1

RSVD2_T1GPIO2_T1

GPIO1_T1 RSVD1_T1

V3.3_T1_SLOT

PRSNT2#_T1 PRSNT1#_T1

TDO_T1

TDI_T1

V1.5_T1_SLOT

SMB_CLK_T1

WAKE#_T1

PRSNT2#_T1

RCLKREQ_T1

RT2_RF_KILL#

CH_DATA_T1BTCLK_IN_T1

GPIO2_T1GPIO1_T1

USB_D-_T1 10USB_D+_T1 10

PERST_PCIE#_T1 6

LED_WWAN#_T1 7LED_WLAN#_T1 7LED_WPAN#_T1 7

PERST#_T1 6

V1.5_T1_SLOT 6

V3.3_T1_SLOT 5,6,7,8

V3.3AUX_T1_SLOT 6,7,8

V3.3AUX_T1_SLOT6,7,8

V1.5_T1 5

V3.3AUX_PCIE_T1

V3.3_PCIE_T15

V3.3AUX_PCIE_T1

V3.3AUX_PCIE_T1

V3.3_PCIE_T15

RF_KILL# 4,7

BT_PRI/CLK4,9

CHANNEL_DATA4,9

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

PCIE to miniPCIe connector

A

3 12Monday, February 28, 2005

UPHAM II

miniPCIe Slot 0

PCIe Slot 0

Layout Note:Place decoupling capsclose to PCIe gold fingers

Napa Platform :CLKREQ# support,connected toPRSNT2#_T1

Default Jumper settingfor J12 and J13 is 1-X

R44 0

C60

10uFNO_STUFF

20%

TP5

NO

_S

TU

FF

+ C2822uF

12

R49 0

NO_STUFF

TP2

NO

_S

TU

FF

C210.1uF

10%

+ C2222uF

12

R600NO_STUFF

C550.1uF

10%

R80 .002

R610

R81 .002

+ C4222uF20%

12

C59

10uFNO_STUFF

20%

R76 .002

TP10

NO_STUFF

C450.1uF

10%

J13

R100

0

NO_STUFF

C58

10uF NO_STUFF

20%

KEY

J3

PCI-e_MINI_CARD

RSVD17 16RSVD16 14RSVD15 12RSVD14 10RSVD13 8+1.5V_1 6

GND7 4+3.3V_1 2WAKE#1

RSVD13

RSVD25

CLKREQ#7

GND19

REFCLK-11

REFCLK+13

GND215

RSVD317

RSVD419

GND321

PER_N023

PER_P025

GND427

GND529

PET_N031

PET_P033

GND635

RSVD537

RSVD639

RSVD741

RSVD843

RSVD945

RSVD1047

RSVD1149

RSVD1251

GND8 18

RSVD18 20

PERST# 22

+3.3V_AUX 24

GND9 26

+1.5V_2 28

SMB_CLK 30

SMB_DATA 32

GND10 34

USB_D- 36

USB_D+ 38

GND11 40

LED_WWAN# 42

LED_WLAN# 44

LED_WPAN# 46

+1.5V_3 48

GND12 50

+3.3V_2 52

GNDM155 GNDM2 56

R50 0

NO_STUFF

C56

10uFNO_STUFF

20%

TP15

NO_STUFF

R710

C35

10uFNO_STUFF

20%

R35

10K

TP25

NO

_S

TU

FF

J12

C490.1uF

10%

C57

10uFNO_STUFF

20%

R45 0

LATCH(GND ALL)

J17

MINI_CARD_LATCH_ TYCO

MT11

MT22

MT33

MT4 4

MT5 5C620.1uF

10%

TP6

NO_STUFF

+ C4022uF

12

TP9

NO

_S

TU

FF

R97 0NO_STUFF

Sid

e A

Sid

e B

P1

PCIE x1 Gold Finger

+12V_1B1

+12V_2B2

RSVD1B3

GND1B4

SMCLKB5

SMDATAB6

GND2B7

+3.3V_1B8

TRST#B9

3.3VauxB10

WAKE#B11

RSVD2B12

GND3B13

HSO_PB14

HSO_NB15

GND4B16

PRSNT2#B17

GND5B18

PRSNT1# A1

+12V_3 A2

+12V_4 A3

GND6 A4

TCK A5

TDI A6

TDO A7

TMS A8

+3.3V_2 A9

+3.3V_3 A10

PWRGD A11

GND7 A12

REFCLK+ A13

REFCLK- A14

GND8 A15

HSI_P A16

HSI_N A17

GND9 A18

TP18

NO

_S

TU

FF

+ C3022uF

12

TP17

NO

_S

TU

FF

R3310KNO_STUFF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PER+_T2PET-_T2

REFCLK-_T2

WAKE#_T2

PER-_T2

REFCLK+_T2PET+_T2

SMCLK_PCIE_T2

SMCLK_PCIE_T2SMDATA_PCIE_T2

TDI_T2

TDO_T2

PRSNT2#_T2

RSVD1_T2GPIO1_T2

RSVD2_T2GPIO2_T2

PRSNT1#_T2

SMDATA_PCIE_T2

RCLKREQ_T2BTCLK_IN_T2

WAKE#_T2

PER+_T2PER-_T2

PET-_T2

CH_DATA_T2

REFCLK-_T2

GPIO1_T2

REFCLK+_T2

SMB_CLK_T2

PET+_T2SMB_DATA_T2

GPIO2_T2V3.3_T2_SLOT

V1.5_T2_SLOT

RCLKREQ_T2

PRSNT2#_T2

WAKE#_T2

V3.3AUX_T2_SLOT

RS

VD

18

_T

2

USB_D+_T2 10USB_D-_T2 10

LED_WWAN#_T2 7LED_WLAN#_T2 7LED_WPAN#_T2 7

PERST_PCIE#_T2 6

BT_PRI/CLK3,9

PERST#_T2 6

RF_KILL# 3,7

V3.3AUX_PCIE_T2

V1.5_T2 5

V3.3_PCIE_T2 5

V3.3AUX_T2_SLOT6,7,8,9

V3.3_PCIE_T25

V3.3AUX_PCIE_T2

V3.3_T2_SLOT 5,6,7

V1.5_T2_SLOT6

V3.3AUX_PCIE_T2

V3.3AUX_T2_SLOT 6,7,8,9

CHANNEL_DATA3,9

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

PCIE to miniPCIe connector

A


UPHAM II

PCIe Slot 2

Layout Note:Place decoupling capsclose to PCIe goldfingers

Default Jumper setting for J7 is1-2 Closed

Default Jumper settingforJ10 and J11 is 1-X

miniPCIe Slot 2

Napa Platform :CLKREQ# support,connected toPRSNT2#_T1

C520.1uF

10%

TP19

NO_STUFF

R48 0

NO_STUFF

C430.1uF

10%

R85 .002

TP23

NO

_S

TU

FF

C26

10uF NO_STUFF

20%

R47 0

TP8

NO_STUFF

R98 0NO_STUFF

R63 0

+ C2022uF

12

TP7

NO

_S

TU

FF

J11

R79 .002

+ C5022uF20%

12

R65 0

NO_STUFF

TP13

NO

_S

TU

FF

J10

R70 .002

C290.1uF

10%

C37

10uFNO_STUFF

20%C44

10uFNO_STUFF

20%

TP24

NO

_S

TU

FF

C61

10uF NO_STUFF

20%

R53

10K

LATCH(GND ALL)

J18

MINI_CARD_LATCH_ TYCO

MT11

MT22

MT33

MT4 4

MT5 5

C360.1uF

10%

R64 0

NO_STUFF

C63

10uF NO_STUFF

20%C640.1uF

10%

KEY

J4

PCI-e_MINI_CARD

RSVD17 16RSVD16 14RSVD15 12RSVD14 10RSVD13 8+1.5V_1 6

GND7 4+3.3V_1 2WAKE#1

RSVD13

RSVD25

CLKREQ#7

GND19

REFCLK-11

REFCLK+13

GND215

RSVD317

RSVD419

GND321

PER_N023

PER_P025

GND427

GND529

PET_N031

PET_P033

GND635

RSVD537

RSVD639

RSVD741

RSVD843

RSVD945

RSVD1047

RSVD1149

RSVD1251

GND8 18

RSVD18 20

PERST# 22

+3.3V_AUX 24

GND9 26

+1.5V_2 28

SMB_CLK 30

SMB_DATA 32

GND10 34

USB_D- 36

USB_D+ 38

GND11 40

LED_WWAN# 42

LED_WLAN# 44

LED_WPAN# 46

+1.5V_3 48

GND12 50

+3.3V_2 52

GNDM155 GNDM2 56

+ C5322uF

12

Sid

e A

Sid

e B

P2

PCIE x1 Gold Finger

+12V_1B1

+12V_2B2

RSVD1B3

GND1B4

SMCLKB5

SMDATAB6

GND2B7

+3.3V_1B8

TRST#B9

3.3VauxB10

WAKE#B11

RSVD2B12

GND3B13

HSO_PB14

HSO_NB15

GND4B16

PRSNT2#B17

GND5B18

PRSNT1# A1

+12V_3 A2

+12V_4 A3

GND6 A4

TCK A5

TDI A6

TDO A7

TMS A8

+3.3V_2 A9

+3.3V_3 A10

PWRGD A11

GND7 A12

REFCLK+ A13

REFCLK- A14

GND8 A15

HSI_P A16

HSI_N A17

GND9 A18

TP14

NO_STUFF

+ C5122uF

12

R5110K

NO_STUFF

C32

10uFNO_STUFF

20%

R990

NO_STUFF

R540

R62 0

+ C4122uF

12


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LDO_1.5V_RST#_T1

LDO_1.5V_RST#_T2

V1.5_T13

V3.3_PCIE_T13

V1.5_T24

V3.3_PCIE_T24

V3.3_T1_SLOT 3,6,7,8

V3.3_T2_SLOT 4,6,7

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

miniPCIe Card Slot Power Control

A


UPHAM II

MFG P/N (MAX1793EUE-15)

MFG P/N (MAX1793EUE-15)

No Stuff resistors added for any future signal strapping requirements

C340.1uF

10%

R82 100K

+ C3315uF

20%

R75 100K

R58

10K

NO_STUFF5%

R57

10K

NO_STUFF

5%

R56

0

NO_STUFF

C384.7uF

10%

R69

0

NO_STUFF

R67

10KNO_STUFF

5%

C250.1uF

10%

+ C2715uF

20%

C460.1uF

10%

R66

10K

NO_STUFF5%

EU1

MAX1793

NC11

IN12

IN23

IN34

IN45

RST#6

SHDN#7

NC28 NC3 9GND 10SET 11

OUT4 12

OUT1 15

OUT2 14

OUT3 13

NC4 16

THRMGND 17

C394.7uF

10%

R68

0NO_STUFF

EU2

MAX1793

NC11

IN12

IN23

IN34

IN45

RST#6

SHDN#7


OUT4 12

OUT1 15

OUT2 14

OUT3 13

NC4 16

THRMGND 17

C470.1uF

10%

R55

0

NO_STUFF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PG_3.3_T2PG_1.5_T2

PG_1.5_T1PG_3.3_T1

PERST_PCIE#_T2

PERST_PCIE#_T1

MECH_RST_T1#

MECH_RST_T2#

VAUX_RST_T1#

VAUX_RST_T2#

PWRGD_T1

R_MECH_RST_T1#

MECH_RST_T1#

R_MECH_RST_T2#MECH_RST_T2#

AND_PERST_T1

AND_PERST_T2PWRGD_T2

PERST#_T1 3

PERST#_T2 4

PERST_PCIE#_T13

PERST_PCIE#_T24

V3.3_T2_SLOT4,5,7



V1.5_T2_Slot4



V3.3_T1_SLOT3,5,7,8

V1.5_T1_Slot3

PWRGD8

PWRGD8

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

Slot Power Good Monitor

A


UPHAM II

Voltage ThresholdVth = 2.9V for 3.3V, 3.3VauxVth = 1.3V for 1.5V

0.62 Internal ThresholdSetting

0.62 Internal ThresholdSetting

R29 0

R240

5%

TP3NO_STUFF

C90.1uF

10%

R23 0

U4

MAX6714

MR#1

RESET# 9

PF1# 8

PF2# 7

PF3# 6

IN12

IN23

IN34

GND5

VCC 10

C100.1uF

10%U5

MAX6714

MR#1

RESET# 9

PF1# 8

PF2# 7

PF3# 6

IN12

IN23

IN34

GND5

VCC 10

TP12

NO_STUFF

R27 0

R14 0NO_STUFF

C150.1uF

10%

U2

74AHC1G08

1

24

53

R4322.1K

1%

C140.1uF

10%

R150

5%

R4220k_1%

TP11

NO_STUFF

U1

74AHC1G08

1

24

53

R22 0

NO_STUFF

R25

10K

R30

10K

R3820k_1%

TP1

NO_STUFF

R3922.1K

1%

R19 0

R3617.8K

1%

R374.99k_1%

R404.99k_1%

R28 0

NO_STUFF

R4117.8K

1%

R16 0NO_STUFF

R34

10K

R17 0NO_STUFF

R13 0NO_STUFF

R31

10K


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SEL_AUX_T1 SEL_AUX_T2

BIAS_PAN_T1

BIAS_LED_RF

BIAS_LAN_T1

BIAS_WAN_T1

BIAS_LAN_T2

BIAS_PAN_T2

BIAS_WAN_T2

SW_RF_KILL#

LED_WWAN#_T1 3

LED_WLAN#_T1 3

LED_WPAN#_T2 4LED_WPAN#_T1 3

LED_WLAN#_T2 4

LED_WWAN#_T2 4

V3.3AUX_T1_SLOT3,6,8V3.3_T1_SLOT 3,5,6,8 V3.3AUX_T2_SLOT4,6,8,9V3.3_T2_SLOT 4,5,6

V3.3AUX_T1_SLOT 3,6,8 V3.3AUX_T1_SLOT 3,6,8

RF_KILL# 3,4

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

Status indicator LEDs for mini cards

A


UPHAM II

LED Status=================================================================== Description ON Slow Blink Intermittent Blink------------------------------------------------------------------------------------------------------CR7 W-WAN T1 Ready to Tx/Rx NA Activity prop to Tx/Rx SpeedCR10 W-WAN T2 Ready to Tx/Rx NA Activity prop to Tx/Rx SpeedCR8 W-LAN T1 Ready to Tx/Rx Not associated Activity prop to Tx/Rx SpeedCR9 W-LAN T2 Ready to Tx/Rx Not associated Activity prop to Tx/Rx SpeedCR3 W-PAN T1 Ready to Tx/Rx Not associated Activity prop to Tx/Rx SpeedCR4 W-PAN T2 Ready to Tx/Rx Not associated Activity prop to Tx/Rx SpeedCR11 RF_KILL Disable RF TxCR12 BT 3.3V 3.3V for BT available ===================================================================

Debounce for RF_KILL Switch

CR9YELLOW

12

R6 165

1%

CR4GREEN

12

CR11

GREEN

12

R26 0.002

R59

165 1%

R1 .002

NO_STUFF

R3 165

1%

R4 165

1%

U6

MAX6816

VCC 4

OUT 3

GND1

IN2

C23

0.1uF

10%

CR10GREEN

12

R2 165

1%

R11 165

1%

R18 .002

NO_STUFF

SW2

SPDT_SLIDE

21

3

C180.1uF

10%

CR3GREEN

12

R12 0.002

R5 165

1%

CR7GREEN

12

CR8YELLOW

12

C190.1uF

10%


.com


.com

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

BT_VREGRST#

BT_SHDN#

LED

SPDT_LOW

BT_ON

V3_PWR

J34_PIN1

BT_VREGOUT

TP_BT_WAKE

TP_BT_DETACHCARD_ID#0CARD_ID#1

DELAY_RST

BT_ON

CARD_ID#0

CARD_ID#1

CARD_ID#0

CARD_ID#1

BT3.3V 9

BT3.3V 9

USB5V 9


BT3.3V 9

WDS_RESET_N 9

V3.3AUX_T2_SLOT 4,6,7,9

+V5A

V3.3_T1_SLOT 3,5,6,7

USB5V_FPIO10


PWRGD 6

+V5A

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

BT Voltage Sources

A


Bluetooth Sideband

Default jumper setting forSW1 is:2 - 1 Closed by default

Default jumper setting for J6 is:1 - 2 Closed by default

+V5A connected to Pin7 needsBluetooth Sideband Cable

MFG P/N(MAX1793EUE-33)

Default jumper setting forJ14 is:2 - 3 Closed by default

+V5A connected to Pin3 comesfrom USB FPIO connector

3.3VAUX (3.3Always) connected toPin5 comes from PCI-e connector

J5: Default setting 1-X3.3VAUX (3.3Always) connected toPin1 supplied from PCI-e connector Slot1

C162.2uF

10%

R2010K

5%

C54.7uF

10%

R965.49K

NO_STUFF

1%

CON3_HDRJ14

32

1

CR12

GREEN

12

R10100

1%

R91K

NO_STUFF 1%

R524751%

U9

MAX809

GND 1

RS

T#

2

VCC3

J5

SW1

SPDT_SLIDE

21

3

R32 100K

J78Pin_HDR

12345678

C120.1uF

10%

C48100uF

20%

TP4

NO_STUFF

U3

MAX1793

NC11

IN12

IN23

IN34

IN45

RST#6

SHDN#7


OUT4 12

OUT1 15

OUT2 14

OUT3 13

NC4 16

R8100

NO_STUFF 1%

C110.01UF

10%

C540.1uF

10%

+ C1715uF

20%

R461M

J6

8Pin HDR

1 23 45 67 8

R2110K

5%

C134.7uF

10%

C34.7uF

10%

R71K

1%

C70.01UF

10%

C60.1uF

10%

R94

4.7K

5%

+ C822uF

12


.com


.com

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

USB_D+_PULLUP

D-USB_D+

USB_D-

HCI_UART_RTS

AR_GPIO_3

AUX_UART_TXD

VBB_RDY

USB_D+_PULLUP

HOST_WAKEUP

CODEC_PCMIN

USB_D+

BTSP2_2BTSP1_3

GPIO_4

CODEC_BCLK

CLK_32IN

USB_D-

HCI_UART_TXD

AR_GPIO_2HCI_UART_TXD

HOST_WAKEUP

BT_PRI/CLK_BT

CLK_32IN

VBB_RDY

CODEC_SYNC

WDS_RESET_N

HCI_UART_RTS

AUX_UART_TXD

AR_GPIO_3

CODEC_PCMIN

GPIO_4

AR_GPIO_2

BT_PRI/CLK

CODEC_BCLK

CHANNEL_DATA

D+

CODEC_SYNC

BTSP1_2

BT_PRI/CLK_BT

BT_PRI/CLK

AR_GPIO_3

CHANNEL_DATAAR_GPIO_2

CHANNEL_DATA_BT BTSP2_1

USB5V_CONN

BT3.3V_TEST

CHANNEL_DATA_BT

BTSP1_1

BT_PRI/CLK3,4

WDS_RESET_N8

CHANNEL_DATA3,4

BT3.3V 8

BT3.3V 8


BT3.3V 8


USB5V 8

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

BT Connectors

A


Default jumpersetting for J16 is:All Open

Place the caps and resistorsas near to Bluetooth ModuleConnector as possible.

NOTE:

USB D+ and D- traces need to

have 90 Ohm differential

impedance

NO_STUFF

Calexico/BT sidebandconnector

R88 0

R73 0

R86 0

TP16

NO_STUFF

TP22

NO_STUFF

R93 0

R84 1K

1%

J15

USB_Type_B

VBUS1

D-2

D+3

GND4

CASE15

CASE26

J16

2x12-HDR

214368

5

107

1214

9

16

11

18

13

22

15

24

17192123

20

R95 .002

R72 0

R78 0

R83 .002

R92 0NO_STUFF

R77 0NO_STUFF

J9

NO_STUFF

12345

R91 10K

R90 10K

OE U8

NO_STUFF

24

5

3

1

R89 0NO_STUFF

R87 0NO_STUFF

TP21

NO_STUFF

J8

MINI_CARD

21

3456789

101112131415161718192021222324252627282930

C313.3pF

NO_STUFF 7.50%

R74 0

C243.3pF

NO_STUFF

7.50%

OEU7NO_STUFF

24

5

3

1

TP20

NO_STUFF


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB_D-_T2 4USB_D+_T2 4

USB5V_FPIO8

USB5V_FPIO 8

USB_D-_T13USB_D+_T13

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

USB FPIO Header

A


Clamping-Diode

CR52

1

Clamping-Diode

CR1

21

Clamping-Diode

CR2

21

Clamping-Diode

CR6

21

C40.01UF

10%

+ C222uF

NO_STUFF

12

J2

USB_2X5-Header

13 4

2

57

1086

C10.1uF

10%


.com


.com

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

AN

T_C

ON

N

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

Calexico and BT Antennas

A


Calexico AntennasBluetooth Antenna andBT Antenna Connector A3

TYCO 100215 ANT.

GND2

GND23

GND34

A4

BLUETOOTH ANT.

ANT_IN1

GND2

GND23

GND34

J1

BT_ANT_CONN

ANT1GND 2

GND2 3

A1

TYCO 100215 ANT.

GND2

GND23

GND34

A2

TYCO 100215 ANT.

GND2

GND23

GND34


.com


.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

INTEL CONFIDENTIAL

Project:C72527 1.01

Block Schematic

A


4) The PWRGOOD from the MAX6714 is ANDed with PCIe PERST signal to generate miniPCIe PERST.

1) Added U9 Debounce circuitry for the RF_KILL# switch and routed to RSVD18 of both the miniPCIe connector

7) BT_Clk is connected to RSVD2 pin of miniPCIe connector through a OP-AMP buffer

2) Power shutdown to BT can be done either by jumper or by software using Sideband cable

4) Added J15 so that V3.3Aux from PCIE slot 0 could be routed to BT LDO also

1) Power to Bluetooth module 3.3V is either of the following

3) CLKREQ signal from each minicard routed to respective PRSNT2# signals

6) Channel_data connected to RSVD1 pin of miniPCIe connector slot1 and Slot2 is fed toBT through a OP-AMP Buffer

5) LEDs are provided for LAN, WAN and PAN signals from miniPCIe connector

Bluetooth

4) USB Type B connector is used to provide USB signals to BT module

3) WDS_RESET is provided to BT through MAX809 validating BT power 3.3V

5) BT/Calexico signal are used for handshake between Calexico and BT

a) Default by USB 5V through MAX1793 LDO

b) 3.3V Aux from PCIe through MAX1793 LDO

5) Changed the USB connector for the BT so that AMP USB connector can be used

1) Each PCIe connector provide 3.3V (3A) and 3.3VAux (500mA)

7) RCLKREQ_T1 and RCLKREQ_T2 are connected to PRSNT2#_T1 and PRSNT2#_T2respectively for testability of CLK_REQ function

Handshake signals

6) USB FPIO carries two USB signals connected to the miniPCIe connector

2) Changed V3_Always on the sideband header J6 to +V5A in accordance with the Napa Platform

3) The PERST# signal is provided to each miniPCIe connector using MAX6714 to validate 3.3V and 1.5V

2) RSVD1 and RSVD2 of PCIe slot2 connected to miniPCIe slot2 RSVD3 and RSVD4 for future enhancement

c) 5V by the Vv/CRB sideband cable and through MAX1793 LDO

1) RSVD1 and RSVD2 of PCIe slot1 connected to miniPCIe slot1 RSVD3 and RSVD4 for future enhancement

PCIe to miniPCIe

Revision History from Upham I to Upham IIRevision History from Upham I to Upham IIRevision History from Upham I to Upham IIRevision History from Upham I to Upham II Design DetailsDesign DetailsDesign DetailsDesign Details

2) Each miniPCIe connector gets 3.3V directly from PCIe connector and 1.5V through MAX1793 LDO


.com

Capell Valley Laptop Schematic Diagram 845(Yonah-Calistoga Mobile Platform)

Documents

Transcript of Capell Valley Laptop Schematic Diagram 845(Yonah-Calistoga Mobile Platform)