Evolution in Architectures and Programming Methodologies of Coarse-grained Reconfigurable

ComputingBy: Zain-ul-Abdin and

Bertil Svensson

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson2

Outline

• Motivation• Scope• Architectural Characteristics• Computation Models• Coarse-grained Reconfigurable Archietctures• Discussion• Future Trends

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson3

Motivation

• Emergence of architectures different from Von Neuman’s paradigm of computing

• Growing focus towards Reconfigurable computing based on data-streaming:– Increased Performance– Run-time Reconfiguration– Power Efficiency

• Need for Models of Computations– Enhance the understanding of the developer to organize

computations– Utilizes the expilicit concurrency in the underlying HW

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson4

Scope

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson5

Architectural Characteristics

• Granularity– Fine-grain/Coarse-grain

• Reconfigurability– Reconfiguration Overheads: Latency, Speed

• Interconnection Networks– Characteristics: Network topology, Flow control,

Routing, QoS• Energy Efficiency• Scalability

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson6

Computation Models

• Stream Processing Model– Languages: StreamIt, StreamC/KernelC, TDF

• CSP based Model– Languages: Handel-C, Streams-C, Mobius

• Spatial Computation Model– Pegasus

• Kahn Process Networks– Compaan, Ambric structural object programming

language

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson7

Coarse-grained Reconfigurable Architectures• Classification

– Hybrid architectures– Array of functional

units– Array of processors– Array of soft

processors

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson8

Coarse-grained Reconfigurable Architectures

Categories Hybrid Architectures

Arrays of FUs

Array of Processors

Example Arch.

MorphoSys, Zippy, Tartan, DAPDNA

MATRIX, PACT XPP, SiliconHive, Mathstar, NEC DRP

RAW, Picochip, Ambric

• Array of Soft Processors– Mitrionics Virtual Processor

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson9

Discussion

• Summary of features of MoC

Features

MoC

Stream Processing

CSP KPN Spatial Comp.

Synchronism Synchronous Asynchronous Asynchronous Asynchronous

Determinism Deterministic Non-deterministic

Deterministic Deterministic

Buffering Bounded None Unbounded None

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson10

Discussion

• Relationship between MoC and CG Arch.

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson11

Discussion

• Trends in Relative complexity of CG Arch.

"Evolution in Arch. and Prog. Methodologies of Coarse-grained RC", Zain-ul-Abdin, Bertil Svensson12

Future trends

• Architectural trends (GALS)

• Computing Model trends (Streaming/CSP/Process Networks)

• Technology trends (i.e. Nanoscale devices)