BuildingATypicalSeniorDesignElectronicProject.ppt

7/25/2019 BuildingATypicalSeniorDesignElectronicProject.ppt

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Building a Typical Electronic

Project in Senior Design

Peter Wihl(former Guest Lecturer)


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Scope

The purpose of this presentation is to

introduce you to the process of

implementing a circuit design into an actual!or"ing design solution#


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Process $%er%ie!

&e'uirements

System rchitecture

*omponent Selection

+echanical,Pac"aging Design

Detailed Board Design

Layout

-a.rication

Board ssem.ly Testing and De.ugging

Design *hanges,Wor"arounds+ust .e completed prior to this process#


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Lecture E/ample

Building a distance measuring sensor de%ice


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&e'uirements

+ust .e completed prior to .oard design

and implementation

detailed list of !hat the system must do

0ot ho! it does it#

Should .e !ell thought out and clear


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&e'uirements E/ample

+ust .e !ireless

+ust measure in the range from 1#21 to 3#4

meters

+ust ha%e a resolution of at least 5,6 71 cm

+ust interface !ith a microprocessor on

.oth transmitter and recei%er side using

4#18 *+$S Logic


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System rchitecture

detailed .loc" diagram

9ncludes all significant signal paths

9nclude signal direction: !idth: and type


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System rchitecture E/ample


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*omponent Selection

9dentify the .est component solution foreach design .loc" in the system architecture

9dentify all necessary support componentsfor each major design .loc" component

E/plore different pac"age options if

a%aila.le Ta"e any mechanical re'uirements into

account


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*omponent Selection E/ample

&eynolds ;22 +S Transducers T/,&/

;1 "


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+echanical,Pac"aging Design

9dentify the mechanical or pac"aging

re'uirements of your design

+ay possi.ly ha%e to select components

.ased on these re'uirements

9dentify possi.le layout restrictions

Thin" a.out non6circuit re'uirements: i#e#

mounting and pac"aging


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+echanical Design E/ample


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Detailed Board Design

Build your schematics in a schematic

capture program e#g# $r*D

$nce your schematic is complete run a

design rule chec" (D&*)

When schematic is done con%ert to netlist

for layout


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Detailed Design E/ample


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Detailed Design E/ample


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Layout

The process of designing the P*B

&e'uires a schematic netlist: the Bill of

+aterialsC or B$+ and all pac"age

mechanical information


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Layout E/ample


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-a.rication

This is the process of placing the

components on the P*B

*an .e done .y hand or machine


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-a.rication E/ample

See sample


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Board ssem.ly

The process of populating the P*B !ith all

components

This includes 9*s: &esistors: *aps

*onnectors and LEDs: etc#


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Board ssem.ly E/ample


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Testing and De.ugging

ou need to de%elop a thorough andcomplete test plan for your .oard#

Should include a chec" list of steps in a testprocedure

Each step should include status of all .oard

%oltages >se continuity: cloc" signals and,or

signature analy=er to %erify net connections


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Design *hanges,Wor"arounds

White !ire part of the .oard

+ust create detailed step .y step

instructions on !hite !ire corrections

Sometimes minor design changes are

needed !hen an error is found in the .oard

design

+ay ha%e to .e done in soft!are


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*onclusion

This process consists of different types of

engineers !or"ing together#

Depending on system comple/ity and le%el

of design reuse this process can ta"e from 7

to 7 mouths#

ny 'uestionsF

BuildingATypicalSeniorDesignElectronicProject.ppt

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