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    BTS711L1

    Semiconductor Group 1 2003-Oct-01

    Smart Four Channel Highside Power Switch

    Features Overload protection Current limitation Short-circuit protection Thermal shutdown Overvoltage protection

    (including load dump) Fast demagnetization of inductive loads Reverse battery protection 1) Undervoltage and overvoltage shutdown

    with auto-restart and hysteresis Open drain diagnostic output

    Open load detection in ON-state CMOS compatible input Loss of ground and loss of V bb protection Electro s tatic d ischarge ( ESD ) protection

    Application C compatible power switch with diagnostic feedback

    for 12 V and 24 V DC grounded loads All types of resistive, inductive and capacitive loads Replaces electromechanical relays and discrete circuits

    General DescriptionN channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnosticfeedback, monolithically integrated in Smart SIPMOS technology.Providing embedded protective functions.

    Pin Definitions and Functions

    Pin Symbol Function 1,10,11,12,15,16,19,20

    Vbb Positive power supply voltage . Design thewiring for the simultaneous max. short circuitcurrents from channel 1 to 4 and also for lowthermal resistance

    3 IN1 Input 1 .. 4 , activates channel 1 .. 4 in case of5 IN2 logic high signal

    7 IN39 IN418 OUT1 Output 1 .. 4 , protected high-side power output17 OUT2 of channel 1 .. 4. Design the wiring for the14 OUT3 max. short circuit current13 OUT44 ST1/2 Diagnostic feedback 1/2 of channel 1 and

    channel 2, open drain, low on failure8 ST3/4 Diagnostic feedback 3/4 of channel 3 and

    channel 4, open drain, low on failure2 GND1/2 Ground 1/2 of chip 1 (channel 1 and channel 2)6 GND3/4 Ground 3/4 of chip 2 (channel 3 and channel 4)

    1) With external current limit (e.g. resistor R GND=150 ) in GND connection, resistor in series with STconnection, reverse load current limited by connected load.

    Product Summary Overvoltage Protection V bb(AZ) 43 V

    Operating voltage V bb(on) 5.0 ... 34 Vactive channels: one two parallel four parallel

    On-state resistance R ON 200 100 50 m Nominal load current I L(NOM) 1.9 2.8 4.4 A

    Current limitation I L(SCr) 4 4 4 A

    Pin configuration (top view)

    Vbb 1 20 V bb GND1/2 2 19 V bb

    IN1 3 18 OUT1ST1/2 4 17 OUT2

    IN2 5 16 Vbb

    GND3/4 6 15 V bb

    IN3 7 14 OUT3ST3/4 8 13 OUT4

    IN4 9 12 V bb Vbb 10 11 V bb

    P-DSO-20

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    BTS711L1

    Semiconductor Group 2 2003-Oct-01

    Block diagramFour Channels; Open Load detection in on state;

    + V bb

    IN1

    ST1/2ESD

    OUT1

    Logic

    Voltage

    sensor

    Voltagesource

    Open load

    detection 1Short to Vbb

    Level shifter

    Temperaturesensor 1

    Rectifier 1

    Limit for unclampedind. loads 1

    Gate 1protection

    Currentlimit 1

    3

    4

    V Logic

    Overvoltageprotection

    OUT2

    Open load

    detection 2Short to Vbb

    Level shifter

    Temperaturesensor 2

    Rectifier 2Limit for

    unclampedind. loads 2

    Gate 2protection

    Currentlimit 2

    IN25

    GND1/2

    R RO1 O2

    Chargepump 1

    Chargepump 2 Channel 2

    Channel 1

    Signal GND

    GND1/22

    Chip 1Chip 1

    + V bb

    IN3

    ST3/4

    PROFET

    OUT3

    7

    8

    OUT4

    IN49

    GND3/4

    R RO3O4

    Channel 4

    Channel 3

    Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20

    Leadframe

    18

    17

    Load GND

    Load

    Leadframe

    14

    13

    Load GND

    Load

    Signal GND

    GND3/46

    Chip 2Chip 2

    Logic and protection circuit of chip 2

    (equivalent to chip 1)

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    BTS711L1

    Semiconductor Group 3 2003-Oct-01

    Maximum Ratings at T j = 25C unless otherwise specified

    Parameter Symbol Values Unit

    Supply voltage (overvoltage protection see page 4) V bb 43 VSupply voltage for full short circuit protectionT j,start = -40 ...+150C

    V bb 34 V

    Load current (Short-circuit current, see page 5) I L self-limited ALoad dump protection 2) V LoadDump = U A + V s , U A = 13.5 V

    R I3 ) = 2 , t d = 200 ms; IN = low or high,each channel loaded with R L = 7.1 ,

    V Loaddump 4 )

    60 V

    Operating temperature rangeStorage temperature range

    T j T stg

    -40 ...+150-55 ...+150

    C

    Power dissipation (DC) 5 T a = 25C:(all channels active) T a = 85C:

    P tot 3.61.9

    W

    Inductive load switch-off energy dissipation, single pulseVbb = 12V, T j,start = 150C 5),I L = 1.9 A, ZL = 66 mH, 0 one channel:I L = 2.8 A, ZL = 66 mH, 0 two parallel channels:I L = 4.4 A, ZL = 66 mH, 0 four parallel channels:see diagrams on page 9 and page 10

    E AS 150320800

    mJ

    Electrostatic discharge capability (ESD)(Human Body Model)

    V ESD 1.0 kV

    Input voltage (DC)V

    IN -10 ... +16 VCurrent through input pin (DC)Current through status pin (DC)

    see internal circuit diagram page 8

    I IN I ST

    2.05.0

    mA

    Thermal resistance junction - soldering point 5),6) each channel: R thjs 16 K/Wjunction - ambient 5) one channel active:

    all channels active:R thja 44

    35

    2) Supply voltages higher than V bb(AZ) require an external current limit for the GND and status pins, e.g. with a

    150 resistor in the GND connection and a 15 k resistor in series with the status pin. A resistor for inputprotection is integrated.

    3) R I = internal resistance of the load dump test pulse generator4)

    VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 408395) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm 2 (one layer, 70 m thick) copper area for V bb connection. PCB is vertical without blown air. See page 15

    6) Soldering point: upper side of solder edge of device pin 15. See page 15

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    BTS711L1

    Semiconductor Group 4 2003-Oct-01

    Electrical Characteristics

    Parameter and Conditions, each of the four channels Symbol Values Unitat T j = 25 C, V bb = 12 V unless otherwise specified min typ max

    Load Switching Capabilities and CharacteristicsOn-state resistance (V bb to OUT)

    IL = 1.8 A each channel, T j = 25C:T j = 150C:

    two parallel channels, T j = 25C:four parallel channels, T j = 25C:

    R ON -- 165320

    8342

    200400

    10050

    m

    Nominal load current one channel active:

    two parallel channels active:four parallel channels active:

    Device on PCB 5), T a = 85C, T j 150C

    I L(NOM) 1.7

    2.64.1

    1.9

    2.84.4

    -- A

    Output current while GND disconnected or pulledup; V bb = 30 V, V IN = 0, see diagram page 9

    I L(GNDhigh) -- -- 10 mA

    Turn-on time to 90% V OUT:Turn-off time to 10% V OUT:

    R L = 12 , T j =-40...+150C

    t on t off

    8080

    200200

    400400

    s

    Slew rate on

    10 to 30% V OUT , R L = 12 , T j =-40...+150C:

    dV /dt on 0.1 -- 1 V/ s

    Slew rate off70 to 40% V OUT , R L = 12 , T j =-40...+150C:

    -dV /dt off 0.1 -- 1 V/ s

    Operating Parameters Operating voltage 7) T j =-40...+150C: V bb(on) 5.0 -- 34 VUndervoltage shutdown T j =-40...+150C: V bb(under) 3.5 -- 5.0 VUndervoltage restart T j =-40...+25C:

    T j =+150C:V bb(u rst) -- -- 5.0

    7.0V

    Undervoltage restart of charge pumpsee diagram page 14 T j =-40...+150C:V bb(ucp) -- 5.6 7.0 V

    Undervoltage hysteresisV bb(under) = V bb(u rst) - V bb(under)

    V bb(under) -- 0.2 -- V

    Overvoltage shutdown T j =-40...+150C: V bb(over) 34 -- 43 VOvervoltage restart T j =-40...+150C: V bb(o rst) 33 -- -- VOvervoltage hysteresis T j =-40...+150C: V bb(over) -- 0.5 -- VOvervoltage protection 8) T j =-40...+150C:

    I bb = 40 mA

    V bb(AZ) 42 47 -- V

    7) At supply voltage increase up to V bb = 5.6 V typ without charge pump, V OUT V bb - 2 V8) see also V ON(CL) in circuit diagram on page 8.

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    BTS711L1

    Semiconductor Group 5 2003-Oct-01

    Parameter and Conditions, each of the four channels Symbol Values Unitat T j = 25 C, V bb = 12 V unless otherwise specified min typ max

    Standby current, all channels off T j =25C :

    VIN = 0

    T j =150C:

    I bb(off) ----

    2844

    6070

    A

    Leakage output current (included in I bb(off) )V IN = 0

    I L(off) -- -- 12 A

    Operating current 9), V IN = 5V, T j =-40...+150CI GND = I GND1/2 + I GND3/4 , one channel on:

    four channels on: I GND --

    --28

    312

    mA

    Protection Functions 10) Initial peak short circuit current limit, (see timing

    diagrams, page 12) each channel, T j =-40C:

    T j =25C:T j =+150C:

    I L(SCp) 5.54.52.5

    9.57.54.5

    1311

    7

    A

    two parallel channels twice the current of one channelfour parallel channels four times the current of one channel

    Repetitive short circuit current limit,T j = T jt each channel

    two parallel channelsfour parallel channels

    (see timing diagrams, page 12)

    I L(SCr) ------

    444

    ------

    A

    Initial short circuit shutdown time T j,start =-40C:T j,start = 25C:

    (see page 11 and timing diagrams on page 12)

    t off(SC) ----

    5.54

    ----

    ms

    Output clamp (inductive load switch off) 11) at V ON(CL) = Vbb - VOUT

    V ON(CL) -- 47 -- V

    Thermal overload trip temperature T jt 150 -- -- CThermal hysteresis T jt -- 10 -- K

    Reverse BatteryReverse battery voltage 12 ) -V bb -- -- 32 V

    Drain-source diode voltage (Vout > Vbb ) I L = - 1.9 A, T j = +150C

    -V ON -- 610 -- mV

    9) Add I ST , if I ST > 010 ) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

    data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are notdesigned for continuous repetitive operation.

    11 ) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowestVON(CL)

    12 ) Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source

    diode has to be limited by the connected load. Note that the power dissipation is higher compared to normaloperating conditions due to the voltage drop across the intrinsic drain-source diode. The temperatureprotection is not active during reverse current operation! Input and Status currents have to be limited (seemax. ratings page 3 and circuit page 8).

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    BTS711L1

    Semiconductor Group 6 2003-Oct-01

    Parameter and Conditions, each of the four channels Symbol Values Unitat T j = 25 C, V bb = 12 V unless otherwise specified min typ max

    Diagnostic CharacteristicsOpen load detection current, (on-condition)

    each channel, T j = -40C:T j = 25C:

    T j = 150C:

    I L (OL)1 101010

    ------

    200150150

    mA

    two parallel channels twice the current of one channelfour parallel channels four times the current of one channel

    Open load detection voltage 13) T j =-40..+150C: V OUT(OL) 2 3 4 VInternal output pull down

    (OUT to GND), V OUT = 5 V T j =-40..+150C: R O 4 10 30 k

    Input and Status Feedback14 )

    Input resistance

    (see circuit page 8) T j =-40..+150C:R I 2.5 3.5 6 k

    Input turn-on threshold voltageT j =-40..+150C:

    V IN(T+) 1.7 -- 3.5 V

    Input turn-off threshold voltageT j =-40..+150C:

    V IN(T-) 1.5 -- -- V

    Input threshold hysteresis V IN(T) -- 0.5 -- V Off state input current V IN = 0.4 V: T j =-40..+150C:

    I IN(off) 1 -- 50 A

    On state input current V IN = 5 V: T j =-40..+150C: I IN(on) 20 50 90 A

    Delay time for status with open load after switchoff (other channel in off state)

    (see timing diagrams, page 13 ), T j =-40..+150C:

    t d(ST OL4) 100 320 800 s

    Delay time for status with open load after switchoff (other channel in on state)

    (see timing diagrams, page 13 ), T j =-40..+150C:

    t d(ST OL5) -- 5 20 s

    Status invalid after positive input slope(open load) T j =-40..+150C:

    t d(ST) -- 200 600 s

    Status output (open drain) Zener limit voltage T j =-40...+150C, I ST = +1.6 mA:ST low voltage T j =-40...+25C, I ST = +1.6 mA:

    T j = +150C, I ST = +1.6 mA:

    V ST(high) V ST(low)

    5.4----

    6.1----

    --0.40.6

    V

    13) External pull up resistor required for open load detection in off state.14) If ground resistors R GND are used, add the voltage drop across these resistors.

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    BTS711L1

    Semiconductor Group 7 2003-Oct-01

    Truth TableChannel 1 and 2 Chip 1 IN1 IN2 OUT1 OUT2 ST1/2 ST1/2 Channel 3 and 4(equivalent to channel 1 and 2)

    Chip 2 IN3 IN4 OUT3 OUT4 ST3/4 ST3/4

    BTS 711L1 BTS 712N1Normal operation L

    LHH

    LHLH

    LLHH

    LHLH

    HHHH

    HHHH

    Open load Channel 1 (3) LLH

    LHX

    ZZH

    LHX

    H(L15 ))HL

    LHH

    Channel 2 (4) LHX

    LLH

    LHX

    ZZH

    H(L15 ))HL

    LHH

    Short circuit to V bb Channel 1 (3) LLH

    LHX

    HHH

    LHX

    L16 ) H

    H(L17 ))

    L16) HH

    Channel 2 (4) LHX

    LLH

    LHX

    HHH

    L16) H

    H(L17 ))

    L16) HH

    Overtemperature both channel LXH

    LHX

    LLL

    LLL

    HLL

    HLL

    Channel 1 (3) LH

    XX

    LL

    XX

    HL

    HL

    Channel 2 (4) XX

    LH

    XX

    LL

    HL

    HL

    Undervoltage/ Overvoltage X X L L H H L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit

    H = "High" Level Status signal valid after the time delay shown in the timing diagramsParallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs andoutputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4have to be configured as a 'Wired OR' function with a single pull-up resistor.

    Terms

    PROFETIN2

    ST1/2OUT2

    GND1/2

    Vbb

    VOUT2IGND1/2

    VON2

    18

    2

    Leadframe

    3

    4

    IN1

    VOUT1

    VON1

    IL1OUT1

    5

    17

    VIN1 VIN2 VST1/2

    Ibb

    IIN1

    IIN2

    IST1/2IL2

    RGND1/2

    Vbb

    Chip 1PROFET

    IN4

    ST3/4OUT4

    GND3/4

    Vbb

    VOUT4IGND3/4

    VON4

    14

    6

    Leadframe

    7

    8

    IN3

    VOUT3

    VON3

    IL3OUT3

    9

    13

    VIN3 VIN4 VST3/4

    IIN3

    IIN4

    IST3/4IL4

    R GND3/4

    Chip 2

    Leadframe (V bb ) is connected to pin 1,10,11,12,15,16,19,20External R GND optional; two resistors R GND1/2 ,R GND3/4 = 150 or a single resistor R GND = 75 forreverse battery protection up to the max. operating voltage.

    15 )With additional external pull up resistor16) An external short of output to V bb in the off state causes an internal current from output to ground. If R GND isused, an offset voltage at the GND and ST pins will occur and the V ST low signal may be errorious.

    17 ) Low resistance to V bb may be detected by no-load-detection

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    BTS711L1

    Semiconductor Group 8 2003-Oct-01

    Input circuit (ESD protection), IN1...4

    IN

    GND

    IR

    ESD-ZDII

    I

    ESD zener diodes are not to be used as voltage clamp atDC conditions. Operation in this mode may result in adrift of the zener voltage (increase of up to 1 V).

    Status output, ST1/2 or ST3/4

    ST

    GND

    ESD-ZD

    +5V

    R ST(ON)

    ESD-Zener diode: 6.1 V typ., max 5.0 mA;RST(ON) < 380 at 1.6 mA, ESD zener diodes are not tobe used as voltage clamp at DC conditions. Operation inthis mode may resul t in a drift of the zener voltage(increase of up to 1 V).

    Inductive and overvoltage outputclamp, OUT1...4

    +Vbb

    OUT

    PROFET

    VZ

    V ON

    Power GND V ON clamped to V ON(CL) = 47 V typ.

    Overvoltage protection of logic part GND1/2 or GND3/4

    + Vbb

    IN

    STSTR

    GND

    GNDR

    Signal GND

    Logic

    VZ2

    INR I

    VZ1

    VZ1 = 6.1 V typ., V Z2 = 47 V typ., R I = 3.5 k typ. , RGND = 150

    Reverse battery protection

    GND

    LogicSTR

    IN

    ST

    5V

    OUT

    LR

    Power GND

    GNDR

    Signal GND

    Power Inverse

    IR

    Vbb-

    Diode

    R GND = 150 , R I = 3.5 k typ ,

    Temperature protection is not active during inversecurrent operation.

    .

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    BTS711L1

    Semiconductor Group 9 2003-Oct-01

    Open-load detection, OUT1...4ON-state diagnostic condition:

    V ON < R ON IL(OL); IN high

    Open loaddetection

    Logicunit

    + V bb

    OUT

    ONVON

    OFF-state diagnostic condition:V OUT > 3 V typ.; IN low

    Open loaddetection

    Logicunit

    VOUT

    Signal GND

    R EXT

    RO

    OFF

    GND disconnect (channel 1/2 or 3/4)

    PROFET

    V

    IN2

    STOUT2

    GND

    bb

    Vbb

    Ibb

    IN1OUT1

    VIN1

    VIN2 VST

    VGND

    Any kind of load. In case of IN = high is V OUT V IN - V IN(T+).Due to V GND > 0, no V ST = low signal available.

    GND disconnect with GND pull up (channel 1/2 or 3/4)

    PROFET

    V

    IN2

    STOUT2

    GND

    bb

    Vbb

    IN1OUT1VIN1

    VIN2

    VST

    VGND

    Any kind of load. If V GND > V IN - V IN(T+) device stays offDue to V GND > 0, no V ST = low signal available.

    Vbb disconnect with energized inductiveload

    PROFET

    V

    IN2

    STOUT2

    GND

    bb

    Vbb

    IN1OUT1high

    For an inductive load current up to the limit defined by E AS (max. ratings see page 3 and diagram on page 10) eachswitch is protected against loss of V bb .

    Consider at your PCB layout that in the case of Vbb dis-connection with energized inductive load the whole loadcurrent flows through the GND connection.

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    BTS711L1

    Semiconductor Group 10 2003-Oct-01

    Inductive load switch-off energydissipation

    PROFET

    VIN

    ST

    OUT

    GND

    bb

    =

    E

    E

    E

    E AS

    bb

    L

    R

    ELoad

    RL

    L

    {LZ

    Energy stored in load inductance:

    E L = 1 / 2 L I2L

    While demagnetizing load inductance, the energydissipated in PROFET is

    E AS= E bb + E L - E R= VON(CL) iL(t) dt,

    with an approximate solution for R L > 0 :

    E AS=IL L2 RL

    ( Vbb + |VOUT(CL) |) ln (1+ILRL

    |VOUT(CL) |)

    Maximum allowable load inductance fora single switch off (one channel) 5)

    L = f (I L ); T j,start = 150C, V bb = 12 V, R L = 0

    L [mH]

    1

    10

    100

    1000

    1 1.5 2 2.5 3

    IL [A]

    Typ. on-state resistance RON = f (V bb ,T j ); IL = 1.8 A, IN = high

    RON [mOhm]

    0

    50

    100

    150

    200

    250

    300

    350

    400

    450

    500

    0 10 20 30 40

    Tj = 150C

    85C

    25C

    -40C

    Vbb [V]

    Typ. open load detection current I L(OL) = f (V bb ,T j ); IN = high

    IL(OL) [mA]

    0

    20

    40

    60

    80

    100

    120

    140

    0 5 10 15 20 25 30

    n o

    l o a

    d d e

    t e c

    t i o n n o t s p e c

    i f i e d

    f o r

    V b b

    < 6 V

    T j = 150C

    85C

    25C

    -40C

    Vbb [V]

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    BTS711L1

    Semiconductor Group 11 2003-Oct-01

    Typ. standby current I bb(off) = f (T j ); Vbb = 9...34 V, IN 1...4 = low

    Ibb(off) [A]

    0

    10

    20

    30

    40

    50

    60

    -50 0 50 100 150 200

    T j [C]

    Typ. initial short circuit shutdown time t off(SC) = f (T j,start ); Vbb =12 V

    toff(SC) [msec]

    0

    1

    2

    3

    4

    5

    6

    -50 0 50 100 150 200

    T j,start [C]

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    BTS711L1

    Semiconductor Group 12 2003-Oct-01

    Figure 1a: Vbb turn on:

    IN2

    V

    OUT1

    t

    V

    bb

    ST open drain

    IN1

    VOUT2

    Figure 2a: Switching a lamp:

    IN

    ST

    OUT

    L

    t

    V

    I

    The initial peak current should be limited by the lamp and not bythe initial short circuit current I L(SCp) = 7.5 A typ. of the device.

    Figure 2b: Switching an inductive load

    IN

    ST

    L

    t

    V

    I

    *)

    OUT

    t d(ST)

    IL(OL)

    *) if the time constant of load is too large, open-load-status may

    occur

    Figure 3a: Turn on into short circuit:shut down by overtemperature, restart by cooling

    other channel: normal operation

    t

    I

    ST

    IN1

    L1

    L(SCr)I

    IL(SCp)

    toff(SC)

    Heating up of the chip may require several milliseconds, dependingon external conditions (t off(SC) vs. T j,start see page 11)

    Timing diagramsTiming diagrams are shown for chip 1 (channel 1/2). For chip 2 (channel 3/4) the diagramsare valid too. The channels 1 and 2, respectively 3 and 4, are symmetric and consequentlythe diagrams are valid for each channel as well as for permuted channels

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    BTS711L1

    Semiconductor Group 13 2003-Oct-01

    Figure 3b: Turn on into short circuit:shut down by overtemperature, restart by cooling(two parallel switched channels 1 and 2)

    t

    ST1/2

    IN1/2

    L1 L2

    L(SCr)I

    IL(SCp)

    I + I

    toff(SC)

    Figure 4a: Overtemperature:Reset if T j

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    BTS711L1

    Semiconductor Group 14 2003-Oct-01

    Figure 5c: Open load: detection in ON- and OFF-state(with R EXT), turn on/off to open load

    t

    V

    ST

    IN1

    IL1

    td(ST) d(ST OL5)

    channel 1: open load

    t d(ST) t

    OUT1

    IN2 channel 2: normal operation

    td(ST OL5) depends on external circuitry because of highimpedance

    Figure 6a: Undervoltage:

    IN

    V

    OUT

    t

    V

    bb

    ST open drain

    V Vbb(under)

    bb(u rst)

    bb(u cp)V

    Figure 6b: Undervoltage restart of charge pump

    bb(under)V

    Vbb(u rst)

    Vbb(over)

    Vbb(o rst)

    Vbb(u cp)

    o f f - s

    t a t e

    o n - s

    t a t e

    VON(CL)

    Vbb

    Von

    o f f - s

    t a t e

    IN = high, normal load conditions.Charge pump starts at V bb(ucp) = 5.6 V typ.

    Figure 7a: Overvoltage:

    IN

    V

    OUT

    t

    V

    bb

    ST

    ON(CL)V Vbb(over) Vbb(o rst)

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    BTS711L1

    Semiconductor Group 15 2003-Oct-01

    Package and Ordering CodeStandard P-DSO-20-9 Ordering Code

    BTS711L1 Q67060-S7000-A2

    All dimensions in millimetres1) Does not include plastic or metal protrusions of 0.15 max per side2) Does not include dambar protrusion of 0.05 max per side

    Definition of soldering point with temperature T s :upper side of solder edge of device pin 15.

    Pin 15

    Printed circuit board (FR4, 1.5mm thick, one layer 70 m, 6cm 2 active heatsink area) as a reference for max.power dissipation P tot , nominal load current I L(NOM) and thermal resistance R thja

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    BTS711L1

    Semiconductor Group 16 2003 Oct 01

    Published byInfineon Technologies AG , St.-Martin-Strasse 53,

    D-81669 Mnchen Infineon Technologies AG 2001All Rights Reserved.

    Attention please!The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.

    Terms of delivery and rights to technical change reserved.

    We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions andcharts stated herein.

    Infineon Technologies is an approved CECC manufacturer.

    Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office inGermany or our Infineon Technologies Representatives worldwide (see address list).

    Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contactyour nearest Infineon Technologies Office.

    Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of InfineonTechnologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or toaffect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body,or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user orother persons may be endangered.