BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr....

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BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat

Transcript of BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr....

Page 1: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

BITWISE OPERATIONS353156 – Microprocessor

Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat

Page 2: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Objectives

To understand Bitwise Logical Operations

OR AND XOR

Shift Operations Shift Left Shift Right Rotate

Page 3: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Bitwise Operations (1)

Up until now, we’ve done : Arithmetic (ADD, SUB, RSB, ..etc..) Some of data movement (MOV)

All of these instructions view content of register as a single quantity

But for bitwise operations, we will see the content of register as 32 bits rather than as a single 32-bit number

Page 4: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Bitwise Operations (2)

Since register are composed of 32 bits, we may want to access individual bits rather than the whole.

Introduction two new classes of instructions/operations : Logical Instruction Shift Operations

Page 5: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Logical Operations

Operator Names: AND BIC ORR EOR

Operands Destination : Register Operand1 : Register Operand2 : Register, Shifted Register, Immediate

Example AND a1, v1, v2 AND a1, v1, #0x40

Page 6: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Logical AND Operator

AND (truth table)

AND : bit-by-bit operation leaves a 1 in the result only if both bits of the operands are 1

A B A AND B

0 0 0

0 1 0

1 0 0

1 1 1

Page 7: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Example : Logical AND Operator Assume that register A and B are 8-bit

register Let A stores value 0011 1011 Let B stores value 1001 0010 Find A AND B

0 0 1 1 1 0 1 1 AND 1 0 0 1 0 0 1 0

0100000 1

Page 8: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 1: Logical AND Operator What is the value store in register R0

after the execution of program is done

AREA ex1_1, CODE, READONLY

ENTRY

start

MOV a2, #0x42

MOV a3, #0xFC

AND a1, a2, a3

END

AREA ex1_2, CODE, READONLY

ENTRY

start

MOV a2, #0xBC000000

AND a1, a2, #0xFF

END

(1) (2)

Page 9: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Logical BIC (AND NOT) Operator BIC (BIt Clean) : bit-by-bit operation

leaves a 1 in the result only if bit of the first operand is 1 and the second operands 0

Example 0 0 1 1 BIC0 1 0 1

0100

Page 10: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 2: Logical BIC Operator What is the value store in register R0

after the execution of program is done

AREA ex2_1, CODE, READONLY

ENTRY

start

MOV a2, #0x42

MOV a3, #0xFC

BIC a1, a2, a3

END

AREA ex2_2, CODE, READONLY

ENTRY

start

MOV a2, #0xBC000000

BIC a1, a2, #0xFF

END

(1) (2)

Page 11: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

MASK

AND and BIC normally use to create a mask Example : Given R0 stores 0x12345678

if we want to keep only the value of the last 2 bytes and we want to clear the first 2 bytes to 0 (0x00005678) R1 stores 0xFFFF AND R0, R0, R1 ; short written constant value

if we want to keep only the value of the first 2 bytes and we want to clear the last 2 bytes to 0 (0x12340000) R1 stores 0xFFFF0000

AND R0, R0, R1 ; long written constant value R2 stores 0xFFFF

BIC R0, R0, R2 ; better ?

Page 12: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Logical OR Operator

OR (truth table)

OR : bit-by-bit operation leaves a 1 in the result if either bit of the operands is 1

A B A OR B

0 0 0

0 1 1

1 0 1

1 1 1

Page 13: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Example : Logical OR Operator Assume that register A and B are 8-bit

register Let A = 0011 1011, and B = 1001 0010 Find A OR B

0 0 1 1 1 0 1 1 OR 1 0 0 1 0 0 1 0

Example : ARM Instruction ORR R0, R0, #0x20

1101101 1

Page 14: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 3 : Logical OR Operator What is the value store in register R0

after the execution of program is done

AREA ex3_1, CODE, READONLY

ENTRYstart

MOV a2, #0x34 MOV a3, #0x86 ORR a1, a2, a3

END

Page 15: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Logical XOR Operator

XOR (truth table)

XOR : bit-by-bit operation leaves a 1 in the result if bit of the operands are different

A B A XOR B

0 0 0

0 1 1

1 0 1

1 1 0

Page 16: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Example : Logical XOR Operator Assume that register A and B are 8-bit

register Let A = 0011 1011, and B = 1001 0010 Find A XOR B

0 0 1 1 1 0 1 1 XOR 1 0 0 1 0 0 1 0

Example : ARM Instruction EOR R0, R0, #0x20

1001101 0

Page 17: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 4 : Logical XOR Operator What is the value store in register R0

after the execution of program is done

AREA ex4_1, CODE, READONLY

ENTRYstart

MOV a2, #0x34 MOV a3, #0x86 EOR a1, a2, a3

END

Page 18: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Shift Operations

Shift means move all the bits in a word to the left or right by number of bits

In ARM, there are 3 types of shift operations Fill emptied bits with 0s (LSL, LSR) Fill emptied bits with sign bits (ASR) Fill emptied bits with the bits falling

(rotation) (ROR)

Page 19: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Shift Operations (Type 1)

Move all the bits in a word to the left or right by a number of bits, filling the emptied bits with 0s

Example :

Given A an 8-bit register which stores data 1100 1010

1 1 0 0 1 0 1 0

1 1 0 1 0 1 000000Shift right by 4 bits

Shift left by 4 bits

0 1 01 1 0 0 00001

Page 20: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

LSL, LSR Instructions

In ARM, we have 2 instructions for shift operation type 1 LSL (Logical Shift Left) LSR (Logical Shift Right)

We can use 2 formats of instruction Opcode dest_reg, reg_contains_number_of_bit_to_shift

LSL R0, R1 ; R1 must store number of bit to shift Opcode dest_reg, src_reg,

constant_number_of_bit_to_shift LSR R0, R1, #4 ; Shift right value in R1 for 4 bits and then

store it to R0

** Only R0-R7 can do Shift operations **

Page 21: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 5: LSL, LSR Operations What is the value store in register R0

after the execution of program is done

AREA ex5_1, CODE, READONLY

ENTRY

start

MOV a1, #0x01

MOV a2, #4

LSL a1, a2

END

AREA ex5_2, CODE, READONLY

ENTRY

start

MOV a1, #0xFF

LSR a1, a1, #0x4

END

(1) (2)

Page 22: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Shift Operations (Type 2)

Move all the bits in a word to the right by a number of bits, filling the emptied bits with sign bits

Example : Given A an 8-bit register which stores data 1100 1010

Given A an 8-bit register which stores data 0100 1010

1 1 0 0 1 0 1 0

1 1 0 1 0 1 001111Shift right by 4 bits

0 1 0 0 1 0 1 0

1 1 0 1 0 1 000000Shift right by 4 bits

Page 23: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

ASR Instructions

ASR (Arithmatic Shift Right) We can use 2 formats of instruction

Opcode dest_reg, reg_contains_number_of_bit_to_shift ASR R0, R1 ; R1 must store number of bit to shift

Opcode dest_reg, src_reg, constant_number_of_bit_to_shift ASR R0, R1, #4 ; Shift right value in R1 for 4 bits and then

store it to R0

** Only R0-R7 can do Shift operations **

Page 24: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 6: ASR Operations

What is the value store in register R0 after the execution of program is done

AREA ex6_1, CODE, READONLY

ENTRY

start

MOV a1, #0xFFFFFF10

MOV a2, #2

ASR a1, a2

END

AREA ex6_2, CODE, READONLY

ENTRY

start

MOV a1, #0xFF

ASR a1, a1, #0x2

END

(1) (2)

Page 25: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Shift Operations (Type 3)

Move all the bits in a word to the right by a number of bits, filling the emptied bits with the bits falling of the right

Example :

Given A an 8-bit register which stores data 1100 1010

Rotate right by 3 bits

1 1 0 0 1 0 1 0 000 1 0 1110 100 1 01 0 11 0

Page 26: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

ROR Instructions

ROR (ROtate Right) We can use 2 formats of instruction

Opcode dest_reg, reg_contains_number_of_bit_to_shift ROR R0, R1 ; R1 must store number of bit to shift

Opcode dest_reg, src_reg, constant_number_of_bit_to_shift ROR R0, R1, #4 ; Rorate right value in R1 for 4 bits and then

store it to R0

** Only R0-R7 can do Shift operations **

Page 27: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Exercise 7: ROR Operations

What is the value store in register R0 after the execution of program is done

AREA ex7_1, CODE, READONLY

ENTRY

start

MOV a1, #0xFFFFFF10

MOV a2, #4

ROR a1, a2

END

AREA ex7_2, CODE, READONLY

ENTRY

start

MOV a1, #0xFF

ROR a1, a1, #0x4

END

(1) (2)

Page 28: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Review : 2nd Operand

2nd operand for operation : register immediate (numerical constant) shifted register

Example : MOV R0, R1 MOV R0, #0x12 MOV R0, R1, LSL #4 ; R0 (R1 << 4)

Page 29: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Barrel Shifter : The Second Operand

Register, optionally with shift operation applied Shift value can be either :

5 bit unsigned integer ADD R0, R1, R2, LSL #8 ;R0 R1 + (R2 << 8 bits)

Specified in bottom of another register ADD R0, R1, R2, LSL R3 ;R0 R1 + (R2 << R3 bits)

ALU

BarrelShifter

Operand 1 Operand 2

Result

Immediate value 8 bit number Can be rotated right through as even number of

position Assembler will calculate rotate for you from constant

ADD R0, R1, #10 ; R0 R1 + 10 ADD R0, R1, #0xFF00 ; R0 R1 + (0xFF << 16 bits) ADD R0, R1, #0xFFF ; ERROR

Page 30: BITWISE OPERATIONS 353156 – Microprocessor Asst. Prof. Dr. Choopan Rattanapoka and Asst. Prof. Dr. Suphot Chunwiphat.

Assignment 5

What is the value store in register R0 after the execution of program is done (explain the result of each instruction)

AREA hw5_1, CODE, READONLY

ENTRY

start

MOV a1, #0xFFFFFF18

MOV a2, #16

ROR a1, a2

MOV a2, #0xFF000000

AND a1, a1, a2, LSR #4

LSR a1, #16

END

AREA hw5_2, CODE, READONLY

ENTRY

start

MOV a1, #0xFF

MOV a2, #0xCC

MOV a3, #16

ADD a1, a1, a2, LSL a3

EOR a2, a2, #0x65

ORR a1, a1, a2, LSL #8

END

(1) (2)