Biomedical Signal Proce s sing
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Transcript of Biomedical Signal Proce s sing
Peeter Ellervee CEBE - Jäneda, 2013.06.16 1
Application Specific Processors for Signal Processing /Rakendus-spetsiifilised
protsessorid signaalitöötluseks
Peeter Ellervee, Maksim Gorev, Vadim Pesonen, Aleksander Sudnitsõn,
Dmitri Mihhailov, Maksim Jenihhin, Thomas Hollstein, Mihkel Kiil,
Muhammad Adeel Tajammul, …
Peeter Ellervee CEBE - Jäneda, 2013.06.16 2
Biomedical Signal Processing• P1 [bio-impedance]
– reconfigurable parallel data-processing
– arbitrary waveform generation
• Related projects– fast reconfigurable data-
analysis• with Aveiro University
– coarse-grain reconfigurable architectures
• with KTH (recent one)
• P4 [EEG analyzer]– complex DSP analysis
• FFT, etc.
– modular structure
• Putting all together– signal processing platform
framework– application analysis– component libraries
• capture, processing, communication
– design flow
Peeter Ellervee CEBE - Jäneda, 2013.06.16 3
[P1] Bio-impedance• Multi-channel measurement device
– in cooperation with Department of Electronics
low andhigh freq.
mostlyhighfreq.
paths for current
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• Data pre-processing unit– reconfigurable sampling order to
minimize aliasing effect
• Arbitrary waveform excitation signal generator– any number of channels– any frequency– any waveform
• Cooperation with test & verification groups [P2, P6]– benchmark family
Peeter Ellervee CEBE - Jäneda, 2013.06.16 4
[P4] EEG Analyzer• EEG Analyzer Prototype(s)
– in cooperation with Department of Biomedical Engineering
• From specification to implementation– modeling & verification– partitioning & synthesis
• Different implementations– modular design– reconfigurable components– the latest was demonstrated today
• Input for the signal processing platform framework
Peeter Ellervee CEBE - Jäneda, 2013.06.16 5
Related Publications• [P1] Data pre-processing unit
– initial architectures – Norchip’09– reconfigurable sampling – FPGAworld’10, BEC’10 – benchmark family – BEC’12
• [P1] Arbitrary waveform signal generator– DDECS’12, BEC’12
• [P4] EEG analyzer– ISPA’11, FPGAworld’11
Peeter Ellervee CEBE - Jäneda, 2013.06.16 6
Signal Processing Platform
Algorithm[MatLab]
Signal source[analog]
Platform[framework]
Design space exploration[different architectures]
Prototype
Peeter Ellervee CEBE - Jäneda, 2013.06.16 7
Signal Processing Platform[by Thomas Hollstein]
Peeter Ellervee CEBE - Jäneda, 2013.06.16 8
Platform Scenarios [by Thomas Hollstein]
Peeter Ellervee CEBE - Jäneda, 2013.06.16 9
Design Flow for the Platform
• task / specification• partitioning• communication network
selection• mapping
– tasks & communication• IP/module selection/design• integration
Algorithm[MatLab]
Signal source[analog]
Platform[framework]
Design space exploration[different architectures]
Prototype
com
mun
ica
tion
netw
ork
proc.unit
ADC
DAC
I/O
. . . proc.unit
Peeter Ellervee CEBE - Jäneda, 2013.06.16 10
Related & New Projects• Fast reconfigurable data-analysis
– with Aveiro University– parameterizable and/or reconfigurable computation
and communication modules
• Coarse-grain reconfigurable architectures– with KTH (recent one)– massive-parallel reconfigurable/reprogrammable
computation and communication platform
• Application analysis– computational complexity– requirements for components & functional units
DRRA• Dynamically Reconfigurable Resource Array
– Pei Liu; Ebrahim, F.O.; Hemani, A.; Paul, K.; , "A Coarse-Grained Reconfigurable Processor for Sequencing and Phylogenetic Algorithms in Bioinformatics," Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference on, pp.190-197, 2011
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