Nano Composite Electrical Generator Based on Piezoelectric Zinc Oxide Nanowires
Bending piezoelectric nanowires: application to force ...€¦ · [6] D. Lincot, “Solution growth...
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© CEA. All rights reserved. Edgar LEON PEREZ 1,* ,Mireille MOUIS 2,3 , Emmanuelle PAULIAC-VAUJOUR 1 1 CEA-Leti, Systems Department, F-38054 Grenoble, France - *[email protected] 2 CNRS, IMEP-LAHC, F-38000 Grenoble, France 3 Univ. Grenoble Alpes, IMEP-LAHC, F-38000 Grenoble, France One dimensional nanostructures are investigated in a large range of potential applications in nano-electronic devices. In particular zinc oxide (ZnO) piezoelectric nanowires (NWs) are suitable as elementary transducing blocks for force-displacement sensor applications [1,2] . Upon bending, a piezoelectric charge density distribution occurs within the NW, yielding a piezoelectric potential (piezopotential). This piezopotential is a function of the applied force or displacement onto the sensor. We intend to develop a force sensor based on piezoelectric NW matrices, where the elementary cell (pixel) is a single vertical-contacted-piezoelectric NW. We focus on force/pressure triggered electronic devices and aim to give in-depth understanding of pixel piezoelectric behavior and related technological considerations. We report both finite element method (FEM) multi-physics simulations that we used as a tool for the device qualitative characterization and design optimization; and the low-temperature hydrothermal process which was implemented to grow NWs on different microelectronics-industry-compatible polycrystalline seed-layers, both template-free and patterned. [1] R. Hinchet, J. Ferreira, J. Kera, G. Ardila, M. Mouis, and L. Montès, “Scaling rules of piezoelectric nanowires in view of sensor and energy harvester integration,” in Electron Devices Meeting (IEDM), IEEE International, 2012, pp. 6.2.2–6.2.4. [2] Z. L. Wang, “Piezopotential gated nanowire devices: Piezotronics and piezo-phototronics,” Nano Today, vol. 5, no. 6, pp. 540–552, Dec. 2010.. [3] Y. Gao, Z.L. Wang, « Electrostatic potential in a bent piezoelectric nanowire. The fundamental theory of nanogenerator and nanopiezotronics », Nano Lett. 7, 2499 (2007). [4] C. Falconi, G. Mantini, A. D’Amico, and Z. L. Wang, “Studying piezoelectric nanowires and nanowalls for energy harvesting,” Sensors Actuators B Chem., vol. 139, no. 2, pp. 511–519, Jun. 2009. [5] E. Leon Perez, “Pixel analysis of a force-sensing device based on individually contacted vertical piezoelectric nanowires”, accepted for publication in IEEE Nano 2015 proceedings. [6] D. Lincot, “Solution growth of functional zinc oxide films and nanostructures,” MRS Bull., vol. 35, no. October, pp. 778–790, 2010. Bending piezoelectric nanowires: application to force- displacement sensors based on individually contacted vertical ZnO piezoelectric nanowires Individually contacted vertical NWs sensor approach Stack and layout architecture for individually contacted NWs Simulation of one pixel Existing results in simulation do not satisfyingly take into account the surrounding environment of the NW or the device feasibility: R=50nm and L=600nm Simulation results give an insight of the tolerance regarding process variability associated with device microfabrication and a tendency of what can be expected in terms of pixel piezoelectric response. NW growth was implemented on different polycrystalline seed-layers, yielding a controlled density of NWs on pre-patterned substrates. These elements provide valuable information for device design and fabrication. Based on these elements, the complete microfabrication process is under development at CEA High performance sensor. Si substrate Seed-layer Electrodes SENSOR PIXEL Considerations prior to heterogeneous integration Understanding of pixel piezoelectric behavior via multiphysics models Develop specific microfabrication processes Implement controlled NW growth on processed chips i) ii) iii) Static simulations of one pixel Implement controlled nanowire growth Single bent piezoelectric nanowire [3] Tensile-side (+V) Compressive-side (-V) Piezopotential inversion C+ axis orientation Electrical contacts position [4] R=50nm and L=600nm F ZnO 2D Si-bulk Contact Contact V out Our work [5] R=50nm and L=600nm Approach: Nanowires High Sensitivity μm-sized pixels High spatial resolution Piezopotential distribution within the pixel middle section • Piezopotential seed-layer thickness dependence • Piezopotential NW-electrode gap (δ) dependence Silicon bulk Seed-layer Electrodes V NW ≈ 1340 mV ΔV c ≈ 860 mV R=50nm ,L=600nm, F=80nN e ZnO =20nm and e Si =50nm R=50nm ,L=600nm, F=80nN, δ=18nm, e ZnO =20nm and e Si =50nm V NW ≈ 1600 mV ΔV c ≈ 380 mV Evolution of piezopotential taking into account a symmetrical NW-electrode gap (parameter δ). Physical contact loss does not imply complete piezopotential loss : although the collected signal drops, it quickly stabilizes as δ goes on increasing. Collection factor= V NW /ΔV C NW growth We carried out NW hydrothermal growth [6] on different clean-room processed polycrystalline seed-layers. ZnO nanowire growth on template-free layers SEM X-section view SEM top view Ø NW ~ 78 nm; L NW ~ 2 μm Ø NW ~ 60 nm; L NW ~ 1.3 μm NW growth on pre-patterned seed-layer: control of NW density Micro-fabrication of patterns by electron-beam lithography and dry etching using a SiN hard-mask Si (100) ZnO seed-layer SiN Opening size Spacing After NW growth: SEM X-section view SEM top view Ø NW ~ 120 - 200 nm L NW ~ 2.9 - 3.4 μm The results below were obtained for a gallium-doped ZnO seed-layer. SEM top view of patterns prior to NW growth Multiple and single NWs were obtained on the patterns, showing that it is possible to obtain isolated NWs suitable for our applications. Growth was carried out on ZnO layers with different doping deposited by CVD, PLD or ALD Results shown below: F F The maximum piezopotential value is generated within the NW’s base (named V NW at point A). The output potential is taken at the right electrode (named ΔV C at point B) V NW and ΔV C are following the same trend (black plots). The collection factor yields 69% for a value of the seed- layer thickness of 5 nm. Thinner seed-layers provide a larger pixel response Spacing = 750 nm and opening size = 150 nm Si/SiO 2 /GZO CVD Si/SiO 2 /ZnO ALD
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© CEA. All rights reserved.
Edgar LEON PEREZ 1,*,Mireille MOUIS2,3, Emmanuelle PAULIAC-VAUJOUR1 1CEA-Leti, Systems Department, F-38054 Grenoble, France - *[email protected]
2CNRS, IMEP-LAHC, F-38000 Grenoble, France 3Univ. Grenoble Alpes, IMEP-LAHC, F-38000 Grenoble, France
One dimensional nanostructures are investigated in a large range of potential applications in nano-electronic devices. In particular zinc oxide (ZnO) piezoelectric nanowires (NWs) are suitable as elementary transducing blocks for force-displacement sensor applications[1,2]. Upon bending, a piezoelectric charge density distribution occurs within the NW, yielding a piezoelectric potential (piezopotential). This piezopotential is a function of the applied force or displacement onto the sensor. We intend to develop a force sensor based on piezoelectric NW matrices, where the elementary cell (pixel) is a single vertical-contacted-piezoelectric NW. We focus on force/pressure triggered electronic devices and aim to give in-depth understanding of pixel piezoelectric behavior and related technological considerations.
We report both finite element method (FEM) multi-physics simulations that we used as a tool for the device qualitative characterization and design optimization; and the low-temperature hydrothermal process which was implemented to grow NWs on different microelectronics-industry-compatible polycrystalline seed-layers, both template-free and patterned.
[1] R. Hinchet, J. Ferreira, J. Kera, G. Ardila, M. Mouis, and L. Montès, “Scaling rules of piezoelectric nanowires in view of sensor and energy harvester integration,” in Electron Devices
Meeting (IEDM), IEEE International, 2012, pp. 6.2.2–6.2.4.
[2] Z. L. Wang, “Piezopotential gated nanowire devices: Piezotronics and piezo-phototronics,” Nano Today, vol. 5, no. 6, pp. 540–552, Dec. 2010..
[3] Y. Gao, Z.L. Wang, « Electrostatic potential in a bent piezoelectric nanowire. The fundamental theory of nanogenerator and nanopiezotronics », Nano Lett. 7, 2499 (2007).
[4] C. Falconi, G. Mantini, A. D’Amico, and Z. L. Wang, “Studying piezoelectric nanowires and nanowalls for energy harvesting,” Sensors Actuators B Chem., vol. 139, no. 2, pp. 511–519,
Jun. 2009.
[5] E. Leon Perez, “Pixel analysis of a force-sensing device based on individually contacted vertical piezoelectric nanowires”, accepted for publication in IEEE Nano 2015 proceedings.
[6] D. Lincot, “Solution growth of functional zinc oxide films and nanostructures,” MRS Bull., vol. 35, no. October, pp. 778–790, 2010.
Bending piezoelectric nanowires: application to force-displacement sensors based on individually contacted
vertical ZnO piezoelectric nanowires
Individually contacted vertical NWs sensor approach
Stack and layout architecture for individually contacted NWs
Simulation of one pixel Existing results in simulation do not satisfyingly take into account the surrounding environment of the NW or the device feasibility:
R=50nm and L=600nm
Simulation results give an insight of the tolerance regarding process variability associated with device microfabrication and a tendency of what can be expected in terms of pixel piezoelectric response. NW growth was implemented on different polycrystalline seed-layers, yielding a controlled density of NWs on pre-patterned substrates. These elements provide valuable information for device design and fabrication. Based on these elements, the complete microfabrication process is under development at CEA
High performance sensor.
Si substrate Seed-layer
Electrodes
SENSOR PIXEL
Considerations prior to heterogeneous
integration
Understanding of pixel piezoelectric behavior via multiphysics models
Develop specific microfabrication processes
Implement controlled NW growth on processed chips
i)
ii)
iii)
Static simulations of one pixel
Implement controlled nanowire growth
Single bent piezoelectric nanowire[3]
Te
ns
ile
-sid
e (
+V
)
Co
mp
res
siv
e-s
ide
(-V
)
Piezopotential inversion
C+
ax
is o
rie
nta
tio
n
Electrical contacts position[4]
R=50nm and L=600nm
F
ZnO 2D
Si-bulk
Contact Contact
Vout
Our work[5]
R=50nm and L=600nm
Approach: Nanowires
High Sensitivity
µm-sized pixels
High spatial resolution
Piezopotential distribution within the pixel middle section
• Piezopotential seed-layer thickness dependence
• Piezopotential NW-electrode gap (δ) dependence
Silicon bulk
Seed-layer Electrodes
VNW ≈ 1340 mV ΔVc ≈ 860 mV
R=50nm ,L=600nm, F=80nN eZnO=20nm and eSi=50nm
R=50nm ,L=600nm, F=80nN, δ=18nm, eZnO=20nm and eSi=50nm
VNW ≈ 1600 mV ΔVc ≈ 380 mV
Evolution of piezopotential taking into account a symmetrical NW-electrode gap (parameter δ).
Physical contact loss does not imply complete piezopotential loss : although the collected signal drops, it quickly stabilizes as δ goes on increasing.
Collection factor=
VNW/ΔVC
NW growth We carried out NW hydrothermal growth[6] on different clean-room processed polycrystalline seed-layers.
ZnO nanowire growth on template-free layers SEM X-section view SEM top view
ØNW ~ 78 nm; LNW ~ 2 µm
ØNW ~ 60 nm; LNW ~ 1.3 µm
NW growth on pre-patterned seed-layer: control of NW density
Micro-fabrication of patterns by electron-beam lithography and dry etching using a SiN hard-mask
Si (100)
ZnO seed-layer
SiN
Opening size Spacing
After NW growth:
SEM X-section view SEM top view
ØNW ~ 120 - 200 nm
LNW ~ 2.9 - 3.4 µm
The results below were obtained for a gallium-doped ZnO seed-layer.
SEM top view of patterns prior to NW growth
Multiple and single NWs were obtained on the patterns, showing that it is possible to obtain isolated NWs suitable for our applications.
Growth was carried out on ZnO layers with different doping deposited by CVD, PLD or ALD
Results shown below:
F F
The maximum piezopotential value is generated within the NW’s base (named VNW at point A). The output potential is taken at the right electrode (named ΔVC at point B)
VNW and ΔVC are following the same trend (black plots). The collection factor yields 69% for a value of the seed-layer thickness of 5 nm.
Thinner seed-layers provide a larger pixel response
Spacing = 750 nm and opening size = 150 nm
Si/SiO2/GZO CVD
Si/SiO2/ZnO ALD
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