Basic logical operations 2.2.3 Operation Mechanism Through the combination of circuits that perform...
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Transcript of Basic logical operations 2.2.3 Operation Mechanism Through the combination of circuits that perform...
Basic logical operations
2.2.3 Operation Mechanism
Through the combination of circuits that perform these three operations, a wide range of logical circuits is implemented.
Logical product operation (AND operation)
Logical sum operation (OR operation)
Negation operation (NOT operation)
Basic logical operations
Logical sum (OR)
Logical product (AND)
Logical operations Operation symbols
Negation (NOT)
Exclusive logical sum (EOR)
Negative logical sum (NOR)
Negative logical product (NAND)
^ ∙V +¯ ¬
Logical Circuits
Basic Circuits and their Combination
AND circuit
OR circuit
NOT circuit
EOR circuit
NOR circuit
NAND circuit
Combinational Circuit
Identity circuitAddition circuit
Half adder circuit
Full adder circuit
Sequential Circuit
Flip-flop circuit
AND circuit of a switch and a light bulb
AND circuit
Basic logical circuits
2.2.3 Operation Mechanism
Truth Table
A B A AND B
0 0 0
0 1 0
1 0 0
1 1 1
Venn Diagram A^B (or A B)∙
switch A
switch B
switch A switch B
open (0) open (0)
open (0) close (1)
close (1) open (0)
close (1) close (1)
A: 0 B: 0 A ^ B = 0
A: 0 B: 1 A ^ B = 0
A: 1 B: 0 A ^ B = 0
A: 1 B: 1 A ^ B = 1
AB
Y
MIL –STDUS Military standard
AND symbol
OR circuit of a switch and a light bulb
OR circuit
Basic logical circuits
2.2.3 Operation Mechanism
Truth Table
A B A OR B
0 0 0
0 1 1
1 0 1
1 1 1
Venn Diagram AνB (or A+B)A B
AB
Y
MIL –STDUS Military standard
OR symbol
NOT circuit of a switch and a light bulb
NOT circuit
Basic logical circuits
2.2.3 Operation Mechanism
Truth Table
A NOT A
0 1
1 0
A
Venn Diagram ¬AA
A Y
MIL –STDUS Military standard
NOT symbol
EOR, NOR & NAND circuits
Combination of the basic circuits
2.2.3 Operation Mechanism
Truth Tables
A B A EOR B
0 0 0
0 1 1
1 0 1
1 1 0
A B A NOR B
0 0 1
0 1 0
1 0 0
1 1 0
A B A NAND B
0 0 1
0 1 1
1 0 1
1 1 0
AB
Y
MIL –STDUS Military standard
EOR symbol
AB
Y
NOR symbol
AB
Y
NAND symbol
Exclusive logical sum operation circuit
Negative logical sum operation circuit
Negative logical product operation circuit
Addition circuits
Combination of the basic circuits
2.2.3 Operation Mechanism
Truth Table
Input Output
A B C D
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Half-adder circuit
Addition of two 1-digit nos.
a+ b──c d
Full-adder circuit
ac'
EOR circuit
AND circuit
EOR circuit
AND circuit
OR circuitb
Result d
Carry e
ab
EOR circuit
AND circuit
Result d
Carry c
Input Output
c’ a b e d
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
c'a
+ b──
e d
Sequential circuit
Combination of the basic circuits
2.2.3 Operation Mechanism
Sequential circuit
• a circuit in which the output is established according to the
current input and the status preserved (past input).
• status changes with time
• composed of a flip-flop circuit and is used in registers, etc.NOR circuit
NOR circuit
2.2.4 Multi-Processor
Multi-processor systems are introduced to improve the performance and reliability of the system.
Multiple processors are in parallel with each processor having a dedicated function.
When failure occurs, the processor will do a switch
and the remaining processors will distribute the load among themselves.
Symmetric Multi-Processor
2.2.4 Multi-Processor
Memory is shared among all the processors executing the same OS.
Competition for the use of memory among the processors since the memory common to all.
A large number of processors cannot be connected.
Message passing distributed memory multi processor systems
- systems where each processor has its own private block memory.
- a high speed I/O port is used to transfer the data between the different blocks.
Array Processor
2.2.4 Multi-Processor
The sub units’ acts are in a queue passing the result
to the next unit after it has finished its part (vector processing)
Mostly used in:
Supercomputers
High speed scientific computing
Large scale or dedicated mathematical processors
Parallel
2.2.4 Multi-Processor
Multiple processors cooperate with multiple tasks being performed to execute one job.
SISD (Single Instruction Single Data Stream)One Instruction stream operating on a single data element and is not parallel.
SIMD (Single Instruction Multiple Data Stream)Each instruction may operate on more than one data element and is synchronous.
Parallel SIMDThe same instruction is executed by all processors operating on different sets of data
MIMD (Multiple Instruction Multiple Data Stream)Each instruction has its own instruction stream and
acts on its own data stream independent of other processors.
MIPS (Million Instructions per Second)
2.2.5 Processor performance
Indicates, in million units, the number of instructions that can be executed in one second.
The higher the number of instructions that can be executed, the higher the value.
Mainly used to indicate the performance of processors of high-end mainframe computers.
However, it is meaningless to use this index to compare
processors of different types of machines that execute different instruction contents.
Clock
2.2.5 Processor performance
A processor has an internal clock to set the pace in which the micro-instructions, which are basic operations, are executed,
Uses a quartz crystal oscillator that pulses in regular intervals when electric current passes through.
The time taken for this oscillator to pulse once (one cycle) is called clock.
The basic operations of the processor are performed according to this clock.
The number of clocks vary according to the instruction.
Clock Frequency- clock reciprocal number- used as an index to measure the performance of a personal computer.
CPI (Cycles per Instruction)
2.2.5 Processor performance
A CPI is the number of clocks required to execute one instruction.
This index indirectly indicates the execution time of one instruction.