BASIC INPUT AND OUTPUT INTERFACING

8085A communicate with outside world using the I/O devices.

Since memory and I/O devices share the system bus, therefore, only one device can active or communicate with 8085A in one time.

To active one device in one time, the decoding circuit is required.

The input of the decoding circuit are address bus and IO/M signal.

This topic will discuss about the technique used to interface the I/O devices with 8085A and how to design the decoding circuit.

Upon completing this topic, you should be able to:• Explain the differences between peripheral-

mapped and memory-mapped I/O techniques

• Design a decoder circuit for I/O devices using peripheral-mapped I/O techniques

Unlike modern microprocessors, the 8085A microprocessor has two address spaces. A 16-bit address space, nominally for memory devices

(memory map) An 8-bit address space, nominally for input/output devices

(I/O map) The two address spaces are distinguished by

the processor by the state of the IO/M status line.

Memory Map I/O Map

Memory and I/O map shows all the possible address in a microprocessor system and what they are assigned to.

For interfacing I/O devices, a latch is used for an output port and a tri-state buffer is used for an input port

Another option is to use PPI 8255A – a support chip that sets up multiple parallel I/O ports that are programmable

The I/O device can be interfaced with 8085 microprocessor using two approach:i. Memory-mapped Use Memory Map to define the I/O address Assume I/O devices is a part of memory system

or I/O map is a part of the memory mapii. Peripheral-mapped Connecting I/O devices using difference address

range I/O Map is separated from memory map

The IO/M signals used to distinguish between these two methods

The I/O device is identified by 16-bits address (A15 – A8 and AD7 – AD0)

Defining them same as memory location

Use memory instructions to read and write the I/O devices

Execution of these instructions will force the IO/M signal goes low (“0”) to indicate that microprocessor is accessing the memory

The device is identified using 8-bits address (A15 – A8 or AD7 – AD0)

Used IN and OUT instructions for data transfer

• IN input data from the input device• OUT output data to output device

Execution of these instructions will force the IO/M signal goes high (“1”) to indicate that microprocessor is accessing the I/O device

Advantage• It does not use any of the memory address

range Disadvantage

• Only I/O instructions can be used when addressing I/O devices

Either the high-order bus (A15 – A8) or the demultiplexed low-order bus (AD7 – AD0) can be decoded to generate the pulse corresponding to the address of the bus.

The 8085A places the device address (port number) on the demultiplexed low-order and high-order address bus when executing an IO instruction (recall IO Read and IO Write machine cycle).

The device address pulse is ANDed with the appropriate control signal to select the IO port

1. Draw I/O Map2. Draw an address decoding table3. Draw a decoding circuit

Using combinational circuit (suitable for a small I/O devices)

Using address decoder circuit

Design a decoding circuit to interface the I/O devices using the following I/O map.

2. Draw an address decoding tableDevice

Add

A7 A6 A5 A4 A3 A2 A1 A0

0 40H 0 1 0 0 0 0 0 0

1 44H 0 1 0 0 0 1 0 0

2 48H 0 1 0 0 1 0 0 0

3 4CH 0 1 0 0 1 1 0 0

4 50H 0 1 0 1 0 0 0 0

5 54H 0 1 0 1 0 1 0 0

6 58H 0 1 0 1 1 0 0 0

7 5CH 0 1 0 1 1 1 0 0

3. Draw a decoding circuit Using address decoder circuit

Design a decoding circuit to interface a PPI 8255A to 8085A microprocessor. The base address for the 8255A is 80H.

Expend your design by adding two more PPI 8255A. The base address for the new 8255A are A0H and C0H respectively.