basic computer programming and micro programmed control

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  • Basic Computer Programming and Micro Programmed Control

    Course: MCA-ISubject: Computer Organization And Architecture Unit-3

    *

  • Control Unit Implementation* Hardwired Microprogrammed

  • Microprogrammed Control UnitControl signalsGroup of bits used to select paths in multiplexers, decoders, arithmetic logic unitsControl variablesBinary variables specify microoperationsCertain microoperations initiated while others idleControl wordString of 1s and 0s represent control variables*

  • Microprogrammed Control UnitControl memoryMemory contains control wordsMicroinstructionsControl words stored in control memorySpecify control signals for execution of microoperationsMicroprogramSequence of microinstructions*

  • Control MemoryRead-only memory (ROM)Content of word in ROM at given address specifies microinstructionEach computer instruction initiates series of microinstructions (microprogram) in control memoryThese microinstructions generate microoperations toFetch instruction from main memoryEvaluate effective addressExecute operation specified by instructionReturn control to fetch phase for next instruction*Control memory (ROM)Control word (microinstruction)Address

  • Microprogrammed Control Organization

    Control memoryContains microprograms (set of microinstructions)Microinstruction contains Bits initiate microoperationsBits determine address of next microinstructionControl address register (CAR)Specifies address of next microinstruction*

  • Microprogrammed Control OrganizationNext address generator (microprogram sequencer)Determines address sequence for control memoryMicroprogram sequencer functionsIncrement CAR by oneTransfer external address into CARLoad initial address into CAR to start control operations*

  • Microprogrammed Control OrganizationControl data register (CDR)- or pipeline registerHolds microinstruction read from control memoryAllows execution of microoperations specified by control word simultaneously with generation of next microinstructionControl unit can operate without CDR*

  • Microprogram RoutinesRoutineGroup of microinstructions stored in control memoryEach computer instruction has its own microprogram routine to generate microoperations that execute the instruction*

  • Microprogram RoutinesSubroutineSequence of microinstructions used by other routines to accomplish particular taskExampleSubroutine to generate effective address of operand for memory reference instructionSubroutine register (SBR)Stores return address during subroutine call*

  • Conditional BranchingBranching from one routine to another depends on status bit conditionsStatus bits provide parameter info such asCarry-out of adderSign bit of numberMode bits of instructionInfo in status bits can be tested and actions initiated based on their conditions: 1 or 0Unconditional branchFix value of status bit to 1*

  • Mapping of InstructionEach computer instruction has its own microprogram routine stored in a given location of the control memoryMappingTransformation from instruction code bits to address in control memory where routine is located*

  • Mapping of InstructionExampleMapping 4-bit operation code to 7-bit address*

  • Address SequencingAddress sequencing capabilities required in control unitIncrementing CARUnconditional or conditional branch, depending on status bit conditionsMapping from bits of instruction to address for control memoryFacility for subroutine call and return*

  • Address Sequencing*

  • Microprogram Example*Computer Configuration

  • Microprogram Example*

  • Microinstruction Fields*

  • Microinstruction Fields*

  • Symbolic Microinstruction* Sample FormatLabel: Micro-ops CD BR AD

    Label may be empty or may specify symbolic address terminated with colon

    Micro-ops consists of 1, 2, or 3 symbols separated by commas

    CD one of {U, I, S, Z}U: Unconditional Branch I: Indirect address bitS: Sign of ACZ: Zero value in AC

    BR one of {JMP, CALL, RET, MAP}

    ADone of {Symbolic address, NEXT, empty}

  • Fetch Routine* Fetch routine- Read instruction from memory- Decode instruction and update PC

  • Symbolic Microprogram* Control memory: 128 20-bit words First 64 words: Routines for 16 machine instructions Last 64 words: Used for other purpose (e.g., fetch routine and other subroutines) Mapping: OP-code XXXX into 0XXXX00, first address for 16 routines are 0(0 0000 00), 4(0 0001 00), 8, 12, 16, 20, ..., 60

  • Binary Microprogram*

  • Design of Control Unit*

  • Microprogram Sequencer*3210S1MUX1External

    (MAP)SBRLoadIncrementerCARInput

    logicI0TMUX2Select1ISZTestClockControl memoryMicroopsCDBRADLI1S0. . .. . .

  • Input Logic for Microprogram Sequencer*

  • *