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Basic Building Blocks

Multiplexer!

+!

Demultiplexer! Adder!


The Program Counter

■  There is a special register inside the processor. ■  Big enough to hold an instruction address (32 bits). ■  Called the program counter (PC).


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Fetch - Execute

■  Fetch: –  Send the value in the PC to the instruction memory. –  The instruction memory gives out one instruction.

■  Execute: –  Carry out the fetched instruction. –  Also: PC := PC+4;

Fetch! Execute! ≅ 108 times per second!


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The Register File

■  32 word (32 bit) registers. ■  r0 is special:

–  Read: always zero. –  Write: allowed, but won´t change it.

■  r31 is special: –  Hard-wired return address (lab1).


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Add Instructions

■  32 bit operands.

■  Example:

–  Add rd rs rt. –  rd := rs + rt.

■  There is also: –  Addu rd rs rt.

■  These are not add signed and add unsigned. The “u”-variant ignores overflow.

Opcode! rs! rt! rd!5!5!5!6!


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Sub Instructions

■  32 bit operands.

■  Example: –  Sub rd rs rt –  rd := rs - rt

■  There is also: –  Subu rd rs rt

■  These are not sub signed and sub unsigned The “u”-variant ignores overflow


How to Negate

■  Y := -X?

■  Sub rd $0 rt ($0 means r0)

■  rd := 0 - rt

■  Careful: Neg ≠ Not


Compare Instructions

■  Signed integers: –  Slt rd rs rt –  if rs < rt then

rd := 1 else

rd := 0

■  Unsigned integers: –  Sltu rd rs rt –  if rs < rt then

rd := 1 else

rd := 0


Immediate Variants

of the arithmetic instructions:

■  Addi rt rs Imm ■  Addiu rt rs Imm

■  Slti rt rs Imm ■  Sltiu rt rs Imm

■  Imm sign-extend ■  No sub instruction


Sign/Zero extension

■  The immediate field is 16 bits ■  But most operations work on 32 bits!

Zero extension Sign extension

Immediate!

xxxxxxxxxxxxxxxx! Immediate!0000000000000000! Immediate!

Bit 15, the Sign bit, is copied into bits 16 - 31!

x!

0!15!16!31! 0!15!16!31!


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