IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 2, FEBRUARY 2008 149

Augmented Cell Performance of NO-Based StorageDielectric by N2O-Treated Nitride Film

for Trench DRAMYung-Hsien Wu, Chih-Ming Chang, Chun-Yao Wang, Chien-Kang Kao, Chia-Ming Kuo, Alex Ku, and Tensor Huang

Abstract—Owing to the delayed introduction of high-k storagedielectric for trench DRAM, a new technology to extend the ex-isting NO storage dielectric becomes a prerequisite. For trenchDRAM, the nitride film of NO-based storage dielectric has beenproved to possess higher quality by proper N2 O treatment, whichenables further reduction in nitride thickness and extension ofscaling limit for the existing storage dielectric. A 164% leakagecurrent improvement without sacrificing the cell capacitance canbe achieved through this process, while keeping the outstandingreliability performance of less than 438 ppm failure rate after aten-year operation. Most importantly, this new process can be fullyintegrated into incumbent furnace process, which means that noadditional tool investment is required, and it is crucial for trenchDRAM manufacturers to maintain their competitive advantagebefore the high-k material prevails at 65 nm technology node.

Index Terms—Leakage current, NO storage dielectric, N2 Otreatment, reliability, trench DRAM.

I. INTRODUCTION

AN ENORMOUS challenge faced by DRAM manufactur-ers is how to construct high-density DRAMs in a rea-

sonably sized chip area since, it is difficult to maintain a suffi-cient charge in the ever-shrinking cell capacitor, while keepingan acceptable retention time. This challenge has resulted inan unprecedented industry-wide effort to establish an advancedscheme for improving the existing process. For the cell capacitortechnology, the hemispherical silicon grain (HSG) [1] and [2]and high-k material [3], [4] have been extensively discussedbecause of their enhanced surface area and dielectric constant.For trench DRAMs, high-k materials such as Al2O3 or HfSiONare important candidates for future storage dielectrics. However,according to 2006 ITRS [5], these high-k materials will not beadopted until 65 nm technology and the employment of the ex-

Manuscript received October 8, 2007; revised November 6, 2007. The reviewof this letter was arranged by Editor C.-P. Chang.

Y.-H. Wu is with the Department of Engineering and System Science, NationalTsing-Hua University, 300 Hsinchu, Taiwan, R.O.C. (e-mail: yunhwu@mx.nthu.edu.tw; yunhwu@ess.nthu.edu.tw).

C.-M. Chang and C.-Y. Wang are with the Department of Engineeringand System Science, National Tsing-Hua University, 300 Hsinchu, Taiwan,R.O.C. They are also with the Diffusion Department, ProMOS Technolo-gies, Inc., 300 Hsinchu, Taiwan, R.O.C. (e-mail: ian_chang@promos.com.tw;chunyao_wang@promos.com.tw).

C.-K. Kao is with the Advanced Technology R&D Center, ProMOS Tech-nologies Inc., Science-Based Industrial Park, 300 Hsinchu, Taiwan (e-mail:tony_kao@promos.com.tw).

C.-M. Kuo, A. Ku, and T. Huang are with the Diffusion Depart-ment, ProMOS Technologies, Inc., 300 Hsinchu, Taiwan, R.O.C. (e-mail:chiaming_kuo@promos.com.tw; alex_ku@promos.com.tw; tensor_huang@promos.com.tw).

Color versions of one or more of the figures in this letter are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/LED.2007.914082

isting NO (nitride/oxide) material as a storage dielectric will beextended down to 70 nm technology. Because of the delayed in-troduction of high-k materials for fabrication of trench DRAMs,it is crucial to develop a new process to further extend the usageof the existing NO dielectric. It is not only for the commodityDRAM in a 12 in fab, but also for the niche DRAM in an 8 infab. Nevertheless, the related process development can be rarelyfound. In our previous study, possible methods including oxidewith NH3 /N2O treatment [6], oxide formed with wet N2O [7],and low-pressure oxide treated by N2O [8] have been proposedin order to boost the cell capacitance with acceptable tunnelingleakage current by transforming conventional pure oxide intooxynitride in which a moderately higher dielectric constant canbe achieved. These techniques have been proved to be highlysuitable to be integrated into current process with prominent cellperformance enhancement. However, these techniques focus onthe investigation of the oxide film of the NO storage dielec-tric. To further extend the use of the NO storage dielectric totrench DRAMs, a quality improvement of the nitride film is in-dispensable, and the engineering of the nitride film has not beenexplored in the literature. In contrast to the case of oxide films,it is a formidable task to increase the dielectric constant of thenitride film with the current tool; hence, the tunneling leakagecurrent suppression without compromising its dielectric con-stant is the pivot of its quality improvement. In this letter, a newprocess with a nitride film that is properly treated by N2O isproposed to greatly restrain the tunneling leakage current whilepreserving the cell capacitance, which implies that further scal-ing of the thickness of the nitride film is possible for 90 nmtechnology and beyond.

II. EXPERIMENT

Trench capacitors with the 120 nm design rule were usedto assess the electrical characteristics of different storage di-electrics. Highly As-doped buried plate and poly-Si was respec-tively, formed to serve as bottom and top electrode. The storagedielectric for the control sample was grown by low-pressure thinnitride deposition and subsequent atmospheric wet oxidation at900 ◦C, and an additional low-pressure nitridation of the oxidefilm by NH3 and N2O annealing at 900 ◦C [6]. By using it as thecontrol sample, we could evaluate whether the following processon nitride film could further exert its best quality to a new scal-ing limit. The nitride film of the control sample was formed bythermal nitridation in NH3 at 950 ◦C (17 A), and in situ nitridedeposition by the reaction of SiH2Cl2 and NH3 in the LPCVDfurnace at 700 ◦C (22 A). To further enhance the nitride quality,another two dielectrics were investigated. Samples denoted as

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150 IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 2, FEBRUARY 2008

Fig. 1. Comparison of tunneling leakage current measured at −3 V for differ-ent storage dielectrics.

N2O_1 were formed by N2O annealing carried out after ther-mal nitridation, while those denoted as N2O_2 were preparedunder the same process condition as that of N2O_1 with addi-tional N2O annealing after CVD-based nitride deposition. Notethat all N2O treatments were performed at 900 ◦C in the sameLPCVD furnace. The main reason for using N2O as the treat-ment gas was its ability to effectively remove hydrogen, whichis essential to suppress the leakage current [9]. The physicalthicknesses of the NO storage dielectric for the control sample,N2O_1, and N2O_2 were 57.1, 57.3, and 57.4 A, respectively.The thicknesses of N2O_1 and N2O_2 were almost unchangeddue to moderate N2O treatment, which prevented the perme-ation of the oxidizing species. X-ray photoelectron spectroscopy(XPS) analysis was performed to investigate the bond structureof the nitride film with various N2O treatments.

III. RESULTS AND DISCUSSION

The tunneling leakage current through the storage dielectricis one of the most important parameters to evaluate whetherthe newly developed one is eligible for DRAM operations. Themaximum allowable leakage also imposes a lower limit for fur-ther scaling of the dielectric thickness. The leakage currentsof the control sample, N2O_1, and N2O_2 are 0.89, 0.41, and0.38fA/cell, respectively, and all meet the requirement of lessthan 1 fA/cell at −1 V. As shown in Fig. 1, the improvementin leakage current suppression is more distinct at −3V. Further,as compared with the control sample, N2O_1 and N2O_2 showleakage current reductions of 164% and 169%, respectively,which suggests that further scaling of the nitride thickness ispermissible. With the potentiality to scale the nitride thickness,a higher cell capacitance can be expected and it provides an-other avenue to extend the NO-based storage dielectric to anew limit. The significantly reduced leakage current can beelucidated by Fig. 2–XPS Si2p spectra for the nitride film ofthe control sample, N2O_1, and N2O_2. The common peak at99.2 eV for all the three nitride films corresponds to the signal ofthe Si substrate, while the other peak stems from the Si–N bond-ing feature [10], [11]. As the number of times the N2O treatmentincreases, the peak at 102.3 eV for the control sample shifts to103.1 eV for N2O_1 and 103.4 eV for N2O_2, which indicatesthat more oxygen atoms can be incorporated into the nitridefilm and reduced excess Si atoms and hydrogen-related species

Fig. 2. Si 2p spectra for the nitride film of various storage dielectrics.

Fig. 3. Cell capacitance comparison for different storage dielectrics.

can be achieved through N2O annealing. This chemical prop-erty of the N2O-treated nitride film will decrease the interfacestate and electron trap density; hence, the prominent leakagecurrent performance is obtained. Compared with N2O_1, thefurther improvement in leakage current reduction is not obvi-ous for N2O_2. This phenomenon can be mainly ascribed tothe fact that, for N2O_1, the subsequent wet oxidation pro-cess oxidizes the upper part of the CVD-based nitride film andpartially due to the reduced electron trap density of the CVD-based nitride film in the wet oxidizing ambient [12], [13], andthereby reducing the difference between N2O_1 and N2O_2.Since wet oxidation only improves the CVD-based nitride, theN2O treatment of the thermally grown nitride is necessary tofurther enhance its quality, and is evidenced by the comparisonof the leakage current presented in Fig. 1. In fact, a single N2Otreatment after the overall nitride formation is also a possiblescheme for improving the nitride quality. However, prolongedtime is required to treat all the nitride film because of its higherthickness, and the cell capacitance has to be compromised dueto the degraded dielectric constant of the nitride film caused byexcessive oxidation. In addition to the significant leakage cur-rent improvement, the cell capacitance performance still needsto be considered in order to examine whether it can be realizedin the DRAM product, and the comparison of the cell capaci-tance is manifested in Fig. 3. For N2O_1, the slightly smallercell capacitance compared to that of the control sample is dueto the oxygen incorporation. Owing to the moderate N2O treat-ment, no interfacial oxide is grown as confirmed by transmission

WU et al.: AUGMENTED CELL PERFORMANCE OF NO-BASED STORAGE DIELECTRIC 151

Fig. 4. Reliability evaluation for the control sample and N2O_1 operated with−0.8 V at 110 ◦C in 256 M array.

electron microscopy (TEM) characterization, and the cell capac-itance degradation is less than 1%. Combined with its greatlyreduced leakage current, it exhibits the exceptional competenceto further scale down the dielectric thickness for the sub-90nm regime. An even lower capacitance for N2O_2 is attributedto an overly treated nitride, and the result also shows that thekey point of the N2O treatment is to implement it after a properprocess stage and provide the appropriate treatment time to opti-mize the cell performance. Although N2O_2 also shows eminentperformance, it is not recommended for further use because itachieves limited performance improvement when compared toN2O_1, but takes additional time for ramp up/ramp down andthe N2O annealing process. The extracted effective oxide thick-nesses (EOTs) for the control sample, N2O_1, and N2O_2 are38.5, 38.8, and 39.1 A, respectively. Note that the higher EOTfor N2O_1 and N2O_2 is mainly due to the oxygen incorpora-tion, which lowers the dielectric constant of the nitride film, andpartly due to the slightly higher physical thickness. The higherEOT also explains the greatly improved leakage performancefor the N2O-treated sample shown in Fig. 2. Revealed in Fig. 4is the reliability test results for the control sample and N2O_1,which predict the lifetime of the storage dielectric under normaloperating conditions (256 M array with−0.8 V stress at 110 ◦C).The failures are accelerated at elevated voltages and tempera-ture. Note that the test structure is a trench capacitor with 133K arrays and the lifetime for 256 M is achieved by Poisson areascaling. The detail of the test procedure was disclosed in [7].Although both the control sample and N2O_1 show satisfactoryreliability performance with a failure rate of less than 438 ppmafter a ten-year operation, N2O_1 has a remarkably lower fail-ure rate mainly due to the reduction of the leakage current; thisdemonstrates its feasibility to further extend the scaling limit ofthe existing NO-based storage dielectric.

IV. CONCLUSION

The quality of the nitride film of the existing NO-based stor-age dielectric for the trench DRAM has been improved byalleviating the electron trap density through appropriate N2Otreatment. Compared with the control sample, a 164% leakagecurrent reduction can be achieved without compromising thecell capacitance. The superior reliability performance for stor-age dielectric has also been shown with its failure rate of less

than 438 ppm after a ten-year operation. The prominent electri-cal characteristics demonstrate the competence to further scaledown the nitride thickness, which paves a new avenue to extendthe scaling limit of the NO-based storage dielectric. Most im-portantly, without using a new tool investment, this techniquecan be fully integrated into the current furnace process in orderto achieve the augmented cell performance, which is essentialfor trench DRAM manufacturers to maintain their cost advan-tage before the high-k material is established, as the industrystandard at 65 nm technology node.

ACKNOWLEDGMENT

The authors would like to thank the experts of the Phys-ical Failure Analysis Department and Device Department ofProMOS Technology, Inc., for their fruitful discussions and as-sistance.

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