Atmel AVR32924: UC3-L0 XPLAINED Hardware User's Guideww1.microchip.com › ... ›...

APPLICATION NOTE

Atmel AVR32924: UC3-L0 XPLAINED Hardware User’s Guide

Atmel 32-bit Microcontroller

Features

• Atmel® AT32UC3L064 microcontroller

• Atmel AT32UC3B1256 • Board controller • Communication gateway

• Analog input (to ADC) • Temperature sensor • RC filter

• Digital I/O • One mechanical button switch • Three LEDs • Four expansion headers

• Footprints for external memory • Atmel AT45DB series DataFlash serial flash • Atmel AT25DF series industry standard serial flash

• Touch • One Atmel QMatrix slider (alt. four QMatrix buttons) • One Atmel QTouch® button

Introduction

The Atmel UC3-L0 Xplained evaluation kit is a hardware platform to evaluate the Atmel AT32UC3L064 microcontroller.

The kit offers a large range of features that enables the Atmel AVR® UC3 user to get started using UC3 peripherals right away and understand how to integrate the UC3 device in their own design.

Figure 1. UC3-L0 Xplained Evaluation Kit.

32156C−AVR−06/2013

Atmel AVR32924: UC3-L0 XPLAINED Hardware User’s Guide [APPLICATION NOTE] 32156C−AVR−06/2013

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Table of Contents

1. Related Items ....................................................................................... 3

2. General Information ............................................................................. 4 2.1 Preprogrammed Firmware ................................................................................ 5 2.2 Power Supply .................................................................................................... 6 2.3 Measuring the AT32UC3L064 Power Consumption .......................................... 6 2.4 Programming the AT32UC3L064 through the UART-to-USB Gateway ............ 6 2.5 Communication through the UART-to-USB Gateway ........................................ 6

3. Connectors ........................................................................................... 7 3.1 Programming Headers ...................................................................................... 7 3.2 I/O Expansion Headers ..................................................................................... 7

4. Memories ........................................................................................... 10

5. Miscellaneous I/O .............................................................................. 11 5.1 Mechanical Switch .......................................................................................... 11 5.2 LEDs ….. ......................................................................................................... 11 5.3 Analog I/O ....................................................................................................... 11 5.4 Touch ….. ........................................................................................................ 12 5.5 Board Controller .............................................................................................. 12

6. Included Code Example ..................................................................... 13 6.1 Compiling and Running ................................................................................... 13

7. Schematics ........................................................................................ 14

8. Known Issues ..................................................................................... 21 8.1 Light Sensor .................................................................................................... 21 8.2 USB Test Points .............................................................................................. 21

9. Revision History ................................................................................. 22 9.1 Revision 4 ....................................................................................................... 22

10. EVALUATION BOARD/KIT IMPORTANT NOTICE ........................... 23

11. Document Revision History ................................................................ 24


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1. Related Items Atmel Studio (IDE Supports all 8- and 32-bit AVR and ARM® devices) http://www.atmel.com/tools/atmelstudio.aspx?tab=overview

Atmel AVR JTAGICE3 (on-chip programming and debugging tool) http://www.atmel.com/tools/JTAGICE3.aspx

Atmel AVR ONE! (on-chip programming and debugging tool) http://www.atmel.com/tools/AVRONE_.aspx

Atmel Software Framework (ASF) http://gallery.atmel.com/Products/Details/29ab7282-240d-4e34-8a1d-7b3607d45778

http://www.atmel.com/tools/atmelstudio.aspx?tab=overview�

http://www.atmel.com/tools/JTAGICE3.aspx�

http://www.atmel.com/tools/AVRONE_.aspx�

http://gallery.atmel.com/Products/Details/29ab7282-240d-4e34-8a1d-7b3607d45778�


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2. General Information This document targets the Atmel AT32UC3L064 evaluation kit revision 4, and parts of the document may, therefore, be inconsistent with earlier revisions of the product. For earlier revisions, please refer to the schematics, which is the only documentation available for these revisions. The Atmel UC3-L0 Xplained kit is intended to demonstrate the AT32UC3L064 microcontroller, and the hardware that relates to the Atmel AT32UC3B1256 (board controller) is, therefore, not covered in detail in this document.

Figure 2-1. Overview of the UC3-L0 Xplained kit.

Header J1 Header J3

Header J2 Header J4

JTAG Header

Power measurement

headerUSB

Connector

QTouch Button

QMatrix Slider

AT32UC3L064 AT32UC3B1256

Dataflash footprints

RGB LED

Mechanical Button Power &

Status LED

LED0 & LED1


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Figure 2-2. Functional overview of the Atmel UC3-L0 Xplained kit.

Temperature Sensor,

PWM Voltage generation

AT32UC3L064

USB Device

Dataflash

Four standard 10 pin headers that can be used

with various top cards Button

LEDs

JTAG

DEBUG

MEMORIES

EXPANSIONS

HIDQTouch button

QMatrix slider

AT32UC3B1256

USART/TWI

2.1 Preprogrammed Firmware The Atmel AT32UC3L064 and the Atmel AT32UC3B1256 that come with the Atmel UC3-L0 Xplained kit are both preprogrammed.

The preprogrammed firmware in the AT32UC3L064 is set up with a small demo with the QMatrix touch slider and QTouch button that can be used to control the RGB LED. The device also features a UART boot loader that can be used to program new firmware to the device. Hold the mechanical button while applying power to start the boot loader. The boot loader can be used with the command line tool “batchISP” delivered with FLIP.

The preprogrammed AT32UC3B1256 firmware offers features such as a boot loader for self-programming of the board controller itself and a UART-to-USB gateway. The bootloader can be started by shorting the 2-pin header (not mounted) while applying power to the board. The bootloader can be used with the command line tool “BatchISP” delivered with FLIP.


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2.2 Power Supply The kit is powered via the USB connector, which leaves two options to power it: Connect the kit either to a PC through a USB cable or to a 5V USB power supply (AC/DC adapter).

The 5V is regulated down to 3.3V with an onboard LDO regulator, which provides power to the entire board. The AT32UC3L064 is powered by 3.3V, but if 1.8V operation is desired, some modifications to the board are needed. This includes replacing the regulator with one that delivers 1.8V output and rerouting the power to the device (see schematic for explanation). As some of the other ICs on the Atmel UC3-L0 Xplained require 3.3V to operate correctly, these devices have to be removed also.

2.3 Measuring the AT32UC3L064 Power Consumption As part of an evaluation of the Atmel AT32UC3L064, it can be of interest to measure its power consumption. The two-pin header with a jumper mounted on it is the only connection between the common power plane VCC_P3V3 and the VCC_MCU_P3V3 power plane. By replacing the jumper with an ampere meter, it is possible to determine the current consumption of the AT32UC3L064. To locate the power measurement header, refer to Figure 2-1.

Warning: Do not power the board without having the jumper or an ampere meter mounted. Otherwise, the device may be damaged.

2.4 Programming the AT32UC3L064 through the UART-to-USB Gateway The AT32UC3L064 can be programmed through the UART-to-USB gateway. This can be accomplished using the UART boot loader preprogrammed in the device. Press and hold the mechanical button switch while powering up the board to enter the boot loader, and use 32-bit AVR Studio® to set up a programming connection to the device.

Note: If the default board controller firmware is replaced, programming of the AT32UC3L064 may not be possible as the UART-to-USB functionality might be missing.

Note: If any external programming tool is used on the AT32UC3L064, the boot loader might be erased, and it will not be possible to program the device through the UART-to-USB gateway. In this case the boot loader has to be restored with an external programming tool.

2.5 Communication through the UART-to-USB Gateway The AT32UC3L064 UART is connected to a UART on the Atmel AT32UC3B1256. The AT32UC3B1256 UART is communicating at 57600 baud, using one start bit, eight data bits, one stop bit, and no parity.

When the AT32UC3B1256 device is enumerated (connected to a PC), the data transmitted from the AT32UC3L064 is passed on to a (virtual) COM port. This means that it is possible to use a terminal program to receive the transmitted data on a PC. Similarly data transmitted from the PC COM port is passed on to the AT32UC3L064 UART through the gateway.


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3. Connectors The UC3-L0 Xplained kit has five 10-pin, 100mil headers. Two headers have a fixed communication interface (J1 and J4). One header has analog functionality (J2), and the last header (J3) has general purpose digital I/O.

The 90° angled header is the JTAG programming and debugging header for the AT32UC3L064.

For the location of the respective headers, refer to Figure 2-1.

3.1 Programming Headers The Atmel AT32UC3L064 can be programmed and debugged by connecting an external programming/debugging tool to the JTAG header. The header has a standard JTAG programmer pinout (refer to online help in AVR Studio), and tools such as JTAGICE mkII or AVR ONE! can thus be connected directly to the header.

Note: The grey female 10-pin header on JTAGICE mkII has to be used when connecting to the kit. A scoring in the board is made to fit the orientation tab on the header.

Note: A standoff adapter (no. 1) is needed when using the AVRONE!.

Note: Pin 1 on the JTAG header is at the top right corner. This is rotated 180° compared to the other headers (J1, J2, J3, and J4).

Table 3-1. UC3 Programming and Debugging Interface – JTAG.

Pin JTAG (1)

1 TCK

2 GND

3 TDO

4 VCC

5 TMS

6 nSRST

7 -

8 -

9 TDI

10 GND

Note: 1. Standard pinout for JTAGICE mkII and other Atmel programming tools.

The Atmel AT32UC3B1256 can be programmed through its boot loader. The boot loader is evoked by shorting the two holes close to the device before applying power to the board. The two holes have 100mil spacing, so the user can solder in a two-pin header and use a jumper to easily enter the boot loader. Programming is performed through the boot loader programmer target in AVR32 Studio.

Alternatively, the AT32UC3B1256 can also be programmed by connecting a programming tool, such as JTAGICE mkII, to the 10-pin test points on the bottom side of the board (marked with BC JTAG).

Note: It is not recommended to program the AT32UC3B1256 using a programming tool, as this will erase the boot loader.

3.2 I/O Expansion Headers There are four available I/O expansion headers on the kit. Because of the low pin count on the device, the I/O expansion header pins are shared with onboard functionality. If “clean” expansion ports are needed, cut-straps are available on some of the ADC inputs. Otherwise, it is only needed to remove a series resistor to remove onboard functionality. Table 3-2 show what is shared on the respective header pins.


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Table 3-2. UC3-L0 Xplained I/O Expansion Header – J1.

Pin J1 UC3 pin Shared with onboard functionality

1 TWI SDA PA21 Header J4, board controller

2 TWI SCL PB05 Header J4, board controller

3 UART RX PB11 Header J4

4 UART TX PB10 Header J4

5 SPI CS2 PA08 -

6 SPI MOSI PB03 Header J4, DataFlash

7 SPI MISO PB02 Header J4, DataFlash

8 SPI SCK PB01 Header J4, DataFlash

9 GND - -

10 VCC_P3V3 - -



1 ADC0 (1) PA14 RC filter output

2 ADC1 (2) PA15 QMatrix slider X0

3 ADC2 (1) PA16 Shorted to GND

4 ADC4 (1) PA18 NTC

5 ADC7 PB07 -

6 ADC8 (2) PB08 QMatrix slider X3

7 ADC6 PB06 -

8 ADC5 (2) PA19 QMatrix slider X1

9 GND - -

10 VCC_ANA_P3V3 - -

Notes: 1. ADC channels can be disconnected from onboard functions by cutting the available cut-straps on the bottom side of the board.

2. ADC channels are shared with the QMatrix slider. Remove resistors on the lines to separate the sensors from the ADC.


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1 PWM0 PA13 RGB LED (RED), RC filter input

2 PWM1 PA17 RGB LED (GREEN)

3 PWM2 PA20 RGB LED (BLUE)

4 PWM3 PA22 QMatrix slider X2

5 PWM4 PB12 QTouch SNS

6 PWM5 PB09 QTouch SNSK

7 PWM6 PB04 LED1

8 PWM7 (1) PA11 LED0, mechanical button

9 GND - -

10 VCC_P5V0 (2) - -

Notes: 1. Mechanical button and LED0 are sharing I/O. Use input with pull-up to turn off LED, and output low to turn on LED.

2. The VCC pin on this header has 5V and is connected to the USB power.



1 TWI SDA PA21 Header J1, board controller

2 TWI SCL PB05 Header J1, board controller

3 UART RX PB11 Header J1

4 UART TX PB10 Header J1

5 SPI CS0 PB00 -

6 SPI MOSI PB03 Header J1, DataFlash

7 SPI MISO PB02 Header J1, DataFlash

8 SPI SCK PB01 Header J1, DataFlash

9 GND - -

10 VCC_P3V3 - -


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4. Memories The Atmel UC3-L0 Xplained does not have any external memories mounted on the board. Footprints are available for adding either an industrial standard or a proprietary Atmel DataFlash serial flash.

Note: The footprints share the same SPI lines, including the chip select, and so it is not possible to mount a device on both footprints at the same time.

Table 4-1. Compatible Devices for the Footprints.

AT45DB AT25DF

AT45DB64D2-CNU AT25DF641A-SH

AT45DB321D-MWU AT25DF321A-SH

AT45DB161D-SS AT25DF161-SH

AT45DB081D-SS AT25DF081-SSH

AT45DB041D-SS AT25DF021-SSH

AT45DB021D-SS

AT45DB011D-SS


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5. Miscellaneous I/O

5.1 Mechanical Switch The board is equipped with one mechanical switch. The button is shared with LED0, and onboard protection circuitry is added to avoid a short when driving the port high at the same time as pushing the button, which will short it to ground. To be able to use both button and LED, time multiplexing has to be used.

To be able to detect a button press, the firmware has to periodically set the I/O pin to input with pull-up and check if it is low. When done fast enough, the human eye will not see any change on the LED.

5.2 LEDs The Atmel UC3-L0 Xplained has three LEDs mounted onboard that are connected to the Atmel AT32UC3L064. These include two standard yellow LEDs and one RGB LED. The two yellow LEDs are active low, while the RGB LED is active high.

LED0 is shared with the mechanical button. When turning this LED on, set the I/O pin to output low. When turning the LED off, set the I/O pin as input with pull-up. When the LED is turned on, the protection circuitry added to the button will make the LED shine brighter when the button is pressed. When the LED is off, any button press will light up the LED.

One additional dual LED is mounted near the USB connector. This is the power and status LED, which is connected to the board controller. This LED will be green when power is applied, and will toggle between green and orange when communication over USB is ongoing.

5.3 Analog I/O A RC filter and an NTC are connected to ADC0 and ADC4 respectively. These analog references can be used as input to the ADC. Both analog references can be disconnected by cutting the cut-straps on the bottom side of the board.

The RC filter (1st order low-pass) has an approximate 3dB cut-off frequency of 160Hz. The input to the RC filter is one of the UC3 GPIO pins that can be configured to output a PWM signal to the RC filter. This can be used to generate a DC voltage on the output of the RC filter, which can be measured on the ADC. As this is a 1st order filter, the ripple on the DC voltage is proportional to the input frequency. A higher input frequency will give lower ripple on the output.


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5.4 Touch The UC3-L0 Xplained kit has one QTouch button and one QMatrix slider implemented onboard. The button and the slider are connected to the built-in CAT module in the AT32UC3L064.

The QMatrix slider can be reconfigured to be used as four separate buttons instead of as a slider.

Table 5-1. UC3-L0 Xplained Touch Connections.

Touch sensor onboard reference

QTouch method pin name

QMatrix method pin name

CAT module pin name

UC3 pin Selection bit in PINMODEx register

QSlider X0 X7 CSB6 PA15 SP6

QSlider X1 X10 CSA10 PA19 SP10

QSlider X2 X11 CSB10 PA22 SP10

QSlider X3 X13 CSB12 PB08 SP12

QSlider YK0 YK3 CSB7 PA05 SP7

- Y3 CSA7 PA04 SP7

QButton SNSK0 SNSK15 CSB15 PB09 SP15

- SNS15 CSA15 PB12 SP15

Note: As the device has a very low pin count, a tradeoff has been made to be able to have as many I/O lines as possible routed to the headers. The sensor lines to the QTouch button and the QMatrix slider are shared with some of the headers. The sensitivity of the sensor lines is very high on these exposed pins, and so touching the I/O pins will give erroneous result in the touch sensing mechanism.

Note: Adding top modules to the board with functionality connected to these pins is not recommended. Top modules without functionality on these pins will only add some capacitive load and will not affect the QMatrix sensor significantly.

5.5 Board Controller The board controller and the Atmel AT32UC3L064 are connected together through TWI and UART. Both interfaces can be used to communicate between the devices, but only the UART is implemented by default in the board controller.

Table 5-2. AT32UC3L064 and Board Controller Communication Interface.

Interface Atmel AT32UC3L064 pin Atmel AT32UC3B1256 pin

UART RX (1) PA07 PA24

UART TX (1) PA06 PA23

TWI SCL PB05 PA09

TWI SDA PA21 PA10

Note: 1. These represent the RX and TX on the device. The RX on one device is connected to TX on the other device, and vice versa.


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6. Included Code Example The example application is based on the Atmel AVR Software Framework found online at http://asf.atmel.no. The example can be found in the path “avr32\applications\uc3-l0_xplained” in the ASF. For documentation, help, and examples on the drivers used, please see the website.

Note: ASF in Atmel Studio does not require a specific download. Use Atmel Studio Extension Manager (Tools->Extension Manager) or visit Atmel Gallery to update ASF in Atmel Studio.

6.1 Compiling and Running The code examples that can be found in ASF can be compiled by running make on the makefile included in the project or by opening the project in IAR™ and compiling the project within IAR.

http://asf.atmel.no/�

http://gallery.atmel.com/�


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7. Schematics

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DF_M I SODF_M O SIDF_SCK

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USB_NUSB_P

USB_I D

JTAG / aWir e

Header J4

LEDS

Header J3Header J2Header J1

STATUS_L EDPO WER_L ED

Q M ATRI X_SL IDER

BUTTO NQ TO UCH_BUTTO N

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HEADER J4

HEADER J2

Dat af lash

LEDS

SENSO RSJTAG

XTALHEADER J1

HEADER J3 RG BL ED

BUTTO NQ TO UCH_BUTTO NQ M ATRI X_SL IDER

TWI 0_SCLTWI 0_SDA

BC_USART2_TXDBC_USART2_RXD

U_M CUM CU. SchDoc

NTC_O UTPUT

FILTER_I NPUTFILTER_O UTPUT

RG BL ED

XTAL

U_AnalogAnalog . SchDoc

SPI _CSSPI _M ISOSPI _M O SISPI _SCK

Dat aflash

ADCNTC_ADC

PWMSENSO RS

USB_PUSB_N

STATUS_L EDPO WER_L ED

USART1_TXUSART1_RXTWI _SCLTWI _SDA

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A08- 0808

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100nC101

2. 2uFC100

G ND

100nC101

2. 2uFC100

G ND

Close t o VDDCO RE

100nC103

G ND

Close t o VDDI N/ G ND

100nC103

G ND

100nC104

G ND

Close t o VDDI O / G ND pair s

100nC105

G ND

G ND

VCC_M CU_P3V3VCC_CO RE_P1V8

100nC106

VCC_VDDANA

G ND

100nC104

G ND

100nC105

G ND

100nC106

VCC_VDDANAVCC_VDDANA

G ND

Close t o VDDANA/ G NDANA

G NDVCC_ADVREFVCC_VDDANA

PI N1PI N2PI N3PI N4PI N5PI N6PI N7PI N8

J4

USART1_RXDUSART1_TXD

HEADER J4


J2ADC4

ADC6

ADC7

ADC0

HEADER J2

SPI _CSSPI _M ISOSPI _M O SI

SPI _SCK

Dat af lash

SPI 0_SCK

SPI 0_CS3

SPI 0_M O SISPI 0_M ISODat af lash

LED0LED1LEDSLEDS

PWMADC

NTC_ADCSENSO RS ADC0SENSO RS

TM STDOTDI

TCKRESET

JTAGJTAG

JTAG _TM SJTAG _TDOJTAG _TDIJTAG _TCKRESET

XI N32XO UT32XTALXTAL


J1


J3

HEADER J1

HEADER J3

TWI 0_SDATWI 0_SCL

RESET

JTAG _TDI

JTAG _TCK

JTAG _TDOJTAG _TM S

G REENRED

BL UERG BL EDRG BLED

XI N32XO UT32

XI N32

XO UT32

TWI 0_SCL

SPI 0_M ISOSPI 0_M O SI

SPI 0_SCKSPI 0_CS0


AD

C0

AD

C1/

QM

ATR

IX_X

7

ADC8/ Q M ATRI X_X13

AD

C5/

QM

ATR

IX_X

10

ADC6 TWI 0_SDATWI 0_SCL

SPI 0_M O SISPI 0_M ISO

SPI 0_M ISOSPI 0_M O SI

SPI 0_SCK

SPI 0_SCK

SPI 0_CS0

SPI 0_CS2

SPI 0_CS2SPI 0_CS3

TWI0

_SD

A

VCC_M CU_P3V3

VCC_CO RE_P1V8

VCC_M CU_P3V3 VCC_M CU_P3V3

PWM A0

PWM A4/ Q TO UCH_SNS15

PWM A1PWM A2

0RR102

BL M 18HE152SN1L100

0RR104

0RR103

AD

C0

VCC_CO RE_P1V8 VCC_VDDANA VCC_ADVREF

0RR102

BL M 18HE152SN1L100

0RR104

0RR103

AD

C0

VCC_CO RE_P1V8 VCC_VDDANA VCC_ADVREF

TP100 TP101 TP102


1. 8V domain and analog volt ages

47kR100

47kR101

VCC_P3V3

47k47kR100R100

47k47kR101R101

VCC_P3V3VCC_P3V3TWI Pull- Ups

TWI 0_SCLTWI 0_SDA

BUTTO N

Q TO UCH_BUTTO N

22nC108

X0X1X2X3YK0

Q M ATRI X_SL IDER

Q M ATRI X_SLI DER

4. 7nC109

Q M ATRI X_YK3

Q M ATRI X_Y3

TWI 0_SCL

TWI 0_SDA

0RR106

VCC_M CU_P3V3

Add t his r esist or for 1. 8V oper at ion ( VCC_M CU_P3V3 must be 1. 8V) .

Add r esist or 103 and r emove r esist or 104 if an ext er nal r efer ence should be connect ed fr om header J2, pin 0.

G ND

ADC2/ ACREF

J100

SM D- STRAP_CL O SED

Q M ATRI X_Y3Q M ATRI X_YK3

ADC7

PWM A0PWM A1

PWM

A0

PWM

A1

PWM A0

PWM

A2

PWM

A3/

QM

ATR

IX_X

11

PWM A5/ Q TO UCH_SNSK15

PWM A6

PWM A2

PWM A6PWM A7/ BTN0

PWM A6

AD

C4ADC4


BC_USART2_TXD

BC_USART2_RXD

USART2_TXD

USART2_RXD

GND_

01

PA092

PA083

PA034

PB12 5

PB00 6

PB02 7PB03 8

PA22

9

PA0610

PA0011

PA0512

PA0213

PA0114

PA0715

PB01 16

VDDI

N17

VDDC

ORE

18

GND_

119

PB05 20

PB04 21

RESET_N22

PB10 23

PA21

24PA

2025

PA13

26

PA1127

PA0428

PB09 29

PB06 30PB07 31PB08 32

GNDA

NA33

ADVR

EFP

34

VDDA

NA35

PA14

36PA

1537

PA16

38

PA17

39

PA19

40PA

1841

VDDI

O_0

42

GND_

243

PB11 44

GND_

345

PA1046

PA1247

VDDI

O_1

48

AT32UC3L 064-AUTU100

PWM A5/ Q TO UCH_SNSK15

PWM A4/ Q TO UCH_SNS15

ADC8/ Q M ATRI X_X13PWM A3/ Q M ATRI X_X11

ADC1/ Q M ATRI X_X7ADC5/ Q M ATRI X_X10

ADC1/ Q M ATRI X_X7


ADC2/ ACREF

AD

C2/

AC

REF

PWM A3/ Q M ATRI X_X11

PWM A5/ Q TO UCH_SNSK15PWM A4/ Q TO UCH_SNS15


PWM A7

PWM A7

PWM A7/ BTN0

But t on/ LED SC pr ot ect ion

PWM A7PWM A7/ BTN0680R

R105

1kR107

1kR108

1kR109

1kR110

4. 7uFC102

1kR111

4. 7uFC107


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220RR204

220RR205

1MR206

G ND

TDI

TDOTM S

G ND

J T AG/a W i re In te rfa c e

2213R- 10G

1 23 45 67 89 10

J204

G ND

USB M i n i AB c o n n e c to r

TP201

TP202

TP203

TP204G ND

G ND

USB T ra n s i e n t p ro te c t i o n

1

2

4

3

PRTR5V0U2X

D204

USB_N

USB_P

Sp a re Di g i ta l S i g n a l s

VBUS

1D-

2D+

3

GND

5SH

IELD

16

SHIE

LD2

7

ID4

SHIE

LD3

8SH

IELD

49

M USB- 05- F- AB- SM - A

J205 USB_AB

USB_I D

TCK

TDO

TMS

TDI

RES

ET

JTAG

JTAG / aWir e

PIN

3PI

N5

PIN

7

PIN

1

PIN

2PI

N4

PIN

6PI

N8

J1

Header J1

JTAG TCK and aWir e DATAO UT

JTAG RESET and aWir e DATA

1 23 45 67 89 10

J200

HEADER 2x 5

USB_N

USB_P

GR

GR

12

34

SM L-020M LT

D205

VCC_P3V3

STATUS_LED

PO WER_LED

Po we r L ED a n d USB Sta tu s L ED

VCC_P3V3

VCC_P3V3

VCC_P3V3G ND

SDA / RTS SCL / CTS / XCKRXD TXDSS M O SIM ISO SCK

1

23

2N7002Q 200

G ND

G ND

2 Ye l l o w L EDs1 Pu s h -Bu t to n

VCC_ANA_P3V3

ADC/DAC/AC c h a n n e l s

VCC_ANA_P3V3VCC_ANA_P3V3

G ND

LED1LED0

LED

S

LEDS

PIN

3PI

N5

PIN

7

PIN

1

PIN

2PI

N4

PIN

6PI

N8

J2

Header J2

TP200

1 23 45 67 89 10

J201

HEADER 2x 5

VCC_P3V3 VCC_P3V3

ADC / AREF ADCADC / DAC ADC / DAC

ADC / AC_PADC / AC_P

ADC / AC_NADC / AC_N

BUTTO N

13 4

2

SKRAAKE010SW200

BL M 18HE152SN1

L200

VCC_P3V3

100nC200

G ND

1CS201

Q Touch But t on

Q TO UCH_BUTTO N

21EL

17-2

1UY

C/A

2D

200

21EL

17-2

1UY

C/A

2D

201

VCC_P5V0

G ND

Sp a re Di g i ta l S i g n a l s

PIN

3PI

N5

PIN

7

PIN

1

PIN

2PI

N4

PIN

6PI

N8

J3

Header J3

1 23 45 67 89 10

J202

HEADER 2x 5

G PIOG PIOG PIOG PIO

G PIOG PIOG PIOG PIO

VCC_P3V3G ND

Ex p a n s i o n He a d e r

PIN

2

PIN

3

PIN

4

PIN

5

PIN

6

PIN

7

PIN

8

PIN

1

J4

SDA / RTS / PWM / CAPTURE SCL / CTS / PWM / CAPTURERXD / PWM / CAPTURE TXD / PWM / CAPTURESS/ PWM / CAPTURE M O SI / PWM / CAPTUREM ISO / PWM SCK / PWM

Header J4

1 23 45 67 89 10

J203

HEADER 2x 5

1234Y

CS200

M edium Q M at r ix Slider

X0X1X2X3YK0

Q M ATRI X_SL IDER

Q M ATRI X_SLI DER

680R

R20

1

1nC201

220R

R20

0

VCC_P5V0

Q M _X0Q M _X1Q M _X2Q M _X3Q M _YK0


17

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

4

Power M anagem ent . SchDoc

4 76/ 4/ 2013 5: 16: 53 PM

UC3- L0 XPLAI NED

ATM EL Nor way

Vest r e Rost en 79

N- 7075 TI LLER

NO RWAY

PAG E: of

TI TLE:


Dat e:

*

*

*

G ND

VCC_P3V3VCC_P5V0

3 .3 V l i n e a r re g u l a to r wi th i n p u t ra n g e f ro m - 4 .4 V - 1 8 V

G ND

G ND

VCC_P3V3VI N3 VO UT 2

G ND1 VO UT_PAD 4

NCP1117L PST33T3GU300

CPU Po we r Su p p l y M e a s u re m e n t He a d e r

VCC_M CU_P3V3

Place on J300 pin1-2SNT- 100-BK- G

JS300

12

J300

HEADER 1x 2

VCC_P5V0

VCC_P3V3

10u+

C30110

u

C30

0

This r egulat or can handle up t o 18V input volt age and maxim um 1. 0A load cur r ent , wit h a maxim um volt age dr op of 1. 4V. The out put volt age is 3. 3V ± 2%. The maxim um quiescent cur r ent is 700µA. NO TE! ! t hat wor st -case out put volt age may dr op down t o 3. 0V wit h 4. 4V input volt age.

USB 2. 0 Input volt age specificat ion: 4. 4V - 5. 25V, nominal 5. 0V

NO TE! ! ESR on out put capacit or should be lar ger t han 20mO hm t o maint ain st able r egulat ion. Hig her values on t he out put capacit or will also im pr ove loop st abilit y and giv e bet t er t r ansient r esponse which r educes out put noise.


18

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

5

Analog. SchDoc

5 76/ 4/ 2013 5: 16: 54 PM

UC3- L0 XPLAI NED

ATM EL Nor way

Vest r e Rost en 79

N- 7075 TI LLER

NO RWAY

PAG E: of

TI TLE:


Dat e:

*

*

*

NTC Tem per at ur e Sensor

G ND

VCC_P3V3

100kR400

12

NCP18WF104J03RB

R401

NTC_O UTPUT

Lowpass RC Filt er

G ND

FI LTER_I NPUT FI LTER_O UTPUT

GR

B 1

2 3

4

67-23/ R6G 6B6C- B38/ 2T

D400

VCC_P3V3 GR

B 1

2 3

4

67-23/ R6G 6B6C- B38/ 2T

D400

VCC_P3V3

RGBL ED

G NDG ND

Clock cir cuit r y

G ND

XC400

Epson FC- 145 cr yst al.

22pC401

22pC400

XI N32XO UT32 XTAL XTAL

J400


J401


J402


This st r ap wit h SM D pads can be used t o place a r esist or in t he XO UT signal in or der t o measur e t he dr ive level and t he oscillat or allow ance.By default t hese st r aps ar e closed and not hing is mount ed on t he pads.

1uC402

1kR405

1

23

2N7002

Q 400

G REENRED

BL UE

RG BL ED

RG BLED1

23

2N7002

Q 401

1

23

2N7002

Q 402

G ND

G ND

G ND

100kR406

100kR407

100kR408

62RR403

150RR402

180RR404

100k NTC Tem per at ur e Sensor . O ut put will be Vcc/ 2 at 25C.

B( 25/ 80) = 4255KB( 25/ 85) = 4260KB( 25/ 100) = 4282K

Bet a-for mula:R1 = R2 * e^( B/ T1-B/ T2)

Ex . B( 25/ 80) :R = 100k * e^( 4255/ T1 - 4255/ 25)

1. or der RC Lowpass filt er wit h cut -of f fr equency at appr oxim at ely 1kHz.

To have const ant DC values wit h low r ipple, t he capacit or / r esist or values should be chosen t o t he minim um cut -of f fr equency.

Cr yst al dat asheet :Load capacit ance CL = 12. 5 pFESR 70k O hm M ax.Fr equency t oler ance 20ppmDr iv e Level 0. 5uW

AT32UC3L 0 dat asheet :Int er nal equivalent capacit ance of t he device is Ci = 2 pFThe package and pin capacit ance is neglig ible ( < 1pF)

C = 2 ( CL - Ci ) = 2 ( 12. 5 - 2) pF = 21 pF

Select ed value is 22pF


19

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

6

Dat af lash. SchDoc

6 76/ 4/ 2013 5: 16: 54 PM

UC3- L0 XPLAI NED

ATM EL Nor way

Vest r e Rost en 79

N- 7075 TI LLER

NO RWAY

PAG E: of

TI TLE:


Dat e:

*

*

*

VCC_P3V3

VCC_P3V3

G ND

VCC_P3V3

DF_M I SO

DF_M O SIDF_SCK

DF_CS

100kR50

0

100kR50

1

100kR50

2

100nC500

SI1

SCK2RESET3

CS4 WP 5VCC 6G ND 7SO 8

AT45DB642D- CNU

U500

Dat af lash

G ND

VCC_P3V3CS1

SO2

WP3

G ND4

VCC 8

HO LD 7

SCK 6

SI 5

AT25DF641A- SH- T

U501


20

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

D D

C C

B B

A A

7

Boar d_cont r oller . SchDoc

7 76/ 4/ 2013 5: 16: 54 PM

UC3- L0 XPLAI NED

ATM EL Nor way

Vest r e Rost en 79

N- 7075 TI LLER

NO RWAY

PAG E: of

TI TLE:


Dat e:

*

*

*

G ND

G ND

VCC_P5V0

USB_PUSB_N

USB_FS_PUSB_FS_N

STATUS_LEDPO WER_LED

TP603TP604TP605TP606

TP602

100kR600

VCC_P3V3

G ND

BO O T_SEL ECT

BC_JTAG _TCKBC_JTAG _TDIBC_JTAG _TDOBC_JTAG _TM SBC_JTAG _RESET

BC_JTAG _RESET

1324

12. 0M Hz

XC600

G NDG ND

J600


XI N0

XO UT0

PO WER_L EDSTATUS_L ED

USART1_TXUSART1_RX

TWI_

SCL

TWI_

SDA

VCC_P3V3

Des ign c om m ent :

AT32UC3B1256- AUTPA3

7

PA4

8

PA5

9

PA6

10

PA7

11

PA8

12PA

920

PA10

21

PA11

22

PA12

23

PA13

25

PA14

26

PA15

27

PA16

28

PA17

29

PA18

30

PA19

31

PA20 32

PA21 33

PA22 34PA23 35

PA24 43

PA25 44

PA26 45PA27 46

GND_

11

TCK 2

TDI 3

TDO 4

TM S 5

VDDC

ORE_

16

AGND

13

ADVR

EF14

VDDA

NA15

VDDO

UT16

VDDI

N17

VDDC

ORE_

218

GND_

219

VDDI

O_1

24

VDDI

O_2

36

GND_

337

DP38

DM39

VBUS40

VDDP

LL41

VDDC

ORE_

342

RESETn47

VDDI

O_3

48

U60048 lead TQ FP package

2. 7nC604

2. 2uFC602

2. 2uFC606

470pC605

22nC603

100n

C600

100n

C601

100n

C607

100n

C609

G ND

VCC_UC3B_P1V8

G ND

VCC_UC3B_P1V8

G ND

G ND

VCC_P3V3

VCC_P3V3

22nC610

VCC_P3V3

G ND

VCC_P3V3

G ND

G ND

VCC_UC3B_P1V8

VCC_UC3B_P1V8

Decoupling

TP607TP608

VCC_P3V3G ND

TP609TP610

VCC_P3V3G ND

39RR601

39RR602

18pC611

18pC612

4. 7uFC608

12

J601

HEADER 1x 2

Shor t t hese t wo t est point s t o get int o boot loader mode.

Cr yst al dat asheet :Load capacit ance CL = 20 pFESR 80 O hm M ax.Fr equency t oler ance 30 ppm

AT32UCB1 dat asheet :Int er nal capacit ance of t he device is Ci = 12 pF

IBI S file ( t ypical v alues) :C_com p = 3. 1 pFC_pk g = 0. 2 pF

C = 2 ( CL - Ci ) - C_comp/ 2 - C_pkg/ 2C = 2 ( 20 - 12) pF - 1. 5pF - 0. 1pF = 14. 6 pF

Load capacit ance adjust ed accor ding t o 18p aft er measur ement s on har dwar e.


21

8. Known Issues

8.1 Light Sensor The output range on the light sensor is 0V – 3.3V. The ADC reference must therefore be high enough to match the output range of the light sensor when doing measurements.

8.2 USB Test Points Touching the test points for the USB data lines on the back side of the board while there is ongoing communication might interrupt the device and cause the device to stop responding. The kit must be reconnected to start working properly again.


22

9. Revision History Revision 4 of the Atmel UC3-L0 Xplained kit is the first revision released.

9.1 Revision 4 Revision 4 of the UC3-L0 Xplained kit can be identified by a bar-code sticker on the back side with the following product ID: A09-1053/4.


23

10. EVALUATION BOARD/KIT IMPORTANT NOTICE This evaluation board/kit is intended for use for FURTHER ENGINEERING, DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY. It is not a finished product, and may not (yet) comply with some or any technical or legal requirements that are applicable to finished products, including, without limitation, directives regarding electromagnetic compatibility, recycling (WEEE), FCC, CE, or UL (except as may be otherwise noted on the board/kit). Atmel supplied this board/kit “AS IS,” without any warranties, with all faults, at the buyer’s and further users’ sole risk. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies Atmel from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge and any other technical or legal concerns.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER USER NOR ATMEL SHALL BE LIABLE TO EACH OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

No license is granted under any patent right or other intellectual property right of Atmel covering or relating to any machine, process, or combination in which such Atmel products or services might be or are used.

Mailing Address: Atmel Corporation, 1600 Technology Drive, San Jose, CA 95110


24

11. Document Revision History Doc. Rev. Date Comments

32156C 06/2013 The Chapter “Schematics” is added. New document template

32156B 03/2011 Some corrections

32156A 01/2011 Initial document release

Atmel Corporation 1600 Technology Drive San Jose, CA 95110 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com

Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369

Atmel Munich GmbHBusiness Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621

Atmel Japan G.K.16F Shin-Osaki Kangyo Building 1-6-4 Osaki, Shinagawa-ku Tokyo 141-0032 JAPAN Tel: (+81)(3) 6417-0300 Fax: (+81)(3) 6417-0370

© 2013 Atmel Corporation. All rights reserved. / Rev.: 32156C−AVR−06/2013

Atmel®, Atmel logo and combinations thereof, AVR®, AVR Studio®, Enabling Unlimited Possibilities®, QTouch®, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. ARM® and others is the registered trademark or trademarks of ARM Ltd. Other terms and product names may be trademarks of others.

Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.

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