AT27LV520

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    512K (64K x 8)MultiplexedAddresses/OutputsLow VoltageOTP EPROM

    AT27LV520

    Features 8-Bit Multiplexed Addresses/Outputs Fast Read Access Time - 90 ns Dual Voltage Range Operation

    Low-Voltage Power Supply Range, 3.0V to 3.6V, or Standard 5V 10% Supply Range

    Low Power CMOS Operation

    20 A max. Standby for ALE = V IH and V CC = 3.6V 29 mW max. Active at 5 MHz for V CC = 3.6V

    20-Lead TSSOP Package High Reliability CMOS Technology

    2,000V ESD Protection 200 mA Latchup Immunity

    Rapid Programming Algorithm - 50 s/byte (typical) CMOS and TTL Compatible Inputs and Outputs

    JEDEC Standard for LVTTL Integrated Product Identification Code Commercial and Industrial Temperature Range

    DescriptionThe AT27LV520 is a low-power, high-performance 524,288-bit one-time programma-ble read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latchesfor the 8 lower order address bits to multiplex with the 8 data bits. This minimizes sys-tem chip count, reduces cost, and simplifies the design of multiplexed bus systems. Itrequires only one power supply in the range of 3.0V to 3.6V for normal read modeoperation, making it ideal for fast, portable systems using battery power. Any byte canbe accessed in less than 90 ns.The AT27LV520 is available in 173 mil, 20-pin TSSOP, 300 mil, 20-pin SOIC and 28-pin TSOP, one-time programmable (OTP) plastic packages.

    Rev. 0911B-B01/98

    Pin ConfigurationsPin Name Function

    A8 - A15 Addresses

    AD0 - AD7 Addresses/Outputs

    OE /V PP Output Enable/V PPALE Address Latch Enable

    TSSOP Top View

    12345678910

    20191817161514131211

    A10A12A14ALEVCC

    OE/VPPA15A13A11

    A9

    A8AD1AD3AD5AD7GNDAD6AD4AD2AD0

    (continued)

    TSOP Top View

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    2

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    21

    20

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    15

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    10

    9

    8

    A10

    NC

    NC

    A12

    A14

    ALE

    VCC

    OE/VPP

    A15

    A13

    A11

    NC

    NC

    A9

    A8

    NC

    NC

    AD1

    AD3

    AD5

    AD7

    GND

    AD6

    AD4

    AD2

    NC

    NC

    AD0

    28

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    SOIC Top View

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    5

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    20

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    OE/VPP

    A15

    A13

    A11

    A9

    AD0

    AD2

    AD4

    AD6

    GND

    VCC

    ALE

    A14

    A12

    A10

    A8

    AD1

    AD3

    AD5

    AD7

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    Absolute Maximum Ratings*Temperature Under Bias .............. .............. .... -55C to +125C *NOTICE: Stresses beyond those listed under Absolute

    Maximum Ratings may cause permanent dam-age to the device. This is a stress rating only andfunctional operation of the device at these or anyother conditions beyond those indicated in the

    operational sections of this specification is notimplied. Exposure to absolute maximum ratingconditions for extended periods may affect devicereliability.

    Note: 1. Minimum voltage is -0.6V DC which may under-shoot to -2.0V for pulses of less than 20 ns. Max-imum output pin voltage is V CC + 0.75V DCwhich may overshoot to +7.0V for pulses of lessthan 20 ns.

    Storage Temperature ............... ............... ....... -65C to +150C

    Voltage on Any Pin with

    Respect to Ground ........................................ -2.0V to +7.0V (1)

    Voltage on A9 withRespect to Ground ..................................... -2.0V to +14.0V (1)

    VPP Supply Voltage withRespect to Ground ...................................... -2.0V to +14.0V (1)

    Operating Modes

    Notes: 1. X can be V IL or V IH.2. Read, output disable, and standby modes require 3.0V VCC 3.6V, or 4.5V VCC 5.5V.

    3. Refer to Programming Characteristics.

    4. VH = 12.0 0.5V.

    5. Two identifier bytes may be selected. All A8 - A15 inputs are held low (V IL), except A9 which is set to V H and A8 which is tog-gled low (V IL) to select the Manufacturers Identification byte and high (V IH) to select the Device Code byte.

    Mode/Pin ALE OE/V PP A8 - A15 AD0 - AD7

    Read (2) VIL VIL Ai DOUTOutput Disable (2) VIL /VIH VIH X

    (1) High Z/A0 - A7

    Standby V IH VIH Ai A0 - A7

    Address Latch Enable (2) VIH VIH X A0 - A7

    Rapid Program (3) VIH VPP Ai DIN

    Product Identification (4) VIL VIL

    A9 = V H(5)

    A8 = V IH or V ILA10 - A15 = V IL

    Identification Code

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    AT27LV5204

    DC and AC Operating Conditions for Read OperationAT27LV520-90

    Operating Temp. (Case)Com. 0C - 70C

    Ind. -40C - +85C

    VCC Supply3.0V to 3.6V

    5V 10%

    DC and Operating Characteristics for Read Operation

    Note: V CC standby current will be slightly higher with ALE, Ai, and ADi at TTL levels.

    Symbol Parameter Condition Min Max Units

    VCC = 3.0V to 3.6V

    ILI Input Load Current V IN = 0V to V CC 1 A

    ILO Output Leakage Current V OUT = 0V to V CC 5 A

    ISB(1) VCC Standby Current ALE = V CC 0.3V; Ai, ADi = GND/V CC 0.3V 20 A

    ICC VCC Active Current f = 5 MHz, I OUT = 0 mA, ALE = V IL 8 mA

    VIL Input Low Voltage -0.6 0.8 V

    VIH Input High Voltage 2.0 V CC + 0.5 VVOL Output Low Voltage I OL = 2.0 mA 0.4 V

    VOH Output High Voltage I OH = -2.0 mA 2.4 V

    VCC = 4.5V to 5.5V

    ILI Input Load Current V IN = 0V to V CC 1 A

    ILO Output Leakage Current V OUT = 0V to V CC 5 A

    ISB(1) VCC Standby Current ALE = V CC 0.3V; Ai, ADi = GND/V CC 0.3V 100 A

    ICC VCC Active Current f = 5 MHz, I OUT = 0 mA, ALE = V IL 20 mA

    VIL Input Low Voltage -0.6 0.8 V

    VIH Input High Voltage 2.0 V CC + 0.5 V

    VOL Output Low Voltage I OL = 2.1 mA 0.4 V

    VOH Output High Voltage I OH = -400 A 2.4

    AC Characteristics for Read OperationVCC = 3.0V to 3.6V and 4.5V to 5.5V

    Notes: 2, 3, 4 see AC Waveforms for Read Operation

    Symbol Parameter Condition

    AT27LV520-90

    UnitsMin Max

    tACC(3) Address to Output Delay ALE = OE/V PP = V IL 90 ns

    tCE Address Latch Enable Low to Output Delay Address Valid 70 nstAS Address Setup Time OE/V PP = VIH 15 ns

    tAH Address Hold Time OE/V PP = VIH 15 ns

    tALE Address Latch Enable Width OE/V PP = VIH 45 ns

    tOE(3) OE/V PP to Output Delay ALE = V IL 35 ns

    tDF(4)(5) OE/V PP High to Output Float ALE = V IL 25 ns

    tOH Output Hold from Address or OE/V PP, whichever occurred first ALE = V IL 0 ns

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    Output Test Load

    Note: C L = 100 pF including jigcapacitance.

    Input Test Waveforms and Measurement Levels

    tR, tF < 20 ns (10% to 90%)

    AC Waveforms for Read Operation (1)

    Notes: 1. Timing measurement reference levels for all speed grades are V OL = 0.8V and V OH = 2.0V. Input AC drive levels are V IL =0.45V and V IH = 2.4V.

    2. OE/V PP may be delayed up to t CE - tOE after the address is valid without impact on t CE .3. OE /VPP may be delayed up to t ACC - tOE after the address is valid without impact on t ACC.

    4. This parameter is only sampled and is not 100% tested.

    5. Output float is defined as the point when data is no longer driven.

    ALE

    OE/V PP

    AD7 - AD0

    A15 - A8

    tALE

    ADDRESS IN

    tAS tAH

    DATA OUT

    tOE

    tACC

    tDFtOH

    tCE

    Pin Capacitance (Note:)(f = 1 MHz, T = 25 C)

    Note: Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

    Typ Max Units Conditions

    CIN 4 6 pF V IN = 0V

    COUT 8 12 pF V OUT = 0V

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    AC Programming Characteristics*TA = 25 5 C, V CC = 6.5 0.25V, OE/V PP = 13.0 0.25V

    Notes: 1. V CC must be applied simultaneously or before OE/V PP and removed simultaneously or after OE/V PP.

    2. Program Pulse width tolerance is 50 sec 5%.3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven

    see timing diagram.

    Symbol Parameter (1) Test Conditions

    Limits

    UnitsMin Max

    tALE Address Latch Enable Width

    Input Rise and Fall Times(10% to 90%) 20 ns

    Input Pulse Levels0.45V to 2.4V

    Input Timing Reference Level0.8V to 2.0V

    Output Timing Reference Level0.8V to 2.0V

    500 nstLAS Latched Address Setup Time 100 ns

    tLAH Latched Address Hold Time 100 ns

    tLP ALE Low to OE/V PP High Voltage Delay 2 s

    tOES OE/V PP Setup Time 2 s

    tOEH OE/V PP Hold Time 2 s

    tDS Data Setup Time 2 s

    tDH Data Hold Time 2 s

    tPW ALE Program Pulse Width(2) 47.5 52.5 s

    tVR OE/V PP Recovery Time 2 s

    tVCS VCC Setup Time 2 s

    tOE Data Valid from OE/V PP 150 ns

    tDFP OE/V PP High to Output Float Delay(4) 0 130 ns

    tAS Address Setup Time 2 s

    tAH Address Hold Time 0 s

    tPRTOE/V PP Pulse Rise Time DuringProgramming 50 ns

    Atmels 27LV520 Integrated Product Identification Code

    Codes

    PinsHexDataA8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

    Manufacturer 0 0 0 0 1 1 1 1 0 1E

    Device Type 1 1 0 0 1 1 1 0 1 9D

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    AT27LV5208

    Rapid Programming AlgorithmA 50 s ALE pulse width is used to program. The addressis set to the first location. V CC is raised to 6.5V and OE/V PPis raised to 13.0V. Each address is first programmed withone 50 s ALE pulse without verification. Then a verifica-tion/reprogramming loop is executed for each address. In

    the event a byte fails to pass verification, up to 10 succes-sive 50 s pulses are applied with a verification after each

    pulse. If the byte fails to verify after 10 pulses have beenapplied, the part is considered failed. After the byte verifiesproperly, the next address is selected until all have beenchecked. OE/V PP is then lowered to V IH and V CC to 5.0V.All bytes are read again and compared with the originaldata to determine if the device passes or fails.

    V = 5.0VCC

    V = 6.5VCCV = 13.0VPP

    ALL BYTESCOMPARE

    DATATO ORIGINAL

    PASSEDDEVICE

    DEVICEFAILED

    FAIL

    PASS

    ADDR = FIRST LOCATION

    START

    X = 0

    PROGRAM ONE 50 S PULSE

    INCREMENT X

    YES

    VERIFYBYTE

    X = 10?

    FAILPASS

    ADDR = FIRST LOCATION

    ADDR.?LAST

    ADDRESSINCREMENT NO

    YES

    PROGRAM ONE 100 S PULSE NO

    INCREMENTADDRESS

    LASTADDR.?

    YES

    V = 5.0VPP

    NO

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    Ordering Information

    tACC (ns)ICC (mA)

    Active Ordering Code Package Operation Range

    90 8 AT27LV520-90SCAT27LV520-90TC

    AT27LV520-90XC

    20S28T

    20X

    Commercial(0C to 70 C)

    90 8 AT27LV520-90SIAT27LV520-90TIAT27LV520-90XI

    20S28T20X

    Industrial(-40C to +85C)

    Package Type

    20S 20-Lead, 0.300 Wide, Plastic Gull-Wing Small Outline (SOIC)

    28T 28-Lead, Thin Small Outline Package (TSOP)

    20X 20-Lead, 0.173 Wide, Thin Shrink Small Outline (TSSOP)

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    AT27LV52010

    Packaging Information

    .299(7.60)

    .291(7.39).420(10.7).393(9.98)

    .050(1.27) BSC

    .020(.508)

    .013(.330)

    PIN 1 ID

    .513(13.0)

    .497(12.6)

    .012(.305)

    .003(.076)

    .105(2.67)

    .092(2.34)

    .013(.330)

    .009(.229)

    08

    REF.035(0.889).015(.381)

    4.48(.176)4.30(.169)

    6.50(.256)6.25(.246)

    0.65(.0256) BSC

    0.30(0.012)0.18(0.007)

    PIN ID

    6.60(.260)6.40(.252)

    0.15(.006)0.05(.002)

    1.10(0.043) MAX

    0.18(.007)0.09(.003)

    08

    REF0.70(.028)0.50(.020)

    20S , 20-Lead, 0.300 Wide,Plastic Gull Wing Small OutlineDimensions in Inches and (Millimeters)

    28T, 28-Lead, Plastic Thin Small Outline Package(TSOP)Dimensions in Millimeters and (Inches)

    20X, 20-Lead, 0.173 Wide, Thin Super Small OutlinePackage (TSSOP)Dimensions in (Millimeters) and Inches

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    This datasheet has been downloaded from:

    www.DatasheetCatalog.com

    Datasheets for electronic components.

    http://www.datasheetcatalog.com/http://www.datasheetcatalog.com/