Asus notebook training_actre_l3-2

ASUS Confidential 1

NB_MB Level 3-2 Training Materials

ASUS Confidential 2

Overview

Chapter 1. NB Frame Structure P5~P34 Chapter 2. POWER P35~P95 Chapter 3. CHARGE P96~P121 Chapter 4. CLOCK P122~P145 Chapter 5. HDMI P146~P154 Chapter 6. Touch Pad P155~P170 Chapter 7. Keyboard P171~P183 Chapter 8. AUDIO P184~P214

ASUS Confidential 3

Overview

Chapter 9. MODEM P215~P225 Chapter 10. USB P226~P235 Chapter 11. PCMCIA P236~P241 Chapter 12. IEEE 1394 P242~P259 Chapter 13. Card Reader P260~P270 Chapter 14. SATA P271~P276 Chapter 15. ODD P277~P282 Chapter 16. LAN P283~P298

ASUS Confidential 4

Overview

Chapter 17. VGA P299~P309 Chapter 18. LCD P310~P342 Chapter 19. BIOS P343~P367 Chapter 20. MEMORY P368~P437 Chapter 21. POST CODE P438~P484 Chapter 22. NEW CARD P485~P491

ASUS Confidential 5

Chapter 1NB Frame Structure Repair Guide

ASUS Confidential 6

Overview

Introduction

Diagram

Q & A (Repair Experience)

ASUS Confidential 7

Introduction

Intel Product AMD Product

ASUS Confidential 8

Intel Centrino Evolution

Centrino Centrino 2

Carmel Sonoma Napa Santa Rosa Montevina

CPUBanias

(130nm)Dothan(90nm)

Yonah(65nm, Dual Core)L2=2MB

Merom(65nm, Dual Core)L2=4MB

Penryn(45nm,Dual/Four

Core)L2=6MB

GMCH(FSB)

Odem+Montara-

GM(400MHz)

Alviso(533MHz)

Calistoga(667MHz)

Crestine(800MHz)

Cantiga GM/PM(1066MHz)

ICH ICH4-M ICH6-M ICH7-M ICH8-M ICH9-M

Wi-FiCalexico

(b)Calexico2(a/b/g)

Golan(a/b/g)

Golan 2(n)

Echo peak(n)

ASUS Confidential 9

Intel Chip Family & Comparison

ASUS Confidential 10



Diagram

Sonoma Platform Napa Platform Santa Rosa PlatformMontevina Platform


Sonoma Platform Diagram-1


Sonoma Platform Diagram-2


Napa Platform Diagram-1


Napa Platform Diagram-2


Santa Rosa Platform Diagram


Santa Rosa Platform Crestline / ICH8M Chipset


Montevina Platform


Montevina vs. Santa Rosa

Montevina vs. Santa Rosa


Intel Centrino technology family


Sonoma Diagram – M51A Sample

Alviso(GMCH)915GM

ICH6-M

• GMCH Core Frequency 333MHz• 12.1” active matrix TFT,

• XGA 1024x768 resolution,

CPUDothan

•400/533 MHz FSB •DDR2 SDRAM 400/533 MHz•DDR1 SDRAM 333 MHz

•Dual Channel support DDR2•Single Channel support DDR1

MemoryDIMM

•1 x SODIMM socket for expansion up to

768GB DDR2-400/533DRAM support

•DMI Link ,100MHz

•On board 256M DDR2 SDRAM

400 MHz design

•PCI BUS ,33MHz

CardbusR5C841

4 IN 1Card

Reader

IEEE1394

PCMCIA type II

LAN ControllerRTL 8101L

RJ-45

MINI PCISlot

USB 2.0 X3 port

•USB 2.0

LCD Con.&InverterCRT

•LVDS

•D-Sub 15 pin

•IDE BUS•Ultra ATA 100/66

•2.5” 30/40/60/80 GB•4200/5400RPM

•Combo drive•Dual drive

•Super multi drive

•MMC•SD•MS

•MS-Pro

Audio CODECALC861

Modem Module

Headphone -out Jack/ Int. SPK

Int. & Ext.MIC

•Azalia Link

FWHSST 49LF004A

•LPC BUS ,33MHz

KBCM38857

Int.KB & T/P

• Intel Pentium M Processor• Speed at 1.6G~2.13GHz (Dothan)

• 2MB On-Die L2 Cache


Napa Diagram - W5F Sample

Calistoga(GMCH)945GM

ICH7-M

CPUYonah

•667 MHz FSB

•1 x SODIMM socket for expansion up to 1GB DDR2-533/667 DRAM

support

•DDR2 SDRAM 533/667 MHz•Single or Dual Channel support

MemoryDIMM

•On board 512M DDR2 SDRAM 533/667 MHz

design

• Intel Yonah dual core• T2300/2400/2500/2600

• 1.66/ 1.83/ 2.0/ 2.16G Processor• 2MB On-Die L2 Cache

CardbusR5C832

•PCI BUS 3.3V ,33MHz

LAN ControllerRTL 8101

Audio CODECALC660

USB 2.0 X3CMOS Module

1.3 mega pixelsBluetooth

V2.0

LCD Con.&Inverter

5 IN 1Card

Reader

•USB 2.0

•IDE BUS ,Ultra ATA 100/66

IEEE1394

RJ-45

•Azalia Link

MINI CARD802.11 a/b/g

Intel 3945 ABG

NEW CARD

•PCIE-E

•DMI Link ,100MHz (Direct Media Interface)

CRT

TV

•LVDS

• GMCH Core Frequency 400MHz• 12.1” Wide active matrix TFT,

1280x768resolution,• Support EDID

Int.KB & T/P

KBCM38857

TPM1.2

•LPC BUS ,33MHz

FWHSST 49LF004A

Int.SPK

Int. & Ext.MIC

SPDIFor

Line out

•S-Video

•D-Sub 15 pin

Modem Module

•2.5” 60/80/100/120 GB•4200/5400RPM

•Combo drive•Super multi drive

•MMC•SD•MS

•MS-Pro•XD


Santa Rosa Diagram – A8Se Sample


Montevina Diagram –N80V Sample


Intel Platform


AMD Platform


AMD Puma platform


Puma platform architecture


AMD Puma Diagram –N50Tr Sample


Chapter 2POWER Repair Guide


Overview

Introduction

Diagram

Repair Flow Chart



Introduction

Classification of the power circuit Linear & Switching Regulator Switching Buck Converter Voltage & Current Mode ControlMultiple Output ControllerMulti-Phase Operation


Power Classification Type

ACDC: Rectification.

DCDC: DC Converter.

DCAC: Inverter.

ACAC: AC Converter.

@ DC Converter Linear & Switch@ IC in Power circuit, generally call “Regulator”


Linear Regulator

• Linear Regulator– Advantages

• Simple• Low Cost

– Issues• Power Dissipation

OUTPUTINPUT

REF- +


Switching Regulator

• Switching Regulator– Advantages

• Efficient– Issues

• Noise• Layout

The Basics of Switching Regulator


VCC

VIN

VCC

VIN

UGATEPHASE

GNDFB

PWMCONTROLLER

PWMCONTROLLER

VOUT

UGATEPHASE

LGATEPGND

GND

FB

VOUT

Synchronous Buck Converter is More Efficient

STANDARD BUCK CONVERTER SYNCHRONOUS BUCK CONVERTER

Switching Buck Converter


• Current Mode Control– Immediate Response

to Changes in Input Voltage

– Inherent Current Limiting

VOUT

VIN

PWMLOGIC

VOLTAGECONTROL

CONTROL ICPWM

LOGIC

VOLTAGECONTROL

CONTROL IC

CURRENTCONTROL

VOUT

VIN

Voltage Mode vs. Current Mode Control

• Voltage Mode Control– Single Control Loop– No Current Sense

Resistor– Better Noise

Immunity– Less Sensitive to

Layout


Diagram

Sonoma Power Plane Standard Diagram(M5A,W3A/V,W1V,W2V,W5A,W6A,V6V,M7V,M9A/V…..etc.)

Napa Power Plane Standard Diagram(W5F,W6F,V6J,V1J,A6J…..etc.)

Santa Rosa Power Plane Standard Diagram(A8S,A8E,F3E…..etc.)

Montevina Power Plane Standard Diagram(F6V,N80Vc,N80Vr,M51Va,N20A…..etc.)

Voltage Detail Distribution Sample - M9V Voltage Detail Distribution Sample - V6J


Diagram

Sonoma Power Plane Standard Diagram(M5A,W3A/V,W1V,W2V,W5A,W6A,V6V,M7V,M9A/V…..etc.)

Napa Power Plane Standard Diagram(W5F,W6F,V6J,V1J,A6J…..etc.)

Voltage Detail Distribution Sample - M9V Voltage Detail Distribution Sample - V6J


Diagram-1 (Sonoma)

LTC 3728(Regulator)

TPS 5130

(Regulator)

MAX 1987(Regulator)

AC_BAT_SYS

+5VAO

+5VO+3VO

Regulator +12VO +12V+3Valways

+5V+3V

Main Power IC

System Power IC

Vcore Power IC

Regulator +3VAO

+VCORE

+1.5VS+2.5VS+1.05VOVREF5

+VCCP

+1.8VO +1.8V

+5Valways

+12VS+5VS+3VS

+1.8VS

+0.9VSRegulator

Regulator +1.5Valways

Regulator +1.2VSP

Regulator +ATI_VCORE


M9V Power Block Diagram


M9V System Power Plane


M9V DC/DC Module Spec.


M9V System ON Sequence

S.B(ICH-6)

U62

PLT_RST#_3

N.B(MCH-915PM)

U48

CPU SocketU49

H_PWRGD

H_CPURST#

VRM_PWRGD

PWROK_ICH

Multi-circuit

CLK_EN#CLK Gen.

(ICS954213)U16

CLK_MCH_BCLK/#CLK_MCH_3GPLL/#

CLK_CPU_BCLKCLK_CPU_BCLK#

CLK_ICHPCICLK_PCIE_ICH/# KBC

(M38857)U12

2

1

3

5

4

44

6

7

8

+VCCP

+VCCP

VR_PWRGD

ATI(M24-P)

U9

PCI_RST#_ICH ROICH(R5C841)

U18

LAN(RTL8101)

U1

Mini PCICN7


LTC 3728-Feature


LTC3728-Package


LTC 3728-Function Diagram


LTC 3728-Pin Function-1


LTC 3728-Pin Function-2


TPS 5130-Feature


TPS 5130-Pin Assignment


TPS 5130-Functional Diagram


TPS 5130-Pin Function-1


MAX 1987-Feature


MAX 1987-Pin Assignment


MAX 1987-Pin Description-1


Operating mode truth table


Output Voltage VID DAC Code (SUS=low)


Diagram-2 (Napa)

TPS 51020

MAX 8743

ISL 6227

NCP 5214

ISL 6262

+1.5VO

+5VO+3VO

Regulator +12VSUS +12V

+5V+3V

+VCORE

+1.8VO+0.9VS

+VGA_VCORE_O+VRAM_O

+1.05VO

+5VS+3VS

Regulator

+VGA_VCORE+VRAM

+5VSUS+3.3VSUS

AC_BAT_SYS+12VS

Regulator +3VAO +3VA

+1.5VS+1.05VS

+0.9VO+1.8V

+1.8VSRegulator

+1.2VSPO+2.5VS+2.5VO

+1.2VSPMain Power IC

System Power IC

Vcore Power IC


Power Block Diagram-V6J


V6J System Power plane


V6J DC/DC module spec.


TPS 51020-Feature


TPS 51020-Package


TPS 51020-Function Diagram


ISL 6227-Feature


ISL 6227-Package


ISL 6227-Pin Description-1


NCP 5214-Feature


NCP 5214-Package


TPS 51020-Function Diagram


NCP 5214-Pin Description-1


NCP 5214-Pin Description-2


MAX 8743-Feature


MAX 8743-Pin Configuration


Repair Flow Chart(1)Start

Visual Inspection A/D & BATT Connector/Measure voltage

Finished

COMS Voltage between 3V~3.3VX’tal CLK signal is correct 32.768kHz

Confirm the symptom problem isPower to GND or No Power

No Power / Power On error

Check PWR_SW# &PWR_BTN# circuit is OK

Measure AC_BAT_SYS signal(AC mode : 19V,BATT mode 16.8V)

Check Always/stand-by Voltage is OK ?

Measure & Check ControlSignal PM_SUSC# / PM_SUSB# /

PM_SUSA# /CPUVR_ON

Trace the circuit,V.I Check & change

NG related Component

Trace and confirm the circuit to Check1.PWR_SW# status Hi->Lo->Hi and

Lid_SW# signal must be always Hi2.PWR_BTN# signal status Lo->Hi->Lo (to S.B)(all status Hi or Lo will be by RD Design spec.)

Confirm the circuit,Check All Always/ Stand-by Voltage

(ex. +3V/+5V always) (by RD design)

Measure COMS battery/X’tal CLK for S.B is OK ?

1.PM_SUSC#+3V , +5V +12V ………etc (by model request)

2.PM_SUSB#+12Vs , +3Vs , +5Vs…..etc (by model request)

3.CPUVR_ONVcore , VRM_PWRGD , CLK_EN#

Change NGComponent

Change NG CMOS BATT& X’tal Component/trace related circuit

Trace related circuit,Change Defect Component

Trace related component, compare with the circuitChange NG Component



Confirm the TSICT program, Checkwhat kind voltage of ICT Power jump

(+3V or +3Vs / +5V or +5Vs ….)

Finish

Confirm the symptom problem isPower to GND or No Power

Power GND

Confirm & check to separate whichpower circuit cause AC_BAT_SYS to GND

Visual InspectionAll Component is OK ? Check component have short or burn

Power circuit can differentiate to 4 section :(一)Main Power IC circuit

Check MOS-FET ,Capacitor ,Power IC(二)BATT charge circuit

Check MOS-FET ,Capacitor ,Diode ,Charge IC(三)CPU Vcore Power circuit

Check MOS-FET ,Capacitor ,Diode ,CPU power IC(四)LCD Inverter Power supply circuit

Check Capacitor or Inductance

Confirm the problem AC_BAT_SYS Signal GNDICT jump Power Voltage GND

(一)Separate ICT power Jump solder, Use multi-Meter tomeasure which side voltage to GND

(二)Confirm the circuit and use TSICT program to Findout all the connection component

Check Item as follow:(1)Check MOS-FET component (G-S gate is no short)

(2)Check Capacitor (V.I capacitor surface is no rift)(3)Change voltage to GND of BGA component


Chapter 3CHARGE Repair Guide


Overview

Introduction

Diagram

Signal Description

Repair Flow Chart



Introduction Battery Pack:

-Battery cell-Protection Board

Protection circuitGas Gauge IC : BQ2060H

BQ20Z90-Outer Casing


Rechargeable Battery

Li-Ion Battery NiMH Battery NiCad Battery

Li-Ion Ni-Cad Ni-MH Energy Density (W-Hr/Kg) 90 40 60

Operating Voltage 3.6 1.2 1.2 Lifetime (approx. cycles) 1000 1000 800 Self Discharge 6%/month 15%/month 20%/month


Features of Li-Ion Battery

Smaller Lighter Lower Self-Discharge Rate No Memory Effect Pollution-Free Overcharging or Overdischarging will Cause

Permanent Damage


Charging Characteristics (Li-Ion)

•CC(Constant current) & CV(Constant voltage)

C.C.C.V.


Glossary #1

Nominal Capacity:- mAH- AH Nominal voltage:

- Ni-MH : 1.2v/cell- Li-Ion : 3.6v/cell (or 3.7v/cell)

ex: 400mAH = 0.4AH (1A= 103mA)


Glossary #2

Series & Parallel:

Series Parallel

I V V


Glossary #3

Over discharge-for battery spec.(ex:3.6v Li-Ion, over discharge: under 2.75v~2.5v /cell)

Over charge-for battery spec.(ex:3.6v Li-Ion, 4.3v ~4.35v /cell) Self discharge Cycle life

-500~1000 (fullemptyfull)


Battery Label

Li-IonNi-MH

Li-Polymer

Norman Voltage:14.8v- 3.7 v/cell

- 4S :4 x 3.7 =14.8v

Battery Capacity-4000mAH

-2P: 2 x 2000(mAH)2000mAH/cell


Connecter(Old)

1 2 3 4 5 6

Pin Signal Description Type

1 GND Ground

2 TS Battery Type I

3 HDQ_BAT HDQ Bus I/O

4 BAT_EDV End of discharger I

5 NC No Connection

6 BAT_S Battery input/output voltage

PWR(I/O)


Connecter(New)


Battery Pack

Protection BoardGas Gauge Board

Batteryconnecter


Gas Gauge IC –BQ20Z90H

Battery Parameter Record

Charge and discharge countingVoltageTemperatureAuto calibrationBattery Status registerAuto calibrationWake function


Gas Gauge IC –BQ2050H

1 2 3 4 5 6BQ2050H

HDQPIC16C54 HDQ Bus


Battery Learning

Charge Full Discharge NAC=0 (Discharge complete)Charge Full


FRAME


Charge Circuit Sample-F3H(Bq20Z90)


DCIN & LDO & REF


ACIN & ACOK

AC_APR_UC


PKPRES#


MODE Select Setting


EC Circuit Sample-F3H)

EC

EC


Repair Flow ChartStart

Visual Inspectioncheck Charge IC & EC & related component

are no damage

Measure Voltage & CLK

Finish

Check PIC IC signal ,AC_APR_UC ->Hi (A/D in)

TS# ->Lo (BATT in) , CHG_EN ->Hi , CHG_LED ->Hi

Check charge IC signal ,BAT_CHG_OUT

Check Charge IC Voltage,Vcc Pin = A/D_VIN ->19V

Check EC IC Voltage & CLK,+3VA_EC, 2.5VREF

CLK, 32.768MHz

Change NG X’tal & RLCComponent and fix any trace

open

Change defect Charge IC & EC & N.G Component Fix any trace open & BAD solder problem

OK

NG

OK

NG

NG

OK

Trace the related circuit,Change NG related Component/fix any trace open

Confirm circuit,Change NG related component

fix any trace open

NG

Change ECat firstly , and then Charge IC

OK

Check which Control signalfor device is wrong

Check C.C & C.V Setting


Chapter 4CLOCK Repair Guide


Overview

Diagram

Signal Description

Repair Flow Chart

Repair Technique



Diagram-1

CLOCKGenerator

(1)

CPUCLK_CPU_BCLKCLK_CPU_BCLK#

MCH

(Hub/DMI)(PCI-E)

(GMCH)

CLK_MCH_BCLKCLK_MCH_BCLK#

CLK_MCH66 (AGP/Hub-link)CLK_MCH_3GPLL (PCI-E x16 /with DMI-link)

DREFCLK (for GMCH)DREFCLK# (for GMCH)

CLK_MCH_3GPLL# (PCI-E x16/with DMI-link)

VGA

(AGP/PCI-E)

CLK_AGP66 (AGP)

CLK_PCIE_PEG# (PCI-E)CLK_PCIE_PEG (PCI-E)

CLK_VGA27

ICH

(HUB)

(PCI-E)

CLK_ICHPCI

CLK_PCIE_ICH (PCIE x1)CLK_PCIE_ICH# (PCIE x1)

CLK_USB48CLK_ICH14CLK_ICHHUB

CLK_REQ_MCH#


Diagram-2

CLOCKGenerator

(2)

X’tal14.318MHz

FWHKBC

CARDBUSMINIPCI

CLK_CBPCI

CLK_MINIPCI

LANCLK_LANPCI

SIOCLK_SIOPCI

CLK_SIO_14M

CLK_KBCPCI

CLK_FWHPCI

+3V_CLKCLK_EN#

CPU_BSEL0~2

depends on CPU type

SMB_CLKSMB_CLK

NEWCARD

MINICARD

CLK_PCIE_NEWCARD

CLK_PCIE_NEWCARD#

CLK_PCIE_MINICARD

CLK_PCIE_MINICARD#

CLK_REQ_NEWCARD#

CLK_REQ_MINICARD#


Generator Distribution-W5F SampleYonah-CPU

(Dual Core)

CalistogaGMCH

(945GM)DREFCLKDREFCLK#

ICH7-M

CLK_ICHPCI

CLK_PCIE_ICH

CLK_USB48

BCLK133/166 MHz

FSB533/667 MHz

CLK_CPU_BCLKCLK_CPU_BCLK#51

52ICS 954310BGLFT

CLK_MCH_BCLKCLK_MCH_BCLK#43

44

3839

CLK_REQ_MCH#

1920

2223

CLK_MCH_3GPLLCLK_MCH_3GPLL#

40

1415

DREFCLK99 MHz for graphics

MCH_3GPLL100 MHz for PCIE/DMI

CLK_ICH14

ICHPCIICH7 PCI Bus 33 MHz

USB48USB 48MHzICH14

ICH7 14 MHzPCIE_ICH

S.B PCIE(x1) 100MHz

FWH49LF004A

CLK_PCIE_MINICARD/MINICARD#

CLK_PCIE_NEWCARD/NEWCARD#

91260

KBC M38857

CLK_CBPCI CARDBUS R5C832 LANRTL 8101

CLK_LANPCICLK_KBCPCI

TPMDevice

CLK_TPMPCICLK_FWHPCI

583

644

CLK_PCIE_ICH#

CLK_REQ_MINICARD#

CLK_REQ_NEWCARD#

MINICARD

NEWCARD

CBPCICARDBUS 33 MHzLANPCILAN 33 MHzKBCPCIKBC 33 MHzTPMPCITPM 33 MHzFWHPCIFWH 33 MHzX’tal

14.318MHz

+3VS_CLK

VTT_PWRGD#10

1,7,1121,28,4245,50,56

57

58

1

2

2,6,1329,37,46

53,59

16BSEL1


Generator Distribution-W6A SampleDothan-CPU

AlvisoGMCH

(915GM)DREFCLKDREFCLK#

ICH6-M

CLK_ICHPCI

CLK_PCIE_ICH

CLK_USB48

BCLK100/133 MHz

F.S.B400/533 MHz

CLK_CPU_BCLKCLK_CPU_BCLK#43

44ICS 954213

CLK_MCH_BCLKCLK_MCH_BCLK#34

35

2625

3231

CLK_MCH_3GPLLCLK_MCH_3GPLL#

1415

DREFCLK99 MHz for graphics

MCH_3GPLL100 MHz for PCIE/DMI

CLK_ICH14

ICHPCI ICH6-M PCI Bus33 MHz

USB48 USB Controller48MHz

ICH14 ICH6-M14 MHz

PCIE_ICH ICH6-M PCIE(x1)100MHz

91153

KBCM38857

CLK_CBPCI CARDBUSR5C841

LANRTL 8100CL

CLK_LANPCI

CLK_KBCPCI

56

54

3

FWH49LF004A4

CLK_PCIE_ICH#

LANPCIfor LAN Controller 33 MHz

X’tal14.318MHz

+3VS_CLK

VTT_PWRGD#16

1,7,8,1322,29,3337,42,48

49

50

1

2

2,6,12,3038,45,51

FSLC

FWHPCIfor BIOS CLK 33 MHz

KBCPCIfor Keyboard Controller 33 MHz

CLK_FWHPCI

CBPCICARDBUS 33 MHz

R219680 ohm

MINIPCI(WLAN)

CLK_MINIPCI55 MINIPCI for WLAN Card 33 MHz


Frequency Programming


ICS954213 Datasheet (for Sonoma platform standard)


ICS954213-Block Diagram


Pin Description(1)


Pin Description(2)


ICS954310 Datasheet (for Napa platform standard)


ICS954310-Block Diagram


Pin Description(1)


Pin Description(2)


Pin Description(3)


Ordering Information



Visual Inspectioncheck CLK Gen. and related component

are no damage

Measure CLK Gen. Voltage

Measure X’tal 14.318 MHz

Check which CLK signalfor device is wrong

Finish

Change Defect X’talor related Capacitor Component

Check CLK Gen. Voltage,+3V_LAN

Measure & Check X’tal14.318MHz

Change NG RLC Componentand fix any trace open

Change Defect CLK Gen.& N.G Component Fix any trace open & BAD solder problem

OK

NG

OK

NG

NG

OK

Confirm circuit, Check related

trace & resistor, capacitorChange NG RLC Component

/fix any trace open

OK

Measure CLK Gen. Controller SignalsCheck CLK Gen. Controller Signals,

VTT_PWRGD#Confirm circuit,

Change NG related componentfix any trace open

NG

NG

Change CLK Generator

OK


Repair Technique-Visual Inspection

Visual Inspection

To check Clock Generator andX’tal and related components arenot damaged.

Fix any trace open & BAD solderproblem.

X’tal 14.318MHz CLK Gen.

1


Repair Technique-Measure Voltage

Use Multi-Meter or Oscilloscope tomeasure :

Clock Gen. voltage (+3V_CLK) =3.3V isok.

+3V_CLK=3.3V

2


Repair Technique-Measure CLK X’TAL

Use Oscilloscope to measure :

X’TAL clock =14.318MHz is ok.

X’tal CLK=14.318MHz

3-1

3-2


Repair Technique-Measure Control Signal

Use Multi-Meter or Oscilloscope tomeasure Clock Gen. Control Signalvoltage (VTT_PWRGD#) =0V is ok.

Ps: (when press power bottomthe VTT_PWRGD# signal status isfrom 3.3V0V)

VTT_PWRGD# 4-1

CPU Power IC

CLK Gen.

4-2


Repair Technique-Check Individual NG signal

Use Oscilloscope to measure everyindividual CLK signal. If find errorplease trace the circuit to find it’sconnection.

If related RLC components are ok butCLK still is NG please try to changeCLK generator at last.

5


Chapter 5HDMI Repair Guide


Overview

Diagram

Theorem

Repair Flow Chart

Repair Technique



Diagram


Interpret The HDMI architecture consists of at least one HDMI source and sink. HDMI is composed of four TMDS channels responsible for sending

out information from the HDMI transmitter to the HDMI receiver. The three TMDS data channels are responsible for transmitting the video, audio, and auxiliary data and the TMDS clock channel is responsible for transmitting the video pixel clock data, used for data recovery on the three TMDS data channels.

The DDC channel provides the communication gateway to exchange the status and E-EDID information between the HDMI source and the HDMI sink.

The optional CEC channel provides the high-level control functionality, used for infrared remote control usage.

Limitations include: The optional CEC channel is unsupported


Integrated and SDVO HDMI

The digital display port on the GMCH supports two HDMI options: Integrated and SDVO HDMI.

Integrated HDMI uses the integrated HDMI transmitter on the digital display port

SDVO HDMI uses the integrated SDVO transmitter on the digital display port, and then uses the third party HDMI transmitter on either the motherboard or ADD2 card


Integrated HDMI Option For Integrated HDMI, the integrated HDMI transmitter receives both the

digital video and audio data which it synchronizes before it transmits the data across a single cable connection to the HDMI receiver on the HDMI sink.


SDVO HDMI Option For SDVO HDMI, the integrated SDVO transmitter receives the digital

video data and transmits the data to a third party HDMI transmitter on either the motherboard or an ADD2 card. The third party HDMI transmitter receives both the digital video and audio data which it synchronizes before it transmits the data across a single cable connection to the HDMI receiver on the HDMI sink.


Intel® Integrated Chipset Support Intel® 945GM Express Chipset Family Features Support

Intel® G965 Express Chipset Family Features Support


Chapter 6Touch Pad Repair Guide


Overview

Diagram

Theorem

Repair Flow Chart

Repair Technique



Diagram

KBC

+3V

LPC

X’TAL

8MHZ

CLKDATAGND

+5V

33MHzCLK_KBCPCI

SB


Circuit

CONNECT

KBC


M38857 Pin Define


M38857 Pin Describe 1



Check Fun. setting

Measure Voltage & Clock

Finish

Trace circuit,Change NG Componentand fix any trace open

Be sure the function is no disable in O.S

Check KBC Voltage & CLK,+3V , CLK_KBCPCI = 33MHz

X’tal = 8MHz .Check T/P Connector Voltage,

+5V

Change Defect Connector &damaged RLC components

NG

OK

Check T/P signals,INTCLK_Q3

INTDATA_Q3Change NG related R.L Component

or fix trace open problem

OK

Change KBC Controller Chip

NG

NG

OK

OK

NG

Visual InspectionCheck Connector & RLC components

is OK

Use meter to measureSignal’s bias voltage value is ok

Change South Bridge

OK

NG


Repair Technique-Visual InspectionVisual Inspection1.check TOUCH PAD connectoris OK or not

2.R.L.C. components is not missor damage

CID CONNECTOR

1


Repair Technique-Function Setting

2-1

2-2

Function Settingcheck TOUCH PAD Function isno disable in OS.


Repair Technique-Measure VoltageUse multi-meter or Oscilloscope tomeasure KBC Voltage.

+3V is ok.

Use multi-meter or Oscilloscope tomeasure T/P Connector Voltage.

+5V is ok.

3-1

3-2


Repair Technique-Measure CLK

KCB X’tal =8MHz

Use Oscilloscope to measure KBC CLK.

CLK_KBCPCI = 33MHz,

X’tal = 8MHz,

4-1

4-2


Repair Technique-Measure T/P signals

If the problem is still existing, pleasechange Touch Pad Controller K/B Chip

Check T/P Signal

1. Use multi-meter to measure

INTCLK_Q3, INTDATA_Q3 are correct

2.if the value is high please check resistoror Inductance and circuit of the trace is nodamage and no open.

test pointGND

5


PIN Signal name Diode value

1 +5VS_TP 591

2 +5VS_TP 591

3 INDTATA_5S 602

4 INTCLK_5S 602

5 GND 0

6 GND 0

Repair Technique-Diode Value of T/P Pin

PIN1,2,3,4,5,6 6



If signal are all correct, please remember enable function of internal pointing device in BIOS

Due to connect with Touch Pad and Main-board by FPC made sure non oxide of pin or non broken for integer


Chapter 7Keyboard Repair Guide


Overview

Diagram

Circuit

Repair Flow Chart

Repair Technique



Diagram-1

Ex: M38857M8

KEYBOARDCONNECTOR

KSO0 ~KSO15

KSI0 ~ KSI7

KEYDETECT1

KEYDETECT2 +3VS

KeyboardController

ICLPC

Arrayresistor

+3V

X’TAL

8MHZ 33MHzCLK_KBCPCI

SB


Diagram-2

Embedded Keyboard controller -Matrix

PS : Maybe there is no Super IO in new NPI model, because there are no PS/2 Port, COM Port or Print Port etc. on those model.


Diagram-2


Circuit-W6A



Check Connector Pin & KB FPC

Check KBC power(+3V) &CLK(8MHz/33MHz) is OK ?

Finish

Change Defect Componentor fix trace open

Check Connector Pin no short & open/change new one KB to testing

Confirm the circuit, Checkarray Resistor & trace is OK

Change Defect Connector &damaged Resistor component

NG

Check NG signal connect to whichcapacitor & resistor & Trace

Change Defect Componentor fix trace open problem

Change KBC Controller Chip

NG

NG

OK

OK

NG

Visual InspectionCheck Connector & Resistor component

no damage

Use meter to measureSignal’s bias voltage value is ok

OK

OK


Repair Technique-Visual InspectionVisual Inspection1.check K/B connector is OK andFix any trace open.2.Array Resistor are no damage ormiss and Fix any trace open.3.Check KBC and relatedcomponent are OK.

If V.I check is OK, and problem stillis exit.Please change New one K/B to Testat first.

1-1

1-2


Repair Technique-Measure K/B signals

Use multi-meter to measure K/Bconnector Pin signal is normal of Diodevalue.

If the problem is still existingplease change S.I.O (super I/O)controller.

If the value is NG, please trace andconfirm the circuit to fix any trace orarray resistor problem.

4testpoint

GND


Repair Technique-Diode Value of K/B Pin

W6A K/B

1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~24

25

26


Repair Technique-Diode Value of K/B Pin

A3N K/B

28~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1

2930


Chapter 8AUDIO Repair Guide


Overview

Diagram

Signal Description

Theorem

Repair Flow Chart

Repair Technique



Diagram(1)

5-pin serial data transaction : (1) BIT_CLK

(2) SYNC(3) RESET

(4) SDATA_IN(5) SDATA_OUT

Pin1,Pin9 : +3VS_Code

Pin25,Pin38,Pin43 : +5VS_AUDIO

Internal Speaker

External Speaker

For ASUS NB general form:AC97:ALC650 , AD1885

Azalia:ALC660 , ALC861 , ALC880 , AD1986

AD1885

Pin2,Pin3 : 24.576MHz

AC97 Model

SB


Diagram(2)

5-pin serial data transaction : (1) BIT_CLK

(2) SYNC(3) RESET

(4) SDATA_IN(5) SDATA_OUT

Pin1,Pin9 : +3VS_Code

Pin25,Pin38 : +5VS_AUDIO

Internal Speaker

External Speaker

For ASUS NB general form:AC97:ALC650 , AD1885

Azalia:ALC660 , ALC861 , ALC880 , AD1986

ALC880

Azalia Model

SB


HD Audio Code Circuit-1 sample F50N


HD Audio Code Circuit-2 sample M51A

ALC663


HD Audio AMP Circuit-2 sample M51A


Signal Description

Azalia Interface Code IC:1.ALC269

2.ALC663


Pin Assignment-(HD-ALC269)


Signal Description-1(HD-ALC269)


Pin Assignment-(HD-ALC663)


Theorem

HD link (Azalia link)


H/W Architecture

AC-Link bus is the pathway that codec communicate with controller.


HD link (Azalia link) Azalia is an enhanced replacement for AC’97

Designed for a range of audio, modem, and communications functionalities

Targeted for PC’s and other devices like consumer electronics (CE) Improves on AC’97 design limitations Provides bandwidth for future audio and communication needs

First Intel product intercept: ICH6

Azalia Enables High Quality Integrated Audio

Link

Codecs Controller

PCI Express

Azalia Bus DriverAudio ModemFilters Filters

Software


Intel® ICH6 Azalia and Legacy AC ’97

ICH6

AudioCodec

Azalia Link

Dock CodecDock

ModemCodec

• AC ’97 & Azalia controller use is mutually exclusive• 1 Serial Data Out (SDO), 3 Serial Data In (SDI) pins:

support up to 3 codecs• 8 Independent DMA operations• 4 Input, 4 output streams• 24 MHz BITCLK is driven by the Intel® ICH6

AC ’97 Legacy

AC Link

Codecs must ALL be either AC ’97 or

Azalia

orAzalia

Controller

PHY


Audio Bandwidth with Azalia With AC’97: Consumer with analog output

Multi-channel Out: 6 channel, 20bit, 96kHz = 11.5Mb Total Out: ~11.5Mb (of about 11.5Mb available)

Azalia designed to support multiple streams

With Azalia: Consumer with analog output High Quality Audio Out: 8 channel, 24bit, 192kHz stream =

36.9Mb Modem Out: 1 channel, 16b, 48kHz = 0.77Mb Telephony Out: 2 channel, 16b, 48kHz = 1.54Mb Total Out: ~39Mb (of about 46Mb available)

With Azalia: Laptop with integrated array microphone Array Mic Input: 8 channel, 16bit, 96kHz = 12.2Mb Independent Telephony Input: 2 channel, 16bit, 48kHz = 1.54Mb Total In: ~14Mb (of about 23Mb available)

Lots of Bandwidth to Support Current and Future Audio


Azalia improvement Over AC’97AC’97 Azalia Benefit

20-bit, 96 kHz multi-channel 32-bit, 192 kHz multi-channel More accurate, better quality sound

11.5 Mb/s max bandwidth 48 Mb/s per SDO, 24 Mb/s per SDI

Bandwidth for more channels and mic array inputs at higher sample rates

Fix bandwidth assignment, fix slot base protocol

Dynamic bandwidth assignment Bandwidth delivered where it’s needed

Pre-defined DMA useage General purpose DMA’s Support for multi-streaming / multiple similar device types can be supported

Single stream support (in & out)

Support for multiple streams (in & out)

Support for new Digital Home / Digital Office useage models

Clock provided by primary codec

Clock provided by the Intel® ICH Single, high-quality, stable clock source for synchronization

Stability depending on SW provider (IHV’s drivers)

Unique Microsoft bus driver Single bus driver for more OS stability & base functionality

Limited device sensing / jack retasking

Full device sensing / jack retasking

Support for full audio PnP

2-element (stereo) array mic support

16-element array mic support More accurate, better quality voice input & recognition

Azalia Improves on Current AC’97 Spec


Repair Flow Chart

Check BIOS setting

Check Audio Voltage

Measure other Audio signals

Check Audio Clock

Start

Change damaged component/ fix any trace open

Visual Inspectioncheck Int.&Ext. SPK Con. and damage

RLC & AMP. component

Change Audio Code chip Change S.B

Finished

Use multi-meter to compare otherAudio signal with Good M/B

Change any NG componentrelated to NG signals

Measure Audio Code CLK:24.576MHz (only AC’97 model)

Change any NG componentrelated to X’tal.

Check Setting in the BIOS,The Audio Function must be is UNLOCK

Measure Audio Code Voltage:+3VS_Code and +5VS_AudioMeasure Audio AMP. Voltage:

+5VAMP

Fix or change any R.C.L.Qcomponent related to Voltage

Check Audio Control signalMeasure Audio AMP. SE/BTL# :H: for Int. SPK ; L: for Ext. SPK

Change any NG componentrelated to NG signals

NG

OK

NG

NG

OK

NG

OK

OK

NG

NG

NG

OK

OK

OK



Visual Inspection1.check External/Internal audio connector is OK2.Related R.L.C/AMP ..etc components is not miss or damage3.AC’97/Azalia Code & nearby component is no damage or burn1-1

NG OK

Connector Broken

External Speaker Connector

Internal Speaker Connector

1-2

CID Case

CID Case


Repair Technique-Check BIOS Setting

Check Setting in BIOS1.Firstly ,load BIOS default setting2.Please check Audio/Modem Interface function is not Locked status.

2


Repair Technique-Measure Audio Voltage(1)

Measure AC’97 Code Voltage :

Pin 1/9: +3VS_Code

Pin 25/38/43: +5VS_Audio

Pin 4/7:GND ( Digital )

Pin 26/40/44:GND ( Analog )

+3VS_Code +5VS_Audio

3


Repair Technique-Measure Audio Voltage(2)

Measure Azalia Code Voltage :

Pin 1/9 : +3VS_Code

Pin 25/38 : +5VS_Audio

Pin 4/7 : GND ( Digital )

Pin 26/42 : GND ( Analog )

+3VS_Code +5VS_Audio

4


Repair Technique-Measure AMP VoltageMeasure Audio AMP Voltage :

Pin 7/18 : +5VAMP

5


Repair Technique-Measure Audio CLK

212

Only for AC’97:

Measure AC’97 Code CLK :

Pin 2/3 : 24.576MHz

24,576MHZ

6


Repair Technique-Measure Audio SignalUse Multi-Meter to measure otherAudio signals’ bias voltage value.

(This method should be comparedwith good MB)

If the symptom is still existingplease try to change Audio chip.

After change Audio chip theproblem is still constant please tryto change SB at last.

P.S.

AC97 Audio chip through AC97link connect to SB.

HA Audio chip through Azalia linkconnect to SB.

7


Chapter 9MODEM Repair Guide


Overview

Diagram

Circuit

Repair Flow Chart

Repair Technique



Diagram

Azalia BUS

RESET# & SYNC

BIT_CLKTIP & RING

RJ-11

Modem Board

Modem BoardCON. SB


Circuit



Visual Inspection

Check Modem Board is OK ?

Check Modem CON. VCC(+3V)And RJ-11 CON. Signal is OK ?

Finish

Change Defect Component/Repair open trace

Check Modem Type (by model)/Change New one Modem Board

1.Check Power source to ModemCON. Resistor and Trace

2.Check RJ-11 TIP / RING signal

Change Defect Component & Re-solder

OK

NG

OK

NG

NG

OKUse multi meter to measure1.BIT_CLK& SYNC 2.SDATA_IN/OUT 3.RESET#

Change audio Codec or audio controller (S.B)

OK

Check1.RJ-11 CON.2.Modem CON. (on the M/B)3.Connection RLC component

Check AUDIO Link BUS Signal is OK ?(AC97/Azalia)

Verify Software and Ass’y problem

OK

NG

Check Driver and Re-Ass’yand MDM cable

NG



Visual Inspection1.check RJ-11 connector is noDamage or Pin bend or Pin badsolder.

2.check Modem connector is noDamage or Pin bend or Pin badsolder.

3.R.L.C. components is not missor damage

4.Check PCB trace is no open orscratch

1-1

1-2

CID

CID

RJ-11

Modem Connector (M/B)


Repair Technique-Software Skill

Software Skill1.check Hardware Device is OK or not.

2.Check Device is working andsoftware driver is correct.

3.Check Device Setting up is correct

2-2

2-1


Repair Technique-Assemble Problem

Assemble Problem

Check Assemble MDM Boardconnector to M/B connector isclose ,and Cable is no scratch ordamage

If problem still exist,1.Please Check Modem Board is correct fortesting model,2.change new one to test.

3-1

3-2


Repair Technique-Measure Modem Signals

Use multi-meter to measure Modemsignal is normal of Diode value.4

If the value is NG,

Please check Audio codec and AudioController release circuit.


Modem Board CON.

Signal Name Diode Value

BIT_CLK 391

SYNC 426

RESET# 391

SDATA_IN 391

SDATA_OUT 391

RJ-11

Signal Name Diode Value

TIP OL

RING OL

Repair Technique-Diode Value


Chapter 10USB Repair Guide


Overview

Diagram

Signal Description

Theorem

Repair Flow Chart

Repair Technique



Diagram


Signal Description

Pin Define Signal Description1 VSUS Power signal

2 D- Data signal

3 D+ Data signal

4 GND Ground signal



1.Visual Inspection2.Check Connector & Pins is OK ?

Check USB Vcc(5V)is OK ?

Use multi-meter to measureCheck USB- & USB+ Signal is OK ?

Check USB 48MHz is OK ?

Finish

Change Defect Component

Check Fuse or Inductor and Trace

Check Resistor or Inductor and Capacitor and Trace and S.B



OK

NG

OK

NG

NG

OK

Check Resistor and CLK Gen.and Trace Change Defect Component

OK

Change S.B

NG



•Check USB connector is ok or not

•Check FERRITE BEAD is open or broken

1-2

1-1

USB Connector

Broken


Repair Technique-Measure Voltage & GND

•Check GND

•Check +5V_USB

2-1

2-2


Repair Technique-Measure USB Signals

•Check USBP+

3-1

•Check USBP-

3-2


Signal Name Diode Value Between

1 +5V_USB 701 +/- 5

2 USBP- 604+/- 5

3 USBP+ 605 +/- 5

4 GND 0

Pin 1,2,3,4

4

Repair Technique-Diode Value of USB Pin


Chapter 11PCMCIA Repair Guide


Overview

Diagram

Theorem


Diagram

+3V

Power Controller(R5531V002)

+3V +5V

VCCVPP

X’TAL

24.576MHZ

CFRAME#

CAD[0:31]

CRESET#

CCLK#

VCC3_EN

VCC5_EN

CLK_CBPCI(33MHZ)

PCI BUS

SB


Slot Pinout (F3H)


CardBus Power Circuit (F3H)


Chapter 12IEEE 1394 Repair Guide


Overview

Diagram

Signal Description

Theorem

Repair Flow Chart

Repair Technique



Diagram

R5C841

PCI Clock:33MHz

1394 Connector

EEPROM

+3V

SMBus

+3V

X’tal : 24.576Mhz

SB


Circuit

R5C841


Pin Define

R5C841


1394a Connector

6 Pin

4 Pin


1394b Connector

9 Pin


EEPROM Pinout

AT24C02N


Repair Flow Chart-(1)Start

Visual InspectionCheck 1394 Connector/Related Component

no damage

Check 1394 ID is OK ?

Measure 1394 Voltage

Use multi-meter tomeasure 1394 signals

Finish

Check 1394 CLK24.576/33MHz

NGOK

OK

Change IEEE 1394 Controller Chip

NG

NG

OK

OK

NG

Re-write 1394 ID Address

PASS

Change NGComponent

Change NG X’tal/CLK Gen. Component Measure 1394 Clock

Check 1394 +3V Voltage,Change NG Component/Fix any trace open

Check 1394 SignalsTPA0+/TPA0- , TPB0+/TPB0-

Change NG Component/Fix any trace open

Next PageFail

1394 ID Error Can Write 1394 ID ?

Check BIOS settingCheck 1394 setting is unlockin the BIOS.

OK


Repair Flow Chart-(2)

Check EEPROM Voltage

Use multi-meter to measure EEPROM signal

Finished

NG

OK


Change EEPROM Chip

1394 ID Address Error

NG

OK

OK

NG

Visual Inspectioncheck EEPROM/Connector/connection

components is no damage

Re-write 1394 ID and check ID number is available ?

Check EEPORM Voltage,+3V


Check EEPORM Signals,1394_SCL,1394_SDA




CID

CID

Visual Inspection to check 1394connector, controller & relatedcomponent is not damaged.

1-2

1-1


Repair Technique-Check Bios setting

Check 1394 setting is Unlockin the Bios.

2



Measure IEEE 1394 controller voltages:

(RICOH R5C841)

Pin : +3V

3


Repair Technique-Measure 1394 Clock

Use Oscilloscope to check

1:1394 X’TAL 24.576Mhz2:33.3Mhz (PCI_CLK) are ok.

4


Repair Technique-Measure 1394 Signals

Use Multi-Meter to measure 1394signals bias voltage value.

TPA0+/TPA0- ,TPB0+/TPB0- (Fig.5-2).

If still cannot find any abnormalplease try to change 1394 controllerand check other device under PCIbus.

If the problem is still existing afterchange 1394 controller, pleasechange SB at last.

TPB0+

TPB0-

TPA0+

TPA0-

GND

Test Pin

5-1

5-2


Repair Technique-Diode Value 1394 Pin

TPB0+

TPB0-

TPA0+

TPA0-

6


Repair Technique-Diode Value EEPROM

7

1394_SCL

1394_SDA


Chapter 13Card Reader Repair Guide


Overview

Diagram

Signal Description

Repair Flow Chart

Repair Technique



Diagram

PCI BUS

+VCCA

SDCLK/MSCLK

CD

CMD

CE#

DA0~DA3

+3V

X’TAL

24.576MHZ

CLK_CBPCI(33MHZ) CD Card Detect

CMD CommandWE# Write EnableCE# Card EnableCLK ClockPC Power ControlWP Write ProtectDA0~3 Data 0~3

SB


Circuit-1


Circuit-2



Finish


Change Card reader Controller Chip

Confirm the problem Is MMC/SD error or MS/MS-pro error

Check MSCLK/SDCLK is OK ?Measure clock,

Check related Resister 0 ohm

Check Voltage is OK ?


Measure Voltage, VCCA = +3V is OK(Control signal MCVCC3EN# is

Low active)

Check Resister and Capacitor and MOS-FET

Use multi-meter to measureCheck DATA0~ DATA3(CD) & CMD

signal is OK ?

Change DefectComponent





Visual Inspection:

1.check Card Reader connector isno damaged and bend.

1Pin bend

Check MSCLK & SDCLK:

1.Use multi-meter to measure MSCLK & SDCLK Pin(24) is correct

2

GND


Repair Technique-Check VCC & CMD

3

Check VCC(3V)

1.Use multi-meter to measure VCCAPin(14,19,26)is correct

GND

4

Check CMD

1.Use multi-meter to measure CMDPin(23)is correct

GND


Repair Technique-DATA0~3

5 Check DATA 0~3

1.If memory type is disordered or data transfer fail please Use multi-meter to measure

DATA0~ 3

Pin13 -> DATA0Pin11 -> DATA1Pin27 -> DATA2Pin25 -> DATA3

GND

GND


Repair Technique-Diode Value of Card Reader Pin

PIN Signal Name

DiodeValue

1 GND 0

2 GND 0

3 GND 0

4 GND 0

5 GND 0

6 SD_WP OL

7 NC OL

8 NC OL

9 FUNCSEL0 497

10 GND 0

11 SDDATA1 497

12 SMCD3 503

13 SDDATA0 497

14 VCCA 596

15 GND 0

16 SMCD2 503

PIN Signal Name

DiodeValue

17 SDCLK/MSCLK 492

18 SMCD1 503

19 VCCA 596

20 MSCD# 598

21 GND 0

22 SMCD0 503

23 SDCMD 496

24 SDCLK/MSCLK 492

25 SDDATA3 498

26 VCCA 596

27 SDDATA2 498

28 GND 0

1

6

78

9 28

2

34

5


Chapter 14SATA Repair Guide


Overview

Diagram

Theorem



Diagram

SATA BUS

CLK_SATA_ICH

Clock GEN

SATA HDD SB


Circuit

South Bridge

SATA HDD



Finish

Check BIOS set up and Update latest BIOS version

Change Defect Component& Re-solder

OK

NG

NG

OK

Change Defect ComponentOK

Check SATA pin Diode is OK ? Change Defect ComponentOK

NG

Visual Inspection/Check Connector & Pins is OK ?

Load BIOS set up default/update bios to latest version

Check CLK_SATA_ICH is ok?

Check SATA VCC is OK ? Check Power+5VS & +3VScircuit Change Defect ComponentOK

NG


Chapter 15ODD Repair Guide


Overview

Diagram

Theorem

Repair Flow Chart



Diagram

IDE BUS

S.B

ODD ConnectorODD Device

M/B

SATA BUS

CLK_SATA_ICH

Clock GEN

SB


Circuit


Repair Flow Chart

Visual Inspection to checkConnector is no damaged,

Soldering is ok.

Load set up defaultin the bios/ update bios

to latest version

Use multi-meter to measure ODD signal’s diode value, compare

with good MB.

Start

Measure ODD Voltage

Change NG connector,re-solder NG soldering point,

Change new CD/DVD-ROM FPC

Load setup default andupdate to latest bios.

Check ODD Vcc Voltage :Vcc=+5V

Check CLK_SATA_ICH is ok?

Change S.B

Finished


OK

OK

OK

OK

NG

NG

NG

Confirm the circuit,Change NG component

NG


Chapter 16LAN Repair Guide


Overview

Diagram

Signal Description

Theorem

Repair Flow Chart

Repair Technique



PCI_BUS

EEPROM

+3V_LAN

SMBus

Diagram

LANController

IC

+3V_LANPCI_Reset

#

+2.5V_LANClock :

1.25MHz

2.CLK_LANPCI

Transformer10/100MB

RTL 8100CL

SB


Signal Description


Theorem-EEPROM Pinout

93C46


What is MAC Address? Each device connected to a standard LAN needs a Data Link Layer

address (or called hardware address), providing a means of unique identification.

Each NIC has its unique, hard-coded MAC (Media Access Control) address. It is a 48 bits (6 bytes) address written in a hexadecimal format. The first 3 bytes represents for vendor ID and the remaining 3 bytes are serial number.

MAC: 000C6E 7D3D0FVender ID Serial Number


Repair Flow Chart-(1)START

Visual InspectionCheck LAN Connector and

Component is OK ?

Measure LAN Clock & RST#

Finished

Change NG X’tal/Clock Gen.

Re-write LAN ID Address/Load BIOS default

Check Lan Voltage,+3V_LAN,+2.5V_LAN…

Change DefectConnector/Component

Fail

NG

OK

OK

Use multi-meter,to measure signal is 150 ohm ?

LAN_RDP/RDN & LAN_TDP/TDN

Change NG Transformer/Related R.C Component

Fix any trace open

OK

Change LAN Controller Chip

Next PageLAN ID Error

Can Write LAN ID ?

NGNG

OK

OK

Measure LAN Voltage

Check LAN MAC ID address/BIOS setting up

Confirm the circuit,Change Defect connection R,L,C

or Transistor Components.

Check Lan X’tal 25MHz,CLK_LanPCI 33MHz ,PCI_RST#

Measure LAN Transformer

Fix any trace open/Check NG device on PCI_Bus

Measure LAN AD signals Use multi-meter to measurePCI_Bus AD signals AD0~AD31

Change S.B

OK

OK

OK

NG

NG

NG


Repair Flow Chart-(2)

Check EEPROM VCC(+3V) is OK ?

Use multi-meter to measure SEEDI/SEECLK/SEECS signal

Finish

Check Power to EEPROM VCC pinConnection or Trace is OK .

NG

OK

Check EEPROM to LAN ControllerTrace is open?


Change EEPROM Chip

LAN ID Error

NG

OK

OK

NG

Visual Inspection the EEPROM andrelated components is OK ?

Re-write LAN ID and check ID number is available ?

Repair Defect open Trace



Visual Inspection to check1.LAN(RJ-45) Connector/Pin is OK.2.Related components is no miss anddamage or burned

CID

CID

1-1

1-2


Repair Technique-Check Bios setting

Check LAN port setting isUNLOCKED mode in the BIOS.

2


Repair Technique-LAN ID Check

Check LAN MAC ID address is correct/available(Not 000000 000000)

If LAN MAC ID fail,Please Re-write LAN MAC address first.If the problem still exist,check Voltage is OK and then use multi-meter to measure diodevalue of EEPROM

3

LAN MAC ID


Repair Technique-Measure Voltage & CLK

Measure LAN controller voltages & CLK:

1: +3V_LAN

2: +2.5V_LAN

3: 25MHz

4: PCI_Reset#

5: CLK_LANPCI (33MHz)

4-1

LANController

IC

+3V_LAN PCI_Reset#

+2.5V_LAN

Clock :

25MHz

&

CLK_LANPCI

Measure EEPROM voltages:

Pin 8: +3V_LAN

Pin 5: GND

4-2

93C46

+3V_LAN


Repair Technique-Measure Transformer Signals(1)

Use Multi-Meter to measureTransformer signals.

Some signals should be connectedtogether (Show as Fig.5-2, the signalsmarked Green color)

If Transformer NG, please change it .

LAN_TX+LAN_TX-

LAN_RX+LAN_RX-

TDPTDN

RDPRDN

5-1

5-2


Repair Technique-Measure Transformer Signals(2)

Use Multi-Meter to measureTransformer signals. TX’ signals andRX’ signals should be 150 diode value

(Show as Fig.6-2, the signals markedblack color)

If NG , Please confirm related Resistor(75 ohm) component.

LAN_TX+LAN_TX-

LAN_RX+LAN_RX-

TDPTDN

RDPRDN

6-1

6-2


Repair Technique-Diode Value EEPROM

93C46


Chapter 17VGA Repair Guide


Overview

Diagram

Signal Description

Repair Flow Chart

Repair Technique



Diagram

RED

GREEN

BLUE

PIN1

PIN2

PIN3

DDCDA

HSYNC

VSYNC

DDCCL

PIN12

PIN13

PIN14

PIN15

+12VS

+3VS

NB


Signal Description

1 ~ 56 10

11 ~ 15



Finish


OK

NG

Change North Bridge or Graphics Chip

CRT No display/Other problemCRT Color error

Clear CMOS/ Bios checkClear CMOS and Load

Default or Update new Bios

Check Voltage is OK ?


Confirm the problem Is color error or No display

Check MOS +12VS is OKCheck HSYNC/VSYNC(+3.3V) is OK

Check DDCDA(+3.3V)/DDCL(+5V) is OK(plug in CRT Connector)

Check Resister and Capacitor and MOS-FET

Next Page

Use multi-meter to measureCheck HSYNC/VSYNC/DDCDA/DDCCL

signal is OK ?


NG

OK

NG

OK

OK

NG




Finish

OK

NG

Change North Bridge/VGA

CRT Color error

Check Diode of +3VSis OK

Check diode Voltage is OK ?


Confirm the problem Is color error or No display

Use multi-meter to measure Check R/G/B signal is OK ?


Change Defect Diode andRLC Component

NG

OK



Visual Inspection:

1.check VGA connector is nodamaged and bend.

2.Be sure VGA connector PinSolder no open or short.

CID-Connector bend

CID

1-1

1-2


Repair Technique-Clear CMOS / Check Bios

2 If CRT is no display, please clearCMOS and load Bios default at first.And then,If problem still exist, please try tochange Bios or update Bios.


Repair Technique-Measure VGA signals

Check the problem belongs to(i) RGB color error problem(ii) No display or display error problem.

(i) RGB color error problem please use multi-meterto measure which color (R.G.B.) signal is error.Trace the connection to confirm related inductoror capacitor is ok. If it’s not caused by R.L.C.Q.small components please change NB orGraphics Chip.

(ii) No display or display error (not included colorerror). Use the meter to measure Diode value onDDCCL &DDCDA, VSYNC & HSYNC. Tracethe connection to confirm related R.C.L.Q. is ok.If all check items are no problem please changeNB or Graphics Chip

GND

test point

Pin 5,10,14,3,8,12,1,6

Pin 15,4,9,13,2,7,11

3-1

3-2


Pin 5,10,14,3,8,12,1,6

Pin 15,4,9,13,2,7,11

Repair Technique-Diode Value of VGA Pin

4

Pin Name Diode Value Pin Name Diode Value


Chapter 18LCD Repair Guide


Overview

Diagram

Signal Description

Theorem

Repair Flow Chart

Repair Technique



Diagram-1System Board Side LCD Module Side

GMCHDisplay panel

LVDS

LVDS Bus

Inverter Board

FFC

LVDSConnector

Inverter boardConnector

Cable

AC_BAT_SYS

+3Vs

LCD_BACK_ADJ

LCD_ENBACK

LID_RSM#

LIDSwitch

ADJ_BL

KBC

BACK_OFF#

LCD_ENVDD

SB


Diagram-2

LCD Module SideDisplay panel

Inverter Board

FFC

Cable

System Board Side

AGP Bus/PCI-Express

MCH

ATI VGA

LVDSLVDS Bus

LVDSConnector


LIDSwitch

+3Vs

LCD_ENVDD

LCD_ENBACK

KBC AC_BAT_SYS

LID_RSM#

BACK_OFF#

ADJ_BL

SB


Circuit-1GMCH


Circuit-2LVDS

Connector


Circuit-3



Signal Define-1


Signal Define-2


Signal Define-3


LVDS Basic-1

LVDS is short for "Low Voltage Differential Signaling" and is a high speed, low power data transmission standard.

LVDS is standardized in the ANSI/TIA/EIA-644-1995 Electrical characteristics standard titled: "Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits“

The LVDS standard is an electrical standard only defining driver output characteristics and receiver input characteristics. Guideline are also given on bus configuration, cables, and termination. Protocol, connectors, and bus structure is not defined in this standard, as they are application dependant. It is intended that these parameters are specified by the referencing standard.


LVDS Basic-2

LVDS is envisioned to be forward looking and does not define a maximum data rate within the standard. As maximum data rate is design, technology, and application dependant (required signal quality). Current LVDS parts operate from DC to Giga bits per second range.

Power dissipation is minimized in a number of ways. This includes the CMOS process, the current mode driver design, and also the small load current.

Noise generation is minimized in a number of ways. The signal swing is only 300mV, and also a true balanced differential data transmission scheme, and the current mode driver all limit noise generation.


LCD (Liquid Crystal Display)

TN(90º)-Twisted Nematic

STN(240 º~270 º)-Super TN

DSTN-Dual Scan Tortuosity Nomograph

TFT (90º↑)-Thin Film Transistor (FET)

LTPS-Low Temperature Poly-Si TFT LCD

Early

GS

D

LCD Types


TFT-LCD

TFT-LCD-Thin Film Transistor LCD

Column Driver

Row

Driver

Cs

Cs

Cs

Cs

FET


TFT-LCD

One Pixel & Sub-pixel:

One pixelColumn Driver

Row

Driver Sub-pixel


Bright & Dark Pixel #1

One control circuitto control 3 Gates



Bright point(dot):-Red / Blue / Green / White / Others

Bad

Red

Bad

Green

Bad

Blue

Bad

White

short



Dark point(dot)

Bad (open)

Dark(Black)


Resolution



Visual InspectionCheck connector and related component

are no damage

Separate the symptom problem

LCD display too Dark

Finish

LCD No display/turn to white LCD display abnormal

1 2 3

Check / ClearCMOS BIOS setting &Fn

key problem

1.Clear CMOS and Load Default2.Check Fn + F5 or F6….etc.

(depend on model request)

OK

Change damaged Connector &any N.G RLC components

NG

NG

OK


Repair Flow Chart(2)

LCD display too Dark

Finish

Start1

MeasureInverter Con. Voltage

MeasureInverter Connector Control

signal

Change North Bridgeor Graphics Chip

Check AC_BAT_SYS signal= is 19V.

1.Check “BACK_OFF#” ,Voltage = 3V (from S.B)

2.Check “LCD_ENBACK” ,Voltage = 3V (from N.B or Graphic)

3.Check “LID_RSM#” ,Voltage = 3V

4.Check KBC “ADJ_BL” ,Voltage = between 0~3V (from KBC)

(depend on model different)

Change any NG relatedL&C Component

Trace the related circuit,Change any NG relatedRLC Component and

control IC

NG

NG

OK

OK



Finish

LCD No display/turn to white

Start2

MeasureLVDS Con. Voltage

Check LVDS connector Voltage,+3Vs

Change any NG relatedR&C Component

MeasureLVDS Voltage

LCD_VCC

Check LVDS Voltage LCD_VCC,LCD_VCC =+3V

And check control signal voltage,LCD_ENVDD = +3V

(signal from NB or Graphic IC)

Trace LCD_VCC signal’srelated circuit,

Change NG RLC and MOS-IC Component


NG

NG

OK

OK



Finish

LCD display abnormal

Start3

Measure Voltage

Measure Clock


Check LVDS Voltage ( GMCH / Gfx ),+2.5V

Check VGA Core Voltage ( GMCH / Gfx ),+1.5V or +1.05V / ATi_Vcore 1.0~1.2V

(depend on RD design request)

Change any NG relatedR&C Component

Change any NG RLCComponent or CLK Gen./

Fix any trace open

AGP / PCI-E:Check LVDS Clock for GMCH,

1.DREFCLK(#) 48MHz2.DREFCLK(#) 96MHz

Check LVDS Clock for Gfx,1.CLK_MCH66/AGP66 66MHz2.CLK_PCIE_PEG(#) 100MHz

Use multi-meterto measure LVDS signal

is OK ?

Check LVDS Data,LADATAP[0:2] & LADATAN[0:2]

Check LVDS Clock,LACLKP & LACLKN

Change NG GMCH orGfx IC/ Fix any trace open

OK

OK

OK

NG

NG

NG



Visual Inspection

1.check Inverter/LVDS connector isno NG or BAD solder2.R.L.C. components & Trace is nodamage or miss or openInverter Connector

LVDS Connector

CID

1-1

1-2


Repair Technique-Check Bios settingCheck BIOS Setting:

1.Check display mode is OK,not only CRT mode2.Load BIOS default settingand test again

2-2

2-1


Repair Technique-Check Fn Key

Check Fn Key Setting:

1.Fn + F5 is brightness Down2.Fn + F6 is brightness Up3.Fn + F7 is LCD Back Light On/Off4.Fn + F8 is LCD/CRT/TV Mode switching(all function key is depend on designer)

+

+

3-1

3-2


Repair Technique-Measure Voltage(1)

Use Multi-Meter or Oscilloscope tomeasure Voltage:1.If problem is LCD too Dark,Check AC_BAT_SYS (on InverterCon.) signal = 19V

2.If problem is LCD No display or turnwhiteCheck LCD_VCC (LVDS Con.) signal= 3.3V

4-1

4-2


Repair Technique-Measure Voltage(2)

Use Multi-Meter or Oscilloscope tomeasure Voltage:3.If problem is LCD display abnormal,

一.Check LVDS voltage = 2.5V二.Check VGA Core voltage =GMCH: 1.5V or 1.05VGfx: ATi_Vcore 1.0 ~ 1.2V

5


Repair Technique-Measure Control Signal

Use Multi-Meter or Oscilloscope tomeasure Control Signal voltage:

1.If problem is LCD too DarkCheck BACK_OFF#= 3.3VCheck LCD_ENBACK=3.3VCheck LID_RSM#=3.3VCheck ADJ_BL=0~3V

2.If problem is LCD No display orturn whiteCheck LCD_ENVDD=3.3V

6


Repair Technique-Measure CLKUse Oscilloscope to measure Clock:

GMCH platform:

DREFCLK(#) = 48MHz (AGP Bus)

DREFCLK(#) = 96MHz (PCI-E Bus)

Gfx platform:

CLK_MCH66/AGP66 = 66MHz

(AGP Bus)

CLK_PCIE_PEG(#) = 100 MHz

(PCI-E Bus)

96MHz

7-1

7-2


Repair Technique-Measure LCDS signals

Use multi-meter to measure LVDS Con.Pin signal is correct of Diode value andcompare with GOOD M/B.

Check LCDS Data signals,

LADATAP[0:2]

LADATAN[0:2]

Check LCDS Clock signals,

LACLKP / LACLKN

8


Repair Technique-Diode of LVDS Signal

LVDS Connector SignalSignal Name Diode Value

LADATAP[0:2]

L1_TX0+ 443

L1_TX1+ 442

L1_TX2+ 443

LADATAN[0:2]

L1_TX0- 443

L1_TX1- 442

L1_TX2- 443

LACLKP L1_TXC+ 441

LACLKN L1_TXC- 441

Ps (short for) :

LADATAP[0:2] / LADATAN[0:2]

L: LVDS

A: LVDS channel A Data output

P: positive

N: negative


Chapter 19BIOS Repair Guide


Overview

Diagram

Signal Description

Introduction

Repair Flow Chart

Repair Technique



BIOS LPC Bus

Clock

PCIRST#

+3VS

SIO

Diagram

INIT#

Clock Gen.

LFRAME#DIS_SYSBIOS#

LAD[0~3]

SB


Circuit


Signal Description-(1)


Introduction

Memory Map SST 49XXX series Block Diagram Theorem


49xxx - Block Diagram

ASUS Confidential 353 353

49xxx – Pin/Signal Names-1


49xxx – Pin/Signal Names-2


49xxx – Reset-1

FWH Mode


49xxx – Reset-2

PP Mode


49xxx – Chip Read


49xxx – Chip Write


49xxx – Block Erase


49xxx – Chip Erase


Product Ordering Information



Finish

1.Change Defect Component &Re-solder2.Update Bios image file


1.Visual Inspection2.Use external Bios Boot up

Measure LPC LAD[0~3] signal diode value is OK

Check Power signal VDD(+3VS)Confirm circuit of Power IC,

Check connection RLC/diode

Components

Check CLK signal CLK(33MHZ) 1.Confirm circuit of CLK Gen.

1.Check Reset signal RST#2.Check Control signal LFRAME#/INIT#

DIS_SYSBIOS#

Change BIOS Chip / South Bridge

1.Confirm PCB Trace

Confirm related circuit,Check Resister and

Capacitor and MOS-FET

Fix any trace open




Repair Technique-Visual InspectionVisual Inspection1.check BIOS pins is open orshort

Use External BIOS Boot up1.If External BIOS can Boot up

computer ,we can try to updateBIOS image file first

External BIOS

1-1

1-2

Jump Setting :1. 2. 3. 4.

on off on off --- Boot from debug card

off off on off --- Boot from M/B

on off off off --- Update M/B Bios From Debug Card



2Check VDD Voltage:Check BIOS VDD(+3VS) Voltage :Pin 1 : +3VPin 25: +3VPin 27: +3VPin 32: +3V

VDD

2532

VDD

3Check CLK FrequencyCheck BIOS CLK Frequency:Pin 31: 33MHZ

CLK

127

VDD31


Repair Technique-Measure BIOS Signal

Measure BIOS Controller Signal:

Pin 2 : RST#

Pin 11: DIS_SYSBIOS#

Pin 23: LFRAME#

Pin 24: INIT#

4

24

RST

#

11DIS_SYSBIOS# 23 LFRAME#INIT#

2

Measure BIOS Pin signal of Diode value isnormal or not?

Pin 13: LAD[0]

Pin 14: LAD[1]

Pin 15: LAD[2]

Pin 17: LAD[3]

5

14

13

15 17

LAD[0]

LAD

[3]

LAD

[2]

LAD

[1]


PIN Signal Name

DiodeValue

1 VPP 431

2 RST# 778

3 FPG13 OL

4 FPG12 OL

5 FPG11 OL

6 FPG10 OL

7 WP# 807

8 TBL# 807

9 NC OL

10 NC OL

11 DIS_SYSBIOS# OL

12 NC OL

13 LAD0 690

14 LAD1 690

15 LAD2 690

16 GND 0

PIN Signal Name

DiodeValue

17 LAD3 690

18 NC OL

19 NC OL

20 NC OL

21 NC OL

22 NC OL

23 LFRAME# 683

24 INIT# 607

25 VCC 431

26 GND 0

27 VCC 431

28 GND 0

29 IC OL

30 FPG14 OL

31 CLK 758

32 VCC 431

Repair Technique-Diode Value of BIOS Pin

1234

5

6

7

8

9

10

11

12

13

14 15 16 17 18 19 20

21

22

23

24

25

26

27

28

29

303132


Chapter 20MEMORY Repair Guide


Overview

Diagram

Introduction

1.DDR

2.DDRII

3.DDR3

Signal Description

Repair Flow Chart

Repair Technique



Diagram(1)

Main Clock Gen.

Memory Bus

Memory Module (DDR)

Type 1

GMCH/MCH

MA0~13MD0~63

CLKGen.

+2.5V ( for DDR ) +1.25Vs (for DDR )

CLKGen.

DDR Clock Gen.

N.B


Diagram(2)

Main Clock Gen.

Memory Bus

Memory Module (DDR, DDR2)

Type 2

GMCH/MCH

MA0~13MD0~63

CLKGen.

+1.8V ( for DDR2 )+2.5V ( for DDR )

+0.9Vs ( for DDR2 )+1.25Vs (for DDR )

N.B


Diagram(3)

Main Clock Gen.

Memory Bus

Memory Module (SDR)

Type 3

GMCH/MCH

MA0~13MD0~63

CLKGen.

+1.5Vs ( for DDR3 )

CLKGen.

DDR Clock Gen.

N.B


Introduction What is memory anyway? All computer functions have common features

Data processing (CPU, GPU….) Data storage (CDR, HDD, Memory…) Data movement (FSB, PCI-E, USB….) Control (North Bridge, South Bridge…)

Why memory improve performance? CPU runs much more faster than HDD.

If all data & application were stored in HDD.CPU will always wait for HDD to pass data.

Bottle neck in HDD, CPU idle most of the time Memory enhance the usage of CPU.


RAM Family Static RAM (SRAM)

Faster, more expensive Need not to be recharged regularly like DRAM Cache

Dynamic RAM (DRAM) Less expensive, need to be refreshed DRAM subtypes to be introduced

– Synchronous DRAM (SDRAM)Please refer to SDRAM(New).ppt for details.

– Double Data Rate Synchronous DRAM (DDR)Please refer to DDR (New).ppt for details.

– Double Data Rate 2 Synchronous DRAM (DDR2)Please refer to DDR II(New).ppt for details.

– Rambus DRAM(RDRAM)not being used anymore, not being discussed here.Please refer to RDRAM(New).ppt for details.


DRAM Family


DDR I vs DDR II


DDR3 Introduction

DIMM with eight DDR3 SDRAM devices

http://en.wikipedia.org/wiki/File:DDR3.jpg


SO-DIMM Type

SO-DIMM 144 pins

200 pins

200 pins

Micro-DIMM 172 pin

214 pin Micro DDR2-DIMM214 pins

SDR SO-DIMM 144 pins

DDR SO-DIMM 200 pins

DDR2 SO-DIMM 200 pins

Micro DDR-DIMM172 pins


What memory looks like?


Performance release terms Performance related terms

Access Time (Nano seconds) measuring from when the memory module receives a

data request to when that data becomes available.lower numbers indicate faster speeds.

CAS latencythe number of clock cycles it takes before a column

canbe addressed on the DRAM chip. Latency is a measure of delay

Dual channel modeplease refer to the picture next page.


Other important terms MEMORY BANKS

Most computer systems have two or more memory banks –usually called bank A, bank B

Error Correction Code (ECC)data integrity checking method used primarily in high-end PCs and file servers. Please refer to ECC(New).ppt for details.

Serial Presence Detect (SPD)store information about the memory module.

Please visithttp://www.webopedia.com/quick_ref/dram_memory.asp & http://www.webopedia.com/Hardware/Memory/ for more info.

http://www.webopedia.com/quick_ref/dram_memory.asp

http://www.webopedia.com/Hardware/Memory/


SPD

When a computer is booted (started), serial presence detect (SPD) is information stored in an electrically erasable programmable read-only memory (EEPROM) chip on a synchronous dynamic random access memory (SDRAM) memory module that tells the basic input/output system (BIOS) the module's size, data width, speed, and voltage

SPD Chip Serial EEPROM256 Bytes


DDR


DDR Basic

Short for Double Data Rate-Synchronous DRAM,a type of SDRAM that supports data transfers on both edges of each clock cycle (the rising and falling edges), effectively doubling the memory chip's data throughput.

DDR-SDRAM also consumes less power, which makes it well-suited to notebook computers. DDR-SDRAM is also called SDRAM II and DDRAM.


DDR Naming

Naming conventions and theoretical bandwidths of DDR SDRAM


Throughput

DDR 266 operating clock is 266MHz，if the data bus width is 64bit，in other word it’s 8bytes，thus DDR 266 memory bandwidth is 266MHz x 8=2100MB/s，i.e. PC 2100.

Double Data RateX 2

Clock Freq.133MHz

Data Freq.266 MHz

266 MHz

266 x 8= 2100MB/s64 bit = 8bytes


Throughput PC1600 (DDR200)

100(MHz)×2×8(Byte) = 1.6GB/S PC2100 (DDR266)

133(MHz)×2×8(Byte) = 2.1GB/S PC 2700 (DDR333)

166(MHz)x2x8(Byte) = 2.7GB/S PC 3200 (DDR400)

200(MHz)x2x8(Byte) = 3.2GB/S

100 / 133 / 166 / 200MHz

200 / 266 / 333 / 400 MHzData strobe signal(Double Data Rate)


DDR Electrical Interface Double Data Rate IC's use 2.5 volt SSTL_2

compatible I/O [class II], how ever the supply voltage may be higher. The main supply voltage [VDD] is 3.3v or 2.5v for DDR 200, DDR266, and DDR333, while 2.6v for DDR400. The output drive supply [VDDQ] is 3.3v or 2.5v for DDR200, DDR266, and DDR333, while it's 2.6v for DDR400. DDR uses a bi-directional data strobe to indicate valid data [DQS].

STL-2: Stub Series Terminated Logic for 2.5v [JESD8-9]. Class II provides for higher power dissipation, Higher drive and a maximum current of 15.2mA. DDR, Double Data Rate. [JESD79] defines two data transfers per clock cycle. The Clocks are differential. Power Supply [VDD = 3.3v + 0.3v or 2.5v + 0.02v for DDR 200, DDR 266, or DRR 333; and 2.6v +0.1v for DDR 400]. Inputs and outputs are compatible with SSTL_2. These DIMMs are 184 Pin in size and are not interchangeable with older 168 on SDRAM modules.


DDR II


DDR2 Basic

DDR2 SDRAM (Double Data Rate Two Synchronous Dynamic Random Access Memory)

The advantage of DDR2 over DDR SDRAM is its ability to run at much higher clock speeds due to an improved electrical interface.

Like DDR, DDR2 will transfer data on every rising and falling edge of the clock (double pumped), achieving an effective rate of 200 MHz with the same clock frequency


DDR2 Basic count. DDR2 DIMM memory modules are not backward-

compatible with DDR DIMM , due to incompatible pin configurations, core voltage, and memory chip technology.

DDR2 modules are designed with a different "key" in the edge connector to prevent insertion into incompatible memory sockets such as DDR motherboard. A DDR2 SDRAM DIMM will not fit into a standard SDRAM DIMM socket or a DDR DIMM socket.

DDR2 modules use a 1.8V power supply, providing a big power saving over the 2.5V DDR modules.


DDR I /DDR II

In this scenario, the core is running at 100 MHz, for DDR I, the I/O buffers is synchronous with the core.

Only the protocol varies and in the case of DDR II, the I/O buffers are clocked at twice the core frequency. In order to satisfy the output

DDR I prefetches 2 bits, DDR II needs to prefetch four bits with every read command and pipeline them for time multiplexed output.


DDR vs. DDR II

Read Latency-11TWrite Latency

3+, 4, 51.5, 2, 2.5CAS Latency

Differential Strobe: DQS, /DQS***Single DQSData Strobe

4/8**2/4/8Burst Length

4 bit2 bitPrefetch Size

100/133/(166) MHz100/133/166/200 MHzDRAM Core Frequency

200/266/(333) MHz100/133/166/200 MHzBus Frequency

400/533/(667) Mbps*

200/266/333/400 Mbps*Data Rate

Frequency Specs

DDR IIDDR


DDR vs. DDR II count.Power Specs

Core Voltage (VDD) 2.5V++ 1.8V

I/O Voltage (VDDQ) SSTL_2 (2.5V) SSTL_1.8 (1.8V)

Format

Packaging TSOP (II), TBGA FBGA

Compatibility With DDR I

Command Set Same as DDR I

Basic Timing Parameters Same as DDR I

Bus Utilization and Signal Integrity

New Features

ODTOCD-calibrationPosted CASAdditive Latency+++


Dual Channel The two channels handle memory-processing more

efficiently by utilizing the theoretical bandwidth of the two modules, thus reducing system latencies, the timing delays that inherently occur with one memory module.

Matched DIMM configuration in each channel Same Density (128MB, 256MB, 512MB, etc.) Same DRAM technology (128Mb, 256Mb, or 512Mb) Same DRAM bus width (x8 or x16) All either single-sided or dual-sided

Rules to Enable Dual Channel Mode


DDR2 Electrical Interface

Double Data Rate II IC's use 1.8 volt SSTL_18 compatible I/O [class II], how ever the supply voltage may be higher.SSTL-18: Stub Series Terminated Logic for 1.8v [JESD 8-15A]. Class II provides for higher power dissipation, Higher drive and a maximum current of 15.2mA


DDR2 Termination DDR2 modules contain the require resistor termination located on the

memory chips using a technique called On-Die Termination [ODT]. While DDR1 modules have the necessary resistive termination located on the motherboard. Using ODT, DDR2 are able to reduce the parts count required for mother board while at the same time locate the terminations closer the the signal destination. The ODT termination can be turned on or off by the DRAM controller. Normally the terminations are turned on for Writes and disable for Reads. The value of the ODT termination is selectable based on the number of modules in the system. With one DIMM module the ODT value is set at 150 ohms [300Ω pull-up and 300Ω pull-down]. When two modules are loaded into the system the ODT value is changed to 75 ohms [150Ωpull-up and 150Ω pull-down] for the DIMM not being written to while the DIMM being accessed has its ODT turned off. Writing to the Extended Mode Register [EMR] controls the ODT presence and value. Three combinations are allowed; termination disabled, 75 ohms, and 150 ohms [ also 50 ohms]. The newest revision adds 50 ohm termination values. ODT improves the eye-diagram over SSTL for either Single-Rank or Dual-Rank modules.


DDR 3


DDR 3 DDR3 SDRAM(Double Data Rate Three Synchronous

Dynamic Random Access Memory) DDR3 SDRAM improves on DDR2 SDRAM in several

significant ways:1.Higher bandwidth due to increased clock rate 2.Reduced power consumption due to 90nm fabrication technology 3.Pre-fetch buffer is doubled to 8 bits to further increase performance 4.The voltage of DDR3 SDRAM DIMM's was lowered from 1.8V to 1.5V. This reduces power consumption and heat generation, as well as enabling more dense memory configurations for higher capacities.


Standard DDR3 SDRAM DIMM's

DDR3 SDRAM is normally packaged in DIMM modules.


DDR 3 Front View


DDR 3 Back View


DDR SO-DIMMSignal Description


DDR Pinout


Pin function


Pin Description-1


Pin Description-2


DDR2 SO-DIMMSignal Description


DDR2 Pinout


Pin function


Pin Description-1


Pin Description-2


Pin Description-3


Pin Description-4


Pin Description-5


Pin Description-6


Pin Description-7


DDR Micro-DIMM


Micro-DDR Pinout


Pin function


DDR2 Micro-DIMM


Micro-DDR2 Pinout


Pin function


Pin Description-1


Pin Description-2


Pin Description-3


Pin Description-4


Pin Description-5



Visual Inspectioncheck memory slot is no bent pin

or damaged.

Measure memory Voltage

Measure memoryData /Address signals and control signals

,RAS#,CAS#,WE#

Finish

Confirm the circuit,Fix any trace or RLC damaged/

change NG CLK Generator

Check Memory Voltage,1.8V or 2.5V or 1.5V (depend on Memory type)

Check Memory Vtt Voltage,0.9Vs or 1.25Vs (depend on Memory type)

Check Memory Clock,100 / 133 / 166 …MHz

Fix any voltage regulator IC or related RLC component,

Fix any trace open

OK

NG

OK

NG

NG

OK

Use Multi-Meter to measure,Trace NG signals and compare

with good MBFix any trace open or resistor damaged

OK

Change any damaged memory slot or component/Fix any bad solder or trace open

Measure memory Clock

ChangeN.B

NG


Repair Technique-Visual InspectionVisual Inspection

1.Check memory slot / Pin is notdamaged or bent pin inside.

2.Check related resistor , capacitorcomponent no damage.

3.Fix any trace open or BAD solder

CID

CID

1-1

1-2


Repair Technique-Measure Memory Voltage Use Multi-Meter orOscilloscope to measureMemory Voltage & VttVoltage .

Memory Voltage:SDRAM: 3VsDDR :2.5VDDR2: 1.8V

Memory Vtt Voltage:DDR :1.25VsDDR2: 0.9Vs

DDR Vtt Voltage=2.5V

DDR Vtt Voltage=1.25V

2-1

2-2


Repair Technique-Measure Memory Clock

Use Oscilloscope to measure MemoryClock

(100Mhz,133Mhz,166Mhz…depends ondifferent chipset & memory)

Memory CLK=100,133,166…MHz

3-1

3-2


Repair Technique-Measure Memory Signals

Plug Memory measure card into slot.Use Multi-Meter to measure memorysignals’ bias voltage value. Comparewith good MB if you find anyunusual.

Diode Mode 4


Memory DIMM Measure Tools(1)

SDRAM Signal Measure tool

DDR Signal Measure tool

DDR2 Signal Measure tool

1. GSENG_FB SODIMM PINNAME R1.00

P/N: 08-900028700

2. ENG_TSNB DDR PIN Board R2.00

P/N: 08-900029500

3. ENG_FAE_DDR2 TEST R1.00

P/N: 08-900042700

5-1

5-2

5-3


Memory DIMM Measure Tools(2)

1. ENG_TSNB_MICRODDR/B Rev2.0

P/N: 08-900033000

Micro DDR Signal Measure tool

6


Repair Technique-Diode Value (DDR-DIMM Sample)


Chapter 21POST CODE Repair Guide


Overview

What is POST CODE

Using POST Code to Debug

Appendix:

(1)BIOS CODE Definition

(2)BIOS Beep Code



What is POST Code

POST : Power On Self Test The tag thrown out by BIOS

– Usually, BIOS would output some number through 80ports. Using I/O access card (debug card), user could read those number.

– The POST codes used by Award, Phoenix, and AMI are different.

– These numbers mean something was executing in the system.


What is POST Code

POST Code as BIOS executing process Standard POST Code

– These numbers were used as standard process. BIOS Debug Code

– These numbers depend on various project.


POST “00”, “FF”POST Code “00”,”FF” or Debug card shows all dots(……) / all 00

(1)Check Voltage:a.) Vcore ,if no Vcore check from power block circuit diagramb.) 1.5v,if no 1.5v check from power block circuit diagramc.) 2.5v,if no 2.5v check from power block circuit diagramd.) 3.3v,if no 3.3v check from power block circuit diagrame.) check for N/B,S/B voltage is ok or not

(2)Check CLK:a.) CPU CLK,if no CPU CLK check from CLK gen. circuit diagramb.) N/B CLK,if no N/B CLK check from CLK gen. circuit diagramc.) S/B CLK,if no S/B CLK check from CLK gen. circuit diagramd.) 14.318MHz,if no 14.318MHz check from CLK gen. circuit diagrame.) CLK generator.if all no CLK,change 14.318MHz,and then change CLK

gen. Before must check any open or short


(3)Check Power ok & Reseta.) H/W reset,if low voltage check circuit diagram, normal is capacitor badb.) power supply power ok,if low voltage,normal is capacitor badc.) CPU power ok,if low voltage check circuit diagram,and above signal d.) PCI reset,if low voltage check above signal and for S/B CLK,voltagee.) CPU reset,if low voltage check above signal and for N/B CLK,voltage f.) Check boot up sequence.

(4)Check control signal:a.) Check CPU control signal(ADS#,BRDY#…) is ok or notb.) Check PCI control signal(FRAME#,IRDY#,TRDY#…) is ok or notc.) Check others control signal is ok or not


00(no data)(1)Change BIOS(2)Check bios voltage(3)Check BIOS CLK(4)Check LAD0~3(5)Check BIOS control signal(6)Check CPU control signal

00(Have address & data)(1)CPUN/B:HD0~63,HA3~HA31,control signal open or short(2)N/BS/B:PCI BUS(AD0~AD31,CBE0~CBE3) or HUB

Link(HL0~HL10) or V_link or LDT BUS open or short(3)S/BBIOS:ISA BIOS(SA0~SA19,SD0~SD7) or LPC BUS

(LAD0~LAD3) open or short


POST “C0”, “D0”

C0 (Award) D0 (AMI)

(1)Change BIOS(2)Check HD0~63 signal open or short

(3)Check HA3~31 signal open or short(4)Check AD0~31 signal open or short(5)Check SM BUS is ok or not(6)Check all Voltage is ok or not ,especially 2.5V,3VS

(7)Check all CLK is ok or not(9)Check SB, especially for Intel ICH4


POST “C1”, “9F”, “D3”, “EF”….

C1, E1, 9F, 99, Ad (Award) D3, D4, E0, E5, A4 (AMI)EF, EE, 28 (Phoenix)

(1)Change BIOS(2)Check Memory voltage is ok or not, especially 3V, 2.5V, 1.8V ,

1.25Vtt , 0.9Vtt(3)Check Memory CLK is ok or not

(4)Check SM BUS is ok or not(5)Check MA,MD,CAS,RAS,CKE… signal is Open or Short(6)DIMM socket not clean or bad(7)Check HA,AD,CPU control signal is open or Short


POST “C3”, “C5”, “05”C3 (Award)

(1)Change BIOS(2)Check memory problem(3)Check frequency problem

C5 (Award)(1)Change BIOS(2)Check memory problem(3)Check HA3~31 is open or short

05 (Award)(1)Check KBC CLK is ok or not(2)Check KBC voltage is ok or not

(3)Check KBC address,data,control signal is open or short(4)Change KBC


POST “0B”, “13”, “20”0B (Award)

(1)Change BIOS(2)Check battery is ok or not(3)Check all CLK signal(14.318MHz,25MHz,40MHz….)(4)Check all voltage is ok or not(5)Check INIT,TRDY#,RADY signal… is open or short(6) Check C/BE0~3 is short or not(7)Check all control signal(CPU,PCI,AGP) is open or short

13 (AMI)(1) Check 1.5V to NB

20 (AMI)(1) Check 2.5V , 1.25Vtt or 1.8V ,0.9Vtt(2) Check Memory problems(3) Check AGP signals


POST ”31”,”3D”,”41”

31,3D (Award)(1)Check KBC CLK is ok or not(2)Check K/B problem(3)Check CPU control signal(HITM#,ITIN,ITNK#…)is

open or short(4)Check N/B control signal… is open or short

41 (Award)(1)Change BIOS (2)Check SA0~SA16 is Open or short(3)Check MEMR#,MEMW# is open or short(4)Check HA3~31 is open or short


POST “4E”, “61”, “85”4E (Award)

(1)Check TRDY#,DEVSEL# is open or short(2)Check K/B problem

61 (Award)(1)Check Cache problem(2)Check CPU control signal is ok or not

(3)Check N/B control signal is ok or not85 (AMI)

(1) Check Bios(2) Check NB (No display problem)


POST CODE Definition

AMI POST Code definition AWARD POST Code definition Phoenix POST Code definition


AMI Bios Code Definition-1


Award Bios Code Definition-1


Phoenix Bios Code Definition-1


BIOS Beep Codes

AMI BIOS Beep Codes AWARD BIOS Beep Codes Phoenix BIOS Beep Codes


BIOS Beep Codes for AMIBeeps Error Message Description

1 short DRAM refresh failureThe programmable interrupt timer or programmable interrupt controller has probably failed

2 short Memory parity errorA memory parity error has occurred in the first 64K of RAM. The RAM IC is probably bad

3 short Base 64K memory failure A memory failure has occurred in the first 64K of RAM. The RAM IC is probably bad

4 short System timer failureThe system clock/timer IC has failed or there is a memory error in the first bank of memory

5 short Processor error The system CPU has failed

6 short Gate A20 failureThe keyboard controller IC has failed, which is not allowing Gate A20 to switch the processor to protected mode. Replace the keyboard controller

7 shortVirtual mode processor exception error

The CPU has generated an exception error because of a fault in the CPU or motherboard circuitry

8 shortDisplay memory read/write error The system video adapter is missing or defective

9 short ROM checksum errorThe contents of the system BIOS ROM does not match the expected checksum value. The BIOS ROM is probably defective and should be replaced

10 shortCMOS shutdown register read/write error The shutdown for the CMOS has failed

11 short Cache error The L2 cache is faulty

1 long, 2 short Failure in video systemAn error was encountered in the video BIOS ROM, or a horizontal retrace failure has been encountered

1 long, 3 short Memory test failure A fault has been detected in memory above 64KB

1 long, 8 short Display test failure The video adapter is either missing or defective

2 short POST Failure One of the hardware testa have failed

1 long POST has passed all tests


BIOS Beep Codes for AWARD

Beeps Error Message Description

1long, 2 short Video adapter error

Either video adapter is bad or is not seated properly. Also, check to ensure the monitor cable is connected properly.

Repeating (endless loop) Memory error Check for improperly seated or missing memory.

1long, 3shortNo video card or bad

video RAM Reseat or replace the video card.

High frequency beeeps while running Overheated CPU

Check the CPU fan for proper operation. Check the case for proper air flow.

Repeating High/Low CPU

Either the CPU is not seated properly or the CPU is damaged. May also be due to excess heat. Check the CPU fan or BIOS settings for proper fan speed.


BIOS Beep Codes-1 for Phoenix1-1-2 CPU test failure The CPU is faulty. Replace the CPU

Low 1-1-2 System board select failure The motherboard is having an undetermined fault. Replace the motherboard

1-1-3 CMOS read/write error The real time clock/CMOS is faulty. Replace the CMOS if possible

Low 1-1-3 Extended CMOS RAM failure The extended portion of the CMOS RAM has failed. Replace the CMOS if possible

1-1-4 BIOS ROM checksum error The BIOS ROM has failed. Replace the BIOS or upgrade if possible

1-2-1 PIT failure The programmable interrupt timer has failed. Replace if possible

1-2-2 DMA failure The DMA controller has failed. Replace the IC if possible

1-2-3 DMA read/write failure The DMA controller has failed. Replace the IC if possible

1-3-1 RAM refresh failure The RAM refresh controller has failed

1-3-2 64KB RAM failure The test of the first 64KB RAM has failed to start

1-3-3 First 64KB RAM failure The first RAM IC has failed. Replace the IC if possible

1-3-4 First 64KB logic failure The first RAM control logic has failed

1-4-1 Address line failure The address line to the first 64KB RAM has failed

1-4-2 Parity RAM failure The first RAM IC has failed. Replace if possible

1-4-3 EISA fail-safe timer test Replace the motherboard

1-4-4 EISA NMI port 462 test Replace the motherboard

2-1-1~4 64KB RAM failure Bit 0~3; This data bit on the first RAM IC has failed. Replace the IC if possible


BIOS Beep Codes-2 for Phoenix2-2-1~4 64KB RAM failure Bit 4~7; This data bit on the first RAM IC has failed. Replace the IC if possible



3-1-1 Slave DMA register failure The DMA controller has failed. Replace the controller if possible

3-1-2 Master DMA register failure The DMA controller had failed. Replace the controller if possible

3-1-3Master interrupt mask register failure The interrupt controller IC has failed

3-1-4Slave interrupt mask register failure The interrupt controller IC has failed

3-2-2 Interrupt vector errorThe BIOS was unable to load the interrupt vectors into memory. Replace the motherboard

3-2-3 Reserved

3-2-4 Keyboard controller failure The keyboard controller has failed. Replace the IC if possible

3-3-1 CMOS RAM power bad Replace the CMOS battery or CMOS RAM if possible

3-3-2 CMOS configuration errorThe CMOS configuration has failed. Restore the configuration or replace the battery if possible

3-3-3 Reserved

3-3-4 Video memory failure There is a problem with the video memory. Replace the video adapter if possible

3-4-1 Video initialization failureThere is a problem with the video adapter. Reseat the adapter or replace the adapter if possible

4-2-1 Timer failure The system's timer IC has failed. Replace the IC if possible


BIOS Beep Codes-3 for Phoenix4-2-2 Shutdown failure The CMOS has failed. Replace the CMOS IC if possible

4-2-3 Gate A20 failure The keyboard controller has failed. Replace the IC if possible

4-2-4Unexpected interrupt in

protected mode This is a CPU problem. Replace the CPU and retest

4-3-1 RAM test failure System RAM addressing circuitry is faulty. Replace the motherboard

4-3-3 Interval timer channel 2 failure The system timer IC has failed. Replace the IC if possible

4-3-4 Time of day clock failure The real time clock/CMOS has failed. Replace the CMOS if possible

4-4-1 Serial port failure A error has occurred in the serial port circuitry

4-4-2 Parallel port failure A error has occurred in the parallel port circuitry

4-4-3 Math coprocessor failure The math coprocessor has failed. If possible, replace the MPU


Chapter 22New Card Repair Guide


Overview

Diagram

Slot Circuit (G1S)

New Card Power Circuit

Repair Flow Chart



Diagram

Power Controller(R5538V001)

+3VS +3VSUS

+3VSUS_PE

+3VS_PE

+1.5VS

PCIE_TXN3_C

VSUS_ON

SUSB_EC+1.5VS_PE

PCIE_TXP3_C

PCIE_RXN3_NEWCARD

PCIE_RXP3_NEWCARD

Clock GenCLK_PCIE_NEWCARD

CLK_PCIE_NEWCARD#

SB


Slot Circuit (G1S)


New Card Power Circuit


Repair Flow Chart

Finish

OK

NG

Measure Voltage is OK ?

Use multi-meter to measureCheck PCIE Interface

signal is OK ?

NG

OK

Change South Bridge

MeasureCLK_PCIE_NEWCARD & CLK_PCIE_NEWCARD#

CLK is OK

Check +1.5VS_PE & +3VS_PE & +3VSUS_PE is OK

Check +1.5VS,+3VS,+3VSUS is OKCheck VSUS_ON,SUSB_ECis OK

Newcard error

Check CLOCK GEN is OKChange Defect

ComponentOK

NG

Check Resister and Capacitorand Trace

Trace NG signal and Solve defect symptom


Asus notebook training_actre_l3-2

Devices & Hardware

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