Assignment 3 Homework Help

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Assignment 3 Homework Help Alexander Nelson March 16, 2021 University of Arkansas - Department of Computer Science and Computer Engineering

Transcript of Assignment 3 Homework Help

Page 1: Assignment 3 Homework Help

Assignment 3 Homework Help

Alexander Nelson

March 16, 2021

University of Arkansas - Department of Computer Science and Computer Engineering

Page 2: Assignment 3 Homework Help

3.1 – Unsigned Arithmetic

What is 0x5ED4 - 0x07A4 when these values represent unsigned

16-bit hexadecimal numbers? The result should be written in

hexadecimal. Show your work!

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3.2 – Sign-Magnitude Arithmetic

What is 0x5ED4 - 0x07A4 when these values represent signed

16-bit hexadecimal numbers stored in sign-magnitude format? The

result should be written in hexadecimal. Show your work!

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3.6 – Unsigned Overflow

Assume 185 and 122 are unsigned 8-bit decimal integers. Calculate

185-122. Is there overflow, underflow, or neither?

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3.7 – Sign-magnitude Overflow

Assume 185 and 122 are signed 8-bit decimal integers stored in

sign-magnitude format. Calculate 185+122. Is there overflow,

underflow, or neither?

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3.9 – 2’s Complement Saturating Arithmetic

Assume 151 and 214 are signed 8-bit decimal integers stored in

two’s complement format. Calculate 151 + 214 using saturating

arithmetic. The result should be written in decimal. Show your

work!

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3.10 – 2’s Complement Saturating Arithmetic

Assume 151 and 214 are signed 8-bit decimal integers stored in

two’s complement format. Calculate 151 - 214 using saturating

arithmetic. The result should be written in decimal. Show your

work!

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3.11 – 2’s Complement Saturating Arithmetic

Assume 151 and 214 are unsigned 8-bit integers. Calculate 151 +

214 using saturating arithmetic. The result should be written in

decimal. Show your work!

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3.13 – Multiply Hardware

Using a table similar to that shown below (left), calculate the

product of the hexadecimal unsigned 8-bit integers 62 and 12 using

the hardware described in the figure below (right). You should

show the contents of each register on each step.

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3.13 – Multiply Hardware

Multiplicand = 0011 1110 – Does not change

Iteration Step Product

0 Initial Values 0000 0000 0000 1100

1a 0→No Operation 0000 0000 0000 1100

1b Shift product right 0000 0000 0000 0110

2a 0→No Operation 0000 0000 0000 0110

2b Shift product right 0000 0000 0000 0011

3a 1→Prod = Prod(15:8) + Mcand 0011 1110 0000 0011

3b Shift product right 0001 1111 0000 0001

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3.13 – Multiply Hardware

Multiplicand = 0011 1110 – Does not change

Iteration Step Product

3b Shift product right 0001 1111 0000 0001

4a 1→Prod = Prod(15:8) + MCand 0101 1101 0000 0001

4b Shift product right 0010 1110 1000 0000

5 shift product right 0001 0111 0100 0000

6 shift product right 0000 1011 1010 0000

7 shift product right 0000 0101 1101 0000

8 shift product right 0000 0010 1110 1000

0000 0010 1110 1000 = 744 = 62*12

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3.15 – Multiply Hardware

Calculate the time necessary to perform a multiply using the

approach described in the text (31 adders stacked vertically), if an

integer is 8-bits wide and an adder takes 4 time units.

Here is what the text says:

“A straightforward approach would be to connect the outputs of

adders on the right to the inputs of adders on the left, making a

stack of adders 32 high.”

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3.15 – Multiply Hardware

Let’s try it with 4 bits

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3.16 – Multiply Hardware

Calculate the time necessary to perform a multiply using the

approach given in figure 3.7 if an integer is 8 bits wide and an

adder takes 4 time units.

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3.16 – Multiply Hardware

Let’s try it with 4 bits

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3.23 – Floating Point Single Representation

Write down the binary representation of the decimal number 63.25

assuming the IEEE 754 single precision format

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3.24 – Floating Point Double Representation

Write down the binary representation of the decimal number 63.25

assuming the IEEE 754 double precision format

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3.27 – Floating Point Half Precision

IEEE754-2008 contains a half precision that is only 15 bits wide.

The leftmost bit is still the sign bit, the exponent is 5 bits wide

and has a bias of 15, and the mantissa is 10 bits long. A hidden 1

is assumed. Write down the bit pattern to represent

−1.5625× 10−1 assuming a version of this format, which uses an

excess-16 format to store the exponent. Comment on how the

range and accuracy of this 16-bit floating point compares to the

single precision IEEE-754 standard

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3.29 – Floating Point Half Precision Arithmetic

Calculate the sum of 2.6125× 101 and 4.150390625× 10−1 by

hand, assuming A and B are stored in the 16-bit half precision

described in exercise 3.27. Assume 1 guard, 1 round bit, 1 sticky

bit, and round to the nearest even. Show all the steps

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3.29 – Floating Point Half Precision Arithmetic

First, get binary representation and align binary points

2.6125× 101 = 26.125

11010.001000 = 26.125

1.1010001000× 24

4.150390625× 10−1 = 0.4150390625

0.0110101001 = 0.4150390625

1.1010100100× 2−2

Must shift second value left 6 bits to align

Mantissa G R S

1.1010001000 0 0 0000

+ 0.0000011010 1 0 0100 = 1 sticky

==================================

1.1010100010 1 0 1 == G + R + S > 0.5 LSB, round up

1.1010100011 x 2^4

S = 0, E = 4+15 = 19, M = 1010100011

Actual value, 011010.100011 = 26.546875, error of -0.0068359375 19