Assembly language intro

8/12/2019 Assembly language intro

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Top Level View of Computer

Function and Interconnection


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Von Newmann architecture

It is based on three key concepts:

Data and instructions are stored in a single

read-write memory.

The contents of this memory are addressable

by location, without regard to the type of data

contained there.

Execution occurs in a sequential fashion fromone instruction to the next.


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Hardw ired program:

A set of basic logic components can be

combined in a way to perform arithmetic andlogical operations on the data

(e.g. a configuration of logic components can

be designed to do specific calculation. The process of connecting these components

produce a program in the form of hardware

ResultsData Sequece ofarithmetic and

logic functions

Programming in hardwired


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Software Program

Software: Instead of

rewiring the hardware for

each new program, all we

need to do is

provide a new sequence of

codes.

Each code is, in effect, an

instruction, and

part of the hardware

interprets each instruction

and generates control

signals.

Results

Instruction

codesInstruction

Interpreter

Programming in software

General-purpose

aritmetic and logic

functions

Data

Controlsignals


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Programming in software: CPU

Components

So, we can say, the CPU consists of

1. an instruction interpreter

2. a module for general purpose arithmetic and

logic functions

Other components are needed


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Programming in software: CPU

Components

I/O component for accepting data and

instruction in some form and converting

them into an internal form of signals usable

by the system, and for reporting results inthe form of an output module.

Memory module (main memory) is a place

where to store temporarily both data and

instructions


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Computer Component: Top Level View

CPU exchanges data withmemory using MBR fordata & MAR for addresses.

I/O AR specifies aparticular I/O device, andthe I/O BR is used toexchange data bwn an I/Omodule and the CPU

A Memory module consistsof locations addressable bynumbers.

I/O module transfers data

from external devices toCPU and memory, and viceversa.


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Computer Basic Function

The basic function performed by a

computer is execution of a program, which

consists of a set of instructions stored in

memory.

The instruction is in the form of a binary

code that specifies what action the CPU is

to take. Instruction processing consists oftwo steps:


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Fetch/Execute Cycle

Instruction fetching and

Instruction execution


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Fetch cycle

Fetch cycle

Program Counter (PC) holds address of next

instruction to fetch

Processor fetches instruction from memorylocation pointed to by PC

Increment PC (Unless told otherwise (branch))

Instruction loaded into Instruction Register (IR)

Processor interprets instruction and performsrequired actions (see execute cycle below)


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Execute Cycle

Execute Cycle

Processor-memory (data transfer between CPU

and main memory)

Processor I/O (Data transfer between CPU and I/Omodule)

Data processing (Some arithmetic or logical

operation on data)

Control Alteration of sequence of operations (e.g. jump)

Combination of above


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Example of Program Execution

Consider a machine with the following

characteristics:

Instruction format

Integer format

The CPU contains an accumulator (AC) to temporarily store data

The notation used is hexadecimal (each digit represents 4 bits)


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Example of Program Execution

(cont.)

Program fragment:LOAD 940

ADD 941

STORE 941


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Instruction Cycle state diagram iac: determines the address of the next instruction to be

executed

if: fetch (read) instruction from memory location into the

processor


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Instruction Cycle state diagram

iod: decode (analyze) instruction to determine type of

operation to be performed and operand/s to be used

oac: (operand address calculation) determine the

address of the operand (in memory or I/O) if the

instruction has a reference to an operand.

of: fetch the operand from memory or read it in from I/O

do: (data Operation) perform the operation indicated in

the instruction

os(operand store): Write the result into memory or out

to I/O


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Notice that: The upper part of the diagram involve dataexchanging bwn the CPU and either the memory or an

I/O module, while

the lower part involve only internal processor operations


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Interrupts

Example:

Without interrupts, the processor will set idle

after each write operation until the printer is

catching up.

The length of the pause may be in order ofthousands of instructions cycles that dont

involve memory. It is wasteful!


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Interrupts

Classes of interrupts

1. Program: Generated by some condition that

occurs as a result of an instruction

execution, such as arithmetic overflow,

divide by zero, illegal memory use.

2. Timer: Generated by a timer within theprocessor. It allows the OS to perform

certain functions on a regular basis.


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Interrupts

Classes of interrupts

3. I/O: Generated by an I/O controller, to signal

normal completion of an operation or to

signal a variety of error conditions.

4. Hardware failure: Generated by a failuresuch as power failure or mem parity error.


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Interrupts


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Interrupts

a) No interrupts

User program performs a series of WRITE

calls. code segments 1,2, and 3 dont involve

I/O

The WRITE calls are to an I/O program that is

a system utility that performs the actual I/O

operation. The I/O program consists of the following:


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Interrupts

a) No interrupts A sequence of instructions to prepare for the actual

I/O operation (e.g. copy data to buffer, preparing

the parameters for device command). code 4

The actual I/O command: once this command is

issued, the program will wait until the I/O device isfinished if we dont use interrupts.

A sequence of instructions to complete the

operation. This may include setting flags indicating

the success or failure of the operation. code 5.

The user program stopped at the write operation

for some period of time


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Interrupts

b) Interrupts, short I/O wait

with interrupts, the cpu can be engaged in

executing other instructions while an I/O

operation is in progress. When the users program executes write call

The I/O program is invoked, and the preparation

commands are executed

then, control returns to the users program, and the

external device is busy accepting data from

memory and printing it.


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Interrupts

b) Interrupts, short I/O wait This I/O operation is conducted concurrently with

the execution of instructions in the user program.

When the external device becomes ready toaccept more data from the processor, the I/O

module for the external device sends an interrupt

request signal to the processor.

The processor suspends execution of the currentprogram, service the interrupt, and go back to

proceed executing the users program

The processor and the OS are responsible for handling the

interrupts


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Interrupts: Instruction cycle with interrupts


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Interrupts

If an interrupt is pending, the processor does the

following:

1. It suspends the execution of the current program and

saves its context (saves the address of the next

instruction to be executed).

2. It sets the program counter to the starting address of

an interrupt handler routine (part of the OS), and

fetches the instructions of the interrupt handler for

execution

3. When the interrupt handler routine is completed, the

processor can resumes execution of the users

program.


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gain in efficiency with short I/O wait


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Interrupts

c) Interrupts, long I/O wait

The idea is to show long time execution by an

I/O (e.g printer) so, the users program makes

another write call before the first write call iscompleted. What will happen?

The user program is hung at this point.

when the preceding I/O operation iscompleted, the new write call may be

proceed, and a new I/O operation may be

started


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The figure shows that there is still a gain in efficiency


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The revised instruction cycle state diagram

that includes interrupt cycle processing


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Interrupts

Multiple interrupts

Example:

A program may be receiving data from a

communication line and printing results. So,

the printer will generates an interrupt every

time that it completes a print operation, and

the communication line controller willgenerate an interrupt every time a unit of data

arrives.


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Interrupts

It is possible for a communication interrupt

to occur while a printer interrupt is being

processed. So what will happen:

Two approaches:

Disable interrupts

Define priorities


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Interrupts

Disable interrupts

Processor will ignore further interrupts whilst

processing one interrupt

Interrupts remain pending and are checked

after first interrupt has been processed

Interrupts are handled in sequence as theyoccur


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Interrupts: sequential interrupt

processing


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Interrupts

Define priorities

Low priority interrupts can be interrupted by

higher priority interrupts

When higher priority interrupt has been

processed, processor returns to previousinterrupt


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Interrupts: nested interrupts

processing


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Interrupts: Example

Time Sequence of Multiple Interrupts (Example)

increasing priority: printer (t=10), disk (t=20),

communication line (t=15)

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