Architecture for Dvr
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Transcript of Architecture for Dvr
8/3/2019 Architecture for Dvr
http://slidepdf.com/reader/full/architecture-for-dvr 1/2
TUAM 3.4
ARCHITECTURE FOR A DIGITAL VIDEO RECORDERStephen J. Solari
icompression , Inc.Santa Clara, C alifornia
ABSTRACT
The continuously declining price of the hard disk drive
presents the opportunity or digital disk-based systems to
displace tape- and analog-based systems for consumers’
video storage needs by the end of the decade. This paper
discusses the requirements of such a system and an
integrated circuit designed to help these products reach
an aggressive price target.
INTRODUCTION
A Digital Video Recorder employing a hard disk drivehas several advantages over a conventional VCR,including higher fidelity, random access, and the abilityto record and play simultaneously, which enables “pause
management.” Until recently, such a system wasprohibitively expensive. Reductions in integrated circuitand disk drive costs have m ade this a feasible product.
DISCUSSION OF DVR FEATURES
EncoderA fundamental question is whether an encoder, or
comp ressor, is required at all. All-digita l satellitereceivers equipped with hard drives offer the time shift
capability today without the need for an embeddedencoder. However, the desirability of providing theconsumer with a consistent experience regardless of thesource has led most manufacturers to include an encoder.Even in an all-digital box, some see the need to transcode
from HD TV or SDTV to a lower bit rate to optimize diskutilization.
Compression Method
Since some DVR s are closed systems with analog audioand video in and out, one could imagine that acompression scheme other than MPEG2 could beemployed. Such a method may even have advantages to
MPEG at low bit rates (the digital equivalent of VCRextended play). However, no proposal offers anadvantage clear enough to consider departing from awidely deployed international standard, especially incontemplation of open systems and home networks in thefuture.
Data Format
There is not an obvious choice for which MPEG2 dataformat to store on the disk. Transport Stream meritsconsideration because it is widely used in cable andsatellite transmission. However, being designed forbroadband media distribution, it does not lend itself to
efficient storage on a hard drive. Program Stream isbetter suited to storage requirements. Some systemshandle audio and video inde penden tly by usingPacketized Elementary Stream.
Processor and OS for System Control
These areas are opportunities for a manufacturer todifferentiate its product. A variety of embedded
microprocessors are available at different price andperformance points.
PC IPCI may appear to be overly expensive for a consumerproduct, but the following factors serve to mitigate theseconcern s. First of all, because it is found in nearly everypersonal computer, PCI enjoys considerable economies
of scale. Second, the PCI bus can replace severaldifferent buses inside the DVR, each of which mayrequire dedicated logic and memory. Lastly, the PCI busallows hardware configurations to be easily modified.Interfaces such as modem s, IEEE 1394 connections, andso on can be ad ded or removed, providing flexibility and
Drive
MPEG-2Video
Audio
Encoder
PC I Bus
1 Audio Out
W Iquick time-to-market, which is key in this emergingmarket.
320-7803-6301-9/00 $10.00 0 2000 E E E
8/3/2019 Architecture for Dvr
http://slidepdf.com/reader/full/architecture-for-dvr 2/2
Figure 1. Block diagram of a PCI-based Digital Video
Recorder. The integrated circuit featu red in this
presentation incorporates th eJive blocks highlighted inbold.
Video ProcessingThere are considerable differences between thecircumstances of encoding a source for, say, a DVDmaster and encoding a source in a time-shift scenario.Some of these are highlighted in Table 1.
Home Studio
Possible noise, snow, "Perfect" sourceghosting, ringing, strange
field sequences
Low data rate: 1.4-4Mbls
Human intervention
Realtime
Hardware very
undesirable
cost-sensitive:$300
Table I . Comparison
High data rate: 3-9.8Mbls
Human interventiondesirable
Non-realtime
Hardware notcost-sensitive:$30,000
of requirements for MPEGrecording in a production studio vs. a typical home.
THE DVR INTEGRATED C IRCUIT
In consideration of the above, an IC has been developedwhich incorporates most of the common digital circuitryfor a DVR. The chip consolidates mem ory requirementsinto two subsystems, each composed of 8MB ofSDRA M. One memory chip is used for audio, video,and system level encoding and the other is used fordecoding and graphics generation and control.
Video Input
A number of techniques, including adaptive temporalrecursive noise reduction, nonlinear spatial noisereduction, spatial bandwidth control, a nd inverse telecine
are employed to improve the quality of recordings made
from real-world television signals.
Feedback
I
Figure 2. Block diagram of a chip fo r Digital Video
Recorders
EncoderTo support the widest range of applications, the encodercan generate Transport Stream, Program Stream,
Elementary Stream, or Packetized Elementary Stream.MP EG l System Stream is also supported. T he encoder'ssearch range of 296 by 184 pixels provides excellentresults even with scenes with high motion content suchas sports. Motion vector smoothing eliminates acomm on MPEG artifact. The chip handles all timestamp and synchronization issues, greatly simplifying
system design.
Video Decoder
The decoder handles all MPEGl and MPEG2 streamformats and can decode DV streams. This allows for DVto be transcoded to MPEG2, which dramatically reducesbit rate without sacrificing quality.
Audio Encode and DecodeThe chip supports two-channel Dolby AC-3 as well as
MPEG-1 Layer 1 and 2 at sample rates of 32, 44.1, and48kHz. It accepts 1's and non-1% input and output. It
also supports SP/DIF output.
On Screen D isplayThe OSD supports a variety of pixel formats, including8- and 16-bit indexed color and 16- and 32-bit ARGB . Aflicker filter is employed to reduce artifacts resultingfrom an interlaced display. A bitBLT acceleratorfacilitates the use of bit-mapped graphics and fonts tocreate an interactive experience.
Interface
MPEG data can be input or output through PCI master orslave. Data and control information can be sent over PCIeither as master or slave, or separate 8-bit parallel portscan be used for compressed data and control.
CONCLUSION
An integrated circuit has been developed for Digital
Video Recorders. It provides the benefits that we'vecome to expect from integration-high performance,lower system cost, and a sim plified design effort.
REFERENCES
S.J. Solari, Digital Video and Audio Compression,
McGraw-Hill, 1997 pp. 6-7
FeedbackloVideo In
FIFO n vas0out
SDRAMControllerMPEG? In(AVI)
Audio In SPDlF
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