Apollo

How Disruptive Technology Has

Redefined 'Low Power MCU'

January 2015

Revolutionary Advances in Ultra-Low Power

• Ambiq Micro is introducing the Apollo family of microcontrollers

• Redefining ‘low power’ with up to 10x reduction in energy consumption

• Core technology based on innovative subthreshold voltage operation

Subthreshold Power Optimized Technology (“SPOT”)

3

Subthreshold operation can reduce energy usage by up to 13X

Energy (E) consumed is directly proportional to the square of the voltage (V) used:

E ~ V2

1.8 V

0.5 V

Voltage

Time

0 0 0

1 1

EN

ER

GY

EN

ER

GY

Conventional Semiconductors

1.8 V

0.5 V

Voltage

Time

0 0 0

1 1

EN

ER

GY

EN

ER

GY

Ambiq’s SPOT approach

Threshold

Voltage

ENERGY SAVINGS

Proven Technology

• Uses standard, mainstream CMOS manufacturing process

• Proven over 8 years of development

• Extreme low power real-time clock (RTC) in production today

2005 2006 2007 2009 2010

processor

memory

244m

305m

122m

181m

processor

memory

244m

305m

122m

181m

253 µm

IMEM IMEM

DMEM DMEM

CORECORE

715 µm

Proc CProc A

IMEM

CORE

DMEM

Proc B

253 µm

98 µm

2013 2014

RTC MCU

Introducing the Revolutionary Apollo MCU

Active Mode

30µA/MHz

Sleep Mode

100nA

High Performance

Cortex-M4F core

Apollo MCUs deliver unrivaled combination of power and performance

• Ambiq’s technology optimizes both active and sleep mode power

• ARM CortexTM-M4F core at power levels below competing M0+ solutions

Competitive Comparison: ARM Cortex-M4F

Ambiq STMicro

Device Apollo STM32F401

Core Cortex-M4F Cortex-M4F

Max VDD 3.8V 3.6V

Active Mode

840uA

@ 24Mhz

35 uA/MHz

7100uA

@ 20 MHz1,2

355 uA/MHz

Sleep Mode 100nA 2800nA

Conditions:

a. CoreMark algorithm unless otherwise noted

b. Run from Flash (not SRAM) at 3.3V

c. Peripherals disabled

d. Power reduction techniques allowed as noted

e. Typical numbers

f. Sleep mode numbers assume timers are ON and

no memory is retained

Notes:

1. “Measurements performed with a reduced code that

gives a consumption equivalent to CoreMark code”

2. STMicro’s adaptive real-time accelerator (ART)

power reduction technique enabled

Ambiq Atmel

Device Apollo SAM4L

Core Cortex-M4F Cortex-M41

Max VDD 3.8V 3.6V

Active Mode840uA

@ 24Mhz

35 uA/MHz

186 uA/MHz

@ 36 MHz2

100 uA/MHz

@ 12 MHz3

Sleep Mode 100nA 1500nA4

10x better

28x better

5.3x better

15x better

Conditions:

a. CoreMark algorithm

b. Run from Flash (not SRAM) at 3.3V

c. Peripherals disabled

d. Typical numbers

Notes:

1. Atmel’s SAM4L devices DO NOT include the floating point unit

2. Best-case values using all power scaling methods (24MHz not listed)

3. Best-case values using all power scaling methods (24MHz not listed)

4. Uses Atmel’s lowest-power “BACKUP” mode with 1KHz clock running

3x better

Competitive Comparison: ARM Cortex-M0+

Ambiq Atmel

Device Apollo SAM D20

Core Cortex-M4F Cortex-M0+

Max VDD 3.8V 3.6V

Active Mode

840uA

@ 24Mhz

35 uA/MHz

2374uA

@ 24 MHz

99 uA/MHz

Sleep Mode 100nA 3800nA

Conditions:

a. CoreMark algorithm

b. Run from Flash (not SRAM) at 3.3V

c. Peripherals disabled

d. Typical numbers

e. Sleep mode numbers assume timers are ON and

no memory is retained

Ambiq Silicon Labs

Device Apollo EFM32 “Zero”

Core Cortex-M4F Cortex-M0+

Max VDD 3.8V 3.8V

Active Mode

840uA

@ 24Mhz

35 uA/MHz

2760uA

@ 24 MHz1

115 uA/MHz

Sleep Mode 100nA 900nA2

2.8x better

38x better

3.3x better

9x better

Conditions:

a. CoreMark algorithm unless otherwise noted

b. Run from Flash (not SRAM) at 3.3X

c. Peripherals disabled

d. Typical numbers

e. Sleep mode numbers assume timers are ON and

no memory is retained unless otherwise noted

Notes:

1. Silicon Labs does not publish CoreMark numbers in its datasheet –

only prime number calculations are given (this is misleading since

CoreMark performs a larger variety of tasks)

2. Uses EM2 “Deep Sleep Mode” with timers on

Bringing Apollo to Wearable & IoT Devices

• Wearables & IoT a key focus for Ambiq’s product family

• Great proxy for all applications requiring low power

• Extreme low power + high performance Cortex M4F core ideally suited

to the emerging needs of these devices:

– “Always on” sensors

– Real context detection

– Sensor hubs

Apollo MCUs Enable New Possibilities

• Extend life from hours / weeks to months / years

• Application can be in active mode and/or sleep

mode as much as needed both are optimized

Longer battery

life

More

functionality

More design

options

• Expanded power budget can be used to reduce

the size and/or number of batteries

• Enables creative design and packaging options

• Expanded power budget can be used to add new

features

• Enables more appealing end products

IMAGINEthe possibilities

Ambiq Micro

Apollo

MCU

Host

Processor

(optional)

RadioSensor

#1

Sensor

#2

Sensor

#3

SPI / I2C Master, UART

SPI / I2C

Slave

Port

System Diagram Example

Bluetooth

802.15.4

Wi-Fi

Sub-GHz

Accelerometer, Magnetometer, Gyroscope, Optical,

Pressure, Microphone, Temperature, etc.

Family Summary

Flash RAM Features Packages

Apollo-512 512K 64K

ARM Cortex M4F

24MHz

10-bit, 13-channel, 1MS/s ADC

±2ºC temperature sensor

Low leakage comparator

SPI master x 8

I2C master x 2

SPI / I2C slave

UART

RTC, LFRC, HFRC, XTAL

Timers x 8

1.8V to 3.8V

-40ºC to 85ºC

64-pin BGA

50 GPIO

4.5 x 4.5mm

and

42-pin CSP

27 GPIO

2.4 x 2.77mm

Apollo-256 256K 32K

Apollo-128 128K 32K

Apollo-64 64K 16K

Apollo MCU Status and Pricing

Sampling now to key partners

Production in spring 2015

10K prices starting at $1.50

Summary

Ambiq delivers revolutionary advances in energy consumption

Reduce or eliminate

need for batteries

Lower overall

system power

Maximize design

options

Backup

Company Background

• Founded in 2010

• Based on research performed at Univ. of Michigan from 2005-2010

• Investors include Kleiner Perkins, Austin Ventures, ARM Holdings

Measured Apollo Power Numbers

3.8V 3.3V Conditions

CoreMark32

µA/MHz

35

µA/MHz

Typical silicon

25ºC

Integer Math29

µA/MHz

33

µA/MHz

Sleep

with no RAM

retained

100

nA

100

nA

Sleep

with RAM

retained

130

nA

130

nA

AC

TIV

E M

OD

ES

LE

EP

MO

DE