Andreas Radermacher - Arctic Roost
Transcript of Andreas Radermacher - Arctic Roost
Copyright © 2016. Unpublished Work. Raytheon Company.
Advances in Digital Receiver Technology
Andreas RadermacherFebruary 2017
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Copyright © 2016. Unpublished Work. Raytheon Company.
Goals
6/8/2017 2
Design and Develop a Digital Receiver for use from 0.5 – 40 GHz
Allow Signal Analysis in Frequency and in Time Domain
Maintain Signal Integrity at all Phases of Analysis
Allow for Modularity (1 to X Channels)
Provide easy Upgrade Path for Product Enhancements –
‘Software Defined Receiver’
Support Scalable Design for Airborne, Naval and Ground Applications
Use of COTS hardware wherever possible
Minimize Cost of Ownership – One System / Multiple Platforms
Keep all resulting products free from ITAR constraints
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ARDS Mission
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• Small, lightweight, compact design
• Two sided system fits into a Pod
that can be carried under a UAV
fuselage or under the wings
• Total Weight (two sided) : 150 kg
• Total Power : 28V, 2 x 1kW
• Initial Platform : GA Predator
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ARDS Mission
• System is well suited for long range,
long endurance reconnaissance
missions
• System will create, modify or update
Electronic Order of Battle (EOB)
information
• Precise location and identification of
emitters
1-26GHz, optional .5-40GHz
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ARDS Mission
• High sensitivity over entire frequency
range allows detection of most sensors
that are above the radar horizon
• Flexible, upgradable algorithms allow
precise measurement of emitter specific
parameters
• Fast detection of blinking emitters
• Tracking of emitters over time
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ARDS Mission
• Detection of radars at distances that
allow precise analysis and location of
the radar while still too far away for the
reflected radar signal to travel back to
the emitter
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ARDS Mission
• ARDS is truly passive, no emissions
from sensor
• Very high sensitivity over entire
frequency range allows long range
reconnaissance
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ARDS Mission
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Block Diagram
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Level
FPGA-Controller
Down-conversion
Down-conversion
Down-conversion
Down-conversion
FSR - AGCAmplifier
Down-conversion
LocalSynthesizer
RFswitch
FSR - AGCAmplifier
FSR - AGCAmplifier
RFswitch
FSR - AGCAmplifier
FSR - AGCAmplifier
Up-conversion
RFswitch
RFswitch
RFswitch
BIT
BIT
BIT
BIT
BIT
LO
BIT
ADC
FPGA
Activity & DFSignal Process.
FPGA
PDW Assembling
BIT
BIT
Processor CCAOctal Core
- Command / Control- Site Reports- Nav data
A/C Interfaces
- EIA-422- Ethernet- other
BIT
SSD
FPGA
Activity & DFSignal Process.
BIT
FPGA
Activity & DFSignal Process.
BIT
ADC
ADC
ADC
ADC
ADC
DAC
Controllerand
EEPROM
Limiter
Limiter
Limiter
Limiter
Limiter
High speed serial interfaceControl
LRU1: Antenna Array LRU2: Frequency Conversion / Full Scale Range Amp LRU3: Analysis Receiver Processor
/6
+
+
+
+
+
Gain
Control
/5
BIT/CAL
CH5
CH4
CH3
CH2
CH1
BIT/CAL
CH5
CH4
CH3
CH2
CH1
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Hardware Elements
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FSRA Output
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• Stage 1 No input signal (noise)
• Maximum amplification
• Stage 2 Strong input signal
• Amplifier chain in compression
• Stage 3 FSR adjusted output
• Constant output for ADC
• Signal integrity ensured
• Stage 4 No input signal (noise)
1 432
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LRU3 – Digital Receiver/Processor
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• Sample Rate 3 GS/s
• ADC 12 Bit
• SFDR 52 dB min
• FPGA Virtex 7
• External Interface Custom for Platform
• DAC Output For BIT / CAL
• Processor P4080 (Octal Core)
• OS VxWorks 6.8
• Removable SSD SATA
• IF Input 6 Channel
• IF Bandwidth 1 GHz
• Firmware Encrypted
LRU3 – Digital Receiver/Processor
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Hardware Elements
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Firmware Building Blocks
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Software Building Blocks
PDWsReceiver
Frontend
Dwell
Scheduler
Dwell Setup
Pulse Report
DeinterleavingIdentification Tracking Ranging
System
Association
Beams Beams Beams Beams
Report
Sites / Beams
Library
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Digital Receiver Performance
Frequency Coverage : UHF to Ku (optional Ka)
Frequency Accuracy: < 100 kHz (Pulse) improves rapidly with stronger signal
< 10 kHz (CW) improves rapidly with stronger signal
Frequency Resolution: 100 Hz or lower
Instantaneous Bandwidth: 1 GHz
Signal Processing : Up to 4 signals simultaneously
Sensitivity: Minimal -84 dBm (for instantaneous bandwidth 1GHz)
Pulse Density: 500.000 Pulse/sec min.
Pulse Width and TOA Resolution: 10 ns
DF Accuracy: < 0.5° (depending on Antenna Array and Signal)
Other Features:
Chirp Processing 500 MHz/µs
Barker Code Detection 7, 11 and 13 bit (extendable for general PSK)
Additional: QAM, Rise / Fall Time
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Backup
Copyright © 2016. Unpublished Work. Raytheon Company.
Who we are
Raytheon Deutschland GmbH
50 dedicated employees, 600+ man years of EW experience
Design Authority for the ECR Tornado’s Emitter Location System (ELS)
Hardware Repair, Maintenance & Logistics for Luftwaffe and
Italian Air Force
Software development for ELS, digital ELS and ARDS
Threat library support
Operational Experience
6/8/2017 20
One Stop EW Support – HW, SW, Library Development, Built & Test
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What we do
6/8/2017 21
Digital Receiver Development– Hardware, Firmware,
– Algorithms
– Application Software
– Integration & Test
– Flight Test Support
– Training
Threat Library Support– Library Generation and Verification
– In-House Testing & Flight Test Support
One Stop EW Support – HW, SW, Library Development, Built & Test, Training
Copyright © 2016. Unpublished Work. Raytheon Company.
Background
6/8/2017 22
Design Authority for German Air Force ECR Tornado Emitter Location System.
Designed, Developed and Built a Digital Receiver to replace the analog ECR ELS
– free of ITAR constraints !