Analytical Modeling of RF Noise in MOSFETs – A Review S. Asgaran and M. Jamal Deen Electrical and...

Analytical Modeling of Analytical Modeling of RF Noise in MOSFETs – RF Noise in MOSFETs –

A ReviewA Review

S. Asgaran and M. Jamal Deen

Electrical and Computer Engineering, CRL 226

McMaster University, Hamilton, ON L8S 4K1, Canada [email protected]

mailto:[email protected]

2

RF Performance of MOSFETs

● DUTs are fabricated in 0.18m CMOS technology and measured at VDS = 1V

● Maximum fT is around 50 GHz and the best NFmin is about 0.5 dB at 2 GHz

3

Noise in MOSFETsNoise in MOSFETs

time

frequency

channel

IDS

noise

1/f noise

white noise

Io

Io

+

_VG

+

_VD

Drain

Gate

Source

Substrate (Body)

LW

lateral fieldE

VD

gDS(x)v(x)

e-

n+ n+

p-substrate

VG

Source Drain

Gate

channel no ise

FT

induced gate noise

4

Why Does Noise MatterWhy Does Noise Matter

The battery life time and the distance between the wireless components will be limited by the noise floor of the front-end amplifier.

distancedistance

-70

-60

-50

-40

-30

-20

-10

0

10

-80 -60 - 40 -20 0 20P in (dB)

Pout

(dB)

noise floor

ideal amplifier

dynamicrange

saturation

Burn out

D is tan ce

P ow e r

Pin2Pin1

5

OutlineOutline

●Introduction

●Noise sources

●RF MOSFET noise models: long and short channel – only explicit analytical models are discussed

●Induced gate noise

●Applications of models to design

●Conclusions

6

IntroductionIntroduction

●Why CMOS for RF?

►Low cost

►High integration

►Integration with digital IC (SoC)

►Technology advancement

♦ higher frequencies

J.C. Rudell, J-J. Ou, T.B. Cho, G. Chien, F. Brianti, J.A. Weldon, P.R. Gray, A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications IEEE Journal of Solid-State Circuits, Vol. 32, pp. 2071-2088, Dec. 1997

7

Noise Sources in MOSFETNoise Sources in MOSFET

● SiD: Channel noise + flicker noise

●SiG: Induced gate noise

● SiR: Thermal noise of real resistances

RDRS

RG

RSB RDB SiRDBSiRSB

SiRDSB

RDSBCBDCBS

RDS

SiD SiRDSiRS

Ims

ImCGD

CGSCGB SiG

SvRG

G

S

B B

D

C. Enz, An MOS transistor model for RF IC design valid in all regions of operation IEEE Trans. Microwave Theory Tech., Vol. 50, pp. 342-359, Jan. 2002.

A.J. Scholten et al, Noise modeling for RF CMOS circuit simulation, IEEE Trans. Electron Devices, Vol. 50, pp. 618- 632, Mar. 2003.

L=0.18 m, f=3 GHz

88%88%

0.250.25m technologym technology

SSiDiD ~ L ~ Lchch-1-1

RRSUBSUB ~20% ~20% total Stotal Sinin

RRGG ~5% total S ~5% total Sinin

elec

V

VelecDI L

dVVgLI

kTS

DS

SB

D

1)(

4 22

~20% discrepancy for 0.18~20% discrepancy for 0.18m, low fm, low fSSiDiD increases with f in 2 increases with f in 2m FETm FET

No dependence on VNo dependence on VDS DS in saturationin saturation

Jamal

8

Noise Models- Long Channel CaseNoise Models- Long Channel Case

●Klaassen-Prins:

►Integrating the noise current over the entire channel

●Van der ziel:

►Includes hot electron effects

►Te: a function of E(x)

●Tsividis:

►Simpler model

DSV

DiD dVVg

IL

kTS

0 002

2)(

4

DSVe

DiD dVVg

T

xT

IL

kTS

0 002

2)(

)(4

inviD QL

kTS

2

4

9

Noise Models - Short ChannelNoise Models - Short Channel

● Increased noise in short channel devices

●A divided channel is used►Linear region (GCA)

►Velocity saturation region; thermal assumption questionable

G

S D

Leff,VDS

(II)

Lsat,VDSat L

(I)

P. Klein, An analytical thermal noise model of deep submicron MOSFET’s, IEEE Electron Dev. Letters, Vol. 20, pp. 399-401, Aug. 1998.

L

Iqv

L

QkTS DS

esatIeff

iD

3

84

2

0 2 4 6 8 10 120

4

8

12

16

20

Channel Length (m)

iD (Amp/Hz1/2)

VVGSGS=0.7, 0.9, 1.1, 1.3, 1.9V=0.7, 0.9, 1.1, 1.3, 1.9V

VVDSDS=2.5V=2.5V

vvsatsat~10~1077cm/scm/s

~4.3ps~4.3ps

SSIDID ~ indep. of V ~ indep. of VDSDS

10

RF MOSFET Noise ModelsRF MOSFET Noise Models

212

VVDSiD SSgS

Triantis et al

● is

questionable! gDS is not

constant

● Te: in both parts of the

channel

● thermal noise source in vel. sat. region: questionable! rD is

an ac resistance

● Old measurements (Abidi, ‘86) used

● SID ~ indep. of VDS (< 1.5x)

D.P. Triantis, A.N. Birbas and D. Kondis, Thermal noise modeling for short-channnel MOSFET’s, IEEE Trans. Electron Devices, Vol. 43, no. 11, pp.1950-1955, Nov. 1996.

DIID IxxEr /)(

1 2 3 4 5 6010-24

10-23

10-22

10-21

Region II noise

Region I noise

Total noise

VGS (V)

Drain Current Noise (Amp2/Hz)

VVDSDS=4V=4V

Measurement

W=30W=30m; L=0.7m; L=0.7mm

Note: Region II noise increases with Note: Region II noise increases with VVGS; GS; device is less saturateddevice is less saturated

Note: Calculations > measurementsNote: Calculations > measurements

11

RF MOSFET Noise ModelsRF MOSFET Noise ModelsPark and Park

● Mobility degradation due to channel field absent

● Carrier temperature, Te,

used to model hot carrier effects

● Noise of VS region: intrinsic diffusion noise

● SiD=g2DS×(SvI+SvII) -

questionable!

● Measurements (Abidi, ‘86)

● Temp:

● for EC=2-4V/m

33222

2

2

2232

3

4)/(cosh

)(

42

satsjs

Dsat

CGT

GTCGTC

D

cDSiD

LvxW

qDIlL

VV

VVVV

I

kTVgS

C.H. Park and Y.J. Park, Modeling of thermal noise in short-channel MOSFETs at saturation, Solid-State Electronics, Vol. 44, pp. 2053-2057, 2000.

VGS (V)1 2 3 4 5

10-24

10-23

10-22

10-21

Region II noiseTriantis

Region I noisePark & Park

Total noise - TriantisPark & Park

Drain Current Noise (Amp2/Hz)VVDSDS=4V=4V

Measurement

Region I noiseTriantis

Region II noisePark & Park

2

)(1)(

Coe E

xETxT

12


Knoblinger et al ● Te: in both parts of channel

● Te:

● eff=v(x)/E(x) in both parts

of the channel: wrong!

)sinh(1

2

4

)1arctan()exp(arctan2

2

4

224

24

L

cEL

DkTI

LEcL

DkTI

DSVEL

DkTIinvQeff

L

kTiDS

c

G. Knoblinger, P. Klein & H. Tiebout, A new model for thermal channel noise of deep-submicron MOSFETs and its application in RF-CMOS design , IEEE J. Solid-State Cir., vol. 36, pp. 831-7, May 2001.

2

2

( )e

c

E xT T T

E

~1.0 and noise from region Ia ~1.0 and noise from region Ia (T=lattice temperature) gave (T=lattice temperature) gave better fit to data at Vbetter fit to data at VGSGS>1.5V>1.5V

S D

Leff,VDS

(II)

Lsat,VDSatL

(I)

G

13


Scholten et al

●CLM not taken into account

Te is not needed!

DSatV

eD

iD dVVgxkTIL

S0

22

)()(41

pp

C

eff

E

E1

1

n

Ce E

ETT

1

A.J. Scholten et al, Accurate thermal noise model for deep-submicron CMOS, IEDM Tech. Digest, pp. 155-158, 1999.

14


Chen & Deen ●Channel length

modulation (CLM) is accounted for

●=0 in experiments►no Te needed

●No noise from VS region

DSatCelec

Dinv

elec

effiD V

EL

kTIQ

L

kTS

222

44

C.H. Chen and M.J. Deen, Channel noise Channel noise

modeling of deep submicron MOSFETs, modeling of deep submicron MOSFETs, IEEE Trans. Electron Devices, vol. 49, pp. 1484-1487, Aug. 2002.

15

RF MOSFET NoiseRF MOSFET Noise ModelsModelsScholten et al

●Modified Klaassen-Prins

●Takes into account CLM

●No noise from VS region

●A closed-form solution as a function of surface potential - too complicated! Difficult to provide insight to designers

●Not accurate for short channels at high VGS

A.J. Scholten et al, Noise modeling for RF CMOS circuit simulation, IEEE Trans. Electron Devices, Vol. 50, pp. 618- 632, Mar. 2003.

DSV

DeleciD dVVg

IL

kTS

0 002

2)(

4

eleciD

L

1S

16

RF MOSFET Noise ModelsRF MOSFET Noise ModelsHan et al.

●Considers the channel field effect on mobility

●Starts from impedance field theory

●Uses Einstein equation in MOSFET channel : questionable! MOSFET channel is degenerate in strong inversion

●The result is based on thermal noise theory

dVVg

EL

VIL

kTS

DSV

o

celec

DSDelec

iD

0

22

2

)(

1

4

cEE

1

x

WQfDqi invnn

42

K. Han, H.Shin and K. Lee, Analytical Drain Thermal Noise Current Model Valid for Deep Submicron MOSFETs, IEEE Trans. Electron Devices, vol. 51, pp. 261-269, Feb. 2004.

17


K. Han, H.Shin and K. Lee, Analytical Drain Thermal Noise Current Model Valid for Deep Submicron MOSFETs, IEEE Trans. Electron Devices, vol. 51, pp. 261-269, Feb. 2004.

dVVg

EL

VIL

kTS

DSV

o

celec

DSDelec

iD

0

2

22

)(

1

4

cEE

1

Dashed line Dashed line is without this is without this termterm

18


Analytical Model●Based on simple

analytical drain current expression

● Includes the channel field effect

●Purely analytical (no integration, etc.)

●Suitable for circuit design

satoxD

c

GTGTelec vWC

IVVE

VVVL

0 and

)(

0

0

G

S D

Leff,VDS

(II)

Lelec L

(I)

)(3

244

02

02

02

VVV

VVVVIkTS

GTGT

GTGTDiD

SB

D

VT

dsat

dsatSB

iD

dV

dI

V

V

VkT

dV

dS2

2

3

14

SdsatSBopt VV with

19


B. Wang, J.R. Hellums and C.G. Sodini, MOSFET thermal noise modeling for analog integrated circuits, IEEE JSSC vol. 29, pp. 833-835, July 1994.

inveff

effiD Q

L

kTS

2

4

model

Analytical modelAnalytical model

Analytical modelAnalytical model

20


2

2

)(3

14

GTcc

cc

cc

VLE

LE

LEGTVsatkTWviDS

cL

GTVeffoxkTWCiDS

1

24

●Noise and scaling

●For very short channel devices

21

Induced Gate NoiseInduced Gate Noise●Induced gate noise at x in channel

where

● Induced gate noise ig(xo) is fully correlated with the

channel thermal noise id (xo)

●VDS becomes VDSsat in the saturation mode

1 212 6

12

GS THas D

DSS

GS T

S

DSH

DV V

V

V VV V

V V

(( ( )

( ))

)og o as o

ds

x o

l

o

e ec

g V v xji x V V x

I L

WLC

CCGSGS iidd(x(xoo))

22

SSIGIG and Correlation Noise and Correlation Noise

●MOSFET channel- RC network at high f►Gate capacitance and channel R

●Channel noise coupled to the gate→ SIG, correlation noise

●Frequency dependent

●Negligible as the channel length shrinks

L=0.18 m

L=0.27 m

L=0.42 m

L=0.64 m

L=0.97 m

Frequency (GHz) 1011×10-25

1×10-24

1×10-23

1×10-22

SiG (A2/Hz) Correlation Noise (A2/Hz)

L=0.18 m

L=0.27 m

L=0.42 m

L=0.64 m

L=0.97 m

Frequency (GHz)61

0

2×10-23

4×10-23

6×10-23

8×10-23

2 3 4 5

M.J. Deen, C.H. Chen and Y. Cheng, MOSFET Modeling for Low Noise, RF Circuit Design, Proceedings of IEEE CICC, pp. 201-208, May 2002

23

Choosing Device SizeChoosing Device Size

● Channel length of devices reduced

► Increased gm and peak value of gm occurs at lower VGS values

● The faster increase in gm results in

► Reduced NFmin and the lowest NFmin is shifted to lower VGS values

NFNFminmin

ggm,maxm,max

24

Choosing DC Bias Conditions

● Higher VDS bias will increase gm at the higher VGS region

● Higher gm will decrease NFmin at higher VGS region

● Decreased NFmin at higher VGS makes lowest NFmin less sensitive to VGS

NFNFminmin

ggmm

25

Concluding RemarksConcluding Remarks

●MOSFET channel noise analytical models MOSFET channel noise analytical models discusseddiscussed► Long channel caseLong channel case

► Short channel caseShort channel case

●Some ideas on how to use noise to design Some ideas on how to use noise to design circuitscircuits

●Future applications demand low powerFuture applications demand low power► MOSFET in moderate or weak inversion MOSFET in moderate or weak inversion

► Noise models needed in these regionsNoise models needed in these regions

26

AcknowledgementsAcknowledgements

●Professor C.H. Chen (McMaster University) Professor C.H. Chen (McMaster University)

●Dr. Y. Cheng (Conexant/Skyworks)Dr. Y. Cheng (Conexant/Skyworks)

●Funding - Rockwell/Conexant/Skyworks, USA Funding - Rockwell/Conexant/Skyworks, USA and Gennum, Canadaand Gennum, Canada

●Funding - NSERC of Canada Funding - NSERC of Canada

●Funding - MicronetFunding - Micronet

●Funding - Canada Research Chair ProgramFunding - Canada Research Chair Program

Analytical Modeling of RF Noise in MOSFETs – A Review S. Asgaran and M. Jamal Deen Electrical and...

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