Analysis and Design of a Non-Isolated Bidirectional

ZVS-PWM Active Clamped DC-DC Converter

Pritam Das and Gerry Moschopoulos University of Western Ontario

Department of Electrical and Computer Engineering

Thompson Engineering Building

London, Ontario, Canada, N6A 5B9

E-Mail: pdas2@uwo.ca gmoschopoulos@eng.uwo.ca

Abstract- A new soft-switched bidirectional dc-dc converter is

proposed in the paper. The proposed converter can operate with

soft-switching, a continuous inductor current, fixed switching

frequency, and the switch stresses of a conventional PWM

converter regardless of the direction of power flow. These

features are due to a very simple auxiliary circuit that is

operational regardless of the direction of power flow. In the

paper, the operation and design of the converter are discussed

and its feasibility is confirmed with experimental results

obtained from a prototype.

I. INTRODUCTION

Power electronic converter systems for space, telecom, and

automotive applications can have dc voltage buses that are

backed up with batteries or supercapacitors. They are

connected to the buses with bidirectional dc-dc converters

that allow the batteries to be discharged or charged,

depending on the operating conditions. Bidirectional dc-dc

converters may be isolated [1], [8], [10]-[13] or non-isolated

[2]-[7], [9], [14], [15], depending on the application.

Non-isolated bidirectional dc-dc converters, which will be

the main focus of the paper, are typically based on the

boost/buck converter structure shown in Fig. 1. S1 operates

like a boost switch and S2 operates as a boost diode when

energy is transferred from the low-side source Vlo to the high-

side source Vhi and S1 operates like a buck diode and S2 like a

boost diode when energy is transferred from Vhi to Vlo.

It is not difficult to implement soft-switching in isolated

bidirectional dc-dc converters as they tend to be based on

conventional half-bridge and full-bridge structures that can

use inductive energy stored in the main power transformer to

discharge the capacitance across the converter switches. It is

more challenging to do so for non-isolated converters as there

is no such transformer. Previously proposed techniques to

implement soft-switching in non-isolated bi directional dc-dc

converter can be categorized as follows:

(i) Initial converters of this type [6], [14] were made to

operate with an inductor (Lin) current that flowed in both

directions during each switching cycle. This requires

that both converter switches are on (never

simultaneously) sometime during each cycle so that the

energy stored in the inductor when one switch is on is

used to turn on the other switch with zero-voltage

switching (ZVS) after the switch is turned off. The main

drawback of this technique is that the inductor current

has a lot of ripple with a very high peak as it must flow

in both directions during each switching cycle. This

results in very high turn-off losses that take away from

the improvement in efficiency due to the ZVS turn-on

and additional filtering is needed to reduce voltage

ripple.

(ii) Another approach to implementing soft-switching in a

non-isolated bidirectional dc-dc converter is to use

quasi-resonant or multi-resonant techniques [5], [15].

Doing so, however, results in the converter having high

peak voltage and/or current stresses and forces the

converter to be operated with variable switching

frequency control, which complicates the design of the

converter - especially the design of the magnetic and

filtering elements as the converter must be able to

operates under a wide range of switching frequencies.

(iii) A third approach has been to use auxiliary circuits to

assist the switches to operate with soft-switching [7],

L r1

L in

lo V

S 2

C s1

C s2

L r2

hi V

C r

S 1

S a

Fig. 2. Proposed soft-switched non-isolated dc-dc PWM converter

L in

lo V

S 2

C s2

hi V

C s1 S 1

Fig. 1. Standard boost/buck converter structure for bidirectional dc-dc power

conversion.

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[9], [13]-[15], as is done in zero-voltage transition

(ZVT) and zero-current transition (ZCT) converters.

Although this approach is an improvement over the

other two approaches, it can be costly and complex. This

is because a separate independent auxiliary circuit is

needed for each main power switch so that the converter

must be implemented with four active switches.

A new soft-switched bidirectional dc-dc converter with a

simple active auxiliary circuit will proposed in the paper. The

proposed converter, shown in Fig. 2, is very similar to the

conventional converter in Fig. 1 except that auxiliary switch

Sa, capacitor Cr and inductors Lr1 and Lr2 have been added.

These four components make up a simple active clamp circuit

that can be used to ensure that the main power switches, S1

and S2, operate with ZVS regardless of whether the converter

is operating in a boost or buck mode. The proposed converter

can operate with a continuous inductor current, fixed

switching frequency, and the switch stresses of a conventional

PWM converter regardless of the direction of power flow.

In the paper, the converter's operation will be discussed in

detail and analyzed. A procedure for the design of the

converter will be presented along with results obtained from

an experimental prototype that will confirm the feasibility of

the proposed converter.

II. CONVERTER OPERATION

The modes of converter operation that the proposed

converter goes through when it is operating as a boost or as

buck converter are given below along with equivalent circuit

diagrams in Figs. 3 and 5. Typical converter waveforms for

the boost mode of operation are shown in Fig. 4. It should be

noted that the waveforms in Fig. 4 also describe the buck

mode of operation as the waveforms for both modes are

identical - the waveforms for S1 in the boost mode are the

waveforms of S2 in the buck mode and vice versa.

Referring to Fig. 3 the inductor current ILr1 is positive if it

enters the inductor through its positive terminal. The currents

through switches S1 and S2 are considered positive if they

flow into their respective switches through the drain. The

current through Sa is considered to be positive if it flows from

the source of the switch through its drain. Any current

flowing into the positive terminal of the capacitor Cr is

considered to be positive. Voltage measured from drain to

source is considered as positive for all the switches.

A. Operation in Boost Mode (Fig.3)

The operation of the converter in boost mode is explained

in this section. For boost mode operation, switch S1 is the

main power switch and S2 acts as the freewheeling diode.

Mode 0 (t < t0): Before time t = t0, the converter operates as a

standard PWM boost converter with switch S1 on and the

current ILin through Lin is rising. There is no current in the rest

of the auxiliary circuit during this mode.

Mode 1 (t0 < t < t1): At t = t0, switch S1 is turned off and the

rise in voltage across it is limited by Cs1. The current through

Lr1 charges up Cs1 and begins to flow through Cr. Also during

this mode, input current begins to be diverted to Lr2 and the

capacitance across S2, Cs2, begins to be discharged.

Mode 2 (t1 < t < t2): This mode is a continuation of Mode 1

except that Cs2 is completely discharged at t = t1 and current

flows through the anti-parallel diode across S2. The key

equation that describes this mode is

S2C o in eq eqV = V +I Z sinω t (1)

where

eq

r1 r2 r S1 r1 r2 r

1 1ω = ,

(L +L )(C +C ) (L +L )C≈ (2)

and

r1 r2 r1 r2

eq

r S1 r

(L +L ) (L +L )Z =

(C +C ) C≈ (3)

since Cr >>CS1. At the end of this mode, iLr1 = 0, iLr2 = Iin, VCr

L r1

L in

lo V

S 1

L r1

L in

lo V

C s2

C s1

L r2

hi V

C r S a

L r1

L in

lo V

C s1

L r2

hi V

C r

S 2

S a

L in

lo V

L r2

hi V

S 2

(a) Mode 0 (t < t0) (b) Mode 1 (t0 < t < t1) (c) Mode 2 (t1 < t < t2) (d) Mode 3 (t2 < t < t3)

L r1

L in

lo V

L r2

C r

S 1

S a

L r1

L in

lo V

S 2

C s1

L r2

hi V

L r1

L in

lo V

S 2 L r2

hi V

S 1

L r1

L in

lo V

S 2 L r2

hi V

S 1

(e) Mode 4 (t3 < t < t4) (f) Mode 5 (t4 < t < t5) (g) Mode 6 (t5 < t < t6) (h) Mode 7 (t6 < t < t7)

Fig. 3. Equivalent circuit diagrams for boost mode of operation

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= Vo and the switch voltage rises to a maximum value of

(Vhi+IinZeq).

Mode 3 (t2 < t < t3): At t = t2, current stops flowing through

the auxiliary active clamp circuit and the converter operates

as a standard PWM boost converter. The current through Lin

decreases during this mode, as a negative voltage is impressed

across Lin.

Mode 4 (t3 < t < t4): Some time before switch S1 is to be

turned on, at t = t3, switch Sa is turned on with ZCS. Capacitor

Cr begins to discharge through Lr1 and Lr2, as ILin continues to

decrease. The key equations describing this mode are

Lr1 in eq1i =-I sinω t (4)

1Lr2 in eqi =-I (1+sinω t) (5)

r 1C Cro in eq1 eqV =V -I Z (1-cosω t) (6)

where

eq1

r1 r2 r

1ω =

(L +L )C, (7)

Zeq1 is given by eqn. (3) and VCr0 is the initial voltage across

Cr.

At the end of this mode Lr1 in Lr2 in

i =-I ,i =-2I , where Iin is the

average input current in boost mode.

Mode 5 (t4 < t < t5): Switch Sa is turned off at t = t4. The

current in Lr1 is used to discharge Cs1. The key equations

describing this mode are

Lr1 in eq2i =-I cosω t (8)

Lr2 in eq2i =-I (1+cosω t) (9)

S1C o in eq2 eq2V =V -I Z sinω t (10)

where

eq2

r1 r2 S1

1ω =

(L +L )C

(11)

and

r1 r2

eq2

S1

L +LZ =

C

(12)

At the end of this mode, VS1=VCs1=0.

Mode 6 (t5 < t < t7): At t = t5, capacitor Cs1 has been

completely discharged and the anti-parallel diode across S1

begins to conduct. S1 can be turned on with ZVS while this

diode is conducting.

Mode 7 (t6 < t < t7): Some time after S1 has been turned on, at

t = t6, the current through Lr1 will begin to reverse direction

and the transfer of current from Lr2 to S1 will begin. This

mode of operation will continue until current has been

completely transferred to S1 and the converter enters Mode 0

at t = t7. The key equations that describe this mode of

operation are

o

Lr1

r1 r2

Vi = t

L +L (13)

o

Lr2 in

r1 r2

Vi =I - t

L +L (14)

The duration of this mode is

in

C1 r1 r2

o

It = (L +L )

V (15)

B. Buck Mode of Operation (Fig. 5)

The operation of the converter in the buck mode is

described in this section of the paper. For boost mode

operation, switch S2 is the main power switch and S1 acts as

the freewheeling diode. It should be noted that some of the

equations that describe each of the following modes are

identical to corresponding modes of operation when the

converter is in boost mode. These equations are not presented

in the paper to save space.

Mode 0 (t < t0): Before time t = t0, the converter operates as a

standard PWM buck converter with switch S2 on and the

current through Lin, ILin, rising.

Mode 1 (t0 < t < t1): At t = t0, switch S2 is turned off and the

rise in voltage across it is limited by Cs2. The current through

Lr2 charges up Cs1 and begins to flow through Cr. Also during

this mode, input current begins to be diverted to Lr1 and the

capacitance across S1, Cs1, begins to be discharged.

t0 t1 t2 t3 t4 t5 t6 t7 t0+Tsw

Vgs1 t

Vga t

IS1

t

VS1

t

VS2

t

IS2

ICr

t

VCr

t

ISa

t

VSa t

Fig. 4. Typical converter waveforms for boost mode operation.

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Mode 2 (t1 < t < t2): This mode is a continuation of Mode 1

except that Cs2 is completely charged at t = t1. Some time

during this mode, Cs1 may be completely discharged and/or

current may stop flowing through Cr. At the end of this mode,

r2 r1 rL L o C o eqi =0,i =I ,V =-I Z and the switch voltage rises to a

maximum value of (Vhi+IoZeq).

Mode 3 (t2 < t < t3): At t = t2, current stops flowing through

the auxiliary active clamp circuit and the converter operates

as a standard PWM buck converter. The current through Lin

decreases during this mode as the converter is in a

freewheeling mode of operation.

Mode 4 (t3 < t < t4): Some time before switch S2 is to be

turned on, at t = t3, switch Sa is turned on with ZCS. Capacitor

Cr begins to discharge through Lr1 and Lr2, as ILin continues to

decrease. The key equations that describe this mode are

1Lr2 o eqi =-I sinω t (16)

1Lr1 o eqi =-I (1+sinω t) (17)

r 1C Cr0 o eq1 eqV =V -I Z (1-cosω t) (18)

At the end of this mode: Lr2 o Lr1 o

i =-I ,i =-2I , where Io is the

average output current in buck mode.

Mode 5 (t4 < t < t5): Switch Sa is turned off at t = t4. The

current in Lr2 is used to discharge Cs2. The key equations

describing this mode are:

Lr1 o eq3i =-I (1+cosω t) (19)

Lr2 o eq3i =-I cosω t (20)

S2C hi o eq3 eq3V =V -I Z sinω t (21)

-1 hiLr2 o

o eq3

Vi =-I cos(sin )

I Z (22)

where

eq3

r1 r2 S2

1ω =

(L +L )C

(23)

and

r1 r2

eq3

S2

L +LZ =

C

(24)

At the end of this mode, VS2=VCs2=0.

Mode 6 (t5 < t < t6): At t = t5, capacitor Cs2 has been

completely discharged and the anti-parallel diode across S2

begins to conduct. S2 can be turned on while this diode is

conducting.

Mode 7 (t6 < t < t7): Some time after S2 has been turned on, at

t = t6, the current through Lr2 will begin to reverse direction

and the transfer of current from Lr1 to S2 will begin. This

mode of operation will continue until current has been

completely transferred to S2 and the converter enters Mode 0

at t = t7. The key equations describing this mode of operation

are

o

Lr2

r1 r2

Vi = t

L +L (25)

o

Lr1 in

r1 r2

Vi =I - t

L +L (26)

The duration of this mode is

in

C2 r1 r2

hi

It = (L +L )

V (27)

III. CONVERTER DESIGN

A procedure for the design of the proposed bidirectional

ZVS converter is presented in this section of the paper. It

should be noted that the auxiliary circuit must be designed so

that it can create a ZVS turn-on for the device that acts as the

main power switch, regardless of whether the converter is in

boost or buck mode of operation.

L in

lo V

S 2

L r2

hi V

L r1

L in

lo V

C s2

C s1

L r2

hi V

C r S a

L r1

L in

lo V

C s1

L r2

C r S a

L r1

L in

lo V

S 1

(a) Mode 0 (t < t0) (b) Mode 1 (t0 < t < t1) (c) Mode 2 (t1 < t < t2) (d) Mode 3 (t2 < t < t3)

L r1

L in

lo V

L r2

C r

S 1

S a

L r1

L in

lo V

C s2

L r2

hi V

S 1

L r1

L in

lo V

L r2

hi V

S 1

S 2

L r1

L in

lo V

L r2

hi V

S 1

S 2

(e) Mode 4 (t3 < t < t4) (f) Mode 5 (t4 < t < t5) (g) Mode 6 (t5 < t < t6) (h) Mode 7 (t6 < t < t7)

Fig. 5. Equivalent circuit diagrams for buck mode of operation

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A. Determine condition of ZVS in both directions

The minimal conditions needed to ensure the ZVS turn-on

of main power switch in both boost and buck modes are

derived in this section. It was found that the main switch

voltage reduces to zero following eqn. (10), during Mode 5 of

boost operation. The condition for the ZVS turn-on of the

main switch in boost mode is can therefore be determined

from eqn. (10), which can be written as

S1C hi in eq2 eq2 5 4V =V -I Z sinω (t t ) 0 − = (28)

where,

-1 hi5 4

in eq2

Vt -t =sin ( )

I Z (29)

is the duration of Mode 5. Using eqn. (29), the following

relation can be derived:

hi

in eq2

V1

I Z< (30)

which is the condition that must be satisfied for the ZVS turn-

on of the main switch to occur in boost mode.

For deriving the condition that ensures the ZVS turn-on of

the main switch when the converter is operating in buck

mode, Mode 5 of operation is referred to. It was found that

the main switch voltage reduces to zero following eqn. (18),

during Mode 5 of boost operation. The condition for the ZVS

turn-on of the main switch in boost mode is can therefore be

determined from eqn. (18), which can be written as

S1C hi in eq2 eq2 5b 4bV =V -I Z sinω (t t ) 0 − = (31)

where (t5b-t4b) is the duration of mode-5 in buck mode. Using

eqn. (31), the following relation can be derived:

hi

o eq3

V1

I Z< (32)

which is the condition that must be satisfied for the ZVS turn-

on of the main switch to occur in buck mode.

For any given load, Iin for boost mode and Io for buck mode

operation are the same due to the symmetry of the circuit.

Switch capacitors CS1 = CS2 = Cs so that Zeq2=Zeq3 from eqns.

(12) and (24) and thus eqns. (30) and (32) also become

equivalent. In other words, if eqn. (30) is satisfied for a given

load when the converter is operating in boost mode then eqn.

(32), which is the ZVS condition for the buck mode, will also

be satisfied.

B. Minimize reverse recovery losses during turn-off of

freewheeling diode in buck mode and boost mode

Referring to Mode 7 of operation in boost mode, the time in

which current is fully diverted from the boost diode to the

main switch is given by eqn. (15). To minimize the reverse

recovery losses in this diode, the duration of this tc1 mode of

operation given by eqn. (15) should be designed so that

tc1>3trr, where trr is the reverse recovery time for the boost

diode. Substituting trr into eqn. (15) gives

in

C1 r1 r2 rr

hi

It = (L +L )>3t

V (33)

In the buck mode of operation, a similar commutation occurs

in Mode 7, when output current gets diverted from the

freewheeling diode to the main switch. Eqn. (27) gives this

commutation time tC2. By applying the condition that the

commutation time tC3>3trr, the following condition can be

found:

o

C2 r1 r2 rr

hi

It = (L +L )>3t

V (34)

C. Choose inductors Lr1 and Lr2:

The choice of resonant inductors Lr1 and Lr2 is done based

on the conditions given by eqns. (30), (32), (33) and (34). The

following can be derived from these equations:

(Lr1+Lr2) ≥

2

hi

S1

in

VC

I

(in boost mode) (35)

(Lr1+Lr2) ≥

2

hi

S1

o

VC

I

(in buck mode) (36)

( ) or1 r2 rr

in

VL +L 3t

I

≥

(in boost mode) (37)

( ) or1 r2 rr

in

VL +L 3t

I

≥

(in buck mode) (38)

It can be determined from eqns. (35) and (36) that the sum of

the values of Lr1 and Lr2 is inversely proportional to the

average load current and average input in the buck mode and

boost mode respectively. These inductors must be designed to

satisfy eqns. (35)-(38) at the minimum load from and above

which the ZVS turn-on of the main switch will occur.

D. Choose resonant capacitor:

For choosing the resonant capacitor Cr, the maximum

voltage across the main switch, which is given by

Vs,max= (Vhi+IinZeq) (in boost mode) (39)

(Vhi+IoZeq) (in buck mode) (40)

where

1 2r r

eq

r

L LZ

C

+≈ (41)

has to be considered. This voltage is proportional to the load

in both boost and buck modes and must be evaluated at

maximum load when choosing Cr.

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E. Turn on time of the auxiliary switch

The auxiliary switch turn-on time is the time in which the

current through Lr1 when the converter is in the boost mode

and that through Lr2 when it is in the buck mode reaches its

peak. This occurs while Cr resonates with Lr1 or Lr2 after the

auxiliary switch is turned on. This time is given by

a,on r1 r2 r

πt = (L +L )C

2 (42)

IV. DESIGN EXAMPLE

An example that demonstrates the design procedure

presented in the previous section of the paper is shown here.

The converter is to be designed according to the following

specifications: Vhi=400V, Vlo=100V, switching frequency

fsw=100kHz, maximum power is 500 W. The converter is to

be designed so that the ZVS turn-on of the main power switch

occurs from 40% of full load to full load. This is to be done

to try to reduce any circulating current that may contribute to

conduction losses.

Assuming an expected full load converter efficiency η to be

around 96%, the full load average input current for boost

mode of operation and the full load average output current for

buck mode is 500

100

watts

Volts η=

×5.21Amps. Putting this value of

Iin and Io current into eqns. (33) and (34) and using tC1 = 3trr=

3x80 ns (which is a typical value), a value of (Lr1+Lr2)

≥ 19.2µH is found.

Designing with the condition that the circuit has ZVS from

40% to 100% of full load, a value of Zeq2 > 200 Ω can be

found from eqn. (29). If the value of switch capacitance used

is assumed to be CS1=0.6nF, then, from 1 2

1

1

r r

eq

S

L LZ

C

+= ,

(Lr1+Lr2) ≥ 24µH can be found. For this converter,

(Lr1+Lr2)=25µH is chosen as higher values of (Lr1+Lr2) will

increase circulating currents in the circuit and thus increase

circulating current losses. This value of (Lr1+Lr2) satisfies

both the criteria for commutation and ZVS turn-on of the

main switch in each mode of operation. For the sake of

simplicity, a value of Lr1=Lr2=12.5µH is used.

The resonant clamp capacitor Cr is to be designed so that

the peak voltage stress on the main switch given by eqns. (39)

and (40) is to be maintained at 450 Volts. Using the chosen

values of Lr1 and Lr2 and the maximum values of Io and Iin

equal to 5.21Amps in eqns. (40)-(42), a value of Cr = 62.5nF

can be found. A standard value of 68 nF can be used for this

capacitor.

V. EXPERIMENTAL RESULTS

An experimental prototype of the proposed converter was

built to confirm its feasibility. The converter was built to

operate with a low-side voltage of Vlo = 100 V, a high-side

voltage of Vhi = 400 V, maximum power of 500 W, and a

switching frequency of 100 kHz. The components that were

used were Lr1=Lr2=12.5µH, Cr=68 nF. The selection of the main

power circuit inductor Lin, and the main power switches S1, S2 was

done as if the converter was a regular PWM converter since the

converter is a PWM converter. STP12NM50FP devices were used

for S1 and S2 their body diodes were used as the freewheeling diodes.

A 700µH inductor was used for Lin and an IRC634 device was used

as the auxiliary switch.

Typical converter waveforms are shown in Fig. 6. Fig. 6(a)

shows the voltage and current waveforms of S2 when it is

turning on and the converter is operating in buck mode. Fig.

6(b) shows similar waveforms of S1 when the converter is

operating in the boost mode. It can be seen that in both cases,

the converter switches can operate with a ZVS turn-on. The

main novelty of the proposed converter is that the ZVS turn-

on of both switches is achieved with just a single, common

auxiliary circuit that is operational regardless of whether the

converter is operating in boost mode or in buck mode.

(a)

(b)

(c)

Fig. 6. Experimental results. (a) Voltage and current waveforms for S2 with

converter working in buck mode (V: 200 V/div., I: 1.25 A/div., t: 2

µs/div.). (b) Voltage and current waveforms for S1 with converter working

in boost mode (V: 200 V/div., I: 5 A/div., t: 2µs/div.). (c) Experimental

voltage and current waveforms of auxiliary switch Sa in buck mode. (V:

200V/div, t: 2 µs/div)

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Fig. 6(c) shows typical Sa voltage and current waveforms.

It can be seen that the current in the auxiliary switch has a

positive and a negative hump. The negative hump of the

auxiliary switch current signifies the charging current of the

active clamp capacitor through the body diode of the auxiliary

switch while the positive hump shows the discharging of the

active clamp capacitor in resonance with resonant inductors

Lr1 and Lr2. The turn on of the switch Sa is ZCS due to the

presence of the resonant inductors.

Graphs of converter efficiency for both boost and buck

modes of operation are shown in Fig. 7. It can be seen that the

efficiency curves of the ZVS and the hard-switched converter

diverge at heavier loads. This is because the active clamp

auxiliary circuit significantly improves converter efficiency

regardless of the direction of power flow. The auxiliary

circuit reduces the losses due to switching transitions, which

still exist in the hard-switched converter and become more

dominant at heavier loads.

VI. CONCLUSION

A soft-switched bidirectional dc-dc converter was proposed

in the paper. The proposed converter can operate with soft-

switching, a continuous inductor current, fixed switching

frequency, and the switch stresses of a conventional PWM

converter regardless of the direction of power flow. These

features are due to a very simple auxiliary circuit that is

operational regardless of the direction of power flow. In the

paper, the converter's operation was discussed in detail, a

design procedure was derived and then demonstrated with an

example, and results obtained from an experimental prototype

that confirm the feasibility of the converter were presented. It

was shown how the ZVS turn-on of both switches is achieved

with just a single, common auxiliary circuit that is operational

regardless of whether the converter is operating in boost mode

or in buck mode.

ACKNOWLEDGMENT

The authors would like to acknowledge funding from the

National Sciences and Research Council of Canada (NSERC)

for financial support during the course of this work.

REFERENCES

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100 200 300 400 50088

90

92

94

96

98

Output Power (in Watts)

Eff

icie

ncy(%

)Efficiency of ZVS Boost Mode

Efficiency of Hard Switched Boost Mode

(a)

100 200 300 400 50088

90

92

94

96

98

Output Power (in Watts)

Eff

icie

ncy(%

)

Efficiency of ZVS Buck Mode

Efficiency of Hard Switched Buck Mode

(b)

Fig. 7. Experimental efficiency graphs. (a) Efficiency of ZVS and hard-

switched converter operating in boost mode. (b) Efficiency of ZVS and

hard-switched converter operating in buck mode.

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