Analysis and Synthesis of Synchronous Sequential Circuits

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Analysis and Synthesis of Synchronous Sequential Circuits •A “synchronizing” pulse/edge signal (clock) controls the operation of the memory portion of the circuit •When no clock – the circuit is asynchronous:

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Analysis and Synthesis of Synchronous Sequential Circuits. A “synchronizing” pulse/edge signal (clock) controls the operation of the memory portion of the circuit When no clock – the circuit is asynchronous:. Analysis and Synthesis of Synchronous Sequential Circuits. - PowerPoint PPT Presentation

Transcript of Analysis and Synthesis of Synchronous Sequential Circuits

Page 1: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis and Synthesis of Synchronous Sequential Circuits

• A “synchronizing” pulse/edge signal (clock) controls the operation of the memory portion of the circuit

• When noclock – thecircuit is asynchronous:

Page 2: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis and Synthesis of Synchronous Sequential Circuits

• The “state” of a synchronous sequential circuit:– All the FF/memory element outputs– Can change only upon clock transition (pulse/edge)

• Two models for synchronous sequential circuits:– Mealy model

• Outputs are a function of state and inputs

– Moore model• Outputs are a function of state only

Page 3: Analysis and Synthesis of Synchronous Sequential Circuits

Mealy model

• Next state (Y1,…,Yr) achieved on clock transition

Page 4: Analysis and Synthesis of Synchronous Sequential Circuits

Mealy model

• Input (x1,…,xn), output (z1,…,zm), present state (y1,…,yr) and next state (Y1,…,Yr) are

where gi and hi are Boolean functions, or in vector form

Page 5: Analysis and Synthesis of Synchronous Sequential Circuits

Moore model

Combinational logic

Combinational logic

Memory

x1

xn

Y1

Yr

y1

yr

z1

zm

clock

Page 6: Analysis and Synthesis of Synchronous Sequential Circuits

Mealy machine example

• State diagram and state table

• Assumes transitions

Problem?

Page 7: Analysis and Synthesis of Synchronous Sequential Circuits

Moore machine example

• State diagram and state table

• Output is f(state) only• Inputs – no effect

Page 8: Analysis and Synthesis of Synchronous Sequential Circuits

Mealy vs. Moore

• Representations can be transformed into each other

• Advantages and disadvantages

Mealy Moore

- glitches + no glitches

- problem sampling

+ easier to design

+ lesser total # states

Page 9: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis precedes synthesis

• Analysis of logic diagrams of sequential circuits– Inputs, state variables, outputs, logic equations ?– Mealy or Moore type?

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Analysis

– Input sequence: x = 01101000

yxyxyxY

xyz

Page 11: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis

• Deriving state diagram and state table– Given circuit diagram Boolean equations

• Notation: yk represents y(k t)• k = integer; t = clock period

• May assign numbers to states: 0 state A; 1 state B

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Analysis

• Deriving state table from K-maps

Map for Yk=yk+1 Map for zk

Page 13: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis example

• Synchronous sequential circuit with flip-flops– Negative edge-

triggered– Inputs?– States?– Outputs?– Logic equations?

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Analysis example

• Timing diagram

Page 15: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis example

• State table and K-maps

Page 16: Analysis and Synthesis of Synchronous Sequential Circuits

Analysis example

• Combining the K-maps into state table