~ ANALOGW DEVICES

FEATURESProgrammable Charge CurrentHigh Precision Battery Voltage LimitPrecision 2.000 V ReferenceLow Voltage Drop Current Sense: 300 mV Full ScaleFull Operation in Shorted and Open Battery ConditionsDrives Diode-Side of OptocouplerWide Operating Supply Range: 2.7 V to 16 VUndervoltage LockoutSO-8 PackageADP3810

Internal Precision Voltage Divider for Battery SenseFour Final Battery Voltage Options Available: 4.2 V,8.4 V, 12.6 V, 16.8 V

ADP3811Adjustable Final Battery Voltage

APPLICATIONSBattery Charger Controller for:

Lilon Batteries (ADP3810)NiCad, NiMH Batteries (ADP3811)

GENERAL DESCRIPTIONThe ADP3810 and ADP3811 combine a programmable currentlimit with a battery voltage limit to provide a constant current,constant voltage battery charger controller. In secondary side,

SecondarySide,Off-LineBatteryChargerControllers

ADP381~DP3811I

off-line applications, the output directly drives the diode side ofan optocoupler to give isolated feedback control of a primaryside PWM. The circuitry includes two gain (grJ stages, a preci-sion 2.0 V reference, a control input buffer, an UndervoltageLock Out (UVLO) comparator, an output buffer and an over-voltage comparator.

The current limit amplifier senses the voltage drop across anexternal sense resistor to control the average current for charg-ing a battery. The voltage drop can be adjusted from 25 mVto 300 mY, giving a charging current limit from 100 mA to1.2 amps with a 0.25 .Qsense resistor. An external dc voltageon the VCTRLinput sets the voltage drop. Because this inputis high impedance, a filtered PWM output can be used to setthe voltage.

As the battery voltage approaches its voltage limit, the voltagesense amplifier takes over to maintain a constant battery volt-age. The two amplifiers essentially operate in an "OR" fash-ion. Either the current is limited, or the voltage is limited.

The ADP3810 has internal thin-film resistors that are trimmedto provide a precise final voltage for LiIon batteries. Four volt-age options are available, corresponding to 1-4 LiIon cells asfollows: 4.2 V, 8.4 V, 12.6 V and 16.8 V.

The ADP3811 omits these resistors allowing any battery volt-age to be programmed with external resistors.

GND Vcs

FUNCTIONAL BLOCK DIAGRAM

VREF VSENSE

1.5MQ 80kQ

VREF

VCTRL

OUT

REV.O

Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third partieswhich may result from its use. No license is granted by implication orotherwise under any patent or patent rights of Analog Devices.

VCC

UVLO

ADP3810/ADP3811

CaMP

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 617/329-4700 World Wide Web Site: http://www.analog.comFax: 617/326-8703 @ Analog Devices, Inc., 1996

OBSOLETEOBSOLETE

ADP381O/ADP3811-SPECIFICATIONS(-40°&~nA~ +85°&,Vee= 10.0V,unlessotherwisenoted)

NOTES'20 kQ resistor from current sense voltage to Vcs pin.'Applies to 4.2 V, 8.4 V, 12.6 V and 16.8 V options. Includes all error from offset voltage, bias current, resistor divider and voltage reference.'Does not include attenuation of input resistor divider for ADP38 I O.'0.1 lAPload capacitor required for reference operation.'Full scale is the programmed final battery voltage: 4.2 V, 8.4 V, 12.6 V or 16.8 V for the ADP38 I 0 or 2.0 V at VSENSEfor the ADP381 I.All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.

Specifications subject to change without notice.

-2- REV. 0

ADP3810

Parameter Conditions Symbol Min Typ Max Units

CURRENT SENSEI

Full-Scale Current Sense Voltage V CTRL = 1.2 V -315 -300 -285 mV

Minimum Current Sense Voltage 0.0 V VCTRL 0.1 V -32 -25 -18 mV

Current Programming Input Range VCTRL 0.0 1.2 V

Gain (VoUTNcs) RL=lkQ Avcs 74 86 dB

Control Input Bias Current V CTRL Pin IBCTRL 10 40 nA

VOLTAGE SENSEAccuracy2-ADP381 0 -1.0 +1.0 %

Input Resistance-ADP3810 4.2 V Option RJN 210k Q

Input Resistance-ADP3810 8.4 V Option RIN 420k Q

Input Resistance-ADP3810 12.6 V Option RIN 630k Q

Input Resistance-ADP381 0 16.8 V Option RIN 840k Q

Offset Voltage-ADP3811 Vos -2.5 +2.5 mV

Bias Current-ADP3811 IB 1 10 nA

Gain (VoUTNsENSE)3 RL=lkQ AVBAT 60 74 dB

REFERENCEOutput Voltage CL=0.14 VREF 2.000 V

AccuracyADP3810 -1.0 +1.0 %

ADP3811 -1.8 +1.8 %

Load Regulation lLOAD=0 mA to 5 mA -0.25 +0.25 %

Line Regulation Vcc =2.7 V to 16 V 0.004 0.02 %N

Output Voltage Noise 0.1 Hz to 10 Hz eN 35 J.l.Vp-pLoad Current (Sourcing) IL 5 10 mA

OUTPUTOutput Current Vcc =2.7 V loUT 4 6 mA

Saturation Voltage loUT =4 IDA, VCC-VOUT VSAT 0.1 0.4 V

Gain (VoUTNcOMP) RL= 1 kQ AVOUT 6 VN

UNDERVOLTAGELOCKOUTTrip Point-On 2.65 2.7 V

Trip Point-Off 2.5 2.6 V

POWER SUPPLYOperating Range 2.7 16 V

Quiescent Current Vcc:2:2.7V IQ 1.5 3 mATurn-Off Current Vcc 2.5 V 0.5 1 mA

OVERVOLTAGE COMPARATORThreshold

ADP3810 Percent Above Full Scales Vov% 6 %ADP3811 Percent Above Full Scales Vov% 6 %

Response Time louT from 0 mA to 2 mA tr 8 J.I.S

OBSOLETEOBSOLETE

ADP3810/ADP3811

ABSOLUTE MAXIMUM RATINGSSupplyVoltage,Vee ,.. -0.4Vto18VVeTRL,Ves Input Range. . . . . . . . . . . . . . . . . . -0.4 V to VeeVSENSEInput Range (ADP381l) -0.4 V to VeeVSENSEInput Range (ADP3810) -0.4 V to 20 VMaximum Power Dissipation. . . . . . . . . . . . . . . . . . 500 mWOperating Temperature Range. . . . . . . . . . . -40°C to +85°CStorage Temperature Range. . . . . . . . . . . . . -65°C to 150°CLead Temperature (Soldering, 10 sec) ., .+300°C

PIN CONFIGURATION

OUTI4

VSENSE!1Ie

~ADP3810

VCS 2 ADP3811COMP 3 TOPVIEW

(Not to Scale)

PIN DESCRIPTION

ORDERING GUIDE Mnemonic IFunction

VSENSE

Ves

VREFCOMP

OUT

VeTRL

VeeGND

Battery Voltage Sense Input.Current Sense Input.Reference Output. Nominally 2.0 V.External Compensation Pin.Optocoupler Current Output Drive.DC Control Input to Set Current Limit, 0 V to 1.2 V.Positive Supply.Ground Pin.

VBAT

OUT

VRCS Res ICHA~ -::- BATTERY

OUT

V'NDC/DC

IN CONVERTER I RETURNGNDCTRL

2.0V

R3

VCS

VREF.,1.5MQ BOkQ

VCTRL UVLO

ADP38101ADP3811

lOUT... ...

COMP

ICc

~/c

Figure 1. Simplified Battery Charger

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readilyaccumulate on the human body and test equipment and can discharge without detection.Although the ADP3810/ADP3811 features proprietary ESD protection circuitry, permanentdamage may occur on devices subjected to high energy electrostatic discharges. Therefore, properESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. 0 -3-

Temperature Package BatteryModel Range Option Voltage

ADP3810AR-4.2 -40°C to +85°C SO-8 4.2 VADP3810AR-8.4 -40°C to +85°C SO-8 8.4 VADP3810AR-12.6 -40°C to +85°C SO-8 12.6 VADP3810AR-16.8 -40°C to +85°C SO-8 16.8 VADP3811AR -40°C to +85°C SO-8 AdjustableOBSOLETEOBSOLETE

ADP381O/ADP3811-TypicalPerformanceCharacteristics2.004

..'6 2.002>I

WCJ

~2.0000>

~ 1.998zwII:w"-II! 1.996

1.994-50 -25 0 25 50

TEMPERATURE-'C75

Figure 2. Reference Output Voltagevs. Temperature for Two Typical Parts

Figure 5. Reference PSRR vs.Frequency

-294

>7-296wCJ>!5 -298>w1/1Z~ -300....zw~ -302::>CJ

-304-50 -25 0 25 50

TEMPERATURE-'C

75

Figure 8. Full-Scale Current SenseVoltage vs. Temperature

100

Figure 3. Reference Drop-Out Voltage (VCC--VREF)vs. Load Current

~:;: 2500cI

~ 20001/1zW0w 15001/15zw 1000CJzWII:~ 500wII:

3000

Vee =+1OV

I

IL=100pACL = 0.1pF

011 10 100 1k

FREQUENCY-Hz

Figure 6. Reference Noise Densityvs. Frequency

100

-294

>EI -296

wCJ

~0 -298>w1/1Z

~ -300....zWII:II: -302::>CJ

-3042 4 6 8 10 12 14

SUPPLY VOLTAGE, Vee -Volts

Figure 9. Full-Scale Current SenseVoltage vs. VCC

-4-

.'!!"0>I

w 0.12CJ>!...J

§! 0.10....::>0...~ 0.080wCJffi0.06II:w"-WII: 0.04

-50

0.14

-25 0 25 50TEMPERATURE- 'C

10075

Figure 4. Reference Dropout Voltagevs. Temperature

10k

.....E 1.200(I

!z 1.0w~ 0.8::>CJ~ 0.6II:;! 0.4CJ

1.6

1.4 Res =0.250R3 =20kn

0.2

00 0.2 0.4 0.6 0.8 1.0 1.2 1.4

CONTROL VOLTAGE, VeTRL -Volts

Figure 7. Charge Current vs. ControlVoltage

ID 60"I

Z 40;;(CJ... 20

8~ 0ZW~ -20

16

100

0

45 i0>.!:

90 I

Ii:135 ~

w180 ~:c...225

1M

80CeOMP",o.o1pFTA=+25'CVee = +10V

PHASE

-40

~10 100 1k 10k 100k

FREQUENCY-Hz

Figure 10. GM1 Open-Loop Gain andPhase vs. Frequency

REV. 0

-20I 111111111I

Vee =+10V

-30I-IL =10OpA

CL=0.1pFI I I

-40II>"I

II: -50II:1/1...

-70

100 1k 10k 100k 1M

FREQUENCY - Hz

.I .!.Vee=+10VR3=20kn

--

250Vee+10VCL=0.1pF

> 200EI

W150

0>

1000...0II:

500

00 3 6 9 12 15 18

LOADCURRENT- mA

Vee =+10VR3 =20kn

e=+1I\VIL=SmACL=0.1pF-

l..--/- l..---

OBSOLETEOBSOLETE

ADP3810/ADP3811

0

100 1k 10k 1OOkFREQUENCY-Hz

..

..45 I!!

Z'90 ~

~135 :rrJ)

w180 ~

:J:Q.

2251M

Figure 11. GM2 Open-Loop Gain andPhase vs. Frequency

1.0

0.5

>EI 0

Ii;IfII.O~.5N::!1CJ

-1.0

-1.5-50 -25 0 25 50 75

TEMPERATURE-oC100

Figure 14. ADP3811 GM2 Offset vs.Temperature

2.5

'i! 2.0I

I-Z::! 1.5II::::J0(J):! 1.0IDw<J)z

J!0.5

00 3 6 9 12 15

SUPPLY VOLTAGE,Vee- Volts

18

Figure 17. ADP3811 VSENSEBiasCurrent vs. Vcc

REV. 0

1.0

,.~ 0.50

~:::J

~ 0w(J)

~~.5wCJc(~ -1.00>

-1.5-50 -25 0 25 50 75

TEMPERATURE-oC100

Figure 12. ADP3810 Voltage SenseAccuracy vs. Temperature

1.0

0.5

>EI 0

Ii;IfII.O~.5N::!1CJ

-1.0

-1.50 3 6 9 12 15

SUPPLY VOLTAGE,Vee- Volts

18

Figure 15. ADP3811, GM2 Offsetvs. Vcc

120

100

~ 80..Q.I

~ 60i=zc(is40

20

05.0 5.2 SA 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0

VOV%-%

Figure 18. Overvoltage ComparatorDistribution (VOV%)

-5-

1.0

..~ 0.50c(II::::J

g 0c(w(J)zm~.5wCJ

~-1.00>

-1.50 3 6 9 12 15

SUPPLY VOLTAGE,Vee- Volts

18

Figure 13. ADP3810 Voltage SenseAccuracy vs. Vcc

2.5

c( 2.0cI

I-Z::! 1.5II::::J0(J)

~ 1.0w~

J! 0.5

0-50 -25 0 25 50 75

TEMPERATURE-oC100

Figure 16. ADP3811 VSENSEBiasCurrent vs. Temperature

12

Vee =+10V

10

.. 8I.,.>0

> 6

4

2-50 -25 0 25 50 75

TEMPERATURE - °C

100

Figure 19. Overvoltage ComparatorThreshold (VOV%)vs. Temperature

TVee =+10V

I

T =+25JC

-

IVee=+10V

I I I I I I

T =+25JC

I I JVee=+10V

If- TA=+25°C

1

S rl

TA=I+25°C

i--- -r---

.I. 1:Vee=+10V

...

.//"

OBSOLETEOBSOLETE

ADP3810/ADP38110.25240

200

~ 160..'"I~ 1201=z-0:

580

0.20z~0'01=>-0:1II: I- 0.15::>"I- <II-0:>"'oj!:i~ 0.10"'I-I-.J::>00>

0.0540

05.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0

OUTPUT GAIN (VOUr'VCDMP) - VN

0-SO -25 0 25 50 75

TEMPERATURE-oC100

Figure 20. Output Gain (VouTNcOMP)Distribution

Figure 21. Output Gain (VOUrlVCOMP)vs. Vcc

Figure 22. VSATVS.Temperature

APPLICATIONS SECTIONFunctional DescriptionThe ADP3810 and ADP3811 are designed for charging NiCad,NiMH and Lilon batteries. Both parts provide accurate voltagesense and current sense circuitry to control the charge currentand final battery voltage. Figure I shows a simplified batterycharging circuit with the ADP3810/ADP3811 controlling anexternal dc-dc converter. The converter can be one of manydifferent types such as a Buck converter, Flyback converter or alinear regulator. In all cases, the ADP38 I0/ADP38 I I maintainsaccurate control of the current and voltage loops, enabling theuse of a low cost, industry standard dc-dc converter withoutcompromising system performance. Detailed realizations ofcomplete circuits including the dc-dc converter are includedlater in this data sheet.

The ADP3810 and ADP3811 contain the following blocks(shown in Figure I):. Two "GM" type error amplifiers control the current loop

(GMI) and the voltage loop (GM2).. A common CaMP node is shared by both GM amplifierssuch that an RC netWork at this node helps compensate bothcontrol loops.

. A precision 2.0 V reference is used internally and is availableexternally for use by other circuitry. The O.IIIF bypass ca-pacitor shown is required for stability.

. A current limited buffer stage (GM3) provides a current out-put, loUT,to control an external dc-dc converter. This out-put can directly drive an optocoupler in isolated converterapplications. The dc-dc converter must have a control schemesuch that higher lOUTresults in lower duty cycle. If this isnot the case, a simple, single transistor inverter can be usedfor control phase inversion.

. An amplifier buffers the charge current programming volt-age, VCTRL,to provide a high impedance input.

. An UVLO circuit shuts down the GM amplifiers and theoutput when the supply voltage (Vcd fallsbelow 2.7 V. Thisprotects the charging system from indeterminate operation.

. A transient overshoot comparator quickly increases loUTwhen the voltage on the "+" input of GM2 rises over 120 mVabove VREF'This clamp shuts down the dc-dc converter toquickly recover from overvoltage transients and protect ex-ternal circuitry.

Description of Battery Charging OperationThe IC based system shown in Figure I charges a battery with adc current supplied by a dc-dc converter, which is most likely aswitching type supply but could also be a linear supply wherefeasible. The value of the charge current is controlled by thefeedback loop comprised of Res, R3, GMI, the external dc-dcconverter and a dc voltage at the VCTRLinput. The actualcharge current is set by the voltage, VCTRL,and is dependentupon the choice for the values of Res and R3 according to theformula below:

I R3IcHARGE=-x-xVC1RL

Res 80 kQ

Typical values are Res =0.25 Q and R3 =20 kg, which resultin a charge current of 1.0 A for a control voltage of 1.0 V. The80 kQ resistor is internal to the IC, and it is trimmed to its ab-solute value. The positive input of GMI is referenced toground, forcing the Vcs pin to a virtual ground.

The resistor Res converts the charge current into the voltage atVRcs, and it is this voltage that GMI is regulating. The voltageat VRcsis equal to -(R3/80 kQ) VCTRL'When VCTRLequals1.0 V, VRcsequals -250 mY. IfVRcs falls below its pro-grammed level (i.e., the charge current increases), the negativeinput of GMI goes slightly below ground. This causes the out-put of GMI to source more current and drive the CaMP nodehigh, which forces the current, lOUT,to increase. A higher loUTdecreases the drive to the dc-dc converter, reducing the charg-ing current and balancing the feedback loop.As the battery approaches its final charge voltage, the voltageloop takes over. The system becomes a voltage source, floatingthe battery at constant voltage thereby preventing overcharging.The constant voltage feature also protects the circuitry that isactually powered by the battery from overvoltage if the battery isremoved. The voltage loop is comprised of RI, R2, GM2 andthe dc-dc converter. The [mal battery voltage is simply set bythe ratio of RI and R2 according to the following equation(VREF =2.000 V):

VBAT =2.000VX(;~+I)

If the battery voltage rises above its programmed voltage,VSENSEis pulled above VREF' This causes GM2 to source morecurrent, raising the CaMP node voltage and loUT' As with the

-6- REV. 0

VC='+10V II- TA = +25°C

RL=1kQ

r

r-U

I VCC+10VIIILOAD =SmA

I I I I I I I

OBSOLETEOBSOLETE

ADP3810/ADP3811

current loop, the higher louT reduces the duty cycle of the dc-dcconverter and causes the battery voltage to fall, balancing thefeedback loop.

Each GM stage is designed to be asymmetrical so that each am-plifier can only source current. The outputs are tied together atthe CaMP node and loaded with an internal constant currentsink of approximately 100 IJA. Whichever amplifier sourcesmore current controls the voltage at the CaMP node and there-fore controls the feedback. This scheme is a realization of ananalog "OR" function where GMI or GM2 has control of thedc-dc converter and the charging circuitry. Whenever the cir-cuit is in full current limiting or full voltage limiting, the respec-tive GM stage sources an identical amount of current to thefixed current sink. The other GM stage sources zero currentand is out of the loop. In the transition region, both GM stagessource some of the current to comprise the full amount of thecurrent sink. The high gains of GMI and GM2 ensure asmooth but sharp transition from current control to voltage con-trol. Figure 24 shows a graph of the transition from current tovoltage mode, that was measured on the circuit in Figure 23 asdetailed below. Notice that the current stays at its full pro-grammed leveluntil the battery is within 200 mV of the final pro-grammed voltage (10 V in this case), which maintains fastcharging through almost all of the battery voltage range. Thisimproves the speed of charging compared to a scheme that re-duces the current at lower battery voltages.

The second element in a battery charging system is some formof a dc-dc converter. To achieve high efficiency, the dc-dc con-verter can be an isolated off-line switching power supply, or itcan be an isolated or nonisolated Buck or other type of switch-ing power supply. For lower efficiency requirements, a linearregulator fed from a wall adapter can be used. In the above dis-cussion, the current, loUT,controls the duty cycle of a switchingsupply; but in the case of the linear regulator, louT controls thepass transistor drive. Examples of these topologies are shownlater in this data sheet. If an off-line supply such as a flybackconverter is used, and isolation between the control logic andthe ADP3810/ADP3811 is required, an optocoupler can be in-serted between the ADP38 10/ADP38 I I output and the controlinput of the primary side PWM.

Charge TerminationIf the system is charging a Lilon battery, the main criteria to de-termine charge termination is the absolute battery voltage. TheADP3810, with its accurate reference and internal resistors, ac-complishes this task. The ADP3810's guaranteed accuracyspecification of :t I % of the final battery voltage ensures that aLilon battery will not be overcharged. This is especially impor-tant with Lilon batteries because overcharging can lead to cata-strophic failure. It is also important to insure that the battery becharged to a voltage equal to its optimal final voltage (typically4.2 V per cell). Stopping at less than I % of full-scale results ina battery that has not been charged to its full mAh capacity,reducing the battery's run time and the end equipment's operat-ing time.

The ADP3810/ADP3811 does not include circuitry to detectcharge termination criteria such as -!::'v/!:J.t or !:J.T/!:J.t,which are

common for NiCad and NiMH batteries. If such charge termi-nation schemes are required, a low cost microcontroller can beadded to the system to monitor the battery voltage and tempera-ture. A PWM output from the microcontroller can subsequently

REV. 0

program the VCTRLinput to set the charge current. The highimpedance of VCTRLenables the inclusion of an RC filter to in-tegrate a PWM output into a dc control voltage.

CompensationThe voltage and current loops have significantly different natu-ral and crossover frequencies in a battery charger application, sothe two loops most likely need different pole/zero feedback com-pensation. Figure I shows a single RC network from theCaMP node to ground. This is primarily for low frequencycompensation (fc< 100 Hz) of the voltage loop. Since theCaMP node is shared by both GM stages, this compensationalso affects the current loop. The internal 200 Q resistor doeschange the zero location of the compensation for the currentloop with respect to the voltage loop. To provide a separatehigher frequency compensation (fc - I kHz-I 0 kHz), a secondseries RC may be needed. A detailed calculation of the com-pensation values is given later in this data sheet.ADP3810 and ADP3811 DifferencesThe main difference between the ADP381 0 and the ADP3811is illustrated in Figure I. The resistors RI and R2 are externalfor the ADP3811 and internal for the ADP3810. The ADP3810

is specifically designed for Lilon battery charging, and thus, theinternal resistors are precision thin-film resistors laser trimmedfor Lilon cell voltages. Four different final voltage options areavailable in the ADP3810: 4.2 V, 8.4 V, 12.6 V, and 16.8 V.For slightly different voltages to accommodate different LiIonchemistries,please contact the factory. The ADP3811 does not in-clude the internal resistors, allowing the designer to choose anyfinal battery voltage by appropriately selecting the external resis-tors. Because the ADP381 0 is specifically for Lilon batteries,the reference is trimmed to a tighter accuracy specification of:tl % instead of:t2% for the ADP3811.

VCTRLInput and Charge Current Programming RangeThe voltage on the VCTRLinput determines the charge currentlevel. This input is buffered by an internal single supply ampli-fier (labeled BUFFER) to allow easy programmability of VCTRL.For example, for a fixed charge current, VCTRLcan be set by aresistor divider from the reference output. If a microcontrolleris setting the charge current, a simple RC filter on VCTRLenablesthe voltage to be set by a PWM output from the micro. Ofcourse, a digital-to-analog converter could also be used, but thehigh impedance input makes a PWM output the economicalchoice. The bias current of VCTRLis typically 25 nA, whichflows out of the pin.

The guaranteed input voltage range of the buffer is from 0.0 Vto 1.2 V. When VCTRLis in the range of 0.0 V to 0.1 V, the out-put of the internal amplifier is fixed at 0.1 V. This correspondsto a charge current of 100 mA for Res =0.25Q, R3 = 20kQ.The graph of charge current versus VCTRLin Figure 7 shows thisrelationship. Figure I shows a diode in series with the buffer'soutput and a 1.5 MQ resistor from VREFto this output. Thediode prevents the amplifier from sinking current, so for smallinput voltages the buffer has an open output. The 1.5 MQresistor forms a divider with the internal 80 kQ resistor to fix theoutput at 0.1 V, i.e., about 10% of the maximum current. Thiscorresponds to the typical trickle charge current level for NiCadbatteries. When VCTRLrises above 0.1 V, the buffer sourcescurrent and the output follows the input. The total range ofVCTRLfrom 0.0 V. to 1.2 V results in a charge current rangefrom 100 mA to 1.2 A (for Res =0.25 Q, R3 = 20 kQ). Larger

-7-

OBSOLETEOBSOLETE

DP3810/ADP3811

large current levels can be obtained by either reducing theIlue of Res or increasing the value of R3. The main penalty ofIcreasing R3 is lower efficiency due to the larger voltage drop:ross Res, and the penalty of decreasing Res is lower accuracyJut higher efficiency) as discussed below.

'REFOutputl1e internal band gap reference is not only used internally forhe voltage and current loops, but it is also available externally ifIIIaccurate voltage is needed. The reference employs a pnpmtput transistor for low dropout operation. Figure 3 shows aypical graph of dropout voltage versus load current. The refer-~nceis guaranteed to source 5 mA with a dropout voltage ofiOOmV or less. The 0.11lF capacitor on the reference pin is in-tegral in the compensation of the reference and is therefore re-quired for stable operation. If desired, a largervalue of capacitancecan also be used for the application, but a smaller value shouldnot be used. This capacitor should be located close to the VREFpin. Additional reference performance graphs are shown in Fig-ures 2 through 6.

Output StageThe output stage performs two important functions. It is abuffer for the compensation node, and as such, it has a high im-pedance input. It is also a GM stage. The OUT pin is a currentoutput to enable the direct drive of an optocoupler for isolatedapplications. The gain from the COMP node to the OUT pin isapproximately 5 mAN. With a load resistor of I ill, the voltagegain is equal to five as specified in the data sheet. A differentload resistor results in a gain equal to RLx (5 rnNV). Figures20 and 21 show how the gain varies from part to part and versusthe supply voltage, respectively. The guaranteed output currentis 5 IDA,which is much more than the typical I mA to 2 mA re-quired in most applications.

Current Loop Accuracy ConsiderationsThe accuracy of the current loop is dependent on several factorssuch as the offset ofGMI, the offset of the VCTRLbuffer, the ra-tio of the internal 80 k.Qcompared to the external 20 k.Qresis-tor, and the accuracy of Res. The specification for current loopaccuracy states that the full-scale current sense voltage, VRcs,of-300 mV is guaranteed to be within IS mV of this value. Thisassumes an exact 20 k,Qresistor for R3. Any errors in this resis-tor will result in further errors in the charge current value. Forexample, a 5% error in resistor value will add a 5% error to thecharge current. The same is true for Res, the current sense resis-tor. Thus, I % or better resistors are recommended.

As mentioned above, decreasing the value of Res increases thecharge current. Since it is VRcsthat is specified, the actualvalue of Res is not accounted for in the specification.An examplewhere Res =0.1 .Qillustrates its impact on the accuracy of thecharge current. The range ofVRcs is from -25 mV:t 5 mV to-300 mV:t 15 mY. This results in a charge current range from250 mA:t 50 mA to 3 A:t 150 IDA,as opposed to a charge cur-rent range of 100 mA:t 20 mA to 1.2 A:t 60 mA for Res =0.25.Q. Thus, not only is the minimum current changed, butthe absolute variation around the set point is increased (althoughthe percentage variation is the same).

Voltage Loop Accuracy ConsiderationsThe accuracy of the voltage loop is dependent on the offset ofGM2, the accuracy of the reference voltage, the bias current ofGM2 through Rl and R2, and the ratio of RlIR2. For the de-manding application of charging uIon batteries, the accuracy of

the ADP3810 is specified with respect to the final battery volt-age. This is tested in a full feedback loop so that the single ac-curacy specification given in the specification table accounts forall of the errors mentioned above. For the ADP3811, the resis-tors are external, so the final voltage accuracy needs to be deter-mined by the designer. Certainly, the tolerance of the resistorshas a large impact on the final voltage accuracy, and I % or bet-ter is recommended.

Supply RangeThe supply range is specified from 2.7 V to 16 V. However, afinal battery voltage option for the ADP38 I0 is 16.8 V. The16.8 V is divided down by the thin film resistors to 2.0 V inter-nally. Thus, the input to GM2 never sees much more than 2.0 V,which is well below the Vcc voltage limit. In fact, Vcc can befixed to 2.7 V and the ADP3810 will still control the charging ofa 16.8 V battery stack. The ADP38 I I, with external resistors,can charge batteries to voltages well in excess of its supply volt-age. However, if the final battery voltage is above 16 V, Vcccannot be supplied directly from the battery as it is in Figure I.Alternative circuits must be employed as will be discussed later.Decoupling capacitors should be located close to the supply pin.The actual value of the capacitors depends on the application,but at the very least a 0.11lF capacitor should be used.

OFF-UNE, ISOLATED, FLYBACK BATIERY CHARGERThe ADP3810 and ADP38 I I are ideal for use in isolated charg-ers. Because the output stage can directly drive an optocoupler,feedback of the control signal across an isolation barrier is asimple task. Figure 23 shows a complete flyback battery chargerwith isolation provided by the flyback transformer and theoptocoupler. The essential operation of the circuit is not muchdifferent from the simplified circuit described in Figure I. TheGMI loop controls the charge current, and the GM2 loop con-trols the final battery voltage. The dc-dc converter block iscomprised of a primary side PWM circuit and flyback trans-former, and the control signal passes through the optocoupler.

The circuit in Figure 23 incorporates all of the features neces-sary to assure long battery life with rapid charging capability.By using the ADP3810 for charging uIon batteries, or theADP38 I I for NiCad and NiMH batteries, component count isminimized, reducing system cost and complexity. With the cir-cuit as presented or with its many possible variations, designersno longer need to compromise charging performance and bat-tery life to achieve a cost effective system.

Primary Side ConsiderationsA typical current-mode flyback PWM controller was chosen forthe primary control circuit for several reasons. First and mostimportantly, it is capable of operating from very small dutycycles to near the maximum designed duty cycle. This makes ita good choice for a wide input ac supply voltage variation re-quirement, which is usually between 70 V-270 V ac for worldwide applications. Add to that the additional requirement of0% to 100% current control, and the PWM duty cycle musthave a wide range. This charger achieves these ranges whilemaintaining stable feedback loops.

The detailed operation and design of the primary side PWM iswidely described in the technical literature and is not detailedhere. However, the following explanation should make clear thereasons for the primary side component choices. The PWM fre-quency is set to around 100 kHz as a reasonable compromise

-8- REV. 0

OBSOLETEOBSOLETE

ADP3810/ADP3811

100kQ

RF3.3kQ

3.3ka

VAEF

" 1% TOLERANCE.. TX1

f = 120kHz

LpA = 750llHLSEC=7.5I1H

OPTO COUPLERMOC81 03

10nF 1N4148 100Q

+1 CFT1mF

R41.2ka

R320ka"

RcS0.25Q"

CC2 Rc2O.2pF 3O0Q

~MAXIMUM VOUT =+10V

CHARGE CURRENT 0.1A TO 1A

0.111F 0.111F

~1.6Q

VSENSEVccVCS VAEF CHARGECURRENTCONTROLVOLTAGE

ADP3810/ADP3811 VCTAl

OUT GND

IO"I1F

COMP

I~~~

RC110ka

Figure 23. ADP3810/ADP3811 Controlling an Off-Line, Flyback Battery Charger

between inductive and capacitive component sizes, switchinglosses and cost.

The primary PWM-IC circuit derives its starting Vee through a100 kQ resistor directly from the rectified ac input. After start-up, a conventional bootstrapped sourcing circuit from an auxil-iary flyback winding wouldn't work, since the flyback voltagewould be reduced below the minimum Vee level specified forthe 3845 under a shorted or discharged battery condition. There-fore, a voltage doubler circuit was developed (as shown in Fig-ure 23) that provides the minimum required Vee for the ICacross the specified ac voltage range even with a shorted battery.

While the signal from the ADP3810/ADP3811 controls the av-erage charge current, the primary side should have a cycle bycycle limit of the switching current. This current limit has to bedesigned so that, with a failed or malfunctioning secondary cir-cuit or optocoupler, the primary power circuit components (theFET and transformer) won't be overstressed. In addition, dur-ing start-up or for a shorted battery, Vee to the ADP38101ADP3811 won't be present. Thus, the primary side currentlimit is the only control of the charge current. As the secondaryside Vee rises above 2.7 V, the ADP3810/ADP3811 takes overand controls the average current. The primary side current limitis set by the 1.6 Q current sense resistor connected between thepower NMOS transistor, IRFBC30, and ground.

The current drive of the ADP3810/ADP3811's output stage di-rectly connects to the photo diode of an optocoupler with no ad-ditional circuitry. With 5 mA of output current, the output stagecan drive a variety of optocouplers. An MOC8103 is shown asan example. The current of the photo-transistor flows throughthe 3.3 kQ feedback resistor, RFB'setting the voltage at the3845's COMP pin, thus controlling the PWM duty cycle. Thecontrolled switching regulator should be designed as shown sothat more LED current from the optocoupler reduces the dutycycle of the converter. Approximately 1 mA should be the

REV. 0

maximum current needed to reduce the duty cycle to zero. Thedifference between the 5 mA drive and the 1 mA requirementleaves ample margin for variations in the optocoupler gain.

Secondary Side ConsiderationsFor the lowest cost, a current-mode flyback converter topologyis used. Only a single diode is needed for rectification(MURD320 in Figure 23), and no filter inductor is required.The diode also prevents the battery from back driving thecharger when input power is disconnected. A 1 mF capacitorfilters the transformer current, providing an average dc currentto charge the battery. The resistor, Res, senses the average cur-rent which is controlled via the Ves input. In this case, thecharging current has high ripple due to the flyback architecture,so a low-pass filter (R3 and Cez) on the current sense signal isneeded. This filter has an extra inverted zero due to Rez to im-prove the phase margin of the loop. The 1 mF capacitor is con-nected between VOUTand the 0.25 Q sense resistor. To provideadditional decoupling to ground, a 220 ~ capacitor is also con-nected to VOUT' Output ripple voltage is not critical, so the out-put capacitor was selected for lowest cost instead of lowestripple. Most of the ripple current is shunted by the parallel bat-tery, if connected. If needed, high frequency ringing caused bycircuit parasitics can be damped with a small RC snubber acrossthe rectifier.

The Vee source to the ADP3810/ADP3811 can come from a di-rect connection to the battery as long as the battery voltage re-mains below the specified 16 V operating range. If the batteryvoltage is less then 2.7 V (e.g., with a shorted battery, or a bat-tery discharged below it's minimum voltage), the ADP38101ADP3811 will be in Undervoltage Lock Out (UVLO) and willnot drive the optocoupler. In this condition, the primary PWMcircuit will run at its designed current limit. The Vee of theADP3810/ADP3811 can be boosted using the circuit shown inFigure 23. This circuit keeps Vee above 2.7 V as long as the

-9-

Vcc

CF.COMP

1nFVFB

PWMISENSE

3845

CF2

3.3VI 220llF

R1 r VOUT

80.6ka" :: BATTERY

R2 ,120ka"

OBSOLETEOBSOLETE

ADP3810/ADP3811

battery voltage is at least 1.5 V with a programmed charge cur-rent of 0.1 A. For a higher programmed charge current, thebattery voltagecan drop below 1.5 V, and Vee is stilI maintainedabove 2.7 V. This is because of the additional energy in theflyback transformer, which transfers more energy through the10 nF capacitor to Vee. The 22 ~ bypass capacitor on Veestores the energy transferred through the 10 nF capacitor.

Secondary Side Component CalculationsDesign Criteria:Charging a 6 cell NiCad battery.Max Individual Cell Voltage: VeElLMAX=1.67 VMax Battery Stack Voltage: VOMAX=6 x 1.67 V =10 VMax Charge Current: 10MAX=1AMax Control Voltage: VeTRL=1 V (for IoMAX=1 A)RsFixedValue: Rs=20 k.QPicka Valuefor Rl: Rl =80.6 k.Q

The voltage limit of 10 V is approximately 10% above the maxi-mum fully charged voltage when -!:N/l1t termination is used.This limit gives a second level of protection without interferingwith -I1V/l1tcharge termination.

Component Value Calculations:Current Sense Resistor: Res =VeTRLI(4 x 10MAx)=1/(4 xl)

=0.25 W, 1%, 0.5 WR2 = VREFXR1/(VOMAX-VREF)R2 =2 x 80.6 k.Q/(lOV-2 V) =20.15 kQ, Pick 20.0 k.Q

Battery Divider, R2:

The final voltage and charge current accuracy is dependentupon the resistor tolerances. Choose appropriate tolerances forthe desired accuracy. One percent accuracy is recommended.

Charger Performance SummaryThe charger circuit properly executes the charging algorithm ex-hibiting stable operation regardless of battery conditions, includ-ing an open circuit load. The circuit can charge to other batteryvoltages by modifying only the battery voltage sense divider. Aswould be expected, circuit efficiency is best at high battery volt-ages. Replacing the output blocking rectifier diode with aSchottky would improve efficiency if the Schottky's leakagecould be tolerated, and its reverse voltage rating met the appli-cation requirement.

1.0

0.9

0.8

0.7

0.6....

J 0.5

0.4

0.3

0.2

0.1

0.0 -

2 3 4 6 7Your

8 10 11

Figure 24. Charge Current vs. Battery Voltage at Four Set-tings for the Flyback Charger in Figure 23

The Battery Charge Current vs. Battery Voltage characteristicsfor four different charge current settings are given in Figure 24.The high gain of the internal amplifiers ensures the sharp transi-tion between current mode and voltage mode regardless of thecharge current setting. The fact that the current remains at fullcharging until the battery is very close to its final voltage ensuresfast charging times.

The transient performance for various turn-on and turn-off con-ditions is detailed in Figures 25, 26 and 27. Figure 25 showsthe output voltage when power is applied with no battery con-nected. As shown, the output voltage quickly rises and over-shoots its set voltage. The internal comparator responds to thisand clamps the voltage giving a quick recovery. Without the in-ternal comparator, an external zener would be required to clampthe voltage to the LED anode. Figure 26 shows the battery cur-rent when connecting and disconnecting a battery. The actualtrace shown is the voltage across Res, which is negative for cur-rent flowing into the battery. There is an overshoot when thebattery is connected, but the loop quickly takes control and lim-its the average current to the programmed 0.75 A. When thebattery is removed, the current quickly returns to zero. Thesolid band on the scope is due to the current rising and fallingwith the switching of the PWM. The time scale is too slow toshow the detail of this. Figure 27 shows the output voltagewhen a battery stack charged to 6 V is connected and then dis-connected. As expected, when the battery is connected, thevoltage immediately goes to 6 V. When the battery is discon-nected, the voltage returns to the programmed float voltage of10 V. Again, a small overshoot is present that is clamped by theinternal comparator.

10V

OV

Figure 25. Flyback Charger Output Voltage Transient atPower Turn On, No Battery Attached

O.OV

-200mV109

Figure 26. Charge Current Transient Response to BatteryConnect/Disconnect

-10- REV. 0

VCTRL =1.0V

VCTRL=0.5V

I- I .J.

VCTRL =0.25VI

VCTRL=0.125V

I I

! TA=+25°CNO BATTERY .... .... ....00....

'V,N=220VAC...... ....

9=;

10o... .... .... .... .... .... .... .... .... ....

2VIDIVO.I..seclDIV

.... ....... .... .... .... .... .... .... ....

TA=+25°C II:VCTRL =O.775VV,N=220VAC -==

0 II n III .... .... .... .... .... .... .... .... ....",...

O.2V1DD!I 20mseclDIV

OBSOLETEOBSOLETE

ADP3810/ADP3811

10V

OV

Figure 27. Output Voltage Transient Response to BatteryConnect/Disconnect

NONISOLATED TOPOLOGIESBuck Switching RegulatorsThe ADP3810/ADP3811 and the ADP1148 can be combinedto create a high efficiency buck regulator battery charger asshown in Figure 28. The ADPI148 is a high efficiency,synchro-nous, step-down regulator that controls two external MOSFETsas shown. Similar to the previous flyback circuit, the ADP38 10controls the average charge current and the final battery voltage,and the ADPI148 controls the cycle by cycle current. The fol-lowing discussion explains the functionality of the circuit butdoes not go into detail on the ADP1148. For more information,the ADP1148 data sheet details the operation of the deviceandgivesformulas for choosing the external components.

The resistor RSENSEsets the cycle by cycle current limit to 1.5 A,which is far enough above the 1 A average current of theADP3810 loop to avoid interfering but still provides a safemaximum current to protect the external components. TheADP3810 uses a 0.25 Q resistor, Res, to sense the battery cur-rent. As before, a 20 kQ resistor is needed between Res and theVes input of the ADP3810. The RC network from Ves to groundperforms the dual function of filtering and compensation.

The voltage loop directly senses the battery voltage. Since theADP3810 is used in this circuit instead of the ADP3811, VSENSEis connected directly to the battery. The internal resistors set thebattery voltage to 8.4 V in this case. Of course, other voltage

+V'N +

;1PF

VCC

VSENSEOV =NORMAL

>1.5V=SHUTDOWN

VREF

OUT

VREF ADP3810

VCTRL(OV TO 1V)

COMP

Vas

VCTRL RC2560Q

CC2220nF

0.1pF GND

REF & CTRLRTN

RC12kQ

CC11pF

20kQ

V'N~RTN \1

. COIL TRONICS CTX-684..KRLSL.1-C1-0R068J

options could be used, or the ADP3811 could be substitutedwith external resistors for a user set voltage. Notice the twogrounds in the circuit. One ground is for the high current re-turn to the VINsource and the other ground for the ADP3810circuitry. Res separates the two grounds, and it is important tokeep them separate as shown.

The adjustable version of the ADPI148 is used in this circuit in-stead of a fixed output version. The output voltage is fed backinto the VFBpin, which is set to regulate at VBATMAX+ 0.5 V.Doing so provides a secondary, higher voltage limit withoutinterfering with normal circuit operation. The control output ofthe ADP3810 is connected through a 560 Q resistor to theSENSE+ input of the ADP1148. The current, loUT,adjusts thedc level on the SENSE+ pin, which is added to the currentramp across RsENSE.Higher lOUTincreases the voltage onSENSE+ and reduces the duty cycle of the 1148, giving nega-tive feedback.

The circuit as shown can quickly and safely charge Lilon batter-ies while maintaining high efficiency. The efficiency of theADP1148 is only degraded slightly by the addition of theADP3810 and external circuitry. The 1.5 mA of supply currentlowers the overall efficiency by approximately 1%-2% for maxi-mum output current. The 0.25 Q sense resistor further lowersthe efficiency due to the 12x Res power loss at high output cur-rents. See the efficiency discussion in the ADP1148 data sheetfor more information.

Linear RegulatorA third charging circuit is shown in Figure 29. In this case, theswitching supply is replaced with a linear regulator. The ADP3811drives the gate of an N-channel MOSFET using an external2N3904. As before, the ADP3811 senses the charge currentthrough a 0.25 Q resistor. When the current increases above thelimit, the internal GM amplifier causes the output to go high.This puts more voltage across R8, increasing the current in Ql.As the current increases, the gate of Ml is pulled lower, reduc-ing the gate to source voltage and decreasing the charge currentto complete the feedback loop. Because the ADP3811 has acurrent output, an external 1 ill resistor is needed from theOUT pin to ground in order to convert the current to a voltage.

75kQ t.L C'N

560Q ;100PFV,N

C,68pF

P DRIVE L'62pH

RSENSE'

50 mQ I VBATVFB

SHUTDOWN

SENSE+

ADP1148SENSE-

N DRIVE

Figure 28. High Efficiency Buck Battery Charger

-11-REV.0

00"" .... TA=+25'C . .... .... .... ....9!1!!!!!!!!!!!!!! V'N=220VAC

!!!! !!!!! VCTRL =1VIIII

10I .... .... .... .... .... .... .... .... ....0%""

2VIDIV 50mseclD..IV

100Q

1000:F I:I-'N.

COUT'!:.

220PF;D11060040

Rcs0.25Q

OBSOLETEOBSOLETE

ADP3810/ADP3811

0.1pF

qVSENSE

VCC

VREF

ADP3811 vcs

VCTRL

0.1pF GND CaMP

0.25>2'

veAT

IRF7201

'!:L

;1PF

101ill

OUT

250>2

RC2560>2

CC2220nF

220pF11ill ~ BATTERY

R811ill

RCI2000

CCI1pF

201ill'VeAT=2.0V(!!!+1)

R2

Figure 29. ADP3811 Controlling a Linear Battery Charger

The trade-off between using a linear regulator as shown versususing a flyback or buck type of charger is efficiency versus sim-plicity. The linear charger in Figure 29 is very simple, and ituses a minimal amount of external components. However, theefficiency is poor, especially when there is a large delta betweenthe input output voltages. The power loss in the pass transistoris equal to (Vrn-VBAT)x IeHARGE.Since the circuit is poweredfrom a wall adapter, efficiency may not be a big concern, but theheat dissipated in the pass transistor could be excessive.

An important specification for this circuit is the dropout voltage,which is the difference between the input and output voltage atfull charge current. There must be enough voltage to keep theN-channel MOSFET on. In this case, the dropout voltage isapproximately 2.2 V for a 0.5 A output current. Two alternative

V'N2N5058

VeAT VeATV'N

ADP3811VREF

ADP3811OUTADP3811

OUT

a. P-Channel MOSFET b. NPN Darlington

Figure 30. Alternative Pass Transistor for Linear Regulator

realizations of the pass element are shown in Figure 30. In case(a), the pass transistor is a P-channel MOSFET. This providesa lower dropout voltage so that VBATcan be within a few hun-dred millivolts of VIN. In case (b), a Darlington configuration oftwo npn transistors is used. The dropout voltage of this circuitis approximately 2 V for a 0.5 A charge current.

STABIUZATION OF FEEDBACK LOOPSThe ADP3810/ADP3811 uses two transconductance error am-plifiers with "merged" output stages to create a shared compen-sation point (COMP) for both the current and voltage loops asexplained previously. Since the voltage and current loops havesignificantly different natural crossover frequencies in a battery

charger application, the two loops need different inverted zerofeedback loop compensations that can be accomplished by twoseries RC networks. One provides the needed low frequency(typical fe < 100 Hz) compensation to the voltage loop, and theother provides a separate high frequency (fe - 1 kHz-10kHz)compensation to the current loop. In addition, the current loopinput requires a ripple reduction filter on the Ves pin to filterout switching noise. Instead of placing both RC networks on theCaMP pin, the current loop network is placed between Ves andground as shown in Figure 23 (Cez and Rcz). Thus, it performstwo functions, ripple reduction and loop compensation.

Loop Stability Criteria for Battery Charger Applications1. The voltage loop has to be stable when the battery is

removed or floating.

2. The current loop has to be stable when the battery is beingcharged within its specified charge current range.

3. Both loops have to be stable within the specified input sourcevoltage range.

Flyback Charger CompensationFigure 31 shows a simplified form of a battery charger systembased on the off-line flyback converter presented in Figure 23.With some modifications (no optocoupler, for example), thismodel can also be used for converters such as a Buck Converter(Figure 28) or a linear Regulator (Figure 29). GMI and GM2are the internal GM amplifiers of the ADP3810/ADP3811, andGM3 is the buffered output stage that drives the optocoupler.The primary side in Figure 23 is represented here by the "PowerStage," which is modeled as GM4, a linear voltage controlledcurrent source model of the flyback transformer and switch.The "Voltage Error Amplifier" block is the internal error ampli-fier of the 3845 PWM-IC (RF=3.3 k.Qin Figure 23), and it isfollowed by an internal resistor divider. The optocoupler ismodeled as a current controlled current source as shown. Itsoutput current develops a voltage, Vx, across RF. The gain val-ues of all the blocks are defined below.

This linear model makes the calculation of compensation valuesa manageable task. It also has the great benefit of allowing thesimulation of the ac response using a circuit simulator, suchas PSpice or MicroCap. For computer modeling, the GM

-12- REV,0

+V'N'

R180.61ill

VREF

VCTRL

R2201ill

VCTRL &

VREF RTN

V'N,RTNOBSOLETE

OBSOLETE

ADP3810/ADP3811

....

POWERSTAGE

r,Vc

COMPVCTAl1.0V

RF3.31ill

CF1nF

VFe +SV

VOLTAGE ERRORAMPLIFIER

VeAT

CF11nF

CF2220pF

R18O.61ill

R41.21ill

RcsO.2SQ

R220kQ

BOIill 2.0V I VSENSE

ADP381 01ADP3811

GM22.1mAN

OUT-

COMP

RC1

~CC1

Figure 31. Block Diagram of the Linearized Feedback Model

amplifiers are represented by voltage controlled current sources,the optocoupler by a current controlled current source, and theerror amplifier by a voltage controlled voltage source.

Design CriteriaCharging a 6 cell NiCad battery.Max Battery Stack Voltage: VOMAX =6 x 1.67 V = 10 V

Max Charge Current: IoMAx=1 ARs Fixed Value: Rs =20 kQPick a value for Rl: Rl =80.6 illCalculated Current Sense

Resistor:Calculated Voltage Sense

Divider:Output Filter Cap:2nd Filter Cap:

Gain of Each BlockADP3810/ADP381 I

Ves Input:ADP3810/ADP3811

VSENSEInput:ADP3810/ADP3811

Output Buffer:Optocoupler:Voltage Error Amplifier:

Res =0.25 Q

R2 =20 kQ

CFl =1 mF (ESR =0.1 Q)

CF2 =200 ~ (ESR =0.2 Q)

GMI =8.3 mA/V

GM2 =2.1 mAN

GM3 =6mA/V

ITXoc = 0.36 mA/mAAV2= !:NeNx = 0.333

Power Stage (General): (MOMAX )I VOMAX

GM4 = ~ VIoMAx XRWAD

Power Stage(Voltage Loop):

Power Stage(Current Loop): GM4 =1.0 AN

The gains for the ADP3810/ADP381 I GM amplifiers are basedon typical measurements of the IC's open-loop gain, and theyare expressed in units of milliamps per volt. The dc voltage gain

GM4 =0.091 AN

REV. 0

of these stages is the value of GM times the load resistance. At theCOMP pin, the internal load resistance, RS, is typically400 kQ.The optocoupler gain is the typical value taken from theMOC8103 data sheet. The voltage error amplifier gain is dueto the resistor divider internal to the 3845 only. Vx is the out-put of the internal amplifier, as labeled in Figure 31. The actualop amp is assumed to have sufficient open-loop gain and band-width compared to the system bandwidth; as a result, it can beconsidered an ideal transimpedance amplifier. The pole createdby the 1 nF capacitor in parallel with RFis high enough in fre-quency to not affect the compensation.

The power stage gain equation is linearized based on primaryside current mode control with the flyback transformer operat-ing with discontinuous inductor current. MOMAXis the maxi-mum change in output current, which is equal to IoMAX-IoMIN'Since the minimum current is 0.0 A, MoMAX= IoMAX= 1 A. Themaximum change in control voltage is set by internal circuitrywithin the 3845 to !:N e = 1 V. The load resistor, RLOAD' is dif-

ferent for the voltage and current loop cases. For the voltageloop without the battery, the effective load is R4, but for thecurrent loop, the effective load is Res. In the current loop, thevoltage limit has not been reached, so the maximum outputvoltage is equal to the maximum output current times the loadresistor. Thus, the entire expression under the square root re-duces to 1.0. Substituting these values into the general equationfor the power stage yields the specific gain values shown forGM4.

When calculating the loop gain for the voltage loop and the cur-rent loop, there are two main differences. First, GM2 appliesonly to the voltage loop, and GMI applies only to the currentloop. Use the appropriate GM input stage for the particularloop calculations. Second, there are three battery conditions toconsider. For the current loop, the battery is present and un-charged. Thus, the battery is modeled as a very large capaci-tance (greater than 1 Farad). For the voltage loop, the battery is

-13-

OBSOLETEOBSOLETE

ADP3810/ADP3811

either present or absent. If the battery is present, its large ca-pacitance creates a very low frequency dominant pole, giving asingle pole system. The more demanding case is when the bat-tery is removed. Now the output pole is dependent upon thefilter capacitors, CPI and CP2. This pole is higher in frequency,and more care must be taken to stabilize the loop response. Allthree cases are described in detail below.

The following calculations for compensation components helpto realize stable voltage and current loops. In practical designs,checking the stability using a network analyzer or a FeedbackLoop Analyzer is always recommended. The calculated compo-nent values serve as good starting values for a measurement-based optimization. The component values shown in Figure 23are slightly different from the calculated values based on thisoptimization procedure.

To simplify the analysis further, the loop gain is split into twocomponents: the gain from the battery to the ADP3810/ADP3811's CaMP pin and the gain from the CaMP pin backto the battery. Because the compensation of each loop dependsupon the RC netWork on the CaMP pin, it is a convenientchoice for dividing the loop calculations.

Definitions:Modulator Gain: GMOD=gain in dB from the CaMP pin to

VBAT.GEA =gain in dB from VBATto the CaMP pin.Gwop =GMOD + ~.fPM,The pole present at the output of themodulator.

Modulator Zero: fzM, The zero due to the ESR, Rpl' of thefilter cap, CFI.

Voltage Loop Compensation, No BatteryStep 1. Calculate the dc loop gain (GwOP),fpM' andf2M:

GMOD=20xlog[GM3xITXoc xRpxAv2XGM4xR4]

Error Amplifier:Loop Gain:Modulator Pole:

[

6 mA / V x 0.36 x 3.3 kQ x

]GMOD =20 x log =48.3 dB

0.333 x 0.091 A / V x 1.2 kQ

GEA =20XIOg[ RI~2R2XGM2XR5]

[

20kQ

]GEA =20xlog x2.lmA/Vx400kQ =48.5dB

80kQ+20kQ

GLOOP =44.5 dB + 48.3 dB =96.8 dB

I IfpM = - -O.l1Hz

2nxR4x(CPI +CP2) 2nX1.2kQx(1.22mF)

I IfZM = -1.6kHz

2nxRplxCPI 2nxO.IQx1.0mF

In reality, the interaction of CFI and CP2and their ESRs createan additional pole/zero pair, but because the value of RFI (ESRof CFI) and RF2(ESR of CP2)are similar, they tend to canceleach other out. Furthermore, the loop crossover is an order ofmagnitude lower in frequency, so the additional pole and zerohave little effect on the loop response.

Step 2. Pick the voltage and current loop crossover frequen-cies, fev and fe/:To avoid interference betWeen the voltage loop and the currentloop, use fcv < 1/10 offcl> the current loop crossover. The cur-rent loop crossover fCI is chosen to be - 1.9 kHz to provide a

fast current limiting response time, so pick fcv -100 Hz.

Step 3. Calculate GMODatfev:The modulator gain of 46.7 dB is the dc gain. The modulatorpole reduces this gain above fPM.

GMOD(100 Hz)= GMOD(de)-20XIOg,/I+ (fcv

)2

fpM

( )2

100GMOD(100Hz)=48.3dB-20xlog,/I+ - =-10.9dB0.11

Step 4. Calculate gain loss of GEAat fcv:To have the feedback loop gain cross over 0 dB at fCv=100 Hz,~ (100 Hz) should be +10.9 dB. Thus, the total gain loss of~ needed at crossover is:

GLOSS =GEA (de) - GEA (100 Hz) =48.5 dB - 10.9 dB =37.6 dB

Step 5. Determinefpneeded to achieve GLosS:To achieve this Choss we need to add a pole, which is located atthe CaMP pin. GM2 has practically no parasitic loss ingain at 100 Hz. Its first parasitic pole occurs at approximately500 kHz as shown in Figure II. Thus, the entire gain loss mustbe realized with an external compensation capacitor, CCI' thatsets the pole, fpI.

fcv -1. 3HzfpI ,

(GLOSS )10 10 -I

Step 6. Calculate CCI based upon /po'

ICcl = ",0.3j.LF

2nx R5x fPl

Step 7. Calculate the loop phase margin, <11M:The loop phase margin is a combination of the phase of themodulator pole and zero and the error amplifier pole.

(fcv

) {fcv ) (fcv

)«PM=180-aretan - -areta - +aretan - "'0°fpI fpM fZM

Step 8. Calculate RcI to stabilize the loop:The sum of phase losses of the modulator and error amplifier re-sults in a loop phase of 0°, which is unacceptable for loop stabil-ity. To stabilize the feedback loop, we have to add a phaseboosting zero to the error amplifier by inserting a resistor (Rei)in series with the capacitor CCI. If the desired phase margin is<11M=60 degrees, the frequency of the zero can be calculated:

fzl =!cvltan <11M =57 Hz

From this, the Rei resistor is calculated:

IRei = ",IOkQ

2nxfzlxCci

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