Analog Integrated Circuits -Tony Chou Carousel - ch14 solutions

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    Analog Integrated Circuit Design 

     2nd 

     Edition

    Chapter 14 Solutions

    Compiled by:

    Tony Chan Carusone 

    Solutions contributed by:

    Tony Chan Carusone

    Yunzhi (Rocky) Dong

    Ali Sheikholeslami & Khoman Phang (1st  ed. Solutions)

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    Q 14.1)

    Q 14.2)

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    Q 14.3)

    Q 14.4)

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    Q 14.5)

    Q 14.6)

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    Q 14.7)

    Q 14.8)

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    Q 14.9)

    Q 14.10)

    Q 14.11)

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    Q 14.12)

    Q 14.13)

    (14.37)

    (14.37).

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    Q 14.14)

    Q 14.15)

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    Q 14.16)

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    Q 14.17)

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    Q 14.18)

    Q 14.19)

    Advanced phases are indicated by checkmarks in the solution for Q 14.15.

    (14.55) – (14.59)

    (14.73) – (14.77)

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    Q 14.20)

    Following the method of Example 14.6 and combining equations (14.88-14.90), the output

    offset is given by:

    To minimize charge injections we take L = Lmin = 0.18m. We can then solve for the device

    width W required to maintain a certain de offset:

    Rounding to w=8m, we can find the resulting switch on resistance:

    The settling time of C2 is given by 5 RC time constants of:

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    Q 14.21)

    For a settling time of 40ns, we require the switch on resistance to satisfy:

     

    The switch effective gate-source voltage is:

    To minimize charge injection, take L = Lmin = 0.18m. We can then solve for the device width:

    By combining equations (14.88 – 14.90), we can calculate the dc offset: 

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    Q 14.22)

    Q 14.23)

    Reset () 

    ()⁄

    ()⁄

     

    Valid output () 

     

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    Q 14.24)

    Fig. 14.37:

    Fig. 14.38:

    Q 14.25)