ANALOG CIRCUITS ANPEC - S. Grad Components Note: ANPEC lead-free products contain molding...

ANALOG CIRCUITS

ANPEC

TABLE OF CONTENTS 1.SWITCHING REGULATOR

1.1 APW 7137 1 MHz, High Efficiency, Step-Up Converter with Internal FET Switch

19

1.2 APW 7075 Step-Up Converter and LDO Combo 25 1.3 APW 7077/A PWM Step-Up DC-DC-Converter 23 1.4 APW 7078 Single Step-Up DC-DC-Converter 19 1.5 APW 7079 Low Supply-Current Synchronous Step-Up DC-DC-Converter

2.VOLTAGE REFERENCE Pos. Series Description Pages

2.1 APL 431 Adjustable Precision Shunt Regulator 18 2.2 APL 431L Low Voltage Adjustable Precision Shunt Regulator 16 2.3 APL 1431 Adjustable Precision Shunt Regulator 15 2.4 APL 1431L Low Voltage Adjustable Precision Shunt Regulator 12

3.OPERATIONAL AMPLIFIER Pos. Series Description Pages

3.1 APC 209 4 Channel Rail to Rail Output Operating Rectifier 12 3.2 APC 308 Rail to Rail Output CMOS Operating Amplifier 15 3.3 APC 558 DUAL Operational Amplifier 8 3.4 APC 4558 DUAL Operational Amplifier 8

Copyright ANPEC Electronics Corp.Rev. A.4 - Oct., 2008

APW7137

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ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, andadvise customers to obtain the latest version of relevant information to verify before placing orders.

1MHz, High Efficiency, Step-Up Converter with Internal FET Switch

Features

• Wide 2.5V to 6V Input Voltage Range• Built-in 0.6Ω N-Channel MOSFET• Built-in Soft-Start• High Efficiency up to 90%•


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Symbol Parameter Rating Unit

VIN VIN Pin to GND -0.3 to 7 V

VLX LX Pin to GND -0.3 to 36 V

VEN EN Pin to GND -0.3 to VIN V

TJ Maximum Junction Temperature 150 °C

TSTG Storage Temperature Range -65 to 150 °C

TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C

Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Absolute Maximum Ratings (Note 1)

Thermal Characteristics

Symbol Parameter Typical Value Unit

θJA Junction to Ambient Thermal Resistance (Note 2)

SOT-23-5 260 °C/W

Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of package is soldered directly on the PCB.

Recommended Operating Conditions (Note 3)Symbol Parameter Range Unit

VIN VIN Input Voltage 2.5 ~ 6 V

VLX LX to GND Voltage -0.3 ~ 32 V

VOUT Converter Output Voltage VIN ~ 30 V

CIN Input Capacitor 2.2 ~ µF

COUT Output Capacitor 2.2 ~ µF

TA Ambient Temperature -40 ~ 85 °C

TJ Junction Temperature -40 ~ 125 °C

Note 3: Refer to the application circuit for further information

Ordering and Marking Information

Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; whichare fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C forMSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogenfree (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm byweight).

APW7137

Handling CodeTemperature RangePackage Code

Package Code B : SOT-23-5Operating Ambient Temperature Range I : -40 to 85 oCHandling Code TR : Tape & ReelAssembly Material L : Lead Free Device G : Halogen and Lead Free Device

Assembly Material

APW7137 B : W37X X - Date Code


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Electrical CharacteristicsRefer to the typical application circuits. These specifications apply over VIN = 3.6V, IOUT = 0mA, TA = -40°C to 85°C, unless otherwise noted. Typical values are at TA = 25°C.

APW7137 Symbol Parameter Test Conditions

Min. Typ. Max. Unit

SUPPLY VOLTAGE AND CURRENT

VIN Input Voltage Range TA = -40 ~ 85°C, TJ = -40 ~ 125°C 2.5 - 6 V

IDD VFB = 1.0V, switching - 1 2 mA

ISD Input DC Bias Current

EN = GND - 0.1 1 µA

UNDER-VOLTAGE LOCKOUT

UVLO Threshold Voltage VIN Rising 2.0 2.2 2.4 V

UVLO Hysteresis Voltage 50 100 150 mV

REFERENCE AND OUTPUT VOLTAGES

TA = 25°C 1.212 1.23 1.248 VREF Regulated Feedback Voltage

TA = -40 ~ 85°C 1.205 - 1.255 V

IFB FB Input Current -50 - 50 nA

INTERNAL POWER SWITCH

FSW Switching Frequency VFB=1.1V 0.8 1.0 1.2 MHz

RON Power Switch On Resistance - 0.6 - Ω

ILIM Power Switch Current Limit 1 1.3 1.6 A

LX Leakage Current VEN=0V, VLX=0V or 5V, VIN = 5V -1 - 1 µA

DMAX LX Maximum Duty Cycle 92 95 98 %

SOFT-START AND SHUTDOWN

TSS Soft-Start Duration (Note 4) - 2 3 ms

VTEN EN Voltage Threshold VEN Rising 0.4 0.7 1 V

EN Voltage Hysteresis - 0.1 - V

ILEN EN Leakage Current VEN=5V, VIN = 5V -1 ±0.5 1 µA

OVER-TEMPERATURE PROTECTION

TOTP Over-Temperature Protection (Note 4) TJ Rising - 150 - °C

Over-Temperature Protection Hysteresis (Note 4) - 40 - °C

Note 4: Guaranteed by design, not production tested.


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(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, unless otherwise specified)

Switching Current vs. Supply Voltage Reference Voltage vs.Junction Temperature

Switch ON Resistance vs.Junction temperature

Maximum Duty Cycle vs. Supply Voltage

Switching Frequency vs.Supply Voltage

Typical Operating Characteristics

Switching Frequency vs.Junction Temperature

Switching Current, IDD (mA)

Supply Voltage, VIN (V)

02.5 3 3.5 4 4.5 5 5.5 6

0.2

0.4

0.6

0.8

1

1.2

VFB=1.0V Reference Voltage, VREF (%)

Junction Temperature, TJ (°C)

-50 -25 0 25 50 75 100 1251.18

1.19

1.20

1.21

1.22

1.23

1.24

1.25

1.26

1.27

1.28

Switch ON Resistance, RON (Ω)


0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

-50 -25 0 25 50 75 100 125

VIN=2.7V

VIN=3.6V

VIN=5V Maximum Duty Cycle, DMAX (%)


40

50

60

70

80

90

100

2.5 3 3.5 4 4.5 5 5.5 6

Switching Frequency, FSW (MHz)

Supply Voltage, VIN (V)2.5 3 3.5 4 4.5 5 5.5 6

0.4

0.5

0.6

0.7

0.8

0.9

1

1.1

1.2


Switching Frequency, FSW (MHz)

-50 -25 0 25 50 75 100 1250.4

0.5

0.6

0.7

0.8

0.9

1

1.1

1.2


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Efficiency vs. Output Current Output Voltage vs. Output Current

Output Voltage vs. Supply Voltage

Typical Operating Characteristics (Cont.)

Output Voltage, VOUT(V)

Output Current, IOUT (mA)0.1 1 10 100 1000

11.80

11.85

11.90

11.95

12.00

12.05

12.10

12.15

12.20

VIN=5V

VIN=3.3V

Output Voltage, VOUT(V)


11.80

11.85

11.90

11.95

12.00

12.05

12.10

12.15

12.20

2.5 3 3.5 4 4.5 5 5.5 6


Efficiency, η

(%)

Output Current, IOUT (mA)0.1 1 10 100 1000

0

10

20

30

40

50

60

70

80

90

100VIN=5V

VIN=3.3V

VOUT=12V


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Operating Waveforms(Refer to Fig 1. in the section “Typical Application Circuits”, VIN=3.6V, TA=25

oC, unless otherwise specified)

CH1: VEN, 1V/Div, DCCH2: VOUT, 5V/Div, DCCH3: IIN, 100mA/Div, DCTime: 0.5ms/Div

Start-up

1

2

IIN, 100mA/Div

VEN, 1V/Div, DC

Time: 0.5ms/Div

VOUT, 5V/Div, DC

3

VIN=3.6VIOUT=1mA

CH1: VEN, 1V/Div, DCCH2: VOUT, 5V/Div, DCCH3: IIN, 100mA/Div, DCTime: 0.5ms/Div

Start-up

1

2 IIN, 100mA/Div

VEN, 1V/Div, DC

Time: 0.5ms/Div

VOUT, 5V/Div, DC

3 VIN=3.6VIOUT=100mA

Normal Operation

CH1: VLX, 10V/Div, DCCH2: VOUT, 50mV/Div, ACCH3: IL, 100mA/Div, DCTime: 1µs/Div

1

2

3

IL, 100mA/Div

VOUT, 50mV/Div

VLX, 10V/Div

VIN=3.3VIOUT=80mATime: 1µs/Div

Normal Operation

CH1: VLX, 10V/Div, DCCH2: VOUT, 50mV/Div, ACCH3: IL, 100mA/Div, DCTime: 1µs/Div

1

2

3Time: 1µs/Div

IL, 100mA/Div

VOUT, 50mV/Div

VLX, 10V/Div

VIN=5VIOUT=80mA


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Operating Waveforms (Cont.)

CH1: VOUT, 200mV/Div, ACCH2: IOUT, 50mA/Div, DCTime: 0.2ms/Div

Load Transient Response

1

2

IOUT, 50mA/Div

VIN=3.3VVOUT=12V

VOUT, 200mV/Div, AC

1mA

30mA

Time: 0.2ms/Div



1

2IOUT, 50mA/Div

VIN=3.3VVOUT=12V

VOUT, 200mV/Div, AC

1mA

30mA

Time: 0.5ms/Div



1

2

IOUT, 50mA/Div

VIN=5VVOUT=12V

VOUT, 200mV/Div, AC

1mA

30mA

Time: 0.2ms/Div



1

2IOUT, 50mA/Div

VIN=5VVOUT=12V

VOUT, 200mV/Div, AC

1mA

30mA

Time: 0.5ms/Div



APW7137

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1

2

IOUT, 50mA/Div

VIN=3.3VVOUT=12V

VOUT, 200mV/Div, AC

30mA

150mA

Time: 0.1ms/Div



1

2

IOUT, 50mA/Div

VIN=3.3VVOUT=12V

VOUT, 200mV/Div, AC

30mA

150mA

Time: 0.1ms/Div



1

2

IOUT, 50mA/Div

VIN=5VVOUT=12V

VOUT, 200mV/Div, AC

30mA

150mA

Time: 0.1ms/Div



1

2

IOUT, 50mA/Div

VIN=5VVOUT=12V

VOUT, 200mV/Div, AC

30mA

150mA

Time: 0.1ms/Div



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Line Transient Response

CH1: VIN, 1V/Div, DCCH2: VOUT, 0.2/Div, ACTime: 0.2ms/Div

IOUT=40mAVOUT=12V

VIN, 1V/Div, DC

4V

5V

Time: 0.2ms/Div

VOUT, 0.2V/Div, AC

1

2


CH1: VIN, 1V/Div, DCCH2: VOUT, 0.2/Div, ACTime: 0.2ms/Div

IOUT=40mAVOUT=5V

VIN, 1V/Div, DC

3.2V

4.2V

Time: 0.2ms/Div

VOUT, 0.2V/Div, AC

1

2



APW7137

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Pin Description

PIN.

NO NAME FUNCTION

1 LX Switch pin. Connect this pin to inductor/diode here.

2 GND Power and signal ground pin.

3 FB Feedback Input. The device senses feedback voltage via FB and regulate the voltage at 1.23V. Connecting FB with a resistor-divider from the output that sets the output voltage in the range from VIN to 30V.

4 EN Enable Control Input. Forcing this pin above 1.0V enables the device. Forcing this pin below 0.4V to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA. Do not left this pin floating.

5 VIN Main Supply Pin. Must be closely decoupled to GND with a 2.2µF or greater ceramic capacitor.

Block Diagram

UVLO

Oscillator

Control Logic

Σ

VIN

EN

FBGND

LX

Over-TemperatureProtection

VREF1.23V

EAMPCOMP

ICMP

Soft-Start

ErrorAmplifier

Current SenseAmplifier

Gate Driver

CurrentLimit

SlopCompensation


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Typical Application Circuits

GND

VIN

VOUT

12V

EN

LX

FB4

5

3

2

1

L1

10µH

C24.7µF

C14.7µF

R2137kΩ

VIN

5V

OFF

R11.2MΩ

ON

GND

VIN

VOUT

5V

EN

LX

FB4

5

3

2

1

L1

4.7µH

C210µF

C14.7µF

R2140kΩ

VIN

OFF

R1430kΩ

ON

Fig 1. Typical 5V to 12V Supply

GND

VIN

VOUT

5V

EN

LX

FB4

5

3

2

1

L1

4.7µH

C210µF

C14.7µF

R2140kΩ

VIN

3.3V

OFF

R1430kΩ

ON

Fig 2. Standard 3.3V to 5V Supply

APW7137

APW7137

APW7137

+9V

+13V

-8V

-4V

Fig 4. Multiple Output for TFT-LCD Power Supply

C3

0.1µFC40.47µF

C60.47µF

C5

0.1µF

C80.47µF

C7

0.1µF

C100.47µF

C9

0.1µF

GND

VIN

VOUT

EN

LX

FB4

5

3

2

1

L1

22µH

C21µF

C14.7µF

R162Ω

VIN

Up to 8WLEDs

Fig 3. Brightness control using a PWM signal apply to EN

100Hz~300Hz

Duty=100%, ILED=20mA

Duty=0%, LED off

APW7137


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Function Description

Main Control Loop

The APW7137 is a constant frequency and current-modeswitching regulator. In normal operation, the internal N-channel power MOSFET is turned on each cycle when theoscillator sets an internal RS latch, and then turned offwhen an internal comparator (ICMP) resets the latch. Thepeak inductor current at which ICMP resets the RS latchis controlled by the voltage on the COMP node which isthe output of the error amplifier (EAMP). An external resis-tive divider connected between VOUT and ground allowsthe EAMP to receive an output feedback voltage VFB at FBpin. When the load current increases, it causes a slightlyto decrease in VFB associated with the 1.23V reference,which in turn, it causes the COMP voltage to increaseuntil the average inductor current matches the new loadcurrent.

VIN Under-Voltage Lockout (UVLO)

The Under-Voltage Lockout (UVLO) circuit compares theinput voltage at VIN with the UVLO threshold to ensurethe input voltage is high enough for reliable operation.The 100mV (typ) hysteresis prevents supply transientsfrom causing a restart. Once the input voltage exceedsthe UVLO rising threshold, startup begins. When the in-put voltage falls below the UVLO falling threshold, thecontroller turns off the converter.

Soft-Start

The APW7137 has a built-in soft-start to control the outputvoltage rise during start-up. During soft-start, an internalramp voltage, connected to the one of the positive inputsof the error amplifier, raises up to replace the referencevoltage (1.23V typical) until the ramp voltage reaches thereference voltage.

Current-Limit Protection

The APW7137 monitors the inductor current, flows throughthe N-channel MOSFET, and limits the current peak atcurrent-limit level to prevent loads and the APW7137 fromdamaging during overload or short-circuit conditions.

Over-Temperature Protection (OTP)

The over-temperature circuit limits the junction tempera-ture of the APW7137. When the junction temperature ex-ceeds 150oC, a thermal sensor turns off the powerMOSFET allowing the devices to cool. The thermal sen-sor allows the converters to start a soft-start process andregulates the output voltage again after the junction tem-perature cools by 40oC. The OTP is designed with a 40oChysteresis to lower the average Junction Temperature(TJ) during continuous thermal overload conditions in-creasing the lifetime of the device.

Enable/Shutdown

Driving EN to the ground places the APW7137 in shut-down mode. When in shutdown, the internal powerMOSFET turns off, all internal circuitry shuts down, andthe quiescent supply current reduces to 1µA maximum.


APW7137

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Application InformationInput Capacitor Selection

The input capacitor (CIN) reduces the ripple of the inputcurrent drawn from the input supply and reduces noiseinjection into the IC. The reflected ripple voltage will besmaller when an input capacitor with larger capacitanceis used. For reliable operation, it is recommended toselect the capacitor with maximum voltage rating at least1.2 times of the maximum input voltage. The capacitorsshould be placed close to the VIN and the GND.

Inductor Selection

Selecting an inductor with low dc resistance reduces con-duction losses and achieves high efficiency. The efficiencyis moderated whilst using small chip inductor which op-

erates with higher inductor core losses. Therefore, it isnecessary to take further consideration while choosingan adequate inductor. Mainly, the inductor value deter-mines the inductor ripple current: larger inductor valueresults in smaller inductor ripple current and lower con-duction losses of the converter. However, larger inductorvalue generates slower load transient response. A rea-sonable design rule is to set the ripple current, ∆IL, to be30% to 50% of the maximum average inductor current,IL(AVG). The inductor value can be obtained as below,

where

VIN = input voltage

VOUT = output voltage

FSW = switching frequency in MHz

IOUT = maximum output current in amp.

η = Efficiency

∆IL /IL(AVG) = inductor ripple current/average current

(0.3 to 0.5 typical)

To avoid the saturation of the inductor, the inductor shouldbe rated at least for the maximum input current of theconverter plus the inductor ripple current. The maximuminput current is calculated as below:

η⋅

⋅=

IN

OUT)MAX(OUT)MAX(IN V

VII

The peak inductor current is calculated as the followingequation:

( )SWOUT

INOUTIN)MAX(INPEAK FLV

VVV21

II⋅⋅−⋅

⋅+=

Output Capacitor Selection

The current-mode control scheme of the APW7137 al-lows the usage of tiny ceramic capacitors. The highercapacitor value provides good load transients response.Ceramic capacitors with low ESR values have the lowestoutput voltage ripple and are recommended. If required,tantalum capacitors may be used as well. The output rippleis the sum of the voltages across the ESR and the idealoutput capacitor.

where IPEAK is the peak inductor current.

ΔVOUT = ΔVESR + ΔVCOUT

⋅−

⋅≈∆SWOUT

INOUT

OUT

OUTCOUT FV

VVCI

V

ESRPEAKESR RIV ⋅≈∆

VIN VOUTIL

N-FET

LX IOUT

ISWCIN

COUT

IIN D1

ESR

ILIM

IL

IPEAK

IIN

IOUT

ISW

ID

∆IL

( )

∆

η×

⋅−

×

≥

AVGL

L)MAX(OUTSW

INOUT2

OUT

IN

IIIF

VVVV

L


APW7137

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Application Information (Cont.)

Output Capacitor Selection (Cont.)

For ceramic capacitor application, the output voltage rippleis dominated by the ∆VCOUT. When choosing the input andoutput ceramic capacitors, the X5R or X7R with their goodtempera tu re and vo l tage charac te r i s t i cs a rerecommended.

Output Voltage Setting

The output voltage is set by a resistive divider. The exter-nal resistive divider is connected to the output which al-lows remote voltage sensing as shown in “Typical Appli-cation Circuits”. A suggestion of the maximum value ofR1 is 2MΩ and R2 is 200kΩ for keeping the minimumcurrent that provides enough noise rejection ability throughthe resistor divider. The output voltage can be calculatedas below:

+=

+⋅=2R1R

123.12R1R

1VV REFOUT

Diode Selection

To achieve the high efficiency, a Schottky diode must beused. The current rating of the diode must meet the peakcurrent rating of the converter.

Layout Consideration

R1

R2

L1

VEN

VINLX

Optimized APW7137 Layout

VOUT D1

C2

C1

For all switching power supplies, the layout is an impor-tant step in the design especially at high peak currentsand switching frequencies. If the layout is not carefullydone, the regulator might show noise problems and dutycycle jitter.1. The input capacitor should be placed close to the VIN

and the GND without any via holes for good input volt-age filtering.

2. To minimize copper trace connections that can injectnoise into the system, the inductor should be placed asclose as possible to the LX pin to minimize the noisecoupling into other circuits.

3. Since the feedback pin and network is a high imped-ance circuit the feedback network should be routed awayfrom the inductor. The feedback pin and feedback net-work should be shielded with a ground plane or trace tominimize noise coupling into this circuit.

4. A star ground connection or ground plane minimizesground shifts and noise is recommended.


APW7137

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Package InformationSOT-23-5

MAX.

0.057

0.051

0.024

0.006

0.009

0.0200.012

L 0.30

0

e

e1

E1

E

D

c

b

0.08

0.30

0.60 0.012

0.95 BSC

1.90 BSC

0.22

0.50

0.037 BSC

0.075 BSC

0.003

MIN.

MILLIMETERS

SYMBOL

A1

A2

A

0.00

0.90

SOT-23-5

MAX.

1.45

0.15

1.30

MIN.

0.000

0.035

INCHES

°8°0 °8°0

b c

e1

0L

VIEW A0.

25

GAUGE PLANESEATING PLANE

AA2

A1

e

D

EE1

SEEVIEW A

1.40

2.60

1.80

3.00

2.70 3.10 0.122

0.071

0.1180.102

0.055

0.106

Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.


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Application A H T1 C d D W E1 F

178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20

1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05

P0 P1 P2 D0 D1 T A0 B0 K0 SOT-23-5

4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.0 MIN.

0.6+0.00 -0.40

3.20±0.20 3.10±0.20 1.50±0.20

(mm)

Carrier Tape & Reel Dimensions

Devices Per Unit

Package Type Unit Quantity

SOT-23-5 Tape & Reel 3000

A

E1

AB

W

F

T

P0OD0

BA0

P2

K0

B0

SECTION B-B

SECTION A-A

OD1

P1

H

T1

A

d


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Test item Method Description SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V Latch-Up JESD 78 10ms, 1tr > 100mA

Reflow Condition (IR/Convection or VPR Reflow)

t 25 C to Peak

tp

Ramp-up

tL

Ramp-down

tsPreheat

Tsmax

Tsmin

TL

TP

25

Tem

per

atu

re

Time

Critical ZoneTL to TP

°

Reliability Test Program

Taping Direction InformationSOT-23-5

USER DIRECTION OF FEED


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Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (TL to TP)

3°C/second max. 3°C/second max.

Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts)

100°C 150°C

60-120 seconds

150°C 200°C

60-180 seconds

Time maintained above: - Temperature (TL) - Time (tL)

183°C 60-150 seconds


Peak/Classification Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp)

10-30 seconds 20-40 seconds

Ramp-down Rate 6°C/second max. 6°C/second max.

Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.

Note: All temperatures refer to topside of the package. Measured on the body surface.

Table 2. Pb-free Process – Package Classification Reflow Temperatures

Package Thickness Volume mm3

2000


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ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advisecustomers to obtain the latest version of relevant information to verify before placing orders.

Step-Up Converter and LDO Combo

Features General Description

Applications

• Dual Mode Power System• USB Peripheral• Camcorders and Digital Camera• Hand-Held Instrument• PDAs

The APW7075 is a PWM/PFM, high-efficiency, and step-up DC-DC converter with an integrated LDO input switchfor dual mode application. During battery mode operation,the APW7075 acts as synchronous rectifier and step-upDC-DC converter with a fixed or adjustable output voltage.When the VIN pin sense 5V input voltage, the APW7075 isswitched to LDO operation mode, maintaining the con-

stant output voltage.

The input voltage ranges from 0.6 V to 4.5V for step-upDC-DC converter. The start-up is guaranteed at 1V andthe device operates down to 0.6V. When the device is atLDO operating mode, the suitable output voltage 3.3Vand loading current 500mA for maximum power con-

sumption are guaranteed.

The APW7075 is suited for dual mode and portable bat-tery powered appliance with low-battery detector. In dual-mode applications, the APW7075 draws power from anyavailable 5V USB connection and reverts to battery powerwhen the USB power is removed.

• Built-In a 500mA LDO and Synchronous Step-Up DC-DC Converter

• Built-In PWM/PFM Operating Mode• Provided Dual Input Power Sources• Connect FB to OUT for 3.3V Output Voltage or

GND for 2.5V Output Voltage or an External

Resistor Divider for Adjustable Output Voltage.

• Fixed 300kHz Operating Frequency• High Efficiency Up to 94% at 200mA Output Current

• 0.6V to 4.5V Operating Voltage• 1V Start-Up Input Voltage• Low Battery Voltage Detection• Reverse Voltage Protection• Internal Synchronous Rectifier• Automatic Detection Input Voltage• Compact SOP-8P and TSSOP-8 Packages• Lead Free and Green Devices Available (RoHS Compliant)

Pin Configuration

VIN

SHDN

FB

LBI LBO

GND

LX

OUT1

2

3

4 5

6

7

8 VIN

SHDN

FB

LBI LBO

GND

LX

OUT1

2

3

4 5

6

7

8

= Thermal Pad (connected to GND plane for better heatdissipation)

TSSOP-8 Top View SOP-8P Top View


APW7075

www.anpec.com.tw2


Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; whichare fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C forMSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogenfree (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm byweight).

Symbol Parameter Value Unit

VOUT Supply Voltage (OUT to GND) -0.3 to 6.0 V

VIO Input / Output Pins -0.3 to 6.0 V

TA Operating Ambient Temperature Range 0 to 85 °C

TJ Junction Temperature Range 0 to 150 °C

TSTG Storage Temperature Range -65 to +150 °C

TS Soldering Temperature, 10 Seconds 260 °C


R θJA

Thermal Resistance − Junction to Ambient SOP-8 SOP-8-P TSSOP-8

124 80 160

°C/W


Absolute Maximum Ratings

APW7075Package Code KA : SOP-8P O : TSSOP-8Temperature Range C : 0 to 70 C I : -40 C to 85 CHandling Code TR : Tape & ReelAssembly Material L : Lead Free DeviceG : Halogen and Lead Free Device

°Handling Code

Temperature Range

Package Code

APW7075 KA : APW7075XXXXX XXXXX - Date Code

APW7075XXXXX

APW7075 O : XXXXX - Date Code

Assembly Material ° °


APW7075

www.anpec.com.tw3

Electrical CharacteristicsVBAT = 2V, FB = OUT (VOUT = 3.3V), RL = ∞, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.


Min. Typ. Max. Unit

STEP-UP SECTION

VBAT Minimum Operating Input Voltage (Note1) 0.6 - - V

Operating Voltage 0.6 - 4.5 V

Start-up Voltage RL = 3kΩ - 0.9 1 V

FSW Operating Frequency VOUT = 3.3VX96% - 300 - kHz

DMAX Maximum PWM Duty Cycle VOUT = 3.3VX96% - 90 - %

POWER MOSFET

RDS(on)-N Active Switch ON Resistance ILX = 100mA - 0.3 0.6 Ω

RDS(ON)-P Synchronous Switch on Resistance ILX = 100mA - 0.6 0.9 Ω

CONTROL

FB = OUT, ILOAD = 0mA 3.234 3.3 3.366 V Output Voltage

FB = GND, ILOAD = 0mA 2.45 2.5 2.55 V VOUT

Output Voltage Range External divider 2.5 - 5.5 V

VOUT(drop) VOUT Dropping Voltage (Note 2) VOUT = 3.3V, C OUT = 100µF - - 150 mV

TSS Soft-Start Time VOUT = 3.3V - 30 100 ms

VREF FB Input Threshold ILOAD = 0mA 1.176 1.2 1.224 V

IFB FB Input Current VFB = 1.4V - 0.03 50 nA

IDD Operating Current (Note3) VOUT = 3.3VX96%, ILOAD = 0mA - 70 140 µA

Shutdown Current VSHDN = 0 - 0.1 5 µA

ISHDN SHDN Input Current VSHDN = 0 or VOUT - 0.07 50 nA

Logic LOW (VIL) - 0.8 0.3 V SHDN

Logic HIGH(VIH) 1.4 0.8 - V

LBI Input Hysteresis - 10 - mV

VLBI LBI Threshold 0.588 0.6 0.612 V

ILBI LBI Input Current VLBI = 0.8V - 1 50 nA

VLBO LBO Logic Low VLBI = 0, ISINk = 1mA - 0.2 0.4 V

ILBO LBO Off Leakage Current VLBO = 5.5V, VLBI = 5.5V - 0.07 1 µA


APW7075

www.anpec.com.tw4

Unless otherwise noted these specifications apply over full temperature, 3.9V≤VIN


APW7075

www.anpec.com.tw5

0.6V. Open-drain device is turned on during shutdown.

OUT (pin 8)

Power output. OUT provides bootstrap power to the IC.

GND (Pin 6)

Ground pins of the circuitry and all ground pins must besoldered to PCB with proper power dissipation.

LX (pin 7)

N-channel and P-channel power MOSFET drainconnection.

Function Pin Description

VIN (Pin 1)

Input supply voltage for dual-mode application. Connecta schokkty diode (current rating >500mA) to USB port or5V adapter. If the LDO mode is not used, ties the VIN pinto the ground.

FB (pin 2)

Internal 1.2V reference voltage. Connect to OUT for 3.3Voutput. Connect to the GND for 2.5V output. Use a resistordivider to set the output voltage from 2.5V to 5.5V.

SHDN (pin 3)

Shutdown input. High = operating mode; Low = shut-down mode.

LBI (Pin 4)

Low-battery comparator input. Internally set to trip at 0.6V.

LBO (pin 5)

Open-drain low battery comparator output. Connect LBOto OUT through a 100kΩ resistor. Output is low as VLBI


APW7075

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Application Schematic

Connect the R6=500Ω to 1kΩ to GND

Figure 1. Dual Model : 3.3V Output Voltage


Figure 2. Dual Model : 2.5V Output Voltage

APW7075

1VIN

SHDN

LBI LBO

OUT

LX

GND

FB2

3

4

8

7

6

5

VBAT

Adapter5V

C2100µF

C110µF

L122UH

ON

OFF

C310µF

C41µF

VOUT

R3

R4

100kΩ

3.3V

Low Battery Output

1N5817

R6

R5

APW7075

1VIN

SHDN

LBI LBO

OUT

LX

GND

FB2

3

4

8

7

6

5

VBAT

C2100µF

C110µF

L122UH

ON

OFF

C310µF

C41µF

VOUT

R3

R4

100kΩ

2.5V

Low Battery Output

Adapter5V

1N5817

R6

R5


APW7075

www.anpec.com.tw7

Application Schematic (Cont.)


Figure 3. Dual Model: Adjustable Output Voltage

Figure 4. Single Boost Converter

3.6V

3.8V

APW7075

1VIN

SHDN

LBI LBO

OUT

LX

GND

FB2

3

4

8

7

6

5

VBAT

C2100µF

C110µF

L122UH

ON

OFF

C310µF

C41µF

VOUTR1

R2

R4

300kΩ

150kΩ

100kΩ

Low Battery Output

VOUT≦ 2.5V ≦

Adapter5V

1N5817

R5

R6

0.6V

5V

APW7075

1VIN

SHDN

LBI LBO

OUT

LX

GND

FB2

3

4

8

7

6

5

VBAT

C2100µF

C110µF

L122UH

ON

OFF

C41µF

VOUTR1

R2

R3

R4

300kΩ

150kΩ

100kΩ

3.6V

Low Battery Output

VOUT≦ 2.5V ≦

≦ 4.5V≦VBAT


APW7075

www.anpec.com.tw8


Time(10ms/div)

VBAT(1V/div)

VOUT(1V/div)

LX(2V/div)

IOUT=100mA

Time(10ms/div)

VBAT(1V/div)

VOUT(1V/div)

LX(2V/div)

IOUT=100mA

Power Up (VBATTERY=2.4V) Power Up (VBATTERY=1.2V)

Block Diagram

Drive

CurrentLimit

P-MOS

N-MOS

PWM/PFM

controller

Vref

phasecompensation

soft-startvoltagereference

Oscillator

Vref

LX

Vref

OUT

VIN

LBOLBI

FB

GND

P-MOSSHDN

VDD

VDD

VDD

VDD

N-MOS

Q1

Q2

Q3

Q4

VDD

A

B

C

Y

ABC

YFB

VOUTGNDR1,R2

2

SHDN


APW7075

www.anpec.com.tw9

Time(5ms/div)

VBAT(2V/div)

VOUT(1V/div)

LX(2V/div)

IOUT=100mA

Time(10ms/div)

SHDN(1V/div)

VOUT(1V/div)

LX(2V/div)

IOUT=100mA

Power Down Enable


SHDN(1V/div)

VOUT(1V/div)

LX(2V/div)

IOUT=100mA

Time(1ms/div) Time(1µs/div)

IL(200mA/div)

LX(2V/div)

LOUT(100mV/div)

IOUT=100mA, VOUT=3.3VVBAT=2.4V, CBAT=10µFCOUT=100µF, L=22µH

Shutdown Heavy Load Operating Waveforms


APW7075

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Time(5µs/div)

IL(200mA/div)

LX(2V/div)

LOUT(100mV/div)

IOUT=30mA, VOUT=3.3VVBAT=2.4V, CBAT=10µFCOUT=100µF, L=22µH

Light Load Operating Waveforms

0

0.2

0.4

0.6

0.8

1

1.2

1.4

0.1 1 10 100

Output Current(mA)

Sta

rt-u

p V

olta

ge(V

)

Output Current vs. Start-up Voltage

0

10

20

30

40

50

60

70

80

90

100

0.01 0.1 1 10 100 1000

0

10

20

30

40

50

60

70

80

90

100

0.01 0.1 1 10 100 1000

VOUT=2.5V, L=22µHVIN=1.2V

VIN=2.4V

VIN=1.2V

VOUT=3.3V, L=22µH

Output Current(mA)

Eff

cien

cy(%

)

Output Current(mA)

Eff

cien

cy(%

)

Effciency vs. Output Current Effciency vs. Output Current


APW7075

www.anpec.com.tw11

0

10

20

30

40

50

60

70

80

90

100

0.01 0.1 1 10 100 1000


VIN=2.4V

VOUT=3.3V, L=10µH

VIN=1.2V

Output Current(mA)

Eff

icie

ncy(

%)

Efficiency vs. Output Current

0

10

20

30

40

50

60

70

80

90

100

0.01 0.1 1 10 100 1000

Output Current(mA)

Eff

icie

ncy(

%)


VOUT=2.5V, L=10µHVIN=1.2V

0

250

500

750

1000

1 1.5 2 2.5 3 3.5 4

0

0.1

0.2

0.3

0.4

0.5

0 0.5 1 1.5 2 2.5 3 3.5 4

Output Voltage(V)

Ope

ratin

g C

urre

nt in

to O

UT

(mA

)

Operating Curretnt into OUT vs. Output Voltage

FB=1.4V

Input Voltage(V)

Max

imum

Out

put C

urre

nt (m

A)

Maximum Output Current vs.Input Voltage

VOUT=3.6VVOUT=3.3V

VOUT=2.5V

VOUT=5V

L=22µH


APW7075

www.anpec.com.tw12

0

100

200

300

400

500

1 1.5 2 2.5 3 3.5 4


0

100

200

300

400

500

1 1.5 2 2.5 3 3.5 4

L=10µH

VOUT=3.3V

VOUT=2.5V

VOUT=3.6V

VOUT=5V

The

trans

ition

from

PFM

to P

WM

(mA

)

Input Voltage(V)

Transition from PFM to PWM vs. Input Voltage

The

trans

ition

from

PFM

to P

WM

(mA

)

Input Voltage(V)

VOUT=3.3V

VOUT=2.5V

VOUT=3.6V

VOUT=5V

L=22µH

Transition from PFM to PWM vs. Input Voltage

0

50

100

150

200

250

300

0 0.5 1 1.5 2 2.5 3

Inpu

t Bat

tery

Cur

rent

(µA

)

Input Battery Voltage(V)

Input Battery Current vs. Input Battery Voltage

VOUT=3.3V

VOUT=2.4V

Time(2ms/div)

VBAT(2V/div)

VOUT(200mV/div)

IOUT=100mA, VOUT=3.3VVBAT=2V~3V



APW7075

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Time(0.5ms/div)

VOUT(200mV/div)

IOUT=10~300mA

VBAT=2.4V, VOUT=3.3VL=22µH

Time(50µs/div)

IOUT=100mA, VOUT=3.3VCIN=10µF, VBAT=2.4V

VIN(2V/div)

VOUT(100mV/div)

LX(2V/div)

Load Transient Response PWM to LDO

VIN(2V/div)

VOUT(100mV/div)

LX(2V/div)

IOUT=100mA, VOUT=3.3VCIN=10µF, VBAT=2.4V

Time(0.2ms/div)

VIN(2V/div)

VOUT(2V/div)

IIN(1A/div)

IOUT=100mA

Time(10ms/div)

LDO to PWM LDO Power Up


APW7075

www.anpec.com.tw14


VIN(20V/div)

VOUT(2V/div)

IN(1A/div)

IOUT=100mA

Time(10ms/div)

VIN=5V, VOUT=3.

VOUT(50mV/div)

IOUT=10mA~500mA

Time(5µs/div)

LDO Power Down LDO Load Transient Response

Time(5µs/div)

VOUT(50mV/div)

VIN=5V, VOUT=3.

IOUT=10mA~500mA

LBI(0.5V/div)

LBO(2V/div)

VBAT=2.4V, VOUT=3.3V

Time(5µs/div)

LDO Load Transient Response LBO Rising Delay Time


APW7075

www.anpec.com.tw15


LBI(0.5V/div)

LBO(2V/div)

VBAT=2.4V, VOUT=3.3V

Time(5µs/div)

0

5

10

15

20

25

30

0 0.25 0.5 0.75 1 1.25 1.5

VOUT=3.3V

LBO Output Low Voltage(V)

LBO

Sin

k C

urre

nt(m

A)

LBO Output Sink Current vs. LBO Low VoltageLBO Falling Delay Time

0

0.2

0.4

0.6

0.8

1

1.2

4 4.5 5 5.5 6

LDO Input Voltage(V)

LDO

Cur

rent

Lim

it(A

)

LDO Current Limit vs. LDO Input Voltage

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

4 4.5 5 5.5 6

LDO

Qui

esce

nt C

urre

nt (

A)


IOUT=10mA

IOUT=0mA

LDO Quiescent Current vs. LDO Input Voltage


APW7075

www.anpec.com.tw16

0

100

200

300

400

500

600

700

0 100 200 300 400 5000

0.2

0.4

0.6

0.8

1

1.2

0 100 200 300 400 500


Qui

esce

nt C

urre

nt (

mA

)

LDO Output Current(mA)

VIN=5V

Quiescent Current vs. LDO Output Current

LDO Output Current(mA)

Dro

pout

Vol

tage

(m

V)

Dropout Voltage vs. LDO Output Current

VOUT=4.2V

3.27

3.275

3.28

3.285

3.29

3.295

3.3

-40 -20 0 20 40 60 80 100 120 140

Out

put V

olta

ge (

V)

Temperature (oC )

Output Voltage vs. Temperature

3.297

3.298

3.299

3.3

3.301

3.302

3.303

4 4.5 5 5.5 6

Iout=0mA


Out

put V

olta

ge (

V)

Output Voltage vs. LDO Input Voltage

IOUT=0mA


APW7075

www.anpec.com.tw17

The APW7075 has an active high enable function. ForceSHDN high (>1.4V) to enable the step-up converter, SHDNlow (


APW7075

www.anpec.com.tw18

Application Information

Output Voltage Selection

The output voltage of APW7075 can be adjusted by anexternal resistor divider, or connect FB pin to OUT for3.3V and to the ground for 2.5V (see ApplicationSchematic). The internal reference voltage is 1.2V andthe allowed output voltage is from 2.5V to 5.5V. The fol-lowing equation can be used to calculate the outputvoltage:

Programming Low Battery Threshold Voltage

The low battery threshold voltage can be programmedwith a resistive divider from battery to LBI pin to the ground(see Application Schematic). The internal reference volt-age is 0.6V, and the low battery threshold voltage mustbe below the battery voltage. The following equation canbe used to calculate the low battery threshold voltage:

0.6VR4

R31V TH-BAT ×+=

Inductor Selection

The APW7075 works well with a 22µH inductor in mostapplications. The inductance values determine the induc-tor ripple current and affect the output current. Higher in-ductance values reduce ripple and improve efficiency.Lower inductance values have fast response but increasethe ripple and reduce the efficiency. The maximum al-lowed LX current is 1A (the maximun output current showsin Typical Characteristics), therefore, the peak inductorcurrent cannot exceed it. The following equations calcu-late the inductor current, and output current.

( )fLD1

V(VIL INOUT×−

×−=∆ )

IOUT = IL x (1-D)

1.2VR2

R11VOUT ×+=

Where:

D =OUT

IN OUT

VVV −

The inductor’s DC resistance affects the efficiency; largerresistance dissipates more power, it should be as smallas possible. It is important to choose the inductor’s satu-ration current rating greater than the peak current whichthe inductor will flow in the application.

Boost Converter Input Capacitor Selection

At least a 10µF input capacitor is recommended to stabi-lize the battery voltage and minimizes the peak currentripple from the battery.

LDO Input Capacitor Selection

The LDO input capacitor with larger values and lowerESRs provides better PSRR and line transient response.At least a 10µF capacitor is recommended.

Output Capacitor Selection

ESR)VFC

VVI Voripple

OUTSWOUT

BATOUT OUT +

××−

×= (

recommended. The following equation calculates theoutput ripple.

The output capacitor is used for supplying the output dur-ing internal N-channel MOSFET turns on time. Larger ca-

pacitance and lower ESR reduce the output voltage ripple.The output voltage supplies the power to the IC and sothe output voltage ripple must be as small as possible toprovide better PSRR. In general, a 100µF to 220µF lowESR Tantalum capacitor is recommended, a 1µF ceramiccapacitor in parallel for bypassing the noise is also


The correct PCB layout is important for all switchingconverters. If the layout is not carefully done, the regulatorcould show stability problems as well as EMI problems.Figure 5 illustrates the layout guidelines, the bold linesindicate the high current paths; these traces must be shortand wide. The input capacitors, output capacitors, and theinductor should be as close to the IC as possible. Use acommon ground plane for power ground and a differentone for control ground to minimize the effects of the groundnoise. Connect these ground planes at a node close tothe GND pin of IC. The feedback and LBI resistor dividersshould be placed as close to the IC as possible.


APW7075

www.anpec.com.tw19

Figure 5. Recommended Layout Diagram

APW7075

1VIN

SHDNLBI LBO

OUTLX

GNDFB

234

8

76

5 VBAT

USB 5V

C2100uF

C110uF

22UH

C310uF

C41uF

VOUT

Application Information (Cont.)

Layout Consideration (Cont.)


APW7075

www.anpec.com.tw20

Package Information

SOP-8P

0.020

0.010

0.020

0.050

0.006

0.063

MAX.

0.40L

0

E

e

h

E1

0.25

D

c

b

0.17

0.31

0.0161.27

0.50

1.27 BSC

0.51

0.25

0.050 BSC

0.010

0.012

0.007

MILLIMETERS

MIN.

SYMBOL

A1

A2

A

0.00

1.25

SOP-8P

MAX.

0.15

1.60

MIN.

0.000

0.049

INCHES

D1 2.25 0.098

2.00 0.079E2

3.50

3.00

0.138

0.118

8o 0o 8o0o

h X

45°

D

e

EE1

SEE VIEWA

cb

D1E

2THERMALPAD

A

0L

VIEW A0.

25

SEATING PLANEGAUGE PLANE

A1

A2

Inter-lead flash and protrusions shall not exceed 10 mil per side.

Note : 1. Follow JEDEC MS-012 BA. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side . 3. Dimension "E" does not include inter-lead flash or protrusions.

4.80 5.00

5.80 6.20

3.80 4.00

0.2440.228

0.1570.150

0.1970.189


APW7075

www.anpec.com.tw21

Package Information

TSSOP-8

SYMBOL MIN. MAX.

1.20

0.05

0.09 0.20

2.90 3.10

0.15

A

A1

c

D

E1

L

e

MILLIMETERS

b 0.19 0.30

0.65 BSC

TSSOP-8

4.30 4.50

0.026 BSC

MIN. MAX.

INCHES

0.047

0.002

0.007 0.012

0.004 0.008

0.114 0.122

0.244 0.260

0.169 0.177

0

0.006

A2 0.80 1.05

6.20 6.60E

0.031 0.041

Note : 1. Follow JEDEC MO-153 AA 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side.

S

8 0 80 °° °°

D

E1

E

e b

A2 A

A1

VIEW A

SEATING PLANE

GAUGE PLANE

0.25

L

SEE VIEW A

C

0.45 0.75 0.018 0.030


APW7075

www.anpec.com.tw22


330.0±2.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05

P0 P1 P2 D0 D1 T A0 B0 K0 SOP-8P

4.0±0.10 8.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00

-0.40 6.40±0.20 5.20±0.20 2.10±0.20


330.0±2.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.10

P0 P1 P2 D0 D1 T A0 B0 K0 TSSOP-8

4.00±0.10 8.00±0.10 2.00±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00

-0.40 6.90±0.20 3.40±0.20 1.60±0.20


Devices Per Unit

(mm)


SOP-8P Tape & Reel 2500

TSSOP-8 Tape & Reel 2500

A

E1

AB

W

F

T

P0OD0

BA0

P2

K0

B0

SECTION B-B

SECTION A-A

OD1

P1

H

T1

A

d


APW7075

www.anpec.com.tw23

Taping Direction Information

t

SOP-8P


TSSOP-8



APW7075

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Test item Method Description SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V Latch-Up JESD 78 10ms, 1tr > 100mA

Reliability Test Program

Reflow Condition (IR/Convection or VPR Reflow)

t 25 C to Peak

tp

Ramp-up

tL

Ramp-down

tsPreheat

Tsmax

Tsmin

TL

TP

25

Tem

per

atu

re

Time

Critical ZoneTL to TP

°

Classification Reflow ProfilesProfile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly

Average ramp-up rate (TL to TP)

3°C/second max. 3°C/second max.

Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts)

100°C 150°C

60-120 seconds

150°C 200°C

60-180 seconds

Time maintained above: - Temperature (TL) - Time (tL)



Peak/Classification Temperature (Tp) See table 1 See table 2 Time within 5°C of actual Peak Temperature (tp)

10-30 seconds 20-40 seconds

Ramp-down Rate 6°C/second max. 6°C/second max.

Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.

Notes: All temperatures refer to topside of the package. Measured on the body surface.


APW7075

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Table 2. Pb-free Process – Package Classification Reflow Temperatures

Package Thickness Volume mm3

2000

Copyright ANPEC Electronics Corp.Rev. A.7 - Jun., 2009

APW7077/A

www.anpec.com.tw1

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, andadvise customers to obtain the latest version of relevant information to verify before placing orders.

PWM Step-Up DC-DC Converter

Features General Description

Applications

• Cellular and Portable Phones• Portable Audio• Camcorders and Digital Still Camera• Hand-held Instrument• PDAs

The APW7077/A series are multi- function PWM step-upDC-DC converter with an adaptive voltage mode control-ler and higher efficiency application from one to four cellsbattery packs. The APW7077/A series are set PWM oper-ating mode, voltage-mode to follow portable application.And built-in driver pin, EXT pin, for connecting to an exter-nal transistor or MOSFET during light load, the device willautomatically skip switching cycles to maintain highefficiency. The APW7077/A series consist of PWMcontroller, reference voltage, phase compensation,oscillator, soft-start, driver block. It will be provided to op-erate suitable voltage without external compensationcircuit. The APW7077/A series have fixed voltage and ad-justable voltage version from a wide input voltage ranges0.7V to 5.5V for step-up DC-DC converter. The start-up isguaranteed at 1V and the device is operating down to0.7V, and providing up to 300mA loading current. Besides,low quiescent current (switch-off) is guaranteed.

• Low Start-Up Voltage 0.9V• Fixed 300kHz Operating Frequency• Built-In Internal Soft-Start Circuit• Low Operating Current• 3.3V and 5V (±2.5%) Fixed (APW7077) or

Adjustable Output Voltage (APW7077A)

• High Efficiency Up to 88% at 400mAOutput Current

• High Output Current Up to 1A• Compact Package: SOT-23-5• Lead Free and Green Devices Available

(RoHS Compliant)

Pin Configuration

VOUTCE NC

GNDEXT

1 2 3

45

FB VDD CE

GNDEXT

1 2 3

45

SOT-23-5 (Top View)

SOT-23-5 (Top View)

APW7077 APW7077A


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Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; whichare fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C forMSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogenfree (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm byweight).

Symbol Parameter Rating Unit

VDD Supply Voltage -0.3 to 7 V

VIO Input / Output Pins (CE, FB, EXT) -0.3 to 7 V

TA Operating Ambient Temperature Range -40 to 85 °C

TJ Junction Temperature Range -40 to 150 °C

TSTG Storage Temperature Range -65 to +150 °C

TS Maximum Lead Soldering Temperature, 10 Seconds 260 °C


RθJA Thermal Resistance − Junction to Ambient (Note 2)

SOT-23-5 200 °C/W


Absolute Maximum Ratings (Note 1)

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolutemaximum rating conditions for extended periods may affect device reliability.

Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.

APW7077/A Package Code B : SOT-23-5Temperature Range I : -40 to 85 oCHandling Code TR : Tape & ReelVoltage Code R : 3.3V Z : 5.0VAssembly Material G : Halogen and Lead Free Device

Handling Code

Temperature Range

Package Code

APW7077 33B :

Assembly Material

Voltage Code

APW7077A B : A77X

X - Date Code; R : 3.3V

X - Date Code

APW7077 50B : X - Date Code; Z : 5.0V

77RX

77ZX


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Electrical Characteristics

APW7077A Symbol Parameter Test Conditions

Min. Typ. Max. Unit

STEP-UP SECTION

VIN Minimum Operating Input Voltage VOUT = VDD - 0.9 - V

VDD Operating Voltage VIN = VDD 1.9 - 5.5 V

Start-Up Voltage IO


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Electrical Characteristics (Cont.)


Min. Typ. Max. Unit

STEP-UP SECTION

VIN Minimum Operating Input Voltage 0.7 - - V

Operating Voltage 1 - 5.5 V

APW7077_33, Io


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20

30

40

50

60

70

80

90

100

1 10 10020

30

40

50

60

70

80

90

100

1 10 100 1000

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

0 50 100 1 5 0 20 0 25 0 3000

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

0 50 100 150 200 250 300


Start-up/Hold Voltage vs. Output Current

Output Current (mA)

Inpu

t Vol

tage

(V

) VSTART-up

Vhold

VOUT=3.3V

Start-up/Hold Voltage vs. Output Current

Output Current (mA)

Inpu

t Vol

tage

(V

) VSTART-up

Vhold

VOUT=5.0V


Output Current (mA)

Eff

icie

ncy(

%)

VDD=5V

VDD=3.3V

VOUT=12VL=10µF


Output Current (mA)

Eff

icie

ncy(

%)

VOUT=5VL=10µH

VDD=3V

VDD=2V


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2 70

2 80

2 90

3 00

3 10

3 20

3 30

-40 -20 0 20 40 60 80

3. 20

3. 22

3. 24

3. 26

3. 28

3. 30

3. 32

3. 34

3. 36

3. 38

3. 40

-40 -20 0 20 40 60 80

4. 98

4. 985

4. 99

4. 995

5

5. 005

5. 01

5. 015

5. 02

0 200 4 00 600 8 00 1 0 00

3. 28

3.285

3. 29

3.295

3. 3

3.305

3. 31

3.315

3. 32

0 200 400 600 8 00 10 00


Output Voltage vs. Output Current

Out

put V

olta

ge (

V)

Output Current (mA)

VIN=2.5V

VIN=1.2V VIN=2.0V

VOUT=3.3V

Output Voltage vs. Output Current

Out

put V

olta

ge (

V)

Output Current (mA)

VIN=3.0V

VIN=1.2VVIN=2.0V

VOUT=5.0V

Output Voltage vs. Temperature

Temperature (°C)

Out

put V

olta

ge (

V)

Oscillation Frequency vs. Temperature

Temperature (°C)

Osc

illat

ion

Fre

quen

cy (

kHz)


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0

2 0

4 0

6 0

8 0

100

120

140

160

0 1 2 3 4 5 6

1

1 0

100

0 1 2 3 4 5 6

Load Transient Waveform Load Transient Waveform

EXT Driving Current vs. Supply Voltage EXT Rds,on vs. Supply Voltage

VIN=3.3V, VOUT=12V, IOUT=5mA->50mA->5mAL=10µH, COUT=4.7µF+0.1µF, Cff=560pFCH1:VOUT, 100mV/DIV, Time=1ms/DIVCH4:IOUT, 20mA/DIV

VIN=3.3V, VOUT=5V, IOUT=10mA->300mA->10mAL=10µH, COUT=22µF+22µF+0.1µF, Cff=33pFCH1:VOUT, 100mV/DIV, Time=1ms/DIVCH4:IOUT, 200mA/DIV

Supply Voltage (V) Supply Voltage (V)

Sin

k/S

ourc

e C

urre

nt (

mA

)

Rds

,on

resi

stan

ce (

Ω)

ISINK(EXT=0.4V)

ISOURCE(EXT=VDD-0.4V)

EXT to VDD

EXT to GND


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0

5 0

100

150

200

250

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.50

0.5

1

1.5

2

2.5

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

0

5 0

10 0

15 0

20 0

25 0

30 0

35 0

0 0. 5 1 1. 5 2 2. 5 3 3.5 4 4. 5 5 5.50

10

20

30

40

50

60

70

80

90

100

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5



Oscillation Frequency vs. Supply Voltage

Osc

illat

ion

Fre

quen

cy (

kHz)

Maximum Duty vs. Supply Voltage

Max

imum

Dut

y (%

)

Feedback Voltage vs. Supply Voltage


Fee

dbac

k V

olta

ge (

V)

Sup

ply

Cur

rent

(µA

)

Supply Current vs. Supply Voltage

Switching Mode

Non Switching Mode


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0.980

0.985

0.990

0.995

1.000

1.005

1.010

1.015

1.020

-40 - 20 0 2 0 4 0 60 8 0

Temperature (°C)

Fee

dbac

k V

olta

ge (

V)

Feedback Voltage vs. Temperature

PIN

NO.

APW7077 APW7077A NAME

FUNCTION

1 3 CE Chip enable input. High = operating mode; Low = shutdown mode

5 5 EXT External MOSFET or transistor drive pin.

4 4 GND Ground pins of the circuit.

- 2 VDD Supply voltage.

- 1 FB FB: Internal 1.0V reference voltage. Use a resistor divider to set the output voltage

from and VOUT =

+

1R2R

1 VFB.

3 - NC No internal connection to the pin.

2 - VOUT VOUT Provides bootstrap power to the IC.

Pin Descripition


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Block Diagram

DriverPWM

Controller

PhaseCompensation

Soft-StartVoltage

Reference

RAMPGEN.

EXT

VOUT

NC

GND

CE

VDD

VDD

VDD

Oscillator

Error Amp. PWM Comp.

APW7077

VREF=1.0V

VDD

DriverPWM

Controller

PhaseCompensation

Soft-StartVoltage

Reference

RAMPGEN.

EXT

VDD

GND

CE

VDD

VDD

Oscillator

Error Amp. PWM Comp.

VDD

APW7077A

FB

VDD


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Typical Application Circuit

FB

CE

VDD

EXT

GND

VIN

R2820K/620K

R1/75K

APM2300A

10µH/1.5A SS12

4.7µF

1µF

2R22.5~5.2V

CFF/1000pF

APW7077A

VOUT=(1+R2/R1)*1.0V

9~12V/50mA

0.1µF

Application Circuit for APW7077A

10µF

CE

VOUTEXT

GND

VIN VOUT=3.3V(APW7077-33)

APM2300A

SS12

1µF

APW7077

NC

VOUT=5V(APW7077-50)

100µF

100µF

Application Circuit for APW7077

10µF

10µH/1.5A

FB

CE

VDD

EXT

GND

VIN

R2/300K

R1/75K

APM2300A

SS12

CFF/33pF

APW7077A

VOUT=(1+R2/R1)*1.0V

3~5V

10µF

100µF

10µH/1.5A

Application Circuit for APW7077A

*R1≦100KΩ is recommended

100µF

1µF


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Function Description

For APW7077A, the output voltage is adjustable. The out-put voltage is set using the FB pin and a resistor dividerconnected to the output as shown in the typical operatingcircuit. The internal reference voltage is 1.0V with 2%variation, so the ratio of the feedback resistors sets theoutput voltage according to the following equation:

Operation

The APW7077/A series are low noise fixed frequency volt-age-mode PWM DC-DC controllers, and consist of start-up circuit, reference voltage, oscillator, loop compensa-tion network, PWM control circuit, and low ON resistancedriver.APW7077 provides on–chip feedback resistor and loopcompensation network, the system designer can get theregulated fixed output voltage 3.3V and 5.0V with a smallnumber of external components, it is optimized for bat-tery powered portable products where large output cur-rent is required. APW7077A provides internal referencevoltage 1.0V and output voltage setting by external resis-tance for higher voltage requirement. The quiescent cur-rent is typically 120µA (VOUT = 3.3V, fsw = 300kHz), and canbe further reduced to about 1.0µA when the chip is dis-abled (VCE < 0.7V).The APW7077/A operation can be best understood by re-ferring to the block diagram. The error amplifier monitorsthe output voltage via the feedback resistor divider by com-paring the feedback voltage with the reference voltage.When the feedback voltage is lower than the referencevoltage, the error amplifier output will decrease. The erroramplifier output is then compared with the oscillator rampvoltage at the PWM controller.When the feedback voltage is higher than the referencevoltage, the error amplifier output increases and the dutycycle decreases. When the external power switch is on,the current ramps up in the inductor, storing energy in themagnetic field. When the external power switch is off, theenergy stored in the magnetic field is transferred to theoutput filter capacitor and the load. The output filter ca-pacitor stores the charge while the inductor current ishigher than the output current, and then sustains the out-put voltage until the next switching cycle.As the load current decreases, the switch transistor turnson for a shorter duty cycle. Under the light load condition,the controller will skip switching cycles to reduce powerconsumption, therefore, high efficiency is maintained atlight loads.

Fixed Output Voltage (for APW7077 Only)

The APW7077 VOUT is set by an integrate feedback resis-tor network. This is trimmed to a selected voltage 3.3V or5.0V with an accuracy of +/-2.5%.

Setting Output Voltage (for APW7077A only)

1.0V)R1

R2(1V OUT ×+=

Soft-Start

Oscillator

The oscillator frequency is internally set to 300kHz at anaccuracy of +/-10% and with low temperature coefficientof 3.3%/°C.

Enable/Disable Operation

The APW7077/A series offer IC shutdown mode by chipenable pin (CE pin) to reduce current consumption. Whenvoltage at pin CE is greater than 1.2V, the chip will beenabled, which means the controller is in normaloperation. When voltage at pin CE is less than 0.7V, thechip is disabled, which means IC is shutdown and qui-escent current becomes 1µA.

To avoid the thermal noise from feedback resistor, (R1+R2)resistance smaller than 1mΩ and 1% variation isrecommended.

There is a soft-start function integrated in APW7077/Aseries to avoid the over shooting when power on. Whenpower is applied to the device, the soft-start circuit firstpumps up the output voltage to let VDD (or VOUT) approxi-mately 1.65V at a fixed duty cycle 50%. This is the voltagelevel at which the controller can operate normally. Whensupply voltage more than 1.65V, the internal referencevoltage will be ramp up to let output voltage reach to set-ting voltage without over shooting issue whenever heavyload or light load condition. The soft-start time 25ms issetting by internal circuit.


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Function Description (Cont.)

Enable/Disable Operation (Cont.)

The CE pin is pulled high to VDD (or VOUT) by internal resistor,and this resistance is greater than 1mΩ. Therefore, thischip will enable normally when CE pin is floating.Important: DO NOT apply a voltage between 0.7V and 1.2Vto pin CE as this is the CE pin’s hysteresis voltage range.Clearly defined output states can only be obtained by ap-plying voltage out of this range.

Compensation

The device is designed to operate in continuous conduc-tion mode. An internal compensation circuit was designedto guarantee stability over the full input/output voltage andfull output load range.

Step-Up Converter Operating Mode

The step-up DC-DC controller is designed to operate incontinuous conduction mode (CCM) or discontinuousconduction mode (DCM).For a step up converter in a CCM, the duty cycle D is givenby:

OUT

INOUT

VVVD −=

In higher output voltage or small output current application,the step-up DC-DC controller operated in discontinuousconduction mode almost. For a step-up converter in aDCM, the duty cycle D is given by:

External components values can be calculated from theseequations, however, the optimized value should obtainedthrough experimental results.

Critical Inductance Value

The minimum value of inductor to maintain continuousconduction mode can be determined by the followingequation.

A system can be designed to operate in continuous modefor load currents above a certain level usually 20 to 50%(Ratio define as 0.2~0.5) of full load at minimum inputvoltage. When IO smaller than (IO*Ratio), the controllersystem will into DCM.∆IL is the ripple current flowing through the inductor, whichaffects the output voltage ripple and core losses. Basedon 20%(Ratio=0.2) current ripple, VOUT=5V, IO=1A andVIN =1.8V system, the inductance value is calculated as6.9µH and a 6.8µH inductor is used.The inductor current ripple has an expression :

Lfsw

DVI

INL

×

×=∆

The maximum DC input current can be calculated as :

(min)V

(max)IV(max)I

IN

OOUTL

×=

The inductor peak current can be calculated as :

Inductor Selection

APW7077/A series are designed to work well with a 6.8 to12µH inductors. In most applications, 10µH is a suffi-ciently low value to allow the use of a small surface mountcoil but large enough to maintain low ripple. Lower in-ductance values not only supply higher output current butalso increase the ripple and reduce efficiency. Higher in-ductor values not only reduce ripple and improve efficiencybut also limit output current. The inductor should havesmall DCR, usually less than 0.2Ω, to minimize loss. Itis necessary to choose an inductor with a saturation cur-rent greater than the peak current which the inductor willencounter in the application.

2I

VIVI L

IN

OOUTPK

∆+×=

−⋅

⋅⋅= 1

VV

VV

RTL2D

IN

OUT

IN

OUT

LOADS

Ratio IfD)D(1VL

OSW

2OUT

××−×≥

Notes:D - On-time duty cycleIL - Average inductor currentIPK - Peak inductor currentIO - Desired dc output currentVIN - Nominal operating dc input voltageVOUT - Desired dc output voltageESR - Equivalent series resistance of the outputcapacitor


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The inductor ripple current is important for a few reasons.One reason is the peak switch current will be the averageinductor current (IL) plus ∆IL.As a side note, discontinuous operation occurs when theinductor current falls to zero during a switching cycle, or∆IL is greater than the average inductor current. Therefore,continuous conduction mode occurs when ∆IL is lessthan the average inductor current. Care must be taken tomake sure that the switch will not reach its current limitduring normal operation.The inductor must also be sized accordingly. It shouldhave a saturation current rating higher than the peak in-ductor current expected. The output voltage ripple is alsoaffected by the total ripple current.

Inductor Selection

Output Capacitor

The output capacitor is used for sustaining the outputvoltage when the external MOSFET or bipolar transistoris switched on and smoothing the ripple voltage.The output capacitance needed is calculated in equation.

The ESR is also important because it determines thepeak to peak output voltage ripple according to the ap-proximated equation:

With 1% output voltage ripple, low ESR capacitor shouldbe used to reduce output ripple voltage. In general, a100µF to 220µF low ESR (0.10Ω to 0.30Ω) Tantalum ca-pacitor should be appropriate. The choice of output ca-pacitors is also somewhat arbitrary and depends on thedesign requirements for output voltage ripple. A minimumvalue of 10µF is recommended and may be increased toa larger value.

O

OUT

IVESR∆

∆=

OUTSW

O(max)OUT(min) Vf

DIC

∆××

=

Input Capacitor

The input capacitor can stabilize the input voltage andminimize peak current ripple from the source. The sizeused is dependant on the application and board layout. Ifthe regulator will be loaded uniformly, with very little load

changes, and at lower current outputs, the input capacitorsize can often be reduced. The size can also be reducedif the input of the regulator is very close to the sourceoutput. The size will generally need to be larger for appli-cations where the regulator is supplying nearly the maxi-mum rated output or if large load steps are expected. Aminimum value of 10µF should be used for the lessstressful conditions while a 22µF to 47µF capacitor maybe required for higher power and dynamic loads. SmallESR Tantalum or ceramic capacitor should be suitableand the total input ripple voltage can be calculated:

Design Example

It is supposed that a step-up DC-DC controller with 3.3Voutput delivering a maximum 1000mA output current with100 mV output ripple voltage powering from a 2.4V inputis to be designed.Design parameters:

VIN = 2.4VVOUT = 3.3VIO = 1.0ADVOUT = 100mVfSW= 300kHzRatio = 0.2 (typical for small output ripple voltage)

Assume the diode forward voltage and the transistor satu-ration voltage are both 0.3V. Determine the maximumsteady state duty cycle at VIN = 2.4V:

D=0.273Calculate the maximum inductance value which can gen-erate the desired current output and the preferred deltainductor current to average inductor current ratio:

L=10µHDetermine the average inductor current and peak induc-tor current:

IL=1.38A∆IL=0.218AIpk=1.45A

Therefore, a 10µH inductor with saturation current largerthan 1.73A can be selected as the initial trial.Determine the output capacitance value for the desiredoutput ripple voltage:

COUT=33µF

ESRIV LIN ×∆=∆


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The ESR of the output capacitor is 0.05Ω. Therefore, aTantalum capacitor with value of 33µF to 47µF and ESR of0.05Ω can be used as the output capacitor. However, ac-cording to experimental result, 220µF output capacitorgives better overall operational stability and smaller ripplevoltage.

Design Example (Cont.)


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Component Selection

Diode Selection

The output diode for a boost regulator must be chosencorrectly depending on the output voltage and the outputcurrent. The diode must be rated for a reverse voltageequal to or greater than the output voltage used. The av-erage current rating must be greater than the maximumload current expected, and the peak current rating mustbe greater than the peak inductor current. During shortcircuit testing, or if short circuit conditions are possible inthe application, the diode current rating must exceed theswitch current limit. The diode is the largest source ofloss in DC-DC converters. The most importance param-eters which affect their efficiency are the forward voltagedrop, VF, and the reverse recovery time, tr. The forwardvoltage drop creates a loss just by having a voltage acrossthe device while a current flowing through it. The reverserecovery time generates a loss when the diode is re-verse biased, and the current appears to actually flow back-wards through the diode due to the minority carriers be-ing swept from the P-N junction. Using Schottky diodeswith lower forward voltage drop will decrease power dis-sipation and increase efficiency.

External Switch Transistor

The APW7077/A can drive up to 110mA of gate drivecurrent. An N-channel MOSFET with a relatively low thresh-old voltage, low gate charge and low RDS(ON) is requiredto optimize overall circuit performance. The APW7077/AEvaluation Board uses a APM2300A. This NMOS devicewas chosen because it demonstrates an RDS_ON of45mΩ and a total gate charge Qg of 12nC (typ.).


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Output Capacitor


In APW7077A high output voltage application circuit, theinput voltage (VIN) is tied to chip supply pin (VDD). The inputcapacitor CIN in VIN must be placed close to the IC. This willreduce copper trace resistance which effects input volt-age ripple of the IC. For additional input voltage filtering, a1µF capacitor can be placed in parallel with CIN, close tothe VDD pin, to shunt any high frequency noise to theground.

Surface mount board layout is a critical portion of the totaldesign. The footprint for the semiconductor packagesmust be the correct size to insure proper solder connec-tion interface between the board and the package. Withthe correct pad geometry, the packages will self alignwhen subjected to a solder reflow process.

The output capacitor should be placed close to the outputterminals to obtain better smoothing effect on the outputripple.The output capacitor, COUT, should also be placed closeto the diode. Any copper trace connections for the COUTcapacitor can increase the series resistance, which di-rectly effects output voltage ripple and efficiency.

Feedback Network

On APW7077A application, the feedback networks shouldbe connected directly to a dedicated analog ground planeand this ground plane must connect to the GND pin.If no analog ground plane is available, this ground musttie directly to the GND pin. The feedback network, resis-tors R1 and R2, should be kept close to the FB pin andaway from the inductor, to minimize copper trace connec-tions that can inject noise into the system. Prevent con-nect feedback network on output decoupling MLCC.

Ground Plane

One point grounding should be used for the output powerreturn ground, the input power return ground, and thedevice switch ground to reduce noise. The input groundand output ground traces must be thick enough for cur-rent to flow through and for reducing ground bounce.

Power Signal Traces

Low resistance conducting paths should be used for thepower carrying traces to reduce power loss so as to im-prove efficiency (short and thick traces for connecting theinductor L can also reduce stray inductance). Trace con-nections made to the inductor and schottky diode shouldbe minimized to reduce power dissipation and increaseoverall efficiency.

Switching Noise Decoupling Capacitor

On APW7077 fixed voltage application, a 0.1µF ceramiccapacitor should be placed close to the VOUT pin and GNDpin of the chip to filter the switching spikes in the outputvoltage monitored by the VOUT pin.

Input Capacitor

Inductor

To minimize copper trace connections that can inject noiseinto the system, the inductor, switch, and Schottkydiode should be placed as close as possible to minimizethe noise coupling into other circuits.

Minimum Recommended Footprint for Surface MountedApplications

75mil

50mil

20mil

15mil

100mil

150m

il


APW7077/A

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Layout Consideration (Cont.)

Demo Board Circuit Layout

Minimum Recommended Footprint for Surface MountedApplications

Top Layout

1300

mil

1600mil

Bottom Layer


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Package Information

SOT-23-5

MAX.

0.057

0.051

0.024

0.006

0.009

0.0200.012

L 0.30

0

e

e1

E1

E

D

c

b

0.08

0.30

0.60 0.012

0.95 BSC

1.90 BSC

0.22

0.50

0.037 BSC

0.075 BSC

0.003

MIN.

MILLIMETERS

SYMBOL

A1

A2

A

0.00

0.90

SOT-23-5

MAX.

1.45

0.15

1.30

MIN.

0.000

0.035

INCHES

°8°0 °8°0

b c

e1

0L

VIEW A0.

25

GAUGE PLANESEATING PLANE

AA2

A1

e

D

EE1

SEEVIEW A

1.40

2.60

1.80

3.00

2.70 3.10 0.122

0.071

0.1180.102

0.055

0.106

Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.


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178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20

1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05

P0 P1 P2 D0 D1 T A0 B0 K0 SOT-23-5

4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00

-0.40 3.20±0.20 3.10±0.20 1.50±0.20


Devices Per Unit

(mm)


SOT-23-5 Tape & Reel 3000

A

E1

AB

W

F

T

P0OD0

BA0

P2

K0

B0

SECTION B-B

SECTION A-A

OD1

P1

H

T1

A

d


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Taping Direction Information

Classification Profile

SOT-23-5



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Classification Reflow ProfilesProfile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly

Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts)

100 °C 150 °C

60-120 seconds

150 °C 200 °C

60-120 seconds

Average ramp-up rate (Tsmax to TP)

3 °C/second max. 3°C/second max.

Liquidous temperature (TL) Time at liquidous (tL)

183 °C 60-150 seconds

217 °C 60-150 seconds

Peak package body Temperature (Tp)*

See Classification Temp in table 1 See Classification Temp in table 2

Time (tP)** within 5°C of the specified classification temperature (Tc)

20** seconds 30** seconds

Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max.

Time 25°C to peak temperature 6 minutes max. 8 minutes max.

* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.

Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package

Thickness Volume mm3


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Customer Service

Anpec Electronics Corp.Head Office :

No.6, Dusing 1st Road, SBIP,Hsin-Chu, Taiwan, R.O.C.Tel : 886-3-5642000Fax : 886-3-5642050

Taipei Branch :2F, No. 11, Lane 218

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