Analog and Telecommunication Electronics · 2012. 5. 30. · – High transit time Ft < 10 MHz •...
Transcript of Analog and Telecommunication Electronics · 2012. 5. 30. · – High transit time Ft < 10 MHz •...
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Politecnico di Torino - ICT School
Analog and Telecommunication Electronics
F2 – Active power devices
» MOS» BJT» IGBT, TRIAC» Safe Operating Area » Thermal analysis
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Lesson F2: active power devices
• Device structure, models, parameters– MOS– BJT– Other devices: IGBT, SCR, TRIAC
• Operating limits– Safe Operating Area – Power dissipation – Thermal analysis
• Reference:– Book 1: ch 3, ch 4, ch 5, ch 14
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Power BJT devices
• Fundamental relation:– Ic = β Ib
• Most relevant parameters for power applications:– Vcebr C-E breakdown voltage– Icmax max collector current– β current gain (lower with high currents)– Vcesat C-E voltage drop in saturation
– Thermal parameters» Max power, Thermal resistance
• Use vertical technology– More current in the same area (higher density)
Vce
Ic
Vbe
Ib
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Vertical power BJT structure
• Low doping in base region – Wide depletion layer, high brk voltage– Low current gain (5 … 20)– High transit time Ft < 10 MHz
• Primary breakdown– Avalanche in the BC junction
• Secondary breakdown– High current in small area (same problem as diodes)
» Multiple small devices with current sharing
• Critical region is near saturation:– High current, voltage drop high power dissipation– Need to get deep saturation (problem: low β)
p 10^16
n 10^14
n+ 10^19
n
B E
C
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BJT model
• Ebers-Moll model for BJT
• Simplified models(active region)
– BE diode + Ic source Ic = β Ib
– Linear models» Hybrid» Gm » …
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Switch or amplifier?
• Use as amplifier
– Active region
• Use as switch ON
– Saturation
• Use as switch OFF
– Cutoff
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BJT as a switch
• Operating points are on the load line
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BJT operation
• The current gain β decreases for high currents– Need significant driving power
• Operation is based on minority carriers– Slow dynamic behavior– Temperature dependence
• To increase BVceo, base region long and lightly doped– Higher epsilon– Reduced E field– Higher recombination probability– Lower current gain
• High voltage devices have low current gain
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Saturation model for BJT
• V source – Vcesat
(0.1 V)
• Series resistor– Rcesat
(few ohms)
• Lower Vcesatwith C-E inversion (lower β)
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Critical saturation parameters
• Low current gain (5 … 20)
• Critical region: – Near saturation, high Ic, residual Vce– High power dissipation
• Design solution– Guarantee deep saturation (high Ib drive)– Use Darlington connections
» Higher current gain (and Vbe)» Single integrated structure» Npn-npn» Npn-pnp
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Cutoff model for BJT
• Ib = 0 Ic = 0 (ideal)
• BC junction leakage current: Icbo– If base open, enters as Ib, causing Iceo = β Icbo
• Iceo causes power dissipation– Temperature rise higher leakage current further temperature rise … Thermal runaway
• Avoid high current density areas (hot spot)– Multiple devices, with current partition
• Steer Icbo away from Base– R to GND– Reverse bias BE (without breakdown!)
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Power MOS-FET
• Planar structure– Low power devices– Current and breakdown
voltage ratings function of the channel W & L.
• Vertical structure – Voltage rating function of
doping and thickness of N-epitaxial layer (vertical)
– Current rating is a function of the channel W & L
– A vertical structure can sustain both high V & I
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• The vertical structure creates a pn junction from body (S) to substrate (D)
• Current can always flow from S to D• A 1-quadrant switch
– 4-quadrant requires at least two MOS
MOS-FET parasitics
S
G
D
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• The vertical structure creates also a parasitic transistor
MOS-FET parasitics
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MOS-FET parameters
• Basic parameters:– Vdsbr D-S Breakdown voltage– Idmax Max Drain current– Vgsth Threshold voltage – Rdson ON equivalent resistance – Qg total charge injected into the Gate (for a given Vgs)
• A power transistor may consist of several cells (thousands)
• Power MOS DMOS, ….(double-diffused metal–oxide–semiconductor)
– Power MOSFETs are made using this technology
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MOS-FET model
• Model depends on operating point
– Low Vgs(subthreshold):
» Exponential
– Medium Vgs:» Square law
– High Vgs:» linear
Figure 14.36 Typical iD–vGS characteristic for a power MOSFET.
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MOS-FET output characteristic
• Warning!– Saturation in
MOS has a different meaning(called “active”region in BJT)
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MOS-FET switching models
• ON:– Equivalent resistance Ron
• OFF:– Leakage current Ioff
• Dynamic– GS capacitance– DS capacitance– Parasitic towards substrate
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MOS-FET gate charge
• Before threshold:– Cgs
• Active region– Miller effect on Cgd
• Saturation – Cgd
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MOS-FET vs BJT
• MOS-FET use majority carriers– High switching speed– Reduced temperature dependence
• MOSFET use simpler driving circuit– The Gate represents a plate of a capacitor (towards GND);
no current after first charging step, but– Fast switching circuits able to drive a high-capacitance load
• ON state– BJT modeled as Vcesat (+Ron)– MOS modeled as Ron
• OFF state: both modeled as current source (leakage)
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Four-layer devices
• Transistors have limitations in switching high currents at high voltages
• Other devices are specifically designed for such applications: four-layer devices
– Specific physical structure– Can be used only as switches (not for linear amplifiers)– A great deal in common with bipolar transistors
• SCR/Tyristor
• TRIAC/DIAC
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4-layer device operation
• Circuit with twointerconnectedBJTs
• Turning on T2 provides Ic2 as Ib1 to T1, and Ic1 as Ib2.
• Both devices conducts until the current goes to zero.
• The two BJTs can be built as a single 4-layer device
• Tyristor or Silicon Controlled Rectifier (SCR)
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SCR in CMOS logic circuits
• SCR structure intrinsic in CMOS ICs– Responsible for latch up
• Triggered by – Input levels out of GND-Vcc range– High energy particles
n-substrate
VSSVDD S DD S
G G
p+ p+ n+ n+n+ p+
pMOSFET nMOSFET
T1 T2p-well
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The thyristor
• Four-layerdevice with apnpn structure
• Three terminals:anode, cathodeand gate
– Gate is thecontrol input.
– Power flow between Anode and Cathode
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Thyristor in AC power control
• Triggered ON by a pulse on the Gate
– Stays ON as long as V > 0 (remainder of the half cycle)
• Returns OFF when V = 0
• Varying firing timechanges output power
• Single-wave allows control from 0–50% of full power
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The Triac and the Diac
• A bidirectional thyristor
• Allows full-wave controlusing a single device
• Often used with a diac: bidirectional triggerdiode to produce the gate drive pulses
– The DIAC breaks down at a particular voltage and fires the triac
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A simple lamp-dimmer using a triac
Phase shift network.Provides trigger voltage for Diac
Current pulseto fire the Triac
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IGBT
• The Insulated Gate Bipolar Transistor or IGBT combines bipolar and MOS devices
• MOSFET gate-drive + high Ic and low Vcesat of BJT – isolated gate FET for the control input, – bipolar power transistor as a switch, in a single device– combines high efficiency and fast switching.
• Used in medium- to high-power applications – switching power supply, motor control, induction heating, …– Large IGBT modules (many devices in parallel), can handle
» high current k 100 A» High voltages k 1000 V.
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IGBT structure
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IGBT characteristic
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Lesson F2: active power devices
• Device structure, models, parameters– MOS– BJT– Operating regions– Other devices: IGBT, SCR, TRIAC
• Operating limits– Safe Operating Area – Power dissipation – Thermal model
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Operating limits
• Breakdown voltage– If higher, insulating layers are broken
• Max current – If higher, wires or conducting paths can melt
• Max power– Power dissipation causes temperature rise (see max temp.)
• Max temperature– Doping distribution is modified changes in parameters– Silicon itself can melt
• Special application parameters– Radiation in space, ….
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Safe Operating Area
• Any electronic devices can handle limited power, voltage, current
• For active devices, the region of acceptable V,I is the Safe Operating Area (SOA), defined by
– Power limit (V x I > Pdmax)» Excess power cause temperature rise, with melting» Secondary breakdown: local heating and thermal runaway
– Voltage (V < Vbrk)» Excess voltage causes breakdown and insulator perforation
– Current (I < Imax)» Excess current cause heating and metal evaporation
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Safe Operating Area boundaries (BJT)
- not uniform current flow- high local power dissipation
Too high current Too high V x I (power)
Too high voltageActive & Safe
Operating Area (SOA)
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SOA for BJT (TIP31)
• Includes dynamic behavior
– Pdmaxdepends on pulseDuty Cycle
• Log scale!– I x V = K
is a straigthline
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SOA for MOS (IRF640)
• Dynamic behavior
• Log scale
• No secondary breakdown
• Id limited by Rds
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Power dissipation
• All electric devices dissipate a power Pd = V I– Power dissipation increases temperature– Any device has temperature limits, therefore power limits
• The effects of power dissipation can be modeled using thermal equivalent circuits
– Power current– Temperature node voltage – Heat conduction capability thermal resistance θr (°/W)
• Diodes/MOS/BJT power dissipated on the junctions– Heat must be brought outside, through a path including
» Junction-case – defined by manufacturer» Case-ambient – controlled using heat sinks
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• Manufacturers specify– Max power dissipation Pdmax– Max junction operating temperature Tjmax
• Power dissipation causes temperature rise
• Allowed power dissipation decreases with Ta
– Ta = Tjmax Pd = 0
Power derating
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Evaluation of temperature rise
• “Electric network” model for thermal behaviour– Power Pd current source– Temperature T node voltage – Heat conduction θ thermal resistance θr (°/W)
• Electrical equivalent circuit
• Tj – Ta = Pd θja
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• The thermal path from junctin to ambient consists of:
– Junction-Case: θJC» Thermal resistance
defined by the package
– Case-heatsink: θCS» Case and fixture
– Heatsink-ambient: θSA» Heatsink and
operating condition(air flow)
• Designer can control θCS and θSA
From junction to ambient
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• Power devices specified for– No heatsink, Ta specified, Tc ?– “infinite heatsink”, Tc = Ta
• Example datasheet TIP30
Thermal specification
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Power BJT datasheet (TIP31)
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Power MOS datasheet – IRF640
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Heatsink datasheet example
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Dynamic thermal response
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Lesson F2: summary
• Describe the structure of BJT power transistors.
• Describe the structure of MOS power transistors.
• Plot output V(I) characteristic of a MOS or BJT power device, and identify the different operating regions.
• What is secondary breakdown?
• Draw a model for power BJT.
• Describe differences between low and high power MOS-FETs.
• Which parameters defines the boundary of SOA?
• How can we evaluate the actual temperature of a power semiconductor junction?
• Define the “infinite heatsink” concept.