An On-Chip IP Address Lookup AlgorithmAuthor: Xuehong Sun and Yiqiang Q. ZhaoPublisher: IEEE TRANSACTIONS ON COMPUTERS, 2005Presenter: Yu Hao, TsengDate: 2013/03/06

Outline• Introduction• A Hardware Design Reference Model• Convert Longest Prefix Match to Range Search Problem• Put The Tree in Memory• Experimental Study• Conclusion

Introduction• Nowadays, one access to on-chip memory takes 1-5ns for

SRAM and about 10ns for DRAM.

• Compression algorithm for storing IP address lookup table• Compress the keys in a tree node• Use a shared pointer in a tree node• Use a bottom-up process from the leaf to the root scheme to

build the tree

A Hardware Design Reference Model

Convert Longest Prefix Match to Range Search Problem

Convert Longest Prefix Match to Range Search Problem (Cont.)

Put The Tree in Memory

• Compressed Endpoints• Common leading bits (Red region)• Common trailing zeros (Green region)

• Shared Pointers

Put The Tree in Memory (Cont.)

• Example 144 bits in each memory row• Internal node or leaf bits

• 1 bit• Number of keys

• 4 bits• Number of skip bits

• IPv4 : 5 bits• IPv6 : 7 bits

• Number of trailing zeros• IPv4 : 5 bits• IPv6 : 7 bits

• Keys• IPv4 : 144 – 1 – 4 – 5 – 5 – 20 = 109 bits• IPv6 : 144 – 1 – 4 – 7 – 7 – 20 = 105 bits

• Next tree pointer• 20bits

Put The Tree in Memory (Cont.)

Put The Tree in Memory (Cont.)• Build the Tree from the Bottom up• Variant One

• Let { e1, e2, e3, …, en} be the set of endpoints.• Assume that { e1, e2, e3, e4} are stored in the first leaf node, then the

endpoint {e5} will be stored in the next higher level node.• Assume that { e6, e7, e8, e9, e10} are stored in the second leaf node,

then the endpoint {e11} will be stored in the next higher level node.• {e1} and {e5} are involved to find the the common leading bits of the

first leaf node.• { e1, e2, e3, e4} are used to find the common trailing zeros of the first

leaf node.• {e5} and {e11} are involved to find the common leading bits of the

second leaf node.• { e6, e7, e8, e9, e10} are used to find the common trailing zeros of the

second leaf node.

Put The Tree in Memory (Cont.)• First leaf node• common leading bits

• 10000• common trailing zeros

• 00000000

• Second leaf node• common leading bits

• 1• common trailing zeros

• 00000000

Put The Tree in Memory (Cont.)• Build the Tree from the Bottom up• Variant Two

• Let { e1, e2, e3, …, en} be the set of endpoints.• Assume that { e1, e2, e3, e4} are stored in the first leaf node, { e5, e6,

e7, e8, e9} are stored in the second leaf node, and { e10, e11, e12, e13} are stored in the third leaf node and so on.

• Let n1 be the number of common leading bits of {e4} and {e5}.• Let n2 be the number of common leading bits of { e5, e6, e7, e8, e9}.• Let n3 = max {n1 + 1, n2}.• Truncate the n3 most significant bits of e5 and padded with trailing

zeros to form a 32 bit endpoint, e2’.

Put The Tree in Memory (Cont.)• Build the Tree from the Bottom up• Variant Three

• Variant One + Variant Two• Variant Four

• Divide the endpoints into groups according to their leading bits

Put The Tree in Memory (Cont.)• Optimization• The level one (root) doesn’t need the next tree pointer field.• put the root in the registers• the skip bits field

• For example, if we skip 2 bits in the first level and 7 bits in the second level, we only need to store 7- 2 = 5 as additional bits to skip. From the experiments, 3 bits is enough for IPv4.

Experimental Study• Port Merge

Experimental Study (Cont.)• Comparisons on Variants

Experimental Study (Cont.)• Results Using Real-Life Tables

Experimental Study (Cont.)• Results Using the Expanded IPv4 Tables

Experimental Study (Cont.)• Results Using the Expanded IPv6 Tables

Conclusion• We developed a novel algorithm which is tailored to hardware

technology. The distinguishing merit of our algorithm is that it has a very small memory requirement.